drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static void ide_outb (u8 val, unsigned long port)
  41 {
  42         outb(val, port);
  43 }
  44
  45 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  46 {
  47         outb(addr, port);
  48 }
  49
  50 void default_hwif_iops (ide_hwif_t *hwif)
  51 {
  52         hwif->OUTB      = ide_outb;
  53         hwif->OUTBSYNC  = ide_outbsync;
  54         hwif->INB       = ide_inb;
  55 }
  56
  57 /*
  58  *      MMIO operations, typically used for SATA controllers
  59  */
  60
  61 static u8 ide_mm_inb (unsigned long port)
  62 {
  63         return (u8) readb((void __iomem *) port);
  64 }
  65
  66 static void ide_mm_outb (u8 value, unsigned long port)
  67 {
  68         writeb(value, (void __iomem *) port);
  69 }
  70
  71 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
  72 {
  73         writeb(value, (void __iomem *) port);
  74 }
  75
  76 void default_hwif_mmiops (ide_hwif_t *hwif)
  77 {
  78         hwif->OUTB      = ide_mm_outb;
  79         /* Most systems will need to override OUTBSYNC, alas however
  80            this one is controller specific! */
  81         hwif->OUTBSYNC  = ide_mm_outbsync;
  82         hwif->INB       = ide_mm_inb;
  83 }
  84
  85 EXPORT_SYMBOL(default_hwif_mmiops);
  86
  87 void SELECT_DRIVE (ide_drive_t *drive)
  88 {
  89         ide_hwif_t *hwif = drive->hwif;
  90         const struct ide_port_ops *port_ops = hwif->port_ops;
  91
  92         if (port_ops && port_ops->selectproc)
  93                 port_ops->selectproc(drive);
  94
  95         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
  96 }
  97
  98 static void SELECT_MASK(ide_drive_t *drive, int mask)
  99 {
 100         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 101
 102         if (port_ops && port_ops->maskproc)
 103                 port_ops->maskproc(drive, mask);
 104 }
 105
 106 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 107 {
 108         ide_hwif_t *hwif = drive->hwif;
 109         struct ide_io_ports *io_ports = &hwif->io_ports;
 110         struct ide_taskfile *tf = &task->tf;
 111         void (*tf_outb)(u8 addr, unsigned long port);
 112         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 113         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 114
 115         if (mmio)
 116                 tf_outb = ide_mm_outb;
 117         else
 118                 tf_outb = ide_outb;
 119
 120         if (task->tf_flags & IDE_TFLAG_FLAGGED)
 121                 HIHI = 0xFF;
 122
 123         ide_set_irq(drive, 1);
 124
 125         if ((task->tf_flags & IDE_TFLAG_NO_SELECT_MASK) == 0)
 126                 SELECT_MASK(drive, 0);
 127
 128         if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
 129                 u16 data = (tf->hob_data << 8) | tf->data;
 130
 131                 if (mmio)
 132                         writew(data, (void __iomem *)io_ports->data_addr);
 133                 else
 134                         outw(data, io_ports->data_addr);
 135         }
 136
 137         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 138                 tf_outb(tf->hob_feature, io_ports->feature_addr);
 139         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 140                 tf_outb(tf->hob_nsect, io_ports->nsect_addr);
 141         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 142                 tf_outb(tf->hob_lbal, io_ports->lbal_addr);
 143         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 144                 tf_outb(tf->hob_lbam, io_ports->lbam_addr);
 145         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 146                 tf_outb(tf->hob_lbah, io_ports->lbah_addr);
 147
 148         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 149                 tf_outb(tf->feature, io_ports->feature_addr);
 150         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 151                 tf_outb(tf->nsect, io_ports->nsect_addr);
 152         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 153                 tf_outb(tf->lbal, io_ports->lbal_addr);
 154         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 155                 tf_outb(tf->lbam, io_ports->lbam_addr);
 156         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 157                 tf_outb(tf->lbah, io_ports->lbah_addr);
 158
 159         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 160                 tf_outb((tf->device & HIHI) | drive->select.all,
 161                          io_ports->device_addr);
 162 }
 163
 164 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 165 {
 166         ide_hwif_t *hwif = drive->hwif;
 167         struct ide_io_ports *io_ports = &hwif->io_ports;
 168         struct ide_taskfile *tf = &task->tf;
 169         void (*tf_outb)(u8 addr, unsigned long port);
 170         u8 (*tf_inb)(unsigned long port);
 171         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 172
 173         if (mmio) {
 174                 tf_outb = ide_mm_outb;
 175                 tf_inb  = ide_mm_inb;
 176         } else {
 177                 tf_outb = ide_outb;
 178                 tf_inb  = ide_inb;
 179         }
 180
 181         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 182                 u16 data;
 183
 184                 if (mmio)
 185                         data = readw((void __iomem *)io_ports->data_addr);
 186                 else
 187                         data = inw(io_ports->data_addr);
 188
 189                 tf->data = data & 0xff;
 190                 tf->hob_data = (data >> 8) & 0xff;
 191         }
 192
 193         /* be sure we're looking at the low order bits */
 194         tf_outb(drive->ctl & ~0x80, io_ports->ctl_addr);
 195
 196         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 197                 tf->nsect  = tf_inb(io_ports->nsect_addr);
 198         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 199                 tf->lbal   = tf_inb(io_ports->lbal_addr);
 200         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 201                 tf->lbam   = tf_inb(io_ports->lbam_addr);
 202         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 203                 tf->lbah   = tf_inb(io_ports->lbah_addr);
 204         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 205                 tf->device = tf_inb(io_ports->device_addr);
 206
 207         if (task->tf_flags & IDE_TFLAG_LBA48) {
 208                 tf_outb(drive->ctl | 0x80, io_ports->ctl_addr);
 209
 210                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 211                         tf->hob_feature = tf_inb(io_ports->feature_addr);
 212                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 213                         tf->hob_nsect   = tf_inb(io_ports->nsect_addr);
 214                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 215                         tf->hob_lbal    = tf_inb(io_ports->lbal_addr);
 216                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 217                         tf->hob_lbam    = tf_inb(io_ports->lbam_addr);
 218                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 219                         tf->hob_lbah    = tf_inb(io_ports->lbah_addr);
 220         }
 221 }
 222
 223 /*
 224  * Some localbus EIDE interfaces require a special access sequence
 225  * when using 32-bit I/O instructions to transfer data.  We call this
 226  * the "vlb_sync" sequence, which consists of three successive reads
 227  * of the sector count register location, with interrupts disabled
 228  * to ensure that the reads all happen together.
 229  */
 230 static void ata_vlb_sync(unsigned long port)
 231 {
 232         (void)inb(port);
 233         (void)inb(port);
 234         (void)inb(port);
 235 }
 236
 237 /*
 238  * This is used for most PIO data transfers *from* the IDE interface
 239  *
 240  * These routines will round up any request for an odd number of bytes,
 241  * so if an odd len is specified, be sure that there's at least one
 242  * extra byte allocated for the buffer.
 243  */
 244 static void ata_input_data(ide_drive_t *drive, struct request *rq,
 245                            void *buf, unsigned int len)
 246 {
 247         ide_hwif_t *hwif = drive->hwif;
 248         struct ide_io_ports *io_ports = &hwif->io_ports;
 249         unsigned long data_addr = io_ports->data_addr;
 250         u8 io_32bit = drive->io_32bit;
 251         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 252
 253         len++;
 254
 255         if (io_32bit) {
 256                 unsigned long uninitialized_var(flags);
 257
 258                 if ((io_32bit & 2) && !mmio) {
 259                         local_irq_save(flags);
 260                         ata_vlb_sync(io_ports->nsect_addr);
 261                 }
 262
 263                 if (mmio)
 264                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
 265                 else
 266                         insl(data_addr, buf, len / 4);
 267
 268                 if ((io_32bit & 2) && !mmio)
 269                         local_irq_restore(flags);
 270
 271                 if ((len & 3) >= 2) {
 272                         if (mmio)
 273                                 __ide_mm_insw((void __iomem *)data_addr,
 274                                                 (u8 *)buf + (len & ~3), 1);
 275                         else
 276                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
 277                 }
 278         } else {
 279                 if (mmio)
 280                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
 281                 else
 282                         insw(data_addr, buf, len / 2);
 283         }
 284 }
 285
 286 /*
 287  * This is used for most PIO data transfers *to* the IDE interface
 288  */
 289 static void ata_output_data(ide_drive_t *drive, struct request *rq,
 290                             void *buf, unsigned int len)
 291 {
 292         ide_hwif_t *hwif = drive->hwif;
 293         struct ide_io_ports *io_ports = &hwif->io_ports;
 294         unsigned long data_addr = io_ports->data_addr;
 295         u8 io_32bit = drive->io_32bit;
 296         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 297
 298         if (io_32bit) {
 299                 unsigned long uninitialized_var(flags);
 300
 301                 if ((io_32bit & 2) && !mmio) {
 302                         local_irq_save(flags);
 303                         ata_vlb_sync(io_ports->nsect_addr);
 304                 }
 305
 306                 if (mmio)
 307                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
 308                 else
 309                         outsl(data_addr, buf, len / 4);
 310
 311                 if ((io_32bit & 2) && !mmio)
 312                         local_irq_restore(flags);
 313
 314                 if ((len & 3) >= 2) {
 315                         if (mmio)
 316                                 __ide_mm_outsw((void __iomem *)data_addr,
 317                                                  (u8 *)buf + (len & ~3), 1);
 318                         else
 319                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
 320                 }
 321         } else {
 322                 if (mmio)
 323                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
 324                 else
 325                         outsw(data_addr, buf, len / 2);
 326         }
 327 }
 328
 329 void default_hwif_transport(ide_hwif_t *hwif)
 330 {
 331         hwif->tf_load     = ide_tf_load;
 332         hwif->tf_read     = ide_tf_read;
 333
 334         hwif->input_data  = ata_input_data;
 335         hwif->output_data = ata_output_data;
 336 }
 337
 338 void ide_fix_driveid (struct hd_driveid *id)
 339 {
 340 #ifndef __LITTLE_ENDIAN
 341 # ifdef __BIG_ENDIAN
 342         int i;
 343         u16 *stringcast;
 344
 345         id->config         = __le16_to_cpu(id->config);
 346         id->cyls           = __le16_to_cpu(id->cyls);
 347         id->reserved2      = __le16_to_cpu(id->reserved2);
 348         id->heads          = __le16_to_cpu(id->heads);
 349         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 350         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 351         id->sectors        = __le16_to_cpu(id->sectors);
 352         id->vendor0        = __le16_to_cpu(id->vendor0);
 353         id->vendor1        = __le16_to_cpu(id->vendor1);
 354         id->vendor2        = __le16_to_cpu(id->vendor2);
 355         stringcast = (u16 *)&id->serial_no[0];
 356         for (i = 0; i < (20/2); i++)
 357                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 358         id->buf_type       = __le16_to_cpu(id->buf_type);
 359         id->buf_size       = __le16_to_cpu(id->buf_size);
 360         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 361         stringcast = (u16 *)&id->fw_rev[0];
 362         for (i = 0; i < (8/2); i++)
 363                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 364         stringcast = (u16 *)&id->model[0];
 365         for (i = 0; i < (40/2); i++)
 366                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 367         id->dword_io       = __le16_to_cpu(id->dword_io);
 368         id->reserved50     = __le16_to_cpu(id->reserved50);
 369         id->field_valid    = __le16_to_cpu(id->field_valid);
 370         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 371         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 372         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 373         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 374         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 375         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 376         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 377         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 378         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 379         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 380         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 381         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 382         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 383         for (i = 0; i < 2; ++i)
 384                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 385         for (i = 0; i < 4; ++i)
 386                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 387         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 388         for (i = 0; i < 4; ++i)
 389                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 390         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 391         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 392         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 393         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 394         id->cfsse          = __le16_to_cpu(id->cfsse);
 395         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 396         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 397         id->csf_default    = __le16_to_cpu(id->csf_default);
 398         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 399         id->trseuc         = __le16_to_cpu(id->trseuc);
 400         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 401         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 402         id->mprc           = __le16_to_cpu(id->mprc);
 403         id->hw_config      = __le16_to_cpu(id->hw_config);
 404         id->acoustic       = __le16_to_cpu(id->acoustic);
 405         id->msrqs          = __le16_to_cpu(id->msrqs);
 406         id->sxfert         = __le16_to_cpu(id->sxfert);
 407         id->sal            = __le16_to_cpu(id->sal);
 408         id->spg            = __le32_to_cpu(id->spg);
 409         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 410         for (i = 0; i < 22; i++)
 411                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 412         id->last_lun       = __le16_to_cpu(id->last_lun);
 413         id->word127        = __le16_to_cpu(id->word127);
 414         id->dlf            = __le16_to_cpu(id->dlf);
 415         id->csfo           = __le16_to_cpu(id->csfo);
 416         for (i = 0; i < 26; i++)
 417                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 418         id->word156        = __le16_to_cpu(id->word156);
 419         for (i = 0; i < 3; i++)
 420                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 421         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 422         for (i = 0; i < 14; i++)
 423                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 424         for (i = 0; i < 31; i++)
 425                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 426         for (i = 0; i < 48; i++)
 427                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 428         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 429 # else
 430 #  error "Please fix <asm/byteorder.h>"
 431 # endif
 432 #endif
 433 }
 434
 435 /*
 436  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 437  * removing leading/trailing blanks and compressing internal blanks.
 438  * It is primarily used to tidy up the model name/number fields as
 439  * returned by the WIN_[P]IDENTIFY commands.
 440  */
 441
 442 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 443 {
 444         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 445
 446         if (byteswap) {
 447                 /* convert from big-endian to host byte order */
 448                 for (p = end ; p != s;) {
 449                         unsigned short *pp = (unsigned short *) (p -= 2);
 450                         *pp = ntohs(*pp);
 451                 }
 452         }
 453         /* strip leading blanks */
 454         while (s != end && *s == ' ')
 455                 ++s;
 456         /* compress internal blanks and strip trailing blanks */
 457         while (s != end && *s) {
 458                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 459                         *p++ = *(s-1);
 460         }
 461         /* wipe out trailing garbage */
 462         while (p != end)
 463                 *p++ = '\0';
 464 }
 465
 466 EXPORT_SYMBOL(ide_fixstring);
 467
 468 /*
 469  * Needed for PCI irq sharing
 470  */
 471 int drive_is_ready (ide_drive_t *drive)
 472 {
 473         ide_hwif_t *hwif        = HWIF(drive);
 474         u8 stat                 = 0;
 475
 476         if (drive->waiting_for_dma)
 477                 return hwif->dma_ops->dma_test_irq(drive);
 478
 479 #if 0
 480         /* need to guarantee 400ns since last command was issued */
 481         udelay(1);
 482 #endif
 483
 484         /*
 485          * We do a passive status test under shared PCI interrupts on
 486          * cards that truly share the ATA side interrupt, but may also share
 487          * an interrupt with another pci card/device.  We make no assumptions
 488          * about possible isa-pnp and pci-pnp issues yet.
 489          */
 490         if (hwif->io_ports.ctl_addr)
 491                 stat = ide_read_altstatus(drive);
 492         else
 493                 /* Note: this may clear a pending IRQ!! */
 494                 stat = ide_read_status(drive);
 495
 496         if (stat & BUSY_STAT)
 497                 /* drive busy:  definitely not interrupting */
 498                 return 0;
 499
 500         /* drive ready: *might* be interrupting */
 501         return 1;
 502 }
 503
 504 EXPORT_SYMBOL(drive_is_ready);
 505
 506 /*
 507  * This routine busy-waits for the drive status to be not "busy".
 508  * It then checks the status for all of the "good" bits and none
 509  * of the "bad" bits, and if all is okay it returns 0.  All other
 510  * cases return error -- caller may then invoke ide_error().
 511  *
 512  * This routine should get fixed to not hog the cpu during extra long waits..
 513  * That could be done by busy-waiting for the first jiffy or two, and then
 514  * setting a timer to wake up at half second intervals thereafter,
 515  * until timeout is achieved, before timing out.
 516  */
 517 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 518 {
 519         unsigned long flags;
 520         int i;
 521         u8 stat;
 522
 523         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 524         stat = ide_read_status(drive);
 525
 526         if (stat & BUSY_STAT) {
 527                 local_irq_set(flags);
 528                 timeout += jiffies;
 529                 while ((stat = ide_read_status(drive)) & BUSY_STAT) {
 530                         if (time_after(jiffies, timeout)) {
 531                                 /*
 532                                  * One last read after the timeout in case
 533                                  * heavy interrupt load made us not make any
 534                                  * progress during the timeout..
 535                                  */
 536                                 stat = ide_read_status(drive);
 537                                 if (!(stat & BUSY_STAT))
 538                                         break;
 539
 540                                 local_irq_restore(flags);
 541                                 *rstat = stat;
 542                                 return -EBUSY;
 543                         }
 544                 }
 545                 local_irq_restore(flags);
 546         }
 547         /*
 548          * Allow status to settle, then read it again.
 549          * A few rare drives vastly violate the 400ns spec here,
 550          * so we'll wait up to 10usec for a "good" status
 551          * rather than expensively fail things immediately.
 552          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 553          */
 554         for (i = 0; i < 10; i++) {
 555                 udelay(1);
 556                 stat = ide_read_status(drive);
 557
 558                 if (OK_STAT(stat, good, bad)) {
 559                         *rstat = stat;
 560                         return 0;
 561                 }
 562         }
 563         *rstat = stat;
 564         return -EFAULT;
 565 }
 566
 567 /*
 568  * In case of error returns error value after doing "*startstop = ide_error()".
 569  * The caller should return the updated value of "startstop" in this case,
 570  * "startstop" is unchanged when the function returns 0.
 571  */
 572 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 573 {
 574         int err;
 575         u8 stat;
 576
 577         /* bail early if we've exceeded max_failures */
 578         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 579                 *startstop = ide_stopped;
 580                 return 1;
 581         }
 582
 583         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 584
 585         if (err) {
 586                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 587                 *startstop = ide_error(drive, s, stat);
 588         }
 589
 590         return err;
 591 }
 592
 593 EXPORT_SYMBOL(ide_wait_stat);
 594
 595 /**
 596  *      ide_in_drive_list       -       look for drive in black/white list
 597  *      @id: drive identifier
 598  *      @drive_table: list to inspect
 599  *
 600  *      Look for a drive in the blacklist and the whitelist tables
 601  *      Returns 1 if the drive is found in the table.
 602  */
 603
 604 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 605 {
 606         for ( ; drive_table->id_model; drive_table++)
 607                 if ((!strcmp(drive_table->id_model, id->model)) &&
 608                     (!drive_table->id_firmware ||
 609                      strstr(id->fw_rev, drive_table->id_firmware)))
 610                         return 1;
 611         return 0;
 612 }
 613
 614 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 615
 616 /*
 617  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 618  * We list them here and depend on the device side cable detection for them.
 619  *
 620  * Some optical devices with the buggy firmwares have the same problem.
 621  */
 622 static const struct drive_list_entry ivb_list[] = {
 623         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 624         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 625         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 626         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 627         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 628         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
 629         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
 630         { NULL                          , NULL          }
 631 };
 632
 633 /*
 634  *  All hosts that use the 80c ribbon must use!
 635  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 636  */
 637 u8 eighty_ninty_three (ide_drive_t *drive)
 638 {
 639         ide_hwif_t *hwif = drive->hwif;
 640         struct hd_driveid *id = drive->id;
 641         int ivb = ide_in_drive_list(id, ivb_list);
 642
 643         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 644                 return 1;
 645
 646         if (ivb)
 647                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 648                                   drive->name);
 649
 650         if (ide_dev_is_sata(id) && !ivb)
 651                 return 1;
 652
 653         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 654                 goto no_80w;
 655
 656         /*
 657          * FIXME:
 658          * - change master/slave IDENTIFY order
 659          * - force bit13 (80c cable present) check also for !ivb devices
 660          *   (unless the slave device is pre-ATA3)
 661          */
 662         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 663                 return 1;
 664
 665 no_80w:
 666         if (drive->udma33_warned == 1)
 667                 return 0;
 668
 669         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 670                             "limiting max speed to UDMA33\n",
 671                             drive->name,
 672                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 673
 674         drive->udma33_warned = 1;
 675
 676         return 0;
 677 }
 678
 679 int ide_driveid_update(ide_drive_t *drive)
 680 {
 681         ide_hwif_t *hwif = drive->hwif;
 682         struct hd_driveid *id;
 683         unsigned long timeout, flags;
 684         u8 stat;
 685
 686         /*
 687          * Re-read drive->id for possible DMA mode
 688          * change (copied from ide-probe.c)
 689          */
 690
 691         SELECT_MASK(drive, 1);
 692         ide_set_irq(drive, 1);
 693         msleep(50);
 694         hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr);
 695         timeout = jiffies + WAIT_WORSTCASE;
 696         do {
 697                 if (time_after(jiffies, timeout)) {
 698                         SELECT_MASK(drive, 0);
 699                         return 0;       /* drive timed-out */
 700                 }
 701
 702                 msleep(50);     /* give drive a breather */
 703                 stat = ide_read_altstatus(drive);
 704         } while (stat & BUSY_STAT);
 705
 706         msleep(50);     /* wait for IRQ and DRQ_STAT */
 707         stat = ide_read_status(drive);
 708
 709         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 710                 SELECT_MASK(drive, 0);
 711                 printk("%s: CHECK for good STATUS\n", drive->name);
 712                 return 0;
 713         }
 714         local_irq_save(flags);
 715         SELECT_MASK(drive, 0);
 716         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 717         if (!id) {
 718                 local_irq_restore(flags);
 719                 return 0;
 720         }
 721         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
 722         (void)ide_read_status(drive);   /* clear drive IRQ */
 723         local_irq_enable();
 724         local_irq_restore(flags);
 725         ide_fix_driveid(id);
 726         if (id) {
 727                 drive->id->dma_ultra = id->dma_ultra;
 728                 drive->id->dma_mword = id->dma_mword;
 729                 drive->id->dma_1word = id->dma_1word;
 730                 /* anything more ? */
 731                 kfree(id);
 732
 733                 if (drive->using_dma && ide_id_dma_bug(drive))
 734                         ide_dma_off(drive);
 735         }
 736
 737         return 1;
 738 }
 739
 740 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 741 {
 742         ide_hwif_t *hwif = drive->hwif;
 743         struct ide_io_ports *io_ports = &hwif->io_ports;
 744         int error = 0;
 745         u8 stat;
 746
 747 //      while (HWGROUP(drive)->busy)
 748 //              msleep(50);
 749
 750 #ifdef CONFIG_BLK_DEV_IDEDMA
 751         if (hwif->dma_ops)      /* check if host supports DMA */
 752                 hwif->dma_ops->dma_host_set(drive, 0);
 753 #endif
 754
 755         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 756         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 757                 goto skip;
 758
 759         /*
 760          * Don't use ide_wait_cmd here - it will
 761          * attempt to set_geometry and recalibrate,
 762          * but for some reason these don't work at
 763          * this point (lost interrupt).
 764          */
 765         /*
 766          * Select the drive, and issue the SETFEATURES command
 767          */
 768         disable_irq_nosync(hwif->irq);
 769
 770         /*
 771          *      FIXME: we race against the running IRQ here if
 772          *      this is called from non IRQ context. If we use
 773          *      disable_irq() we hang on the error path. Work
 774          *      is needed.
 775          */
 776
 777         udelay(1);
 778         SELECT_DRIVE(drive);
 779         SELECT_MASK(drive, 0);
 780         udelay(1);
 781         ide_set_irq(drive, 0);
 782         hwif->OUTB(speed, io_ports->nsect_addr);
 783         hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
 784         hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr);
 785         if (drive->quirk_list == 2)
 786                 ide_set_irq(drive, 1);
 787
 788         error = __ide_wait_stat(drive, drive->ready_stat,
 789                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 790                                 WAIT_CMD, &stat);
 791
 792         SELECT_MASK(drive, 0);
 793
 794         enable_irq(hwif->irq);
 795
 796         if (error) {
 797                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 798                 return error;
 799         }
 800
 801         drive->id->dma_ultra &= ~0xFF00;
 802         drive->id->dma_mword &= ~0x0F00;
 803         drive->id->dma_1word &= ~0x0F00;
 804
 805  skip:
 806 #ifdef CONFIG_BLK_DEV_IDEDMA
 807         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 808             drive->using_dma)
 809                 hwif->dma_ops->dma_host_set(drive, 1);
 810         else if (hwif->dma_ops) /* check if host supports DMA */
 811                 ide_dma_off_quietly(drive);
 812 #endif
 813
 814         switch(speed) {
 815                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 816                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 817                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 818                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 819                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 820                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 821                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 822                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 823                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 824                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 825                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 826                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 827                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 828                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 829                 default: break;
 830         }
 831         if (!drive->init_speed)
 832                 drive->init_speed = speed;
 833         drive->current_speed = speed;
 834         return error;
 835 }
 836
 837 /*
 838  * This should get invoked any time we exit the driver to
 839  * wait for an interrupt response from a drive.  handler() points
 840  * at the appropriate code to handle the next interrupt, and a
 841  * timer is started to prevent us from waiting forever in case
 842  * something goes wrong (see the ide_timer_expiry() handler later on).
 843  *
 844  * See also ide_execute_command
 845  */
 846 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 847                       unsigned int timeout, ide_expiry_t *expiry)
 848 {
 849         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 850
 851         BUG_ON(hwgroup->handler);
 852         hwgroup->handler        = handler;
 853         hwgroup->expiry         = expiry;
 854         hwgroup->timer.expires  = jiffies + timeout;
 855         hwgroup->req_gen_timer  = hwgroup->req_gen;
 856         add_timer(&hwgroup->timer);
 857 }
 858
 859 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 860                       unsigned int timeout, ide_expiry_t *expiry)
 861 {
 862         unsigned long flags;
 863         spin_lock_irqsave(&ide_lock, flags);
 864         __ide_set_handler(drive, handler, timeout, expiry);
 865         spin_unlock_irqrestore(&ide_lock, flags);
 866 }
 867
 868 EXPORT_SYMBOL(ide_set_handler);
 869
 870 /**
 871  *      ide_execute_command     -       execute an IDE command
 872  *      @drive: IDE drive to issue the command against
 873  *      @command: command byte to write
 874  *      @handler: handler for next phase
 875  *      @timeout: timeout for command
 876  *      @expiry:  handler to run on timeout
 877  *
 878  *      Helper function to issue an IDE command. This handles the
 879  *      atomicity requirements, command timing and ensures that the
 880  *      handler and IRQ setup do not race. All IDE command kick off
 881  *      should go via this function or do equivalent locking.
 882  */
 883
 884 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 885                          unsigned timeout, ide_expiry_t *expiry)
 886 {
 887         unsigned long flags;
 888         ide_hwif_t *hwif = HWIF(drive);
 889
 890         spin_lock_irqsave(&ide_lock, flags);
 891         __ide_set_handler(drive, handler, timeout, expiry);
 892         hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr);
 893         /*
 894          * Drive takes 400nS to respond, we must avoid the IRQ being
 895          * serviced before that.
 896          *
 897          * FIXME: we could skip this delay with care on non shared devices
 898          */
 899         ndelay(400);
 900         spin_unlock_irqrestore(&ide_lock, flags);
 901 }
 902 EXPORT_SYMBOL(ide_execute_command);
 903
 904 void ide_execute_pkt_cmd(ide_drive_t *drive)
 905 {
 906         ide_hwif_t *hwif = drive->hwif;
 907         unsigned long flags;
 908
 909         spin_lock_irqsave(&ide_lock, flags);
 910         hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr);
 911         ndelay(400);
 912         spin_unlock_irqrestore(&ide_lock, flags);
 913 }
 914 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
 915
 916 /* needed below */
 917 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 918
 919 /*
 920  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 921  * during an atapi drive reset operation. If the drive has not yet responded,
 922  * and we have not yet hit our maximum waiting time, then the timer is restarted
 923  * for another 50ms.
 924  */
 925 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 926 {
 927         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 928         u8 stat;
 929
 930         SELECT_DRIVE(drive);
 931         udelay (10);
 932         stat = ide_read_status(drive);
 933
 934         if (OK_STAT(stat, 0, BUSY_STAT))
 935                 printk("%s: ATAPI reset complete\n", drive->name);
 936         else {
 937                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 938                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 939                         /* continue polling */
 940                         return ide_started;
 941                 }
 942                 /* end of polling */
 943                 hwgroup->polling = 0;
 944                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 945                                 drive->name, stat);
 946                 /* do it the old fashioned way */
 947                 return do_reset1(drive, 1);
 948         }
 949         /* done polling */
 950         hwgroup->polling = 0;
 951         hwgroup->resetting = 0;
 952         return ide_stopped;
 953 }
 954
 955 /*
 956  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 957  * during an ide reset operation. If the drives have not yet responded,
 958  * and we have not yet hit our maximum waiting time, then the timer is restarted
 959  * for another 50ms.
 960  */
 961 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 962 {
 963         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 964         ide_hwif_t *hwif        = HWIF(drive);
 965         const struct ide_port_ops *port_ops = hwif->port_ops;
 966         u8 tmp;
 967
 968         if (port_ops && port_ops->reset_poll) {
 969                 if (port_ops->reset_poll(drive)) {
 970                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 971                                 hwif->name, drive->name);
 972                         return ide_stopped;
 973                 }
 974         }
 975
 976         tmp = ide_read_status(drive);
 977
 978         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
 979                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 980                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 981                         /* continue polling */
 982                         return ide_started;
 983                 }
 984                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
 985                 drive->failures++;
 986         } else  {
 987                 printk("%s: reset: ", hwif->name);
 988                 tmp = ide_read_error(drive);
 989
 990                 if (tmp == 1) {
 991                         printk("success\n");
 992                         drive->failures = 0;
 993                 } else {
 994                         drive->failures++;
 995                         printk("master: ");
 996                         switch (tmp & 0x7f) {
 997                                 case 1: printk("passed");
 998                                         break;
 999                                 case 2: printk("formatter device error");
1000                                         break;
1001                                 case 3: printk("sector buffer error");
1002                                         break;
1003                                 case 4: printk("ECC circuitry error");
1004                                         break;
1005                                 case 5: printk("controlling MPU error");
1006                                         break;
1007                                 default:printk("error (0x%02x?)", tmp);
1008                         }
1009                         if (tmp & 0x80)
1010                                 printk("; slave: failed");
1011                         printk("\n");
1012                 }
1013         }
1014         hwgroup->polling = 0;   /* done polling */
1015         hwgroup->resetting = 0; /* done reset attempt */
1016         return ide_stopped;
1017 }
1018
1019 static void ide_disk_pre_reset(ide_drive_t *drive)
1020 {
1021         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1022
1023         drive->special.all = 0;
1024         drive->special.b.set_geometry = legacy;
1025         drive->special.b.recalibrate  = legacy;
1026         drive->mult_count = 0;
1027         if (!drive->keep_settings && !drive->using_dma)
1028                 drive->mult_req = 0;
1029         if (drive->mult_req != drive->mult_count)
1030                 drive->special.b.set_multmode = 1;
1031 }
1032
1033 static void pre_reset(ide_drive_t *drive)
1034 {
1035         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1036
1037         if (drive->media == ide_disk)
1038                 ide_disk_pre_reset(drive);
1039         else
1040                 drive->post_reset = 1;
1041
1042         if (drive->using_dma) {
1043                 if (drive->crc_count)
1044                         ide_check_dma_crc(drive);
1045                 else
1046                         ide_dma_off(drive);
1047         }
1048
1049         if (!drive->keep_settings) {
1050                 if (!drive->using_dma) {
1051                         drive->unmask = 0;
1052                         drive->io_32bit = 0;
1053                 }
1054                 return;
1055         }
1056
1057         if (port_ops && port_ops->pre_reset)
1058                 port_ops->pre_reset(drive);
1059
1060         if (drive->current_speed != 0xff)
1061                 drive->desired_speed = drive->current_speed;
1062         drive->current_speed = 0xff;
1063 }
1064
1065 /*
1066  * do_reset1() attempts to recover a confused drive by resetting it.
1067  * Unfortunately, resetting a disk drive actually resets all devices on
1068  * the same interface, so it can really be thought of as resetting the
1069  * interface rather than resetting the drive.
1070  *
1071  * ATAPI devices have their own reset mechanism which allows them to be
1072  * individually reset without clobbering other devices on the same interface.
1073  *
1074  * Unfortunately, the IDE interface does not generate an interrupt to let
1075  * us know when the reset operation has finished, so we must poll for this.
1076  * Equally poor, though, is the fact that this may a very long time to complete,
1077  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1078  * we set a timer to poll at 50ms intervals.
1079  */
1080 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1081 {
1082         unsigned int unit;
1083         unsigned long flags;
1084         ide_hwif_t *hwif;
1085         ide_hwgroup_t *hwgroup;
1086         struct ide_io_ports *io_ports;
1087         const struct ide_port_ops *port_ops;
1088         u8 ctl;
1089
1090         spin_lock_irqsave(&ide_lock, flags);
1091         hwif = HWIF(drive);
1092         hwgroup = HWGROUP(drive);
1093
1094         io_ports = &hwif->io_ports;
1095
1096         /* We must not reset with running handlers */
1097         BUG_ON(hwgroup->handler != NULL);
1098
1099         /* For an ATAPI device, first try an ATAPI SRST. */
1100         if (drive->media != ide_disk && !do_not_try_atapi) {
1101                 hwgroup->resetting = 1;
1102                 pre_reset(drive);
1103                 SELECT_DRIVE(drive);
1104                 udelay (20);
1105                 hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr);
1106                 ndelay(400);
1107                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1108                 hwgroup->polling = 1;
1109                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1110                 spin_unlock_irqrestore(&ide_lock, flags);
1111                 return ide_started;
1112         }
1113
1114         /*
1115          * First, reset any device state data we were maintaining
1116          * for any of the drives on this interface.
1117          */
1118         for (unit = 0; unit < MAX_DRIVES; ++unit)
1119                 pre_reset(&hwif->drives[unit]);
1120
1121         if (io_ports->ctl_addr == 0) {
1122                 spin_unlock_irqrestore(&ide_lock, flags);
1123                 return ide_stopped;
1124         }
1125
1126         hwgroup->resetting = 1;
1127         /*
1128          * Note that we also set nIEN while resetting the device,
1129          * to mask unwanted interrupts from the interface during the reset.
1130          * However, due to the design of PC hardware, this will cause an
1131          * immediate interrupt due to the edge transition it produces.
1132          * This single interrupt gives us a "fast poll" for drives that
1133          * recover from reset very quickly, saving us the first 50ms wait time.
1134          */
1135         /* set SRST and nIEN */
1136         hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr);
1137         /* more than enough time */
1138         udelay(10);
1139         if (drive->quirk_list == 2)
1140                 ctl = drive->ctl;       /* clear SRST and nIEN */
1141         else
1142                 ctl = drive->ctl | 2;   /* clear SRST, leave nIEN */
1143         hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr);
1144         /* more than enough time */
1145         udelay(10);
1146         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1147         hwgroup->polling = 1;
1148         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1149
1150         /*
1151          * Some weird controller like resetting themselves to a strange
1152          * state when the disks are reset this way. At least, the Winbond
1153          * 553 documentation says that
1154          */
1155         port_ops = hwif->port_ops;
1156         if (port_ops && port_ops->resetproc)
1157                 port_ops->resetproc(drive);
1158
1159         spin_unlock_irqrestore(&ide_lock, flags);
1160         return ide_started;
1161 }
1162
1163 /*
1164  * ide_do_reset() is the entry point to the drive/interface reset code.
1165  */
1166
1167 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1168 {
1169         return do_reset1(drive, 0);
1170 }
1171
1172 EXPORT_SYMBOL(ide_do_reset);
1173
1174 /*
1175  * ide_wait_not_busy() waits for the currently selected device on the hwif
1176  * to report a non-busy status, see comments in ide_probe_port().
1177  */
1178 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1179 {
1180         u8 stat = 0;
1181
1182         while(timeout--) {
1183                 /*
1184                  * Turn this into a schedule() sleep once I'm sure
1185                  * about locking issues (2.5 work ?).
1186                  */
1187                 mdelay(1);
1188                 stat = hwif->INB(hwif->io_ports.status_addr);
1189                 if ((stat & BUSY_STAT) == 0)
1190                         return 0;
1191                 /*
1192                  * Assume a value of 0xff means nothing is connected to
1193                  * the interface and it doesn't implement the pull-down
1194                  * resistor on D7.
1195                  */
1196                 if (stat == 0xff)
1197                         return -ENODEV;
1198                 touch_softlockup_watchdog();
1199                 touch_nmi_watchdog();
1200         }
1201         return -EBUSY;
1202 }
1203
1204 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1205