drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static u16 ide_inw (unsigned long port)
  41 {
  42         return (u16) inw(port);
  43 }
  44
  45 static void ide_insw (unsigned long port, void *addr, u32 count)
  46 {
  47         insw(port, addr, count);
  48 }
  49
  50 static void ide_insl (unsigned long port, void *addr, u32 count)
  51 {
  52         insl(port, addr, count);
  53 }
  54
  55 static void ide_outb (u8 val, unsigned long port)
  56 {
  57         outb(val, port);
  58 }
  59
  60 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  61 {
  62         outb(addr, port);
  63 }
  64
  65 static void ide_outw (u16 val, unsigned long port)
  66 {
  67         outw(val, port);
  68 }
  69
  70 static void ide_outsw (unsigned long port, void *addr, u32 count)
  71 {
  72         outsw(port, addr, count);
  73 }
  74
  75 static void ide_outsl (unsigned long port, void *addr, u32 count)
  76 {
  77         outsl(port, addr, count);
  78 }
  79
  80 void default_hwif_iops (ide_hwif_t *hwif)
  81 {
  82         hwif->OUTB      = ide_outb;
  83         hwif->OUTBSYNC  = ide_outbsync;
  84         hwif->OUTW      = ide_outw;
  85         hwif->OUTSW     = ide_outsw;
  86         hwif->OUTSL     = ide_outsl;
  87         hwif->INB       = ide_inb;
  88         hwif->INW       = ide_inw;
  89         hwif->INSW      = ide_insw;
  90         hwif->INSL      = ide_insl;
  91 }
  92
  93 /*
  94  *      MMIO operations, typically used for SATA controllers
  95  */
  96
  97 static u8 ide_mm_inb (unsigned long port)
  98 {
  99         return (u8) readb((void __iomem *) port);
 100 }
 101
 102 static u16 ide_mm_inw (unsigned long port)
 103 {
 104         return (u16) readw((void __iomem *) port);
 105 }
 106
 107 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
 108 {
 109         __ide_mm_insw((void __iomem *) port, addr, count);
 110 }
 111
 112 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
 113 {
 114         __ide_mm_insl((void __iomem *) port, addr, count);
 115 }
 116
 117 static void ide_mm_outb (u8 value, unsigned long port)
 118 {
 119         writeb(value, (void __iomem *) port);
 120 }
 121
 122 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
 123 {
 124         writeb(value, (void __iomem *) port);
 125 }
 126
 127 static void ide_mm_outw (u16 value, unsigned long port)
 128 {
 129         writew(value, (void __iomem *) port);
 130 }
 131
 132 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
 133 {
 134         __ide_mm_outsw((void __iomem *) port, addr, count);
 135 }
 136
 137 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
 138 {
 139         __ide_mm_outsl((void __iomem *) port, addr, count);
 140 }
 141
 142 void default_hwif_mmiops (ide_hwif_t *hwif)
 143 {
 144         hwif->OUTB      = ide_mm_outb;
 145         /* Most systems will need to override OUTBSYNC, alas however
 146            this one is controller specific! */
 147         hwif->OUTBSYNC  = ide_mm_outbsync;
 148         hwif->OUTW      = ide_mm_outw;
 149         hwif->OUTSW     = ide_mm_outsw;
 150         hwif->OUTSL     = ide_mm_outsl;
 151         hwif->INB       = ide_mm_inb;
 152         hwif->INW       = ide_mm_inw;
 153         hwif->INSW      = ide_mm_insw;
 154         hwif->INSL      = ide_mm_insl;
 155 }
 156
 157 EXPORT_SYMBOL(default_hwif_mmiops);
 158
 159 void SELECT_DRIVE (ide_drive_t *drive)
 160 {
 161         ide_hwif_t *hwif = drive->hwif;
 162         const struct ide_port_ops *port_ops = hwif->port_ops;
 163
 164         if (port_ops && port_ops->selectproc)
 165                 port_ops->selectproc(drive);
 166
 167         hwif->OUTB(drive->select.all, hwif->io_ports[IDE_SELECT_OFFSET]);
 168 }
 169
 170 void SELECT_MASK (ide_drive_t *drive, int mask)
 171 {
 172         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 173
 174         if (port_ops && port_ops->maskproc)
 175                 port_ops->maskproc(drive, mask);
 176 }
 177
 178 /*
 179  * Some localbus EIDE interfaces require a special access sequence
 180  * when using 32-bit I/O instructions to transfer data.  We call this
 181  * the "vlb_sync" sequence, which consists of three successive reads
 182  * of the sector count register location, with interrupts disabled
 183  * to ensure that the reads all happen together.
 184  */
 185 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 186 {
 187         (void) HWIF(drive)->INB(port);
 188         (void) HWIF(drive)->INB(port);
 189         (void) HWIF(drive)->INB(port);
 190 }
 191
 192 /*
 193  * This is used for most PIO data transfers *from* the IDE interface
 194  */
 195 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
 196 {
 197         ide_hwif_t *hwif        = HWIF(drive);
 198         u8 io_32bit             = drive->io_32bit;
 199
 200         if (io_32bit) {
 201                 if (io_32bit & 2) {
 202                         unsigned long flags;
 203
 204                         local_irq_save(flags);
 205                         ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
 206                         hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 207                                    wcount);
 208                         local_irq_restore(flags);
 209                 } else
 210                         hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 211                                    wcount);
 212         } else
 213                 hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 214                            wcount << 1);
 215 }
 216
 217 /*
 218  * This is used for most PIO data transfers *to* the IDE interface
 219  */
 220 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
 221 {
 222         ide_hwif_t *hwif        = HWIF(drive);
 223         u8 io_32bit             = drive->io_32bit;
 224
 225         if (io_32bit) {
 226                 if (io_32bit & 2) {
 227                         unsigned long flags;
 228
 229                         local_irq_save(flags);
 230                         ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
 231                         hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 232                                     wcount);
 233                         local_irq_restore(flags);
 234                 } else
 235                         hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 236                                     wcount);
 237         } else
 238                 hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 239                             wcount << 1);
 240 }
 241
 242 /*
 243  * The following routines are mainly used by the ATAPI drivers.
 244  *
 245  * These routines will round up any request for an odd number of bytes,
 246  * so if an odd bytecount is specified, be sure that there's at least one
 247  * extra byte allocated for the buffer.
 248  */
 249
 250 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 251 {
 252         ide_hwif_t *hwif = HWIF(drive);
 253
 254         ++bytecount;
 255 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 256         if (MACH_IS_ATARI || MACH_IS_Q40) {
 257                 /* Atari has a byte-swapped IDE interface */
 258                 insw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 259                            bytecount / 2);
 260                 return;
 261         }
 262 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 263         hwif->ata_input_data(drive, buffer, bytecount / 4);
 264         if ((bytecount & 0x03) >= 2)
 265                 hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET],
 266                            (u8 *)buffer + (bytecount & ~0x03), 1);
 267 }
 268
 269 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 270 {
 271         ide_hwif_t *hwif = HWIF(drive);
 272
 273         ++bytecount;
 274 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 275         if (MACH_IS_ATARI || MACH_IS_Q40) {
 276                 /* Atari has a byte-swapped IDE interface */
 277                 outsw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
 278                             bytecount / 2);
 279                 return;
 280         }
 281 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 282         hwif->ata_output_data(drive, buffer, bytecount / 4);
 283         if ((bytecount & 0x03) >= 2)
 284                 hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET],
 285                             (u8 *)buffer + (bytecount & ~0x03), 1);
 286 }
 287
 288 void default_hwif_transport(ide_hwif_t *hwif)
 289 {
 290         hwif->ata_input_data            = ata_input_data;
 291         hwif->ata_output_data           = ata_output_data;
 292         hwif->atapi_input_bytes         = atapi_input_bytes;
 293         hwif->atapi_output_bytes        = atapi_output_bytes;
 294 }
 295
 296 void ide_fix_driveid (struct hd_driveid *id)
 297 {
 298 #ifndef __LITTLE_ENDIAN
 299 # ifdef __BIG_ENDIAN
 300         int i;
 301         u16 *stringcast;
 302
 303         id->config         = __le16_to_cpu(id->config);
 304         id->cyls           = __le16_to_cpu(id->cyls);
 305         id->reserved2      = __le16_to_cpu(id->reserved2);
 306         id->heads          = __le16_to_cpu(id->heads);
 307         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 308         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 309         id->sectors        = __le16_to_cpu(id->sectors);
 310         id->vendor0        = __le16_to_cpu(id->vendor0);
 311         id->vendor1        = __le16_to_cpu(id->vendor1);
 312         id->vendor2        = __le16_to_cpu(id->vendor2);
 313         stringcast = (u16 *)&id->serial_no[0];
 314         for (i = 0; i < (20/2); i++)
 315                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 316         id->buf_type       = __le16_to_cpu(id->buf_type);
 317         id->buf_size       = __le16_to_cpu(id->buf_size);
 318         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 319         stringcast = (u16 *)&id->fw_rev[0];
 320         for (i = 0; i < (8/2); i++)
 321                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 322         stringcast = (u16 *)&id->model[0];
 323         for (i = 0; i < (40/2); i++)
 324                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 325         id->dword_io       = __le16_to_cpu(id->dword_io);
 326         id->reserved50     = __le16_to_cpu(id->reserved50);
 327         id->field_valid    = __le16_to_cpu(id->field_valid);
 328         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 329         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 330         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 331         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 332         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 333         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 334         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 335         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 336         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 337         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 338         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 339         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 340         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 341         for (i = 0; i < 2; ++i)
 342                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 343         for (i = 0; i < 4; ++i)
 344                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 345         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 346         for (i = 0; i < 4; ++i)
 347                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 348         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 349         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 350         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 351         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 352         id->cfsse          = __le16_to_cpu(id->cfsse);
 353         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 354         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 355         id->csf_default    = __le16_to_cpu(id->csf_default);
 356         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 357         id->trseuc         = __le16_to_cpu(id->trseuc);
 358         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 359         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 360         id->mprc           = __le16_to_cpu(id->mprc);
 361         id->hw_config      = __le16_to_cpu(id->hw_config);
 362         id->acoustic       = __le16_to_cpu(id->acoustic);
 363         id->msrqs          = __le16_to_cpu(id->msrqs);
 364         id->sxfert         = __le16_to_cpu(id->sxfert);
 365         id->sal            = __le16_to_cpu(id->sal);
 366         id->spg            = __le32_to_cpu(id->spg);
 367         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 368         for (i = 0; i < 22; i++)
 369                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 370         id->last_lun       = __le16_to_cpu(id->last_lun);
 371         id->word127        = __le16_to_cpu(id->word127);
 372         id->dlf            = __le16_to_cpu(id->dlf);
 373         id->csfo           = __le16_to_cpu(id->csfo);
 374         for (i = 0; i < 26; i++)
 375                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 376         id->word156        = __le16_to_cpu(id->word156);
 377         for (i = 0; i < 3; i++)
 378                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 379         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 380         for (i = 0; i < 14; i++)
 381                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 382         for (i = 0; i < 31; i++)
 383                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 384         for (i = 0; i < 48; i++)
 385                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 386         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 387 # else
 388 #  error "Please fix <asm/byteorder.h>"
 389 # endif
 390 #endif
 391 }
 392
 393 /*
 394  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 395  * removing leading/trailing blanks and compressing internal blanks.
 396  * It is primarily used to tidy up the model name/number fields as
 397  * returned by the WIN_[P]IDENTIFY commands.
 398  */
 399
 400 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 401 {
 402         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 403
 404         if (byteswap) {
 405                 /* convert from big-endian to host byte order */
 406                 for (p = end ; p != s;) {
 407                         unsigned short *pp = (unsigned short *) (p -= 2);
 408                         *pp = ntohs(*pp);
 409                 }
 410         }
 411         /* strip leading blanks */
 412         while (s != end && *s == ' ')
 413                 ++s;
 414         /* compress internal blanks and strip trailing blanks */
 415         while (s != end && *s) {
 416                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 417                         *p++ = *(s-1);
 418         }
 419         /* wipe out trailing garbage */
 420         while (p != end)
 421                 *p++ = '\0';
 422 }
 423
 424 EXPORT_SYMBOL(ide_fixstring);
 425
 426 /*
 427  * Needed for PCI irq sharing
 428  */
 429 int drive_is_ready (ide_drive_t *drive)
 430 {
 431         ide_hwif_t *hwif        = HWIF(drive);
 432         u8 stat                 = 0;
 433
 434         if (drive->waiting_for_dma)
 435                 return hwif->dma_ops->dma_test_irq(drive);
 436
 437 #if 0
 438         /* need to guarantee 400ns since last command was issued */
 439         udelay(1);
 440 #endif
 441
 442         /*
 443          * We do a passive status test under shared PCI interrupts on
 444          * cards that truly share the ATA side interrupt, but may also share
 445          * an interrupt with another pci card/device.  We make no assumptions
 446          * about possible isa-pnp and pci-pnp issues yet.
 447          */
 448         if (hwif->io_ports[IDE_CONTROL_OFFSET])
 449                 stat = ide_read_altstatus(drive);
 450         else
 451                 /* Note: this may clear a pending IRQ!! */
 452                 stat = ide_read_status(drive);
 453
 454         if (stat & BUSY_STAT)
 455                 /* drive busy:  definitely not interrupting */
 456                 return 0;
 457
 458         /* drive ready: *might* be interrupting */
 459         return 1;
 460 }
 461
 462 EXPORT_SYMBOL(drive_is_ready);
 463
 464 /*
 465  * This routine busy-waits for the drive status to be not "busy".
 466  * It then checks the status for all of the "good" bits and none
 467  * of the "bad" bits, and if all is okay it returns 0.  All other
 468  * cases return error -- caller may then invoke ide_error().
 469  *
 470  * This routine should get fixed to not hog the cpu during extra long waits..
 471  * That could be done by busy-waiting for the first jiffy or two, and then
 472  * setting a timer to wake up at half second intervals thereafter,
 473  * until timeout is achieved, before timing out.
 474  */
 475 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 476 {
 477         unsigned long flags;
 478         int i;
 479         u8 stat;
 480
 481         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 482         stat = ide_read_status(drive);
 483
 484         if (stat & BUSY_STAT) {
 485                 local_irq_set(flags);
 486                 timeout += jiffies;
 487                 while ((stat = ide_read_status(drive)) & BUSY_STAT) {
 488                         if (time_after(jiffies, timeout)) {
 489                                 /*
 490                                  * One last read after the timeout in case
 491                                  * heavy interrupt load made us not make any
 492                                  * progress during the timeout..
 493                                  */
 494                                 stat = ide_read_status(drive);
 495                                 if (!(stat & BUSY_STAT))
 496                                         break;
 497
 498                                 local_irq_restore(flags);
 499                                 *rstat = stat;
 500                                 return -EBUSY;
 501                         }
 502                 }
 503                 local_irq_restore(flags);
 504         }
 505         /*
 506          * Allow status to settle, then read it again.
 507          * A few rare drives vastly violate the 400ns spec here,
 508          * so we'll wait up to 10usec for a "good" status
 509          * rather than expensively fail things immediately.
 510          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 511          */
 512         for (i = 0; i < 10; i++) {
 513                 udelay(1);
 514                 stat = ide_read_status(drive);
 515
 516                 if (OK_STAT(stat, good, bad)) {
 517                         *rstat = stat;
 518                         return 0;
 519                 }
 520         }
 521         *rstat = stat;
 522         return -EFAULT;
 523 }
 524
 525 /*
 526  * In case of error returns error value after doing "*startstop = ide_error()".
 527  * The caller should return the updated value of "startstop" in this case,
 528  * "startstop" is unchanged when the function returns 0.
 529  */
 530 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 531 {
 532         int err;
 533         u8 stat;
 534
 535         /* bail early if we've exceeded max_failures */
 536         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 537                 *startstop = ide_stopped;
 538                 return 1;
 539         }
 540
 541         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 542
 543         if (err) {
 544                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 545                 *startstop = ide_error(drive, s, stat);
 546         }
 547
 548         return err;
 549 }
 550
 551 EXPORT_SYMBOL(ide_wait_stat);
 552
 553 /**
 554  *      ide_in_drive_list       -       look for drive in black/white list
 555  *      @id: drive identifier
 556  *      @drive_table: list to inspect
 557  *
 558  *      Look for a drive in the blacklist and the whitelist tables
 559  *      Returns 1 if the drive is found in the table.
 560  */
 561
 562 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 563 {
 564         for ( ; drive_table->id_model; drive_table++)
 565                 if ((!strcmp(drive_table->id_model, id->model)) &&
 566                     (!drive_table->id_firmware ||
 567                      strstr(id->fw_rev, drive_table->id_firmware)))
 568                         return 1;
 569         return 0;
 570 }
 571
 572 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 573
 574 /*
 575  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 576  * We list them here and depend on the device side cable detection for them.
 577  *
 578  * Some optical devices with the buggy firmwares have the same problem.
 579  */
 580 static const struct drive_list_entry ivb_list[] = {
 581         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 582         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 583         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 584         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 585         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 586         { NULL                          , NULL          }
 587 };
 588
 589 /*
 590  *  All hosts that use the 80c ribbon must use!
 591  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 592  */
 593 u8 eighty_ninty_three (ide_drive_t *drive)
 594 {
 595         ide_hwif_t *hwif = drive->hwif;
 596         struct hd_driveid *id = drive->id;
 597         int ivb = ide_in_drive_list(id, ivb_list);
 598
 599         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 600                 return 1;
 601
 602         if (ivb)
 603                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 604                                   drive->name);
 605
 606         if (ide_dev_is_sata(id) && !ivb)
 607                 return 1;
 608
 609         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 610                 goto no_80w;
 611
 612         /*
 613          * FIXME:
 614          * - change master/slave IDENTIFY order
 615          * - force bit13 (80c cable present) check also for !ivb devices
 616          *   (unless the slave device is pre-ATA3)
 617          */
 618         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 619                 return 1;
 620
 621 no_80w:
 622         if (drive->udma33_warned == 1)
 623                 return 0;
 624
 625         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 626                             "limiting max speed to UDMA33\n",
 627                             drive->name,
 628                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 629
 630         drive->udma33_warned = 1;
 631
 632         return 0;
 633 }
 634
 635 int ide_driveid_update(ide_drive_t *drive)
 636 {
 637         ide_hwif_t *hwif = drive->hwif;
 638         struct hd_driveid *id;
 639         unsigned long timeout, flags;
 640         u8 stat;
 641
 642         /*
 643          * Re-read drive->id for possible DMA mode
 644          * change (copied from ide-probe.c)
 645          */
 646
 647         SELECT_MASK(drive, 1);
 648         ide_set_irq(drive, 1);
 649         msleep(50);
 650         hwif->OUTB(WIN_IDENTIFY, hwif->io_ports[IDE_COMMAND_OFFSET]);
 651         timeout = jiffies + WAIT_WORSTCASE;
 652         do {
 653                 if (time_after(jiffies, timeout)) {
 654                         SELECT_MASK(drive, 0);
 655                         return 0;       /* drive timed-out */
 656                 }
 657
 658                 msleep(50);     /* give drive a breather */
 659                 stat = ide_read_altstatus(drive);
 660         } while (stat & BUSY_STAT);
 661
 662         msleep(50);     /* wait for IRQ and DRQ_STAT */
 663         stat = ide_read_status(drive);
 664
 665         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 666                 SELECT_MASK(drive, 0);
 667                 printk("%s: CHECK for good STATUS\n", drive->name);
 668                 return 0;
 669         }
 670         local_irq_save(flags);
 671         SELECT_MASK(drive, 0);
 672         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 673         if (!id) {
 674                 local_irq_restore(flags);
 675                 return 0;
 676         }
 677         hwif->ata_input_data(drive, id, SECTOR_WORDS);
 678         (void)ide_read_status(drive);   /* clear drive IRQ */
 679         local_irq_enable();
 680         local_irq_restore(flags);
 681         ide_fix_driveid(id);
 682         if (id) {
 683                 drive->id->dma_ultra = id->dma_ultra;
 684                 drive->id->dma_mword = id->dma_mword;
 685                 drive->id->dma_1word = id->dma_1word;
 686                 /* anything more ? */
 687                 kfree(id);
 688
 689                 if (drive->using_dma && ide_id_dma_bug(drive))
 690                         ide_dma_off(drive);
 691         }
 692
 693         return 1;
 694 }
 695
 696 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 697 {
 698         ide_hwif_t *hwif = drive->hwif;
 699         int error = 0;
 700         u8 stat;
 701
 702 //      while (HWGROUP(drive)->busy)
 703 //              msleep(50);
 704
 705 #ifdef CONFIG_BLK_DEV_IDEDMA
 706         if (hwif->dma_ops)      /* check if host supports DMA */
 707                 hwif->dma_ops->dma_host_set(drive, 0);
 708 #endif
 709
 710         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 711         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 712                 goto skip;
 713
 714         /*
 715          * Don't use ide_wait_cmd here - it will
 716          * attempt to set_geometry and recalibrate,
 717          * but for some reason these don't work at
 718          * this point (lost interrupt).
 719          */
 720         /*
 721          * Select the drive, and issue the SETFEATURES command
 722          */
 723         disable_irq_nosync(hwif->irq);
 724
 725         /*
 726          *      FIXME: we race against the running IRQ here if
 727          *      this is called from non IRQ context. If we use
 728          *      disable_irq() we hang on the error path. Work
 729          *      is needed.
 730          */
 731
 732         udelay(1);
 733         SELECT_DRIVE(drive);
 734         SELECT_MASK(drive, 0);
 735         udelay(1);
 736         ide_set_irq(drive, 0);
 737         hwif->OUTB(speed, hwif->io_ports[IDE_NSECTOR_OFFSET]);
 738         hwif->OUTB(SETFEATURES_XFER, hwif->io_ports[IDE_FEATURE_OFFSET]);
 739         hwif->OUTBSYNC(drive, WIN_SETFEATURES,
 740                        hwif->io_ports[IDE_COMMAND_OFFSET]);
 741         if (drive->quirk_list == 2)
 742                 ide_set_irq(drive, 1);
 743
 744         error = __ide_wait_stat(drive, drive->ready_stat,
 745                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 746                                 WAIT_CMD, &stat);
 747
 748         SELECT_MASK(drive, 0);
 749
 750         enable_irq(hwif->irq);
 751
 752         if (error) {
 753                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 754                 return error;
 755         }
 756
 757         drive->id->dma_ultra &= ~0xFF00;
 758         drive->id->dma_mword &= ~0x0F00;
 759         drive->id->dma_1word &= ~0x0F00;
 760
 761  skip:
 762 #ifdef CONFIG_BLK_DEV_IDEDMA
 763         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 764             drive->using_dma)
 765                 hwif->dma_ops->dma_host_set(drive, 1);
 766         else if (hwif->dma_ops) /* check if host supports DMA */
 767                 ide_dma_off_quietly(drive);
 768 #endif
 769
 770         switch(speed) {
 771                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 772                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 773                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 774                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 775                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 776                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 777                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 778                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 779                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 780                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 781                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 782                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 783                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 784                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 785                 default: break;
 786         }
 787         if (!drive->init_speed)
 788                 drive->init_speed = speed;
 789         drive->current_speed = speed;
 790         return error;
 791 }
 792
 793 /*
 794  * This should get invoked any time we exit the driver to
 795  * wait for an interrupt response from a drive.  handler() points
 796  * at the appropriate code to handle the next interrupt, and a
 797  * timer is started to prevent us from waiting forever in case
 798  * something goes wrong (see the ide_timer_expiry() handler later on).
 799  *
 800  * See also ide_execute_command
 801  */
 802 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 803                       unsigned int timeout, ide_expiry_t *expiry)
 804 {
 805         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 806
 807         BUG_ON(hwgroup->handler);
 808         hwgroup->handler        = handler;
 809         hwgroup->expiry         = expiry;
 810         hwgroup->timer.expires  = jiffies + timeout;
 811         hwgroup->req_gen_timer  = hwgroup->req_gen;
 812         add_timer(&hwgroup->timer);
 813 }
 814
 815 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 816                       unsigned int timeout, ide_expiry_t *expiry)
 817 {
 818         unsigned long flags;
 819         spin_lock_irqsave(&ide_lock, flags);
 820         __ide_set_handler(drive, handler, timeout, expiry);
 821         spin_unlock_irqrestore(&ide_lock, flags);
 822 }
 823
 824 EXPORT_SYMBOL(ide_set_handler);
 825
 826 /**
 827  *      ide_execute_command     -       execute an IDE command
 828  *      @drive: IDE drive to issue the command against
 829  *      @command: command byte to write
 830  *      @handler: handler for next phase
 831  *      @timeout: timeout for command
 832  *      @expiry:  handler to run on timeout
 833  *
 834  *      Helper function to issue an IDE command. This handles the
 835  *      atomicity requirements, command timing and ensures that the
 836  *      handler and IRQ setup do not race. All IDE command kick off
 837  *      should go via this function or do equivalent locking.
 838  */
 839
 840 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 841                          unsigned timeout, ide_expiry_t *expiry)
 842 {
 843         unsigned long flags;
 844         ide_hwif_t *hwif = HWIF(drive);
 845
 846         spin_lock_irqsave(&ide_lock, flags);
 847         __ide_set_handler(drive, handler, timeout, expiry);
 848         hwif->OUTBSYNC(drive, cmd, hwif->io_ports[IDE_COMMAND_OFFSET]);
 849         /*
 850          * Drive takes 400nS to respond, we must avoid the IRQ being
 851          * serviced before that.
 852          *
 853          * FIXME: we could skip this delay with care on non shared devices
 854          */
 855         ndelay(400);
 856         spin_unlock_irqrestore(&ide_lock, flags);
 857 }
 858
 859 EXPORT_SYMBOL(ide_execute_command);
 860
 861
 862 /* needed below */
 863 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 864
 865 /*
 866  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 867  * during an atapi drive reset operation. If the drive has not yet responded,
 868  * and we have not yet hit our maximum waiting time, then the timer is restarted
 869  * for another 50ms.
 870  */
 871 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 872 {
 873         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 874         u8 stat;
 875
 876         SELECT_DRIVE(drive);
 877         udelay (10);
 878         stat = ide_read_status(drive);
 879
 880         if (OK_STAT(stat, 0, BUSY_STAT))
 881                 printk("%s: ATAPI reset complete\n", drive->name);
 882         else {
 883                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 884                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 885                         /* continue polling */
 886                         return ide_started;
 887                 }
 888                 /* end of polling */
 889                 hwgroup->polling = 0;
 890                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 891                                 drive->name, stat);
 892                 /* do it the old fashioned way */
 893                 return do_reset1(drive, 1);
 894         }
 895         /* done polling */
 896         hwgroup->polling = 0;
 897         hwgroup->resetting = 0;
 898         return ide_stopped;
 899 }
 900
 901 /*
 902  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 903  * during an ide reset operation. If the drives have not yet responded,
 904  * and we have not yet hit our maximum waiting time, then the timer is restarted
 905  * for another 50ms.
 906  */
 907 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 908 {
 909         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 910         ide_hwif_t *hwif        = HWIF(drive);
 911         const struct ide_port_ops *port_ops = hwif->port_ops;
 912         u8 tmp;
 913
 914         if (port_ops && port_ops->reset_poll) {
 915                 if (port_ops->reset_poll(drive)) {
 916                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 917                                 hwif->name, drive->name);
 918                         return ide_stopped;
 919                 }
 920         }
 921
 922         tmp = ide_read_status(drive);
 923
 924         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
 925                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 926                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 927                         /* continue polling */
 928                         return ide_started;
 929                 }
 930                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
 931                 drive->failures++;
 932         } else  {
 933                 printk("%s: reset: ", hwif->name);
 934                 tmp = ide_read_error(drive);
 935
 936                 if (tmp == 1) {
 937                         printk("success\n");
 938                         drive->failures = 0;
 939                 } else {
 940                         drive->failures++;
 941                         printk("master: ");
 942                         switch (tmp & 0x7f) {
 943                                 case 1: printk("passed");
 944                                         break;
 945                                 case 2: printk("formatter device error");
 946                                         break;
 947                                 case 3: printk("sector buffer error");
 948                                         break;
 949                                 case 4: printk("ECC circuitry error");
 950                                         break;
 951                                 case 5: printk("controlling MPU error");
 952                                         break;
 953                                 default:printk("error (0x%02x?)", tmp);
 954                         }
 955                         if (tmp & 0x80)
 956                                 printk("; slave: failed");
 957                         printk("\n");
 958                 }
 959         }
 960         hwgroup->polling = 0;   /* done polling */
 961         hwgroup->resetting = 0; /* done reset attempt */
 962         return ide_stopped;
 963 }
 964
 965 static void ide_disk_pre_reset(ide_drive_t *drive)
 966 {
 967         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
 968
 969         drive->special.all = 0;
 970         drive->special.b.set_geometry = legacy;
 971         drive->special.b.recalibrate  = legacy;
 972         drive->mult_count = 0;
 973         if (!drive->keep_settings && !drive->using_dma)
 974                 drive->mult_req = 0;
 975         if (drive->mult_req != drive->mult_count)
 976                 drive->special.b.set_multmode = 1;
 977 }
 978
 979 static void pre_reset(ide_drive_t *drive)
 980 {
 981         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 982
 983         if (drive->media == ide_disk)
 984                 ide_disk_pre_reset(drive);
 985         else
 986                 drive->post_reset = 1;
 987
 988         if (drive->using_dma) {
 989                 if (drive->crc_count)
 990                         ide_check_dma_crc(drive);
 991                 else
 992                         ide_dma_off(drive);
 993         }
 994
 995         if (!drive->keep_settings) {
 996                 if (!drive->using_dma) {
 997                         drive->unmask = 0;
 998                         drive->io_32bit = 0;
 999                 }
1000                 return;
1001         }
1002
1003         if (port_ops && port_ops->pre_reset)
1004                 port_ops->pre_reset(drive);
1005
1006         if (drive->current_speed != 0xff)
1007                 drive->desired_speed = drive->current_speed;
1008         drive->current_speed = 0xff;
1009 }
1010
1011 /*
1012  * do_reset1() attempts to recover a confused drive by resetting it.
1013  * Unfortunately, resetting a disk drive actually resets all devices on
1014  * the same interface, so it can really be thought of as resetting the
1015  * interface rather than resetting the drive.
1016  *
1017  * ATAPI devices have their own reset mechanism which allows them to be
1018  * individually reset without clobbering other devices on the same interface.
1019  *
1020  * Unfortunately, the IDE interface does not generate an interrupt to let
1021  * us know when the reset operation has finished, so we must poll for this.
1022  * Equally poor, though, is the fact that this may a very long time to complete,
1023  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1024  * we set a timer to poll at 50ms intervals.
1025  */
1026 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1027 {
1028         unsigned int unit;
1029         unsigned long flags;
1030         ide_hwif_t *hwif;
1031         ide_hwgroup_t *hwgroup;
1032         const struct ide_port_ops *port_ops;
1033         u8 ctl;
1034
1035         spin_lock_irqsave(&ide_lock, flags);
1036         hwif = HWIF(drive);
1037         hwgroup = HWGROUP(drive);
1038
1039         /* We must not reset with running handlers */
1040         BUG_ON(hwgroup->handler != NULL);
1041
1042         /* For an ATAPI device, first try an ATAPI SRST. */
1043         if (drive->media != ide_disk && !do_not_try_atapi) {
1044                 hwgroup->resetting = 1;
1045                 pre_reset(drive);
1046                 SELECT_DRIVE(drive);
1047                 udelay (20);
1048                 hwif->OUTBSYNC(drive, WIN_SRST,
1049                                hwif->io_ports[IDE_COMMAND_OFFSET]);
1050                 ndelay(400);
1051                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1052                 hwgroup->polling = 1;
1053                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1054                 spin_unlock_irqrestore(&ide_lock, flags);
1055                 return ide_started;
1056         }
1057
1058         /*
1059          * First, reset any device state data we were maintaining
1060          * for any of the drives on this interface.
1061          */
1062         for (unit = 0; unit < MAX_DRIVES; ++unit)
1063                 pre_reset(&hwif->drives[unit]);
1064
1065         if (hwif->io_ports[IDE_CONTROL_OFFSET] == 0) {
1066                 spin_unlock_irqrestore(&ide_lock, flags);
1067                 return ide_stopped;
1068         }
1069
1070         hwgroup->resetting = 1;
1071         /*
1072          * Note that we also set nIEN while resetting the device,
1073          * to mask unwanted interrupts from the interface during the reset.
1074          * However, due to the design of PC hardware, this will cause an
1075          * immediate interrupt due to the edge transition it produces.
1076          * This single interrupt gives us a "fast poll" for drives that
1077          * recover from reset very quickly, saving us the first 50ms wait time.
1078          */
1079         /* set SRST and nIEN */
1080         hwif->OUTBSYNC(drive, drive->ctl|6, hwif->io_ports[IDE_CONTROL_OFFSET]);
1081         /* more than enough time */
1082         udelay(10);
1083         if (drive->quirk_list == 2)
1084                 ctl = drive->ctl;       /* clear SRST and nIEN */
1085         else
1086                 ctl = drive->ctl | 2;   /* clear SRST, leave nIEN */
1087         hwif->OUTBSYNC(drive, ctl, hwif->io_ports[IDE_CONTROL_OFFSET]);
1088         /* more than enough time */
1089         udelay(10);
1090         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1091         hwgroup->polling = 1;
1092         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1093
1094         /*
1095          * Some weird controller like resetting themselves to a strange
1096          * state when the disks are reset this way. At least, the Winbond
1097          * 553 documentation says that
1098          */
1099         port_ops = hwif->port_ops;
1100         if (port_ops && port_ops->resetproc)
1101                 port_ops->resetproc(drive);
1102
1103         spin_unlock_irqrestore(&ide_lock, flags);
1104         return ide_started;
1105 }
1106
1107 /*
1108  * ide_do_reset() is the entry point to the drive/interface reset code.
1109  */
1110
1111 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1112 {
1113         return do_reset1(drive, 0);
1114 }
1115
1116 EXPORT_SYMBOL(ide_do_reset);
1117
1118 /*
1119  * ide_wait_not_busy() waits for the currently selected device on the hwif
1120  * to report a non-busy status, see comments in ide_probe_port().
1121  */
1122 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1123 {
1124         u8 stat = 0;
1125
1126         while(timeout--) {
1127                 /*
1128                  * Turn this into a schedule() sleep once I'm sure
1129                  * about locking issues (2.5 work ?).
1130                  */
1131                 mdelay(1);
1132                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1133                 if ((stat & BUSY_STAT) == 0)
1134                         return 0;
1135                 /*
1136                  * Assume a value of 0xff means nothing is connected to
1137                  * the interface and it doesn't implement the pull-down
1138                  * resistor on D7.
1139                  */
1140                 if (stat == 0xff)
1141                         return -ENODEV;
1142                 touch_softlockup_watchdog();
1143                 touch_nmi_watchdog();
1144         }
1145         return -EBUSY;
1146 }
1147
1148 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1149