drivers/i2c/busses/i2c-i801.c

   1 /*
   2     Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
   3     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
   4     <mdsxyz123@yahoo.com>
   5     Copyright (C) 2007, 2008   Jean Delvare <khali@linux-fr.org>
   6     Copyright (C) 2010         Intel Corporation,
   7                                David Woodhouse <dwmw2@infradead.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25   Supports the following Intel I/O Controller Hubs (ICH):
  26
  27                                   I/O                     Block   I2C
  28                                   region  SMBus   Block   proc.   block
  29   Chip name             PCI ID    size    PEC     buffer  call    read
  30   ----------------------------------------------------------------------
  31   82801AA  (ICH)        0x2413     16      no      no      no      no
  32   82801AB  (ICH0)       0x2423     16      no      no      no      no
  33   82801BA  (ICH2)       0x2443     16      no      no      no      no
  34   82801CA  (ICH3)       0x2483     32     soft     no      no      no
  35   82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
  36   82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
  37   6300ESB               0x25a4     32     hard     yes     yes     yes
  38   82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
  39   6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
  40   82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  41   82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  42   82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  43   EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
  44   ICH10                 0x3a30     32     hard     yes     yes     yes
  45   ICH10                 0x3a60     32     hard     yes     yes     yes
  46   5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  47   Cougar Point (PCH)    0x1c22     32     hard     yes     yes     yes
  48   Patsburg (PCH)        0x1d22     32     hard     yes     yes     yes
  49   Patsburg (PCH) IDF    0x1d70     32     hard     yes     yes     yes
  50   Patsburg (PCH) IDF    0x1d71     32     hard     yes     yes     yes
  51   Patsburg (PCH) IDF    0x1d72     32     hard     yes     yes     yes
  52
  53   Features supported by this driver:
  54   Software PEC                     no
  55   Hardware PEC                     yes
  56   Block buffer                     yes
  57   Block process call transaction   no
  58   I2C block read transaction       yes  (doesn't use the block buffer)
  59   Slave mode                       no
  60
  61   See the file Documentation/i2c/busses/i2c-i801 for details.
  62 */
  63
  64 #include <linux/module.h>
  65 #include <linux/pci.h>
  66 #include <linux/kernel.h>
  67 #include <linux/stddef.h>
  68 #include <linux/delay.h>
  69 #include <linux/ioport.h>
  70 #include <linux/init.h>
  71 #include <linux/i2c.h>
  72 #include <linux/acpi.h>
  73 #include <linux/io.h>
  74 #include <linux/dmi.h>
  75
  76 /* I801 SMBus address offsets */
  77 #define SMBHSTSTS(p)    (0 + (p)->smba)
  78 #define SMBHSTCNT(p)    (2 + (p)->smba)
  79 #define SMBHSTCMD(p)    (3 + (p)->smba)
  80 #define SMBHSTADD(p)    (4 + (p)->smba)
  81 #define SMBHSTDAT0(p)   (5 + (p)->smba)
  82 #define SMBHSTDAT1(p)   (6 + (p)->smba)
  83 #define SMBBLKDAT(p)    (7 + (p)->smba)
  84 #define SMBPEC(p)       (8 + (p)->smba)         /* ICH3 and later */
  85 #define SMBAUXSTS(p)    (12 + (p)->smba)        /* ICH4 and later */
  86 #define SMBAUXCTL(p)    (13 + (p)->smba)        /* ICH4 and later */
  87
  88 /* PCI Address Constants */
  89 #define SMBBAR          4
  90 #define SMBHSTCFG       0x040
  91
  92 /* Host configuration bits for SMBHSTCFG */
  93 #define SMBHSTCFG_HST_EN        1
  94 #define SMBHSTCFG_SMB_SMI_EN    2
  95 #define SMBHSTCFG_I2C_EN        4
  96
  97 /* Auxillary control register bits, ICH4+ only */
  98 #define SMBAUXCTL_CRC           1
  99 #define SMBAUXCTL_E32B          2
 100
 101 /* kill bit for SMBHSTCNT */
 102 #define SMBHSTCNT_KILL          2
 103
 104 /* Other settings */
 105 #define MAX_TIMEOUT             100
 106 #define ENABLE_INT9             0       /* set to 0x01 to enable - untested */
 107
 108 /* I801 command constants */
 109 #define I801_QUICK              0x00
 110 #define I801_BYTE               0x04
 111 #define I801_BYTE_DATA          0x08
 112 #define I801_WORD_DATA          0x0C
 113 #define I801_PROC_CALL          0x10    /* unimplemented */
 114 #define I801_BLOCK_DATA         0x14
 115 #define I801_I2C_BLOCK_DATA     0x18    /* ICH5 and later */
 116 #define I801_BLOCK_LAST         0x34
 117 #define I801_I2C_BLOCK_LAST     0x38    /* ICH5 and later */
 118 #define I801_START              0x40
 119 #define I801_PEC_EN             0x80    /* ICH3 and later */
 120
 121 /* I801 Hosts Status register bits */
 122 #define SMBHSTSTS_BYTE_DONE     0x80
 123 #define SMBHSTSTS_INUSE_STS     0x40
 124 #define SMBHSTSTS_SMBALERT_STS  0x20
 125 #define SMBHSTSTS_FAILED        0x10
 126 #define SMBHSTSTS_BUS_ERR       0x08
 127 #define SMBHSTSTS_DEV_ERR       0x04
 128 #define SMBHSTSTS_INTR          0x02
 129 #define SMBHSTSTS_HOST_BUSY     0x01
 130
 131 #define STATUS_FLAGS            (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_FAILED | \
 132                                  SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
 133                                  SMBHSTSTS_INTR)
 134
 135 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
 136 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
 137 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
 138 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
 139
 140 struct i801_priv {
 141         struct i2c_adapter adapter;
 142         unsigned long smba;
 143         unsigned char original_hstcfg;
 144         struct pci_dev *pci_dev;
 145         unsigned int features;
 146 };
 147
 148 static struct pci_driver i801_driver;
 149
 150 #define FEATURE_SMBUS_PEC       (1 << 0)
 151 #define FEATURE_BLOCK_BUFFER    (1 << 1)
 152 #define FEATURE_BLOCK_PROC      (1 << 2)
 153 #define FEATURE_I2C_BLOCK_READ  (1 << 3)
 154
 155 static const char *i801_feature_names[] = {
 156         "SMBus PEC",
 157         "Block buffer",
 158         "Block process call",
 159         "I2C block read",
 160 };
 161
 162 static unsigned int disable_features;
 163 module_param(disable_features, uint, S_IRUGO | S_IWUSR);
 164 MODULE_PARM_DESC(disable_features, "Disable selected driver features");
 165
 166 /* Make sure the SMBus host is ready to start transmitting.
 167    Return 0 if it is, -EBUSY if it is not. */
 168 static int i801_check_pre(struct i801_priv *priv)
 169 {
 170         int status;
 171
 172         status = inb_p(SMBHSTSTS(priv));
 173         if (status & SMBHSTSTS_HOST_BUSY) {
 174                 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
 175                 return -EBUSY;
 176         }
 177
 178         status &= STATUS_FLAGS;
 179         if (status) {
 180                 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
 181                         status);
 182                 outb_p(status, SMBHSTSTS(priv));
 183                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 184                 if (status) {
 185                         dev_err(&priv->pci_dev->dev,
 186                                 "Failed clearing status flags (%02x)\n",
 187                                 status);
 188                         return -EBUSY;
 189                 }
 190         }
 191
 192         return 0;
 193 }
 194
 195 /* Convert the status register to an error code, and clear it. */
 196 static int i801_check_post(struct i801_priv *priv, int status, int timeout)
 197 {
 198         int result = 0;
 199
 200         /* If the SMBus is still busy, we give up */
 201         if (timeout) {
 202                 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
 203                 /* try to stop the current command */
 204                 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
 205                 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
 206                        SMBHSTCNT(priv));
 207                 msleep(1);
 208                 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
 209                        SMBHSTCNT(priv));
 210
 211                 /* Check if it worked */
 212                 status = inb_p(SMBHSTSTS(priv));
 213                 if ((status & SMBHSTSTS_HOST_BUSY) ||
 214                     !(status & SMBHSTSTS_FAILED))
 215                         dev_err(&priv->pci_dev->dev,
 216                                 "Failed terminating the transaction\n");
 217                 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
 218                 return -ETIMEDOUT;
 219         }
 220
 221         if (status & SMBHSTSTS_FAILED) {
 222                 result = -EIO;
 223                 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
 224         }
 225         if (status & SMBHSTSTS_DEV_ERR) {
 226                 result = -ENXIO;
 227                 dev_dbg(&priv->pci_dev->dev, "No response\n");
 228         }
 229         if (status & SMBHSTSTS_BUS_ERR) {
 230                 result = -EAGAIN;
 231                 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
 232         }
 233
 234         if (result) {
 235                 /* Clear error flags */
 236                 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
 237                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 238                 if (status) {
 239                         dev_warn(&priv->pci_dev->dev, "Failed clearing status "
 240                                  "flags at end of transaction (%02x)\n",
 241                                  status);
 242                 }
 243         }
 244
 245         return result;
 246 }
 247
 248 static int i801_transaction(struct i801_priv *priv, int xact)
 249 {
 250         int status;
 251         int result;
 252         int timeout = 0;
 253
 254         result = i801_check_pre(priv);
 255         if (result < 0)
 256                 return result;
 257
 258         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
 259          * INTREN, SMBSCMD are passed in xact */
 260         outb_p(xact | I801_START, SMBHSTCNT(priv));
 261
 262         /* We will always wait for a fraction of a second! */
 263         do {
 264                 msleep(1);
 265                 status = inb_p(SMBHSTSTS(priv));
 266         } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
 267
 268         result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
 269         if (result < 0)
 270                 return result;
 271
 272         outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 273         return 0;
 274 }
 275
 276 /* wait for INTR bit as advised by Intel */
 277 static void i801_wait_hwpec(struct i801_priv *priv)
 278 {
 279         int timeout = 0;
 280         int status;
 281
 282         do {
 283                 msleep(1);
 284                 status = inb_p(SMBHSTSTS(priv));
 285         } while ((!(status & SMBHSTSTS_INTR))
 286                  && (timeout++ < MAX_TIMEOUT));
 287
 288         if (timeout > MAX_TIMEOUT)
 289                 dev_dbg(&priv->pci_dev->dev, "PEC Timeout!\n");
 290
 291         outb_p(status, SMBHSTSTS(priv));
 292 }
 293
 294 static int i801_block_transaction_by_block(struct i801_priv *priv,
 295                                            union i2c_smbus_data *data,
 296                                            char read_write, int hwpec)
 297 {
 298         int i, len;
 299         int status;
 300
 301         inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 302
 303         /* Use 32-byte buffer to process this transaction */
 304         if (read_write == I2C_SMBUS_WRITE) {
 305                 len = data->block[0];
 306                 outb_p(len, SMBHSTDAT0(priv));
 307                 for (i = 0; i < len; i++)
 308                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 309         }
 310
 311         status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
 312                                   I801_PEC_EN * hwpec);
 313         if (status)
 314                 return status;
 315
 316         if (read_write == I2C_SMBUS_READ) {
 317                 len = inb_p(SMBHSTDAT0(priv));
 318                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
 319                         return -EPROTO;
 320
 321                 data->block[0] = len;
 322                 for (i = 0; i < len; i++)
 323                         data->block[i + 1] = inb_p(SMBBLKDAT(priv));
 324         }
 325         return 0;
 326 }
 327
 328 static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
 329                                                union i2c_smbus_data *data,
 330                                                char read_write, int command,
 331                                                int hwpec)
 332 {
 333         int i, len;
 334         int smbcmd;
 335         int status;
 336         int result;
 337         int timeout;
 338
 339         result = i801_check_pre(priv);
 340         if (result < 0)
 341                 return result;
 342
 343         len = data->block[0];
 344
 345         if (read_write == I2C_SMBUS_WRITE) {
 346                 outb_p(len, SMBHSTDAT0(priv));
 347                 outb_p(data->block[1], SMBBLKDAT(priv));
 348         }
 349
 350         for (i = 1; i <= len; i++) {
 351                 if (i == len && read_write == I2C_SMBUS_READ) {
 352                         if (command == I2C_SMBUS_I2C_BLOCK_DATA)
 353                                 smbcmd = I801_I2C_BLOCK_LAST;
 354                         else
 355                                 smbcmd = I801_BLOCK_LAST;
 356                 } else {
 357                         if (command == I2C_SMBUS_I2C_BLOCK_DATA
 358                          && read_write == I2C_SMBUS_READ)
 359                                 smbcmd = I801_I2C_BLOCK_DATA;
 360                         else
 361                                 smbcmd = I801_BLOCK_DATA;
 362                 }
 363                 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
 364
 365                 if (i == 1)
 366                         outb_p(inb(SMBHSTCNT(priv)) | I801_START,
 367                                SMBHSTCNT(priv));
 368
 369                 /* We will always wait for a fraction of a second! */
 370                 timeout = 0;
 371                 do {
 372                         msleep(1);
 373                         status = inb_p(SMBHSTSTS(priv));
 374                 } while ((!(status & SMBHSTSTS_BYTE_DONE))
 375                          && (timeout++ < MAX_TIMEOUT));
 376
 377                 result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
 378                 if (result < 0)
 379                         return result;
 380
 381                 if (i == 1 && read_write == I2C_SMBUS_READ
 382                  && command != I2C_SMBUS_I2C_BLOCK_DATA) {
 383                         len = inb_p(SMBHSTDAT0(priv));
 384                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
 385                                 dev_err(&priv->pci_dev->dev,
 386                                         "Illegal SMBus block read size %d\n",
 387                                         len);
 388                                 /* Recover */
 389                                 while (inb_p(SMBHSTSTS(priv)) &
 390                                        SMBHSTSTS_HOST_BUSY)
 391                                         outb_p(SMBHSTSTS_BYTE_DONE,
 392                                                SMBHSTSTS(priv));
 393                                 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 394                                 return -EPROTO;
 395                         }
 396                         data->block[0] = len;
 397                 }
 398
 399                 /* Retrieve/store value in SMBBLKDAT */
 400                 if (read_write == I2C_SMBUS_READ)
 401                         data->block[i] = inb_p(SMBBLKDAT(priv));
 402                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
 403                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 404
 405                 /* signals SMBBLKDAT ready */
 406                 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
 407         }
 408
 409         return 0;
 410 }
 411
 412 static int i801_set_block_buffer_mode(struct i801_priv *priv)
 413 {
 414         outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
 415         if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
 416                 return -EIO;
 417         return 0;
 418 }
 419
 420 /* Block transaction function */
 421 static int i801_block_transaction(struct i801_priv *priv,
 422                                   union i2c_smbus_data *data, char read_write,
 423                                   int command, int hwpec)
 424 {
 425         int result = 0;
 426         unsigned char hostc;
 427
 428         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
 429                 if (read_write == I2C_SMBUS_WRITE) {
 430                         /* set I2C_EN bit in configuration register */
 431                         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
 432                         pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
 433                                               hostc | SMBHSTCFG_I2C_EN);
 434                 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
 435                         dev_err(&priv->pci_dev->dev,
 436                                 "I2C block read is unsupported!\n");
 437                         return -EOPNOTSUPP;
 438                 }
 439         }
 440
 441         if (read_write == I2C_SMBUS_WRITE
 442          || command == I2C_SMBUS_I2C_BLOCK_DATA) {
 443                 if (data->block[0] < 1)
 444                         data->block[0] = 1;
 445                 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
 446                         data->block[0] = I2C_SMBUS_BLOCK_MAX;
 447         } else {
 448                 data->block[0] = 32;    /* max for SMBus block reads */
 449         }
 450
 451         /* Experience has shown that the block buffer can only be used for
 452            SMBus (not I2C) block transactions, even though the datasheet
 453            doesn't mention this limitation. */
 454         if ((priv->features & FEATURE_BLOCK_BUFFER)
 455          && command != I2C_SMBUS_I2C_BLOCK_DATA
 456          && i801_set_block_buffer_mode(priv) == 0)
 457                 result = i801_block_transaction_by_block(priv, data,
 458                                                          read_write, hwpec);
 459         else
 460                 result = i801_block_transaction_byte_by_byte(priv, data,
 461                                                              read_write,
 462                                                              command, hwpec);
 463
 464         if (result == 0 && hwpec)
 465                 i801_wait_hwpec(priv);
 466
 467         if (command == I2C_SMBUS_I2C_BLOCK_DATA
 468          && read_write == I2C_SMBUS_WRITE) {
 469                 /* restore saved configuration register value */
 470                 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
 471         }
 472         return result;
 473 }
 474
 475 /* Return negative errno on error. */
 476 static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 477                        unsigned short flags, char read_write, u8 command,
 478                        int size, union i2c_smbus_data *data)
 479 {
 480         int hwpec;
 481         int block = 0;
 482         int ret, xact = 0;
 483         struct i801_priv *priv = i2c_get_adapdata(adap);
 484
 485         hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
 486                 && size != I2C_SMBUS_QUICK
 487                 && size != I2C_SMBUS_I2C_BLOCK_DATA;
 488
 489         switch (size) {
 490         case I2C_SMBUS_QUICK:
 491                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 492                        SMBHSTADD(priv));
 493                 xact = I801_QUICK;
 494                 break;
 495         case I2C_SMBUS_BYTE:
 496                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 497                        SMBHSTADD(priv));
 498                 if (read_write == I2C_SMBUS_WRITE)
 499                         outb_p(command, SMBHSTCMD(priv));
 500                 xact = I801_BYTE;
 501                 break;
 502         case I2C_SMBUS_BYTE_DATA:
 503                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 504                        SMBHSTADD(priv));
 505                 outb_p(command, SMBHSTCMD(priv));
 506                 if (read_write == I2C_SMBUS_WRITE)
 507                         outb_p(data->byte, SMBHSTDAT0(priv));
 508                 xact = I801_BYTE_DATA;
 509                 break;
 510         case I2C_SMBUS_WORD_DATA:
 511                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 512                        SMBHSTADD(priv));
 513                 outb_p(command, SMBHSTCMD(priv));
 514                 if (read_write == I2C_SMBUS_WRITE) {
 515                         outb_p(data->word & 0xff, SMBHSTDAT0(priv));
 516                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
 517                 }
 518                 xact = I801_WORD_DATA;
 519                 break;
 520         case I2C_SMBUS_BLOCK_DATA:
 521                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 522                        SMBHSTADD(priv));
 523                 outb_p(command, SMBHSTCMD(priv));
 524                 block = 1;
 525                 break;
 526         case I2C_SMBUS_I2C_BLOCK_DATA:
 527                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
 528                  * bit should be cleared here, even when reading */
 529                 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
 530                 if (read_write == I2C_SMBUS_READ) {
 531                         /* NB: page 240 of ICH5 datasheet also shows
 532                          * that DATA1 is the cmd field when reading */
 533                         outb_p(command, SMBHSTDAT1(priv));
 534                 } else
 535                         outb_p(command, SMBHSTCMD(priv));
 536                 block = 1;
 537                 break;
 538         default:
 539                 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
 540                         size);
 541                 return -EOPNOTSUPP;
 542         }
 543
 544         if (hwpec)      /* enable/disable hardware PEC */
 545                 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
 546         else
 547                 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
 548                        SMBAUXCTL(priv));
 549
 550         if (block)
 551                 ret = i801_block_transaction(priv, data, read_write, size,
 552                                              hwpec);
 553         else
 554                 ret = i801_transaction(priv, xact | ENABLE_INT9);
 555
 556         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
 557            time, so we forcibly disable it after every transaction. Turn off
 558            E32B for the same reason. */
 559         if (hwpec || block)
 560                 outb_p(inb_p(SMBAUXCTL(priv)) &
 561                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 562
 563         if (block)
 564                 return ret;
 565         if (ret)
 566                 return ret;
 567         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
 568                 return 0;
 569
 570         switch (xact & 0x7f) {
 571         case I801_BYTE: /* Result put in SMBHSTDAT0 */
 572         case I801_BYTE_DATA:
 573                 data->byte = inb_p(SMBHSTDAT0(priv));
 574                 break;
 575         case I801_WORD_DATA:
 576                 data->word = inb_p(SMBHSTDAT0(priv)) +
 577                              (inb_p(SMBHSTDAT1(priv)) << 8);
 578                 break;
 579         }
 580         return 0;
 581 }
 582
 583
 584 static u32 i801_func(struct i2c_adapter *adapter)
 585 {
 586         struct i801_priv *priv = i2c_get_adapdata(adapter);
 587
 588         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 589                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 590                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
 591                ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
 592                ((priv->features & FEATURE_I2C_BLOCK_READ) ?
 593                 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 594 }
 595
 596 static const struct i2c_algorithm smbus_algorithm = {
 597         .smbus_xfer     = i801_access,
 598         .functionality  = i801_func,
 599 };
 600
 601 static const struct pci_device_id i801_ids[] = {
 602         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
 603         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
 604         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
 605         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
 606         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
 607         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
 608         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
 609         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
 610         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
 611         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
 612         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
 613         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
 614         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
 615         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 616         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 617         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
 618         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
 619         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
 620         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
 621         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
 622         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
 623         { 0, }
 624 };
 625
 626 MODULE_DEVICE_TABLE(pci, i801_ids);
 627
 628 #if defined CONFIG_INPUT_APANEL || defined CONFIG_INPUT_APANEL_MODULE
 629 static unsigned char apanel_addr;
 630
 631 /* Scan the system ROM for the signature "FJKEYINF" */
 632 static __init const void __iomem *bios_signature(const void __iomem *bios)
 633 {
 634         ssize_t offset;
 635         const unsigned char signature[] = "FJKEYINF";
 636
 637         for (offset = 0; offset < 0x10000; offset += 0x10) {
 638                 if (check_signature(bios + offset, signature,
 639                                     sizeof(signature)-1))
 640                         return bios + offset;
 641         }
 642         return NULL;
 643 }
 644
 645 static void __init input_apanel_init(void)
 646 {
 647         void __iomem *bios;
 648         const void __iomem *p;
 649
 650         bios = ioremap(0xF0000, 0x10000); /* Can't fail */
 651         p = bios_signature(bios);
 652         if (p) {
 653                 /* just use the first address */
 654                 apanel_addr = readb(p + 8 + 3) >> 1;
 655         }
 656         iounmap(bios);
 657 }
 658 #else
 659 static void __init input_apanel_init(void) {}
 660 #endif
 661
 662 #if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
 663 struct dmi_onboard_device_info {
 664         const char *name;
 665         u8 type;
 666         unsigned short i2c_addr;
 667         const char *i2c_type;
 668 };
 669
 670 static struct dmi_onboard_device_info __devinitdata dmi_devices[] = {
 671         { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
 672         { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
 673         { "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
 674 };
 675
 676 static void __devinit dmi_check_onboard_device(u8 type, const char *name,
 677                                                struct i2c_adapter *adap)
 678 {
 679         int i;
 680         struct i2c_board_info info;
 681
 682         for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
 683                 /* & ~0x80, ignore enabled/disabled bit */
 684                 if ((type & ~0x80) != dmi_devices[i].type)
 685                         continue;
 686                 if (strcasecmp(name, dmi_devices[i].name))
 687                         continue;
 688
 689                 memset(&info, 0, sizeof(struct i2c_board_info));
 690                 info.addr = dmi_devices[i].i2c_addr;
 691                 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
 692                 i2c_new_device(adap, &info);
 693                 break;
 694         }
 695 }
 696
 697 /* We use our own function to check for onboard devices instead of
 698    dmi_find_device() as some buggy BIOS's have the devices we are interested
 699    in marked as disabled */
 700 static void __devinit dmi_check_onboard_devices(const struct dmi_header *dm,
 701                                                 void *adap)
 702 {
 703         int i, count;
 704
 705         if (dm->type != 10)
 706                 return;
 707
 708         count = (dm->length - sizeof(struct dmi_header)) / 2;
 709         for (i = 0; i < count; i++) {
 710                 const u8 *d = (char *)(dm + 1) + (i * 2);
 711                 const char *name = ((char *) dm) + dm->length;
 712                 u8 type = d[0];
 713                 u8 s = d[1];
 714
 715                 if (!s)
 716                         continue;
 717                 s--;
 718                 while (s > 0 && name[0]) {
 719                         name += strlen(name) + 1;
 720                         s--;
 721                 }
 722                 if (name[0] == 0) /* Bogus string reference */
 723                         continue;
 724
 725                 dmi_check_onboard_device(type, name, adap);
 726         }
 727 }
 728 #endif
 729
 730 static int __devinit i801_probe(struct pci_dev *dev,
 731                                 const struct pci_device_id *id)
 732 {
 733         unsigned char temp;
 734         int err, i;
 735         struct i801_priv *priv;
 736
 737         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 738         if (!priv)
 739                 return -ENOMEM;
 740
 741         i2c_set_adapdata(&priv->adapter, priv);
 742         priv->adapter.owner = THIS_MODULE;
 743         priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 744         priv->adapter.algo = &smbus_algorithm;
 745
 746         priv->pci_dev = dev;
 747         switch (dev->device) {
 748         default:
 749                 priv->features |= FEATURE_I2C_BLOCK_READ;
 750                 /* fall through */
 751         case PCI_DEVICE_ID_INTEL_82801DB_3:
 752                 priv->features |= FEATURE_SMBUS_PEC;
 753                 priv->features |= FEATURE_BLOCK_BUFFER;
 754                 /* fall through */
 755         case PCI_DEVICE_ID_INTEL_82801CA_3:
 756         case PCI_DEVICE_ID_INTEL_82801BA_2:
 757         case PCI_DEVICE_ID_INTEL_82801AB_3:
 758         case PCI_DEVICE_ID_INTEL_82801AA_3:
 759                 break;
 760         }
 761
 762         /* Disable features on user request */
 763         for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
 764                 if (priv->features & disable_features & (1 << i))
 765                         dev_notice(&dev->dev, "%s disabled by user\n",
 766                                    i801_feature_names[i]);
 767         }
 768         priv->features &= ~disable_features;
 769
 770         err = pci_enable_device(dev);
 771         if (err) {
 772                 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
 773                         err);
 774                 goto exit;
 775         }
 776
 777         /* Determine the address of the SMBus area */
 778         priv->smba = pci_resource_start(dev, SMBBAR);
 779         if (!priv->smba) {
 780                 dev_err(&dev->dev, "SMBus base address uninitialized, "
 781                         "upgrade BIOS\n");
 782                 err = -ENODEV;
 783                 goto exit;
 784         }
 785
 786         err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
 787         if (err) {
 788                 err = -ENODEV;
 789                 goto exit;
 790         }
 791
 792         err = pci_request_region(dev, SMBBAR, i801_driver.name);
 793         if (err) {
 794                 dev_err(&dev->dev, "Failed to request SMBus region "
 795                         "0x%lx-0x%Lx\n", priv->smba,
 796                         (unsigned long long)pci_resource_end(dev, SMBBAR));
 797                 goto exit;
 798         }
 799
 800         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
 801         priv->original_hstcfg = temp;
 802         temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
 803         if (!(temp & SMBHSTCFG_HST_EN)) {
 804                 dev_info(&dev->dev, "Enabling SMBus device\n");
 805                 temp |= SMBHSTCFG_HST_EN;
 806         }
 807         pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
 808
 809         if (temp & SMBHSTCFG_SMB_SMI_EN)
 810                 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
 811         else
 812                 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
 813
 814         /* Clear special mode bits */
 815         if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
 816                 outb_p(inb_p(SMBAUXCTL(priv)) &
 817                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 818
 819         /* set up the sysfs linkage to our parent device */
 820         priv->adapter.dev.parent = &dev->dev;
 821
 822         /* Retry up to 3 times on lost arbitration */
 823         priv->adapter.retries = 3;
 824
 825         snprintf(priv->adapter.name, sizeof(priv->adapter.name),
 826                 "SMBus I801 adapter at %04lx", priv->smba);
 827         err = i2c_add_adapter(&priv->adapter);
 828         if (err) {
 829                 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
 830                 goto exit_release;
 831         }
 832
 833         /* Register optional slaves */
 834 #if defined CONFIG_INPUT_APANEL || defined CONFIG_INPUT_APANEL_MODULE
 835         if (apanel_addr) {
 836                 struct i2c_board_info info;
 837
 838                 memset(&info, 0, sizeof(struct i2c_board_info));
 839                 info.addr = apanel_addr;
 840                 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
 841                 i2c_new_device(&priv->adapter, &info);
 842         }
 843 #endif
 844 #if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
 845         if (dmi_name_in_vendors("FUJITSU"))
 846                 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
 847 #endif
 848
 849         pci_set_drvdata(dev, priv);
 850         return 0;
 851
 852 exit_release:
 853         pci_release_region(dev, SMBBAR);
 854 exit:
 855         kfree(priv);
 856         return err;
 857 }
 858
 859 static void __devexit i801_remove(struct pci_dev *dev)
 860 {
 861         struct i801_priv *priv = pci_get_drvdata(dev);
 862
 863         i2c_del_adapter(&priv->adapter);
 864         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
 865         pci_release_region(dev, SMBBAR);
 866         pci_set_drvdata(dev, NULL);
 867         kfree(priv);
 868         /*
 869          * do not call pci_disable_device(dev) since it can cause hard hangs on
 870          * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
 871          */
 872 }
 873
 874 #ifdef CONFIG_PM
 875 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
 876 {
 877         struct i801_priv *priv = pci_get_drvdata(dev);
 878
 879         pci_save_state(dev);
 880         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
 881         pci_set_power_state(dev, pci_choose_state(dev, mesg));
 882         return 0;
 883 }
 884
 885 static int i801_resume(struct pci_dev *dev)
 886 {
 887         pci_set_power_state(dev, PCI_D0);
 888         pci_restore_state(dev);
 889         return pci_enable_device(dev);
 890 }
 891 #else
 892 #define i801_suspend NULL
 893 #define i801_resume NULL
 894 #endif
 895
 896 static struct pci_driver i801_driver = {
 897         .name           = "i801_smbus",
 898         .id_table       = i801_ids,
 899         .probe          = i801_probe,
 900         .remove         = __devexit_p(i801_remove),
 901         .suspend        = i801_suspend,
 902         .resume         = i801_resume,
 903 };
 904
 905 static int __init i2c_i801_init(void)
 906 {
 907         input_apanel_init();
 908         return pci_register_driver(&i801_driver);
 909 }
 910
 911 static void __exit i2c_i801_exit(void)
 912 {
 913         pci_unregister_driver(&i801_driver);
 914 }
 915
 916 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
 917               "Jean Delvare <khali@linux-fr.org>");
 918 MODULE_DESCRIPTION("I801 SMBus driver");
 919 MODULE_LICENSE("GPL");
 920
 921 module_init(i2c_i801_init);
 922 module_exit(i2c_i801_exit);