Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[pandora-kernel.git] / drivers / gpu / drm / radeon / ObjectID.h
1 /*
2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 /* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
23
24 #ifndef _OBJECTID_H
25 #define _OBJECTID_H
26
27 #if defined(_X86_)
28 #pragma pack(1)
29 #endif
30
31 /****************************************************/
32 /* Graphics Object Type Definition                  */
33 /****************************************************/
34 #define GRAPH_OBJECT_TYPE_NONE                    0x0
35 #define GRAPH_OBJECT_TYPE_GPU                     0x1
36 #define GRAPH_OBJECT_TYPE_ENCODER                 0x2
37 #define GRAPH_OBJECT_TYPE_CONNECTOR               0x3
38 #define GRAPH_OBJECT_TYPE_ROUTER                  0x4
39 /* deleted */
40
41 /****************************************************/
42 /* Encoder Object ID Definition                     */
43 /****************************************************/
44 #define ENCODER_OBJECT_ID_NONE                    0x00
45
46 /* Radeon Class Display Hardware */
47 #define ENCODER_OBJECT_ID_INTERNAL_LVDS           0x01
48 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1          0x02
49 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2          0x03
50 #define ENCODER_OBJECT_ID_INTERNAL_DAC1           0x04
51 #define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05  /* TV/CV DAC */
52 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA          0x06
53 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB          0x07
54
55 /* External Third Party Encoders */
56 #define ENCODER_OBJECT_ID_SI170B                  0x08
57 #define ENCODER_OBJECT_ID_CH7303                  0x09
58 #define ENCODER_OBJECT_ID_CH7301                  0x0A
59 #define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B  /* This belongs to Radeon Class Display Hardware */
60 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA          0x0C
61 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB          0x0D
62 #define ENCODER_OBJECT_ID_TITFP513                0x0E
63 #define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F  /* not used for Radeon */
64 #define ENCODER_OBJECT_ID_VT1623                  0x10
65 #define ENCODER_OBJECT_ID_HDMI_SI1930             0x11
66 #define ENCODER_OBJECT_ID_HDMI_INTERNAL           0x12
67 /* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
68 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1   0x13
69 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1    0x14
70 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1    0x15
71 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
72 #define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
73 #define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
74 #define ENCODER_OBJECT_ID_INTERNAL_DDI            0x19
75 #define ENCODER_OBJECT_ID_VT1625                  0x1A
76 #define ENCODER_OBJECT_ID_HDMI_SI1932             0x1B
77 #define ENCODER_OBJECT_ID_DP_AN9801               0x1C
78 #define ENCODER_OBJECT_ID_DP_DP501                0x1D
79 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY         0x1E
80 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA   0x1F
81 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1        0x20
82 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2        0x21
83
84 #define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO    0xFF
85
86 /****************************************************/
87 /* Connector Object ID Definition                   */
88 /****************************************************/
89 #define CONNECTOR_OBJECT_ID_NONE                  0x00
90 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I     0x01
91 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I       0x02
92 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D     0x03
93 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D       0x04
94 #define CONNECTOR_OBJECT_ID_VGA                   0x05
95 #define CONNECTOR_OBJECT_ID_COMPOSITE             0x06
96 #define CONNECTOR_OBJECT_ID_SVIDEO                0x07
97 #define CONNECTOR_OBJECT_ID_YPbPr                 0x08
98 #define CONNECTOR_OBJECT_ID_D_CONNECTOR           0x09
99 #define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
100 #define CONNECTOR_OBJECT_ID_SCART                 0x0B
101 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A           0x0C
102 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B           0x0D
103 #define CONNECTOR_OBJECT_ID_LVDS                  0x0E
104 #define CONNECTOR_OBJECT_ID_7PIN_DIN              0x0F
105 #define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR        0x10
106 #define CONNECTOR_OBJECT_ID_CROSSFIRE             0x11
107 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI          0x12
108 #define CONNECTOR_OBJECT_ID_DISPLAYPORT           0x13
109
110 /* deleted */
111
112 /****************************************************/
113 /* Router Object ID Definition                      */
114 /****************************************************/
115 #define ROUTER_OBJECT_ID_NONE                                                                                   0x00
116 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL                              0x01
117
118 /****************************************************/
119 /* Graphics Object ENUM ID Definition               */
120 /****************************************************/
121 #define GRAPH_OBJECT_ENUM_ID1                     0x01
122 #define GRAPH_OBJECT_ENUM_ID2                     0x02
123 #define GRAPH_OBJECT_ENUM_ID3                     0x03
124 #define GRAPH_OBJECT_ENUM_ID4                     0x04
125 #define GRAPH_OBJECT_ENUM_ID5                     0x05
126 #define GRAPH_OBJECT_ENUM_ID6                     0x06
127
128 /****************************************************/
129 /* Graphics Object ID Bit definition                */
130 /****************************************************/
131 #define OBJECT_ID_MASK                            0x00FF
132 #define ENUM_ID_MASK                              0x0700
133 #define RESERVED1_ID_MASK                         0x0800
134 #define OBJECT_TYPE_MASK                          0x7000
135 #define RESERVED2_ID_MASK                         0x8000
136
137 #define OBJECT_ID_SHIFT                           0x00
138 #define ENUM_ID_SHIFT                             0x08
139 #define OBJECT_TYPE_SHIFT                         0x0C
140
141 /****************************************************/
142 /* Graphics Object family definition                */
143 /****************************************************/
144 #define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) \
145         (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
146          GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
147 /****************************************************/
148 /* GPU Object ID definition - Shared with BIOS      */
149 /****************************************************/
150 #define GPU_ENUM_ID1    (GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
151                          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
152
153 /****************************************************/
154 /* Encoder Object ID definition - Shared with BIOS  */
155 /****************************************************/
156 /*
157 #define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101
158 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1       0x2102
159 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1       0x2103
160 #define ENCODER_INTERNAL_DAC1_ENUM_ID1        0x2104
161 #define ENCODER_INTERNAL_DAC2_ENUM_ID1        0x2105
162 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1       0x2106
163 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1       0x2107
164 #define ENCODER_SIL170B_ENUM_ID1              0x2108
165 #define ENCODER_CH7303_ENUM_ID1               0x2109
166 #define ENCODER_CH7301_ENUM_ID1               0x210A
167 #define ENCODER_INTERNAL_DVO1_ENUM_ID1        0x210B
168 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1       0x210C
169 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1       0x210D
170 #define ENCODER_TITFP513_ENUM_ID1             0x210E
171 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1       0x210F
172 #define ENCODER_VT1623_ENUM_ID1               0x2110
173 #define ENCODER_HDMI_SI1930_ENUM_ID1          0x2111
174 #define ENCODER_HDMI_INTERNAL_ENUM_ID1        0x2112
175 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   0x2113
176 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    0x2114
177 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    0x2115
178 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116
179 #define ENCODER_SI178_ENUM_ID1                   0x2117
180 #define ENCODER_MVPU_FPGA_ENUM_ID1               0x2118
181 #define ENCODER_INTERNAL_DDI_ENUM_ID1            0x2119
182 #define ENCODER_VT1625_ENUM_ID1                  0x211A
183 #define ENCODER_HDMI_SI1932_ENUM_ID1             0x211B
184 #define ENCODER_ENCODER_DP_AN9801_ENUM_ID1       0x211C
185 #define ENCODER_DP_DP501_ENUM_ID1                0x211D
186 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         0x211E
187 */
188 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 \
189         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
190          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
191          ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
192
193 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 \
194         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
195          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
196          ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
197
198 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 \
199         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
200          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
201          ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
202
203 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 \
204         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
205          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
206          ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
207
208 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 \
209         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
210          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
211          ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
212
213 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 \
214         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
215          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
216          ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
217
218 #define ENCODER_INTERNAL_SDVOA_ENUM_ID2 \
219         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
220          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
221          ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
222
223 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 \
224         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
225          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
226          ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
227
228 #define ENCODER_SIL170B_ENUM_ID1 \
229         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
230          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
231          ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
232
233 #define ENCODER_CH7303_ENUM_ID1 \
234         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
235          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
236          ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
237
238 #define ENCODER_CH7301_ENUM_ID1 \
239         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
240          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
241          ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
242
243 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 \
244         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
245          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
246          ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
247
248 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 \
249         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
250          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
251          ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
252
253 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 \
254         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
255          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
256          ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
257
258 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 \
259         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
260          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
261          ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
262
263 #define ENCODER_TITFP513_ENUM_ID1 \
264         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
265          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
266          ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
267
268 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 \
269         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
270          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
271          ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
272
273 #define ENCODER_VT1623_ENUM_ID1 \
274         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
275          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
276          ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
277
278 #define ENCODER_HDMI_SI1930_ENUM_ID1 \
279         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
280          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
281          ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
282
283 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 \
284         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
285          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
286          ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
287
288 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 \
289         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
290          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
291          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
292
293 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 \
294         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
295          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
296          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
297
298 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 \
299         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
300          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
301          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
302
303 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 \
304         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
305          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
306          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
307
308 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 \
309         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
310          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
311          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) /* Shared with CV/TV and CRT */
312
313 #define ENCODER_SI178_ENUM_ID1  \
314         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
315          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
316          ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
317
318 #define ENCODER_MVPU_FPGA_ENUM_ID1 \
319         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
320          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
321          ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
322
323 #define ENCODER_INTERNAL_DDI_ENUM_ID1 \
324         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
325          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
326          ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
327
328 #define ENCODER_VT1625_ENUM_ID1 \
329         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
330          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
331          ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
332
333 #define ENCODER_HDMI_SI1932_ENUM_ID1 \
334         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
335          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
336          ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
337
338 #define ENCODER_DP_DP501_ENUM_ID1 \
339         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
340          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
341          ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
342
343 #define ENCODER_DP_AN9801_ENUM_ID1 \
344         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
345          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
346          ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
347
348 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 \
349         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
350          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
351          ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
352
353 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 \
354         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
355          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
356          ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
357
358 #define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 \
359         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
360          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
361          ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
362
363 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 \
364         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
365          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
366          ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
367
368 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 \
369         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
370          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
371          ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
372
373 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 \
374         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
375          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
376          ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
377
378 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 \
379         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
380          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
381          ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
382
383 #define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 \
384         (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
385          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
386          ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
387
388 /****************************************************/
389 /* Connector Object ID definition - Shared with BIOS */
390 /****************************************************/
391 /*
392 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1        0x3101
393 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1          0x3102
394 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1        0x3103
395 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1          0x3104
396 #define CONNECTOR_VGA_ENUM_ID1                      0x3105
397 #define CONNECTOR_COMPOSITE_ENUM_ID1                0x3106
398 #define CONNECTOR_SVIDEO_ENUM_ID1                   0x3107
399 #define CONNECTOR_YPbPr_ENUM_ID1                    0x3108
400 #define CONNECTOR_D_CONNECTORE_ENUM_ID1             0x3109
401 #define CONNECTOR_9PIN_DIN_ENUM_ID1                 0x310A
402 #define CONNECTOR_SCART_ENUM_ID1                    0x310B
403 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1              0x310C
404 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1              0x310D
405 #define CONNECTOR_LVDS_ENUM_ID1                     0x310E
406 #define CONNECTOR_7PIN_DIN_ENUM_ID1                 0x310F
407 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1           0x3110
408 */
409 #define CONNECTOR_LVDS_ENUM_ID1 \
410         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
411          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
412          CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
413
414 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 \
415         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
416          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
417          CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
418
419 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 \
420         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
421          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
422          CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
423
424 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 \
425         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
426          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
427          CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
428
429 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 \
430         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
431          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
432          CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
433
434 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 \
435         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
436          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
437          CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
438
439 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 \
440         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
441          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
442          CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
443
444 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 \
445         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
446          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
447          CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
448
449 #define CONNECTOR_VGA_ENUM_ID1 \
450         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
451          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
452          CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
453
454 #define CONNECTOR_VGA_ENUM_ID2 \
455         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
456          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
457          CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
458
459 #define CONNECTOR_COMPOSITE_ENUM_ID1 \
460         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
461          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
462          CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
463
464 #define CONNECTOR_SVIDEO_ENUM_ID1 \
465         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
466          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
467          CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
468
469 #define CONNECTOR_YPbPr_ENUM_ID1 \
470         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
471          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
472          CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
473
474 #define CONNECTOR_D_CONNECTOR_ENUM_ID1 \
475         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
476          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
477          CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
478
479 #define CONNECTOR_9PIN_DIN_ENUM_ID1 \
480         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
481          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
482          CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
483
484 #define CONNECTOR_SCART_ENUM_ID1 \
485         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
486          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
487          CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
488
489 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 \
490         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
491          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
492          CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
493
494 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 \
495         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
496          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
497          CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
498
499 #define CONNECTOR_7PIN_DIN_ENUM_ID1 \
500         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
501          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
502          CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
503
504 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 \
505         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
506          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
507          CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
508
509 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 \
510         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
511          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
512          CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
513
514 #define CONNECTOR_CROSSFIRE_ENUM_ID1 \
515         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
516          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
517          CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
518
519 #define CONNECTOR_CROSSFIRE_ENUM_ID2 \
520         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
521          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
522          CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
523
524 #define CONNECTOR_HARDCODE_DVI_ENUM_ID1 \
525         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
526          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
527          CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
528
529 #define CONNECTOR_HARDCODE_DVI_ENUM_ID2 \
530         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
531          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
532          CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
533
534 #define CONNECTOR_DISPLAYPORT_ENUM_ID1 \
535         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
536          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
537          CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
538
539 #define CONNECTOR_DISPLAYPORT_ENUM_ID2 \
540         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
541          GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
542          CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
543
544 #define CONNECTOR_DISPLAYPORT_ENUM_ID3 \
545         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
546          GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
547          CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
548
549 #define CONNECTOR_DISPLAYPORT_ENUM_ID4 \
550         (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
551          GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
552          CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
553
554 /****************************************************/
555 /* Router Object ID definition - Shared with BIOS   */
556 /****************************************************/
557 #define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 \
558         (GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
559          GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
560          ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
561
562 /* deleted */
563
564 /****************************************************/
565 /* Object Cap definition - Shared with BIOS         */
566 /****************************************************/
567 #define GRAPHICS_OBJECT_CAP_I2C                 0x00000001L
568 #define GRAPHICS_OBJECT_CAP_TABLE_ID            0x00000002L
569
570 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID                   0x01
571 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID     0x02
572 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID    0x03
573
574 #if defined(_X86_)
575 #pragma pack()
576 #endif
577
578 #endif /*GRAPHICTYPE */