Merge git://github.com/davem330/net
[pandora-kernel.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46                          SDVO_TV_MASK)
47
48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52
53
54 static const char *tv_format_names[] = {
55         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
56         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
57         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
58         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
59         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
60         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
61         "SECAM_60"
62 };
63
64 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
66 struct intel_sdvo {
67         struct intel_encoder base;
68
69         struct i2c_adapter *i2c;
70         u8 slave_addr;
71
72         struct i2c_adapter ddc;
73
74         /* Register for the SDVO device: SDVOB or SDVOC */
75         int sdvo_reg;
76
77         /* Active outputs controlled by this SDVO output */
78         uint16_t controlled_output;
79
80         /*
81          * Capabilities of the SDVO device returned by
82          * i830_sdvo_get_capabilities()
83          */
84         struct intel_sdvo_caps caps;
85
86         /* Pixel clock limitations reported by the SDVO device, in kHz */
87         int pixel_clock_min, pixel_clock_max;
88
89         /*
90         * For multiple function SDVO device,
91         * this is for current attached outputs.
92         */
93         uint16_t attached_output;
94
95         /*
96          * Hotplug activation bits for this device
97          */
98         uint8_t hotplug_active[2];
99
100         /**
101          * This is used to select the color range of RBG outputs in HDMI mode.
102          * It is only valid when using TMDS encoding and 8 bit per color mode.
103          */
104         uint32_t color_range;
105
106         /**
107          * This is set if we're going to treat the device as TV-out.
108          *
109          * While we have these nice friendly flags for output types that ought
110          * to decide this for us, the S-Video output on our HDMI+S-Video card
111          * shows up as RGB1 (VGA).
112          */
113         bool is_tv;
114
115         /* This is for current tv format name */
116         int tv_format_index;
117
118         /**
119          * This is set if we treat the device as HDMI, instead of DVI.
120          */
121         bool is_hdmi;
122         bool has_hdmi_monitor;
123         bool has_hdmi_audio;
124
125         /**
126          * This is set if we detect output of sdvo device as LVDS and
127          * have a valid fixed mode to use with the panel.
128          */
129         bool is_lvds;
130
131         /**
132          * This is sdvo fixed pannel mode pointer
133          */
134         struct drm_display_mode *sdvo_lvds_fixed_mode;
135
136         /* DDC bus used by this SDVO encoder */
137         uint8_t ddc_bus;
138
139         /* Input timings for adjusted_mode */
140         struct intel_sdvo_dtd input_dtd;
141 };
142
143 struct intel_sdvo_connector {
144         struct intel_connector base;
145
146         /* Mark the type of connector */
147         uint16_t output_flag;
148
149         int force_audio;
150
151         /* This contains all current supported TV format */
152         u8 tv_format_supported[TV_FORMAT_NUM];
153         int   format_supported_num;
154         struct drm_property *tv_format;
155
156         /* add the property for the SDVO-TV */
157         struct drm_property *left;
158         struct drm_property *right;
159         struct drm_property *top;
160         struct drm_property *bottom;
161         struct drm_property *hpos;
162         struct drm_property *vpos;
163         struct drm_property *contrast;
164         struct drm_property *saturation;
165         struct drm_property *hue;
166         struct drm_property *sharpness;
167         struct drm_property *flicker_filter;
168         struct drm_property *flicker_filter_adaptive;
169         struct drm_property *flicker_filter_2d;
170         struct drm_property *tv_chroma_filter;
171         struct drm_property *tv_luma_filter;
172         struct drm_property *dot_crawl;
173
174         /* add the property for the SDVO-TV/LVDS */
175         struct drm_property *brightness;
176
177         /* Add variable to record current setting for the above property */
178         u32     left_margin, right_margin, top_margin, bottom_margin;
179
180         /* this is to get the range of margin.*/
181         u32     max_hscan,  max_vscan;
182         u32     max_hpos, cur_hpos;
183         u32     max_vpos, cur_vpos;
184         u32     cur_brightness, max_brightness;
185         u32     cur_contrast,   max_contrast;
186         u32     cur_saturation, max_saturation;
187         u32     cur_hue,        max_hue;
188         u32     cur_sharpness,  max_sharpness;
189         u32     cur_flicker_filter,             max_flicker_filter;
190         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
191         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
192         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
193         u32     cur_tv_luma_filter,     max_tv_luma_filter;
194         u32     cur_dot_crawl,  max_dot_crawl;
195 };
196
197 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
198 {
199         return container_of(encoder, struct intel_sdvo, base.base);
200 }
201
202 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
203 {
204         return container_of(intel_attached_encoder(connector),
205                             struct intel_sdvo, base);
206 }
207
208 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
209 {
210         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
211 }
212
213 static bool
214 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
215 static bool
216 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
217                               struct intel_sdvo_connector *intel_sdvo_connector,
218                               int type);
219 static bool
220 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
221                                    struct intel_sdvo_connector *intel_sdvo_connector);
222
223 /**
224  * Writes the SDVOB or SDVOC with the given value, but always writes both
225  * SDVOB and SDVOC to work around apparent hardware issues (according to
226  * comments in the BIOS).
227  */
228 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
229 {
230         struct drm_device *dev = intel_sdvo->base.base.dev;
231         struct drm_i915_private *dev_priv = dev->dev_private;
232         u32 bval = val, cval = val;
233         int i;
234
235         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
236                 I915_WRITE(intel_sdvo->sdvo_reg, val);
237                 I915_READ(intel_sdvo->sdvo_reg);
238                 return;
239         }
240
241         if (intel_sdvo->sdvo_reg == SDVOB) {
242                 cval = I915_READ(SDVOC);
243         } else {
244                 bval = I915_READ(SDVOB);
245         }
246         /*
247          * Write the registers twice for luck. Sometimes,
248          * writing them only once doesn't appear to 'stick'.
249          * The BIOS does this too. Yay, magic
250          */
251         for (i = 0; i < 2; i++)
252         {
253                 I915_WRITE(SDVOB, bval);
254                 I915_READ(SDVOB);
255                 I915_WRITE(SDVOC, cval);
256                 I915_READ(SDVOC);
257         }
258 }
259
260 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
261 {
262         struct i2c_msg msgs[] = {
263                 {
264                         .addr = intel_sdvo->slave_addr,
265                         .flags = 0,
266                         .len = 1,
267                         .buf = &addr,
268                 },
269                 {
270                         .addr = intel_sdvo->slave_addr,
271                         .flags = I2C_M_RD,
272                         .len = 1,
273                         .buf = ch,
274                 }
275         };
276         int ret;
277
278         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
279                 return true;
280
281         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
282         return false;
283 }
284
285 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
286 /** Mapping of command numbers to names, for debug output */
287 static const struct _sdvo_cmd_name {
288         u8 cmd;
289         const char *name;
290 } sdvo_cmd_names[] = {
291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
334
335     /* Add the op code for SDVO enhancements */
336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
380
381     /* HDMI op code */
382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
395     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
396     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
397     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
398     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
399     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
400     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
401     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
402 };
403
404 #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
405 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
406
407 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
408                                    const void *args, int args_len)
409 {
410         int i;
411
412         DRM_DEBUG_KMS("%s: W: %02X ",
413                                 SDVO_NAME(intel_sdvo), cmd);
414         for (i = 0; i < args_len; i++)
415                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
416         for (; i < 8; i++)
417                 DRM_LOG_KMS("   ");
418         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
419                 if (cmd == sdvo_cmd_names[i].cmd) {
420                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
421                         break;
422                 }
423         }
424         if (i == ARRAY_SIZE(sdvo_cmd_names))
425                 DRM_LOG_KMS("(%02X)", cmd);
426         DRM_LOG_KMS("\n");
427 }
428
429 static const char *cmd_status_names[] = {
430         "Power on",
431         "Success",
432         "Not supported",
433         "Invalid arg",
434         "Pending",
435         "Target not specified",
436         "Scaling not supported"
437 };
438
439 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440                                  const void *args, int args_len)
441 {
442         u8 buf[args_len*2 + 2], status;
443         struct i2c_msg msgs[args_len + 3];
444         int i, ret;
445
446         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
447
448         for (i = 0; i < args_len; i++) {
449                 msgs[i].addr = intel_sdvo->slave_addr;
450                 msgs[i].flags = 0;
451                 msgs[i].len = 2;
452                 msgs[i].buf = buf + 2 *i;
453                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
454                 buf[2*i + 1] = ((u8*)args)[i];
455         }
456         msgs[i].addr = intel_sdvo->slave_addr;
457         msgs[i].flags = 0;
458         msgs[i].len = 2;
459         msgs[i].buf = buf + 2*i;
460         buf[2*i + 0] = SDVO_I2C_OPCODE;
461         buf[2*i + 1] = cmd;
462
463         /* the following two are to read the response */
464         status = SDVO_I2C_CMD_STATUS;
465         msgs[i+1].addr = intel_sdvo->slave_addr;
466         msgs[i+1].flags = 0;
467         msgs[i+1].len = 1;
468         msgs[i+1].buf = &status;
469
470         msgs[i+2].addr = intel_sdvo->slave_addr;
471         msgs[i+2].flags = I2C_M_RD;
472         msgs[i+2].len = 1;
473         msgs[i+2].buf = &status;
474
475         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
476         if (ret < 0) {
477                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
478                 return false;
479         }
480         if (ret != i+3) {
481                 /* failure in I2C transfer */
482                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
483                 return false;
484         }
485
486         return true;
487 }
488
489 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
490                                      void *response, int response_len)
491 {
492         u8 retry = 5;
493         u8 status;
494         int i;
495
496         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
497
498         /*
499          * The documentation states that all commands will be
500          * processed within 15µs, and that we need only poll
501          * the status byte a maximum of 3 times in order for the
502          * command to be complete.
503          *
504          * Check 5 times in case the hardware failed to read the docs.
505          */
506         if (!intel_sdvo_read_byte(intel_sdvo,
507                                   SDVO_I2C_CMD_STATUS,
508                                   &status))
509                 goto log_fail;
510
511         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
512                 udelay(15);
513                 if (!intel_sdvo_read_byte(intel_sdvo,
514                                           SDVO_I2C_CMD_STATUS,
515                                           &status))
516                         goto log_fail;
517         }
518
519         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
520                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
521         else
522                 DRM_LOG_KMS("(??? %d)", status);
523
524         if (status != SDVO_CMD_STATUS_SUCCESS)
525                 goto log_fail;
526
527         /* Read the command response */
528         for (i = 0; i < response_len; i++) {
529                 if (!intel_sdvo_read_byte(intel_sdvo,
530                                           SDVO_I2C_RETURN_0 + i,
531                                           &((u8 *)response)[i]))
532                         goto log_fail;
533                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
534         }
535         DRM_LOG_KMS("\n");
536         return true;
537
538 log_fail:
539         DRM_LOG_KMS("... failed\n");
540         return false;
541 }
542
543 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
544 {
545         if (mode->clock >= 100000)
546                 return 1;
547         else if (mode->clock >= 50000)
548                 return 2;
549         else
550                 return 4;
551 }
552
553 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
554                                               u8 ddc_bus)
555 {
556         /* This must be the immediately preceding write before the i2c xfer */
557         return intel_sdvo_write_cmd(intel_sdvo,
558                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
559                                     &ddc_bus, 1);
560 }
561
562 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
563 {
564         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
565                 return false;
566
567         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
568 }
569
570 static bool
571 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
572 {
573         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
574                 return false;
575
576         return intel_sdvo_read_response(intel_sdvo, value, len);
577 }
578
579 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
580 {
581         struct intel_sdvo_set_target_input_args targets = {0};
582         return intel_sdvo_set_value(intel_sdvo,
583                                     SDVO_CMD_SET_TARGET_INPUT,
584                                     &targets, sizeof(targets));
585 }
586
587 /**
588  * Return whether each input is trained.
589  *
590  * This function is making an assumption about the layout of the response,
591  * which should be checked against the docs.
592  */
593 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
594 {
595         struct intel_sdvo_get_trained_inputs_response response;
596
597         BUILD_BUG_ON(sizeof(response) != 1);
598         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
599                                   &response, sizeof(response)))
600                 return false;
601
602         *input_1 = response.input0_trained;
603         *input_2 = response.input1_trained;
604         return true;
605 }
606
607 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
608                                           u16 outputs)
609 {
610         return intel_sdvo_set_value(intel_sdvo,
611                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
612                                     &outputs, sizeof(outputs));
613 }
614
615 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
616                                                int mode)
617 {
618         u8 state = SDVO_ENCODER_STATE_ON;
619
620         switch (mode) {
621         case DRM_MODE_DPMS_ON:
622                 state = SDVO_ENCODER_STATE_ON;
623                 break;
624         case DRM_MODE_DPMS_STANDBY:
625                 state = SDVO_ENCODER_STATE_STANDBY;
626                 break;
627         case DRM_MODE_DPMS_SUSPEND:
628                 state = SDVO_ENCODER_STATE_SUSPEND;
629                 break;
630         case DRM_MODE_DPMS_OFF:
631                 state = SDVO_ENCODER_STATE_OFF;
632                 break;
633         }
634
635         return intel_sdvo_set_value(intel_sdvo,
636                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
637 }
638
639 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
640                                                    int *clock_min,
641                                                    int *clock_max)
642 {
643         struct intel_sdvo_pixel_clock_range clocks;
644
645         BUILD_BUG_ON(sizeof(clocks) != 4);
646         if (!intel_sdvo_get_value(intel_sdvo,
647                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
648                                   &clocks, sizeof(clocks)))
649                 return false;
650
651         /* Convert the values from units of 10 kHz to kHz. */
652         *clock_min = clocks.min * 10;
653         *clock_max = clocks.max * 10;
654         return true;
655 }
656
657 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
658                                          u16 outputs)
659 {
660         return intel_sdvo_set_value(intel_sdvo,
661                                     SDVO_CMD_SET_TARGET_OUTPUT,
662                                     &outputs, sizeof(outputs));
663 }
664
665 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
666                                   struct intel_sdvo_dtd *dtd)
667 {
668         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
669                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
670 }
671
672 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
673                                          struct intel_sdvo_dtd *dtd)
674 {
675         return intel_sdvo_set_timing(intel_sdvo,
676                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
677 }
678
679 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
680                                          struct intel_sdvo_dtd *dtd)
681 {
682         return intel_sdvo_set_timing(intel_sdvo,
683                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
684 }
685
686 static bool
687 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
688                                          uint16_t clock,
689                                          uint16_t width,
690                                          uint16_t height)
691 {
692         struct intel_sdvo_preferred_input_timing_args args;
693
694         memset(&args, 0, sizeof(args));
695         args.clock = clock;
696         args.width = width;
697         args.height = height;
698         args.interlace = 0;
699
700         if (intel_sdvo->is_lvds &&
701            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
702             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
703                 args.scaled = 1;
704
705         return intel_sdvo_set_value(intel_sdvo,
706                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
707                                     &args, sizeof(args));
708 }
709
710 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
711                                                   struct intel_sdvo_dtd *dtd)
712 {
713         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
714         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
715         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
716                                     &dtd->part1, sizeof(dtd->part1)) &&
717                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
718                                      &dtd->part2, sizeof(dtd->part2));
719 }
720
721 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
722 {
723         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
724 }
725
726 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
727                                          const struct drm_display_mode *mode)
728 {
729         uint16_t width, height;
730         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
731         uint16_t h_sync_offset, v_sync_offset;
732
733         width = mode->crtc_hdisplay;
734         height = mode->crtc_vdisplay;
735
736         /* do some mode translations */
737         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
738         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
739
740         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
741         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
742
743         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
744         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
745
746         dtd->part1.clock = mode->clock / 10;
747         dtd->part1.h_active = width & 0xff;
748         dtd->part1.h_blank = h_blank_len & 0xff;
749         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
750                 ((h_blank_len >> 8) & 0xf);
751         dtd->part1.v_active = height & 0xff;
752         dtd->part1.v_blank = v_blank_len & 0xff;
753         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
754                 ((v_blank_len >> 8) & 0xf);
755
756         dtd->part2.h_sync_off = h_sync_offset & 0xff;
757         dtd->part2.h_sync_width = h_sync_len & 0xff;
758         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
759                 (v_sync_len & 0xf);
760         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
761                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
762                 ((v_sync_len & 0x30) >> 4);
763
764         dtd->part2.dtd_flags = 0x18;
765         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
766                 dtd->part2.dtd_flags |= 0x2;
767         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
768                 dtd->part2.dtd_flags |= 0x4;
769
770         dtd->part2.sdvo_flags = 0;
771         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
772         dtd->part2.reserved = 0;
773 }
774
775 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
776                                          const struct intel_sdvo_dtd *dtd)
777 {
778         mode->hdisplay = dtd->part1.h_active;
779         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
780         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
781         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
782         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
783         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
784         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
785         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
786
787         mode->vdisplay = dtd->part1.v_active;
788         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
789         mode->vsync_start = mode->vdisplay;
790         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
791         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
792         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
793         mode->vsync_end = mode->vsync_start +
794                 (dtd->part2.v_sync_off_width & 0xf);
795         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
796         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
797         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
798
799         mode->clock = dtd->part1.clock * 10;
800
801         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
802         if (dtd->part2.dtd_flags & 0x2)
803                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
804         if (dtd->part2.dtd_flags & 0x4)
805                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
806 }
807
808 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
809 {
810         struct intel_sdvo_encode encode;
811
812         BUILD_BUG_ON(sizeof(encode) != 2);
813         return intel_sdvo_get_value(intel_sdvo,
814                                   SDVO_CMD_GET_SUPP_ENCODE,
815                                   &encode, sizeof(encode));
816 }
817
818 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
819                                   uint8_t mode)
820 {
821         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
822 }
823
824 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
825                                        uint8_t mode)
826 {
827         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
828 }
829
830 #if 0
831 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
832 {
833         int i, j;
834         uint8_t set_buf_index[2];
835         uint8_t av_split;
836         uint8_t buf_size;
837         uint8_t buf[48];
838         uint8_t *pos;
839
840         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
841
842         for (i = 0; i <= av_split; i++) {
843                 set_buf_index[0] = i; set_buf_index[1] = 0;
844                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
845                                      set_buf_index, 2);
846                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
847                 intel_sdvo_read_response(encoder, &buf_size, 1);
848
849                 pos = buf;
850                 for (j = 0; j <= buf_size; j += 8) {
851                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
852                                              NULL, 0);
853                         intel_sdvo_read_response(encoder, pos, 8);
854                         pos += 8;
855                 }
856         }
857 }
858 #endif
859
860 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
861 {
862         struct dip_infoframe avi_if = {
863                 .type = DIP_TYPE_AVI,
864                 .ver = DIP_VERSION_AVI,
865                 .len = DIP_LEN_AVI,
866         };
867         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
868         uint8_t set_buf_index[2] = { 1, 0 };
869         uint64_t *data = (uint64_t *)&avi_if;
870         unsigned i;
871
872         intel_dip_infoframe_csum(&avi_if);
873
874         if (!intel_sdvo_set_value(intel_sdvo,
875                                   SDVO_CMD_SET_HBUF_INDEX,
876                                   set_buf_index, 2))
877                 return false;
878
879         for (i = 0; i < sizeof(avi_if); i += 8) {
880                 if (!intel_sdvo_set_value(intel_sdvo,
881                                           SDVO_CMD_SET_HBUF_DATA,
882                                           data, 8))
883                         return false;
884                 data++;
885         }
886
887         return intel_sdvo_set_value(intel_sdvo,
888                                     SDVO_CMD_SET_HBUF_TXRATE,
889                                     &tx_rate, 1);
890 }
891
892 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
893 {
894         struct intel_sdvo_tv_format format;
895         uint32_t format_map;
896
897         format_map = 1 << intel_sdvo->tv_format_index;
898         memset(&format, 0, sizeof(format));
899         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
900
901         BUILD_BUG_ON(sizeof(format) != 6);
902         return intel_sdvo_set_value(intel_sdvo,
903                                     SDVO_CMD_SET_TV_FORMAT,
904                                     &format, sizeof(format));
905 }
906
907 static bool
908 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
909                                         struct drm_display_mode *mode)
910 {
911         struct intel_sdvo_dtd output_dtd;
912
913         if (!intel_sdvo_set_target_output(intel_sdvo,
914                                           intel_sdvo->attached_output))
915                 return false;
916
917         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
918         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
919                 return false;
920
921         return true;
922 }
923
924 static bool
925 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
926                                         struct drm_display_mode *mode,
927                                         struct drm_display_mode *adjusted_mode)
928 {
929         /* Reset the input timing to the screen. Assume always input 0. */
930         if (!intel_sdvo_set_target_input(intel_sdvo))
931                 return false;
932
933         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
934                                                       mode->clock / 10,
935                                                       mode->hdisplay,
936                                                       mode->vdisplay))
937                 return false;
938
939         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
940                                                    &intel_sdvo->input_dtd))
941                 return false;
942
943         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
944
945         drm_mode_set_crtcinfo(adjusted_mode, 0);
946         return true;
947 }
948
949 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
950                                   struct drm_display_mode *mode,
951                                   struct drm_display_mode *adjusted_mode)
952 {
953         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
954         int multiplier;
955
956         /* We need to construct preferred input timings based on our
957          * output timings.  To do that, we have to set the output
958          * timings, even though this isn't really the right place in
959          * the sequence to do it. Oh well.
960          */
961         if (intel_sdvo->is_tv) {
962                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
963                         return false;
964
965                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
966                                                              mode,
967                                                              adjusted_mode);
968         } else if (intel_sdvo->is_lvds) {
969                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
970                                                              intel_sdvo->sdvo_lvds_fixed_mode))
971                         return false;
972
973                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
974                                                              mode,
975                                                              adjusted_mode);
976         }
977
978         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
979          * SDVO device will factor out the multiplier during mode_set.
980          */
981         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
982         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
983
984         return true;
985 }
986
987 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
988                                 struct drm_display_mode *mode,
989                                 struct drm_display_mode *adjusted_mode)
990 {
991         struct drm_device *dev = encoder->dev;
992         struct drm_i915_private *dev_priv = dev->dev_private;
993         struct drm_crtc *crtc = encoder->crtc;
994         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
995         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
996         u32 sdvox;
997         struct intel_sdvo_in_out_map in_out;
998         struct intel_sdvo_dtd input_dtd;
999         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1000         int rate;
1001
1002         if (!mode)
1003                 return;
1004
1005         /* First, set the input mapping for the first input to our controlled
1006          * output. This is only correct if we're a single-input device, in
1007          * which case the first input is the output from the appropriate SDVO
1008          * channel on the motherboard.  In a two-input device, the first input
1009          * will be SDVOB and the second SDVOC.
1010          */
1011         in_out.in0 = intel_sdvo->attached_output;
1012         in_out.in1 = 0;
1013
1014         intel_sdvo_set_value(intel_sdvo,
1015                              SDVO_CMD_SET_IN_OUT_MAP,
1016                              &in_out, sizeof(in_out));
1017
1018         /* Set the output timings to the screen */
1019         if (!intel_sdvo_set_target_output(intel_sdvo,
1020                                           intel_sdvo->attached_output))
1021                 return;
1022
1023         /* We have tried to get input timing in mode_fixup, and filled into
1024          * adjusted_mode.
1025          */
1026         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1027                 input_dtd = intel_sdvo->input_dtd;
1028         } else {
1029                 /* Set the output timing to the screen */
1030                 if (!intel_sdvo_set_target_output(intel_sdvo,
1031                                                   intel_sdvo->attached_output))
1032                         return;
1033
1034                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1035                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1036         }
1037
1038         /* Set the input timing to the screen. Assume always input 0. */
1039         if (!intel_sdvo_set_target_input(intel_sdvo))
1040                 return;
1041
1042         if (intel_sdvo->has_hdmi_monitor) {
1043                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1044                 intel_sdvo_set_colorimetry(intel_sdvo,
1045                                            SDVO_COLORIMETRY_RGB256);
1046                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1047         } else
1048                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1049
1050         if (intel_sdvo->is_tv &&
1051             !intel_sdvo_set_tv_format(intel_sdvo))
1052                 return;
1053
1054         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1055
1056         switch (pixel_multiplier) {
1057         default:
1058         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1059         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1060         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1061         }
1062         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1063                 return;
1064
1065         /* Set the SDVO control regs. */
1066         if (INTEL_INFO(dev)->gen >= 4) {
1067                 sdvox = 0;
1068                 if (intel_sdvo->is_hdmi)
1069                         sdvox |= intel_sdvo->color_range;
1070                 if (INTEL_INFO(dev)->gen < 5)
1071                         sdvox |= SDVO_BORDER_ENABLE;
1072                 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1073                         sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1074                 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1075                         sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1076         } else {
1077                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1078                 switch (intel_sdvo->sdvo_reg) {
1079                 case SDVOB:
1080                         sdvox &= SDVOB_PRESERVE_MASK;
1081                         break;
1082                 case SDVOC:
1083                         sdvox &= SDVOC_PRESERVE_MASK;
1084                         break;
1085                 }
1086                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1087         }
1088         if (intel_crtc->pipe == 1)
1089                 sdvox |= SDVO_PIPE_B_SELECT;
1090         if (intel_sdvo->has_hdmi_audio)
1091                 sdvox |= SDVO_AUDIO_ENABLE;
1092
1093         if (INTEL_INFO(dev)->gen >= 4) {
1094                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1095         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1096                 /* done in crtc_mode_set as it lives inside the dpll register */
1097         } else {
1098                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1099         }
1100
1101         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1102             INTEL_INFO(dev)->gen < 5)
1103                 sdvox |= SDVO_STALL_SELECT;
1104         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1105 }
1106
1107 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1108 {
1109         struct drm_device *dev = encoder->dev;
1110         struct drm_i915_private *dev_priv = dev->dev_private;
1111         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1112         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1113         u32 temp;
1114
1115         if (mode != DRM_MODE_DPMS_ON) {
1116                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1117                 if (0)
1118                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1119
1120                 if (mode == DRM_MODE_DPMS_OFF) {
1121                         temp = I915_READ(intel_sdvo->sdvo_reg);
1122                         if ((temp & SDVO_ENABLE) != 0) {
1123                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1124                         }
1125                 }
1126         } else {
1127                 bool input1, input2;
1128                 int i;
1129                 u8 status;
1130
1131                 temp = I915_READ(intel_sdvo->sdvo_reg);
1132                 if ((temp & SDVO_ENABLE) == 0)
1133                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1134                 for (i = 0; i < 2; i++)
1135                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1136
1137                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1138                 /* Warn if the device reported failure to sync.
1139                  * A lot of SDVO devices fail to notify of sync, but it's
1140                  * a given it the status is a success, we succeeded.
1141                  */
1142                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1143                         DRM_DEBUG_KMS("First %s output reported failure to "
1144                                         "sync\n", SDVO_NAME(intel_sdvo));
1145                 }
1146
1147                 if (0)
1148                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1149                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1150         }
1151         return;
1152 }
1153
1154 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1155                                  struct drm_display_mode *mode)
1156 {
1157         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1158
1159         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1160                 return MODE_NO_DBLESCAN;
1161
1162         if (intel_sdvo->pixel_clock_min > mode->clock)
1163                 return MODE_CLOCK_LOW;
1164
1165         if (intel_sdvo->pixel_clock_max < mode->clock)
1166                 return MODE_CLOCK_HIGH;
1167
1168         if (intel_sdvo->is_lvds) {
1169                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1170                         return MODE_PANEL;
1171
1172                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1173                         return MODE_PANEL;
1174         }
1175
1176         return MODE_OK;
1177 }
1178
1179 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1180 {
1181         BUILD_BUG_ON(sizeof(*caps) != 8);
1182         if (!intel_sdvo_get_value(intel_sdvo,
1183                                   SDVO_CMD_GET_DEVICE_CAPS,
1184                                   caps, sizeof(*caps)))
1185                 return false;
1186
1187         DRM_DEBUG_KMS("SDVO capabilities:\n"
1188                       "  vendor_id: %d\n"
1189                       "  device_id: %d\n"
1190                       "  device_rev_id: %d\n"
1191                       "  sdvo_version_major: %d\n"
1192                       "  sdvo_version_minor: %d\n"
1193                       "  sdvo_inputs_mask: %d\n"
1194                       "  smooth_scaling: %d\n"
1195                       "  sharp_scaling: %d\n"
1196                       "  up_scaling: %d\n"
1197                       "  down_scaling: %d\n"
1198                       "  stall_support: %d\n"
1199                       "  output_flags: %d\n",
1200                       caps->vendor_id,
1201                       caps->device_id,
1202                       caps->device_rev_id,
1203                       caps->sdvo_version_major,
1204                       caps->sdvo_version_minor,
1205                       caps->sdvo_inputs_mask,
1206                       caps->smooth_scaling,
1207                       caps->sharp_scaling,
1208                       caps->up_scaling,
1209                       caps->down_scaling,
1210                       caps->stall_support,
1211                       caps->output_flags);
1212
1213         return true;
1214 }
1215
1216 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1217 {
1218         u8 response[2];
1219
1220         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1221                                     &response, 2) && response[0];
1222 }
1223
1224 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1225 {
1226         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1227
1228         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1229 }
1230
1231 static bool
1232 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1233 {
1234         /* Is there more than one type of output? */
1235         int caps = intel_sdvo->caps.output_flags & 0xf;
1236         return caps & -caps;
1237 }
1238
1239 static struct edid *
1240 intel_sdvo_get_edid(struct drm_connector *connector)
1241 {
1242         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1243         return drm_get_edid(connector, &sdvo->ddc);
1244 }
1245
1246 /* Mac mini hack -- use the same DDC as the analog connector */
1247 static struct edid *
1248 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1249 {
1250         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1251
1252         return drm_get_edid(connector,
1253                             &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1254 }
1255
1256 enum drm_connector_status
1257 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1258 {
1259         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1260         enum drm_connector_status status;
1261         struct edid *edid;
1262
1263         edid = intel_sdvo_get_edid(connector);
1264
1265         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1266                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1267
1268                 /*
1269                  * Don't use the 1 as the argument of DDC bus switch to get
1270                  * the EDID. It is used for SDVO SPD ROM.
1271                  */
1272                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1273                         intel_sdvo->ddc_bus = ddc;
1274                         edid = intel_sdvo_get_edid(connector);
1275                         if (edid)
1276                                 break;
1277                 }
1278                 /*
1279                  * If we found the EDID on the other bus,
1280                  * assume that is the correct DDC bus.
1281                  */
1282                 if (edid == NULL)
1283                         intel_sdvo->ddc_bus = saved_ddc;
1284         }
1285
1286         /*
1287          * When there is no edid and no monitor is connected with VGA
1288          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1289          */
1290         if (edid == NULL)
1291                 edid = intel_sdvo_get_analog_edid(connector);
1292
1293         status = connector_status_unknown;
1294         if (edid != NULL) {
1295                 /* DDC bus is shared, match EDID to connector type */
1296                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1297                         status = connector_status_connected;
1298                         if (intel_sdvo->is_hdmi) {
1299                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1300                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1301                         }
1302                 } else
1303                         status = connector_status_disconnected;
1304                 connector->display_info.raw_edid = NULL;
1305                 kfree(edid);
1306         }
1307
1308         if (status == connector_status_connected) {
1309                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1310                 if (intel_sdvo_connector->force_audio)
1311                         intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1312         }
1313
1314         return status;
1315 }
1316
1317 static enum drm_connector_status
1318 intel_sdvo_detect(struct drm_connector *connector, bool force)
1319 {
1320         uint16_t response;
1321         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1322         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1323         enum drm_connector_status ret;
1324
1325         if (!intel_sdvo_write_cmd(intel_sdvo,
1326                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1327                 return connector_status_unknown;
1328
1329         /* add 30ms delay when the output type might be TV */
1330         if (intel_sdvo->caps.output_flags &
1331             (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1332                 mdelay(30);
1333
1334         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1335                 return connector_status_unknown;
1336
1337         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1338                       response & 0xff, response >> 8,
1339                       intel_sdvo_connector->output_flag);
1340
1341         if (response == 0)
1342                 return connector_status_disconnected;
1343
1344         intel_sdvo->attached_output = response;
1345
1346         intel_sdvo->has_hdmi_monitor = false;
1347         intel_sdvo->has_hdmi_audio = false;
1348
1349         if ((intel_sdvo_connector->output_flag & response) == 0)
1350                 ret = connector_status_disconnected;
1351         else if (IS_TMDS(intel_sdvo_connector))
1352                 ret = intel_sdvo_hdmi_sink_detect(connector);
1353         else {
1354                 struct edid *edid;
1355
1356                 /* if we have an edid check it matches the connection */
1357                 edid = intel_sdvo_get_edid(connector);
1358                 if (edid == NULL)
1359                         edid = intel_sdvo_get_analog_edid(connector);
1360                 if (edid != NULL) {
1361                         if (edid->input & DRM_EDID_INPUT_DIGITAL)
1362                                 ret = connector_status_disconnected;
1363                         else
1364                                 ret = connector_status_connected;
1365                         connector->display_info.raw_edid = NULL;
1366                         kfree(edid);
1367                 } else
1368                         ret = connector_status_connected;
1369         }
1370
1371         /* May update encoder flag for like clock for SDVO TV, etc.*/
1372         if (ret == connector_status_connected) {
1373                 intel_sdvo->is_tv = false;
1374                 intel_sdvo->is_lvds = false;
1375                 intel_sdvo->base.needs_tv_clock = false;
1376
1377                 if (response & SDVO_TV_MASK) {
1378                         intel_sdvo->is_tv = true;
1379                         intel_sdvo->base.needs_tv_clock = true;
1380                 }
1381                 if (response & SDVO_LVDS_MASK)
1382                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1383         }
1384
1385         return ret;
1386 }
1387
1388 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1389 {
1390         struct edid *edid;
1391
1392         /* set the bus switch and get the modes */
1393         edid = intel_sdvo_get_edid(connector);
1394
1395         /*
1396          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1397          * link between analog and digital outputs. So, if the regular SDVO
1398          * DDC fails, check to see if the analog output is disconnected, in
1399          * which case we'll look there for the digital DDC data.
1400          */
1401         if (edid == NULL)
1402                 edid = intel_sdvo_get_analog_edid(connector);
1403
1404         if (edid != NULL) {
1405                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1406                 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1407                 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1408
1409                 if (connector_is_digital == monitor_is_digital) {
1410                         drm_mode_connector_update_edid_property(connector, edid);
1411                         drm_add_edid_modes(connector, edid);
1412                 }
1413
1414                 connector->display_info.raw_edid = NULL;
1415                 kfree(edid);
1416         }
1417 }
1418
1419 /*
1420  * Set of SDVO TV modes.
1421  * Note!  This is in reply order (see loop in get_tv_modes).
1422  * XXX: all 60Hz refresh?
1423  */
1424 static const struct drm_display_mode sdvo_tv_modes[] = {
1425         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1426                    416, 0, 200, 201, 232, 233, 0,
1427                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1429                    416, 0, 240, 241, 272, 273, 0,
1430                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1431         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1432                    496, 0, 300, 301, 332, 333, 0,
1433                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1434         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1435                    736, 0, 350, 351, 382, 383, 0,
1436                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1437         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1438                    736, 0, 400, 401, 432, 433, 0,
1439                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1441                    736, 0, 480, 481, 512, 513, 0,
1442                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1443         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1444                    800, 0, 480, 481, 512, 513, 0,
1445                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1446         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1447                    800, 0, 576, 577, 608, 609, 0,
1448                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1449         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1450                    816, 0, 350, 351, 382, 383, 0,
1451                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1453                    816, 0, 400, 401, 432, 433, 0,
1454                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1455         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1456                    816, 0, 480, 481, 512, 513, 0,
1457                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1458         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1459                    816, 0, 540, 541, 572, 573, 0,
1460                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1461         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1462                    816, 0, 576, 577, 608, 609, 0,
1463                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1465                    864, 0, 576, 577, 608, 609, 0,
1466                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1468                    896, 0, 600, 601, 632, 633, 0,
1469                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1471                    928, 0, 624, 625, 656, 657, 0,
1472                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1474                    1016, 0, 766, 767, 798, 799, 0,
1475                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1477                    1120, 0, 768, 769, 800, 801, 0,
1478                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1480                    1376, 0, 1024, 1025, 1056, 1057, 0,
1481                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482 };
1483
1484 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1485 {
1486         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1487         struct intel_sdvo_sdtv_resolution_request tv_res;
1488         uint32_t reply = 0, format_map = 0;
1489         int i;
1490
1491         /* Read the list of supported input resolutions for the selected TV
1492          * format.
1493          */
1494         format_map = 1 << intel_sdvo->tv_format_index;
1495         memcpy(&tv_res, &format_map,
1496                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1497
1498         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1499                 return;
1500
1501         BUILD_BUG_ON(sizeof(tv_res) != 3);
1502         if (!intel_sdvo_write_cmd(intel_sdvo,
1503                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1504                                   &tv_res, sizeof(tv_res)))
1505                 return;
1506         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1507                 return;
1508
1509         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1510                 if (reply & (1 << i)) {
1511                         struct drm_display_mode *nmode;
1512                         nmode = drm_mode_duplicate(connector->dev,
1513                                                    &sdvo_tv_modes[i]);
1514                         if (nmode)
1515                                 drm_mode_probed_add(connector, nmode);
1516                 }
1517 }
1518
1519 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1520 {
1521         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1522         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1523         struct drm_display_mode *newmode;
1524
1525         /*
1526          * Attempt to get the mode list from DDC.
1527          * Assume that the preferred modes are
1528          * arranged in priority order.
1529          */
1530         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1531         if (list_empty(&connector->probed_modes) == false)
1532                 goto end;
1533
1534         /* Fetch modes from VBT */
1535         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1536                 newmode = drm_mode_duplicate(connector->dev,
1537                                              dev_priv->sdvo_lvds_vbt_mode);
1538                 if (newmode != NULL) {
1539                         /* Guarantee the mode is preferred */
1540                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1541                                          DRM_MODE_TYPE_DRIVER);
1542                         drm_mode_probed_add(connector, newmode);
1543                 }
1544         }
1545
1546 end:
1547         list_for_each_entry(newmode, &connector->probed_modes, head) {
1548                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1549                         intel_sdvo->sdvo_lvds_fixed_mode =
1550                                 drm_mode_duplicate(connector->dev, newmode);
1551
1552                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1553                                               0);
1554
1555                         intel_sdvo->is_lvds = true;
1556                         break;
1557                 }
1558         }
1559
1560 }
1561
1562 static int intel_sdvo_get_modes(struct drm_connector *connector)
1563 {
1564         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1565
1566         if (IS_TV(intel_sdvo_connector))
1567                 intel_sdvo_get_tv_modes(connector);
1568         else if (IS_LVDS(intel_sdvo_connector))
1569                 intel_sdvo_get_lvds_modes(connector);
1570         else
1571                 intel_sdvo_get_ddc_modes(connector);
1572
1573         return !list_empty(&connector->probed_modes);
1574 }
1575
1576 static void
1577 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1578 {
1579         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1580         struct drm_device *dev = connector->dev;
1581
1582         if (intel_sdvo_connector->left)
1583                 drm_property_destroy(dev, intel_sdvo_connector->left);
1584         if (intel_sdvo_connector->right)
1585                 drm_property_destroy(dev, intel_sdvo_connector->right);
1586         if (intel_sdvo_connector->top)
1587                 drm_property_destroy(dev, intel_sdvo_connector->top);
1588         if (intel_sdvo_connector->bottom)
1589                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1590         if (intel_sdvo_connector->hpos)
1591                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1592         if (intel_sdvo_connector->vpos)
1593                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1594         if (intel_sdvo_connector->saturation)
1595                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1596         if (intel_sdvo_connector->contrast)
1597                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1598         if (intel_sdvo_connector->hue)
1599                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1600         if (intel_sdvo_connector->sharpness)
1601                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1602         if (intel_sdvo_connector->flicker_filter)
1603                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1604         if (intel_sdvo_connector->flicker_filter_2d)
1605                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1606         if (intel_sdvo_connector->flicker_filter_adaptive)
1607                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1608         if (intel_sdvo_connector->tv_luma_filter)
1609                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1610         if (intel_sdvo_connector->tv_chroma_filter)
1611                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1612         if (intel_sdvo_connector->dot_crawl)
1613                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1614         if (intel_sdvo_connector->brightness)
1615                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1616 }
1617
1618 static void intel_sdvo_destroy(struct drm_connector *connector)
1619 {
1620         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1621
1622         if (intel_sdvo_connector->tv_format)
1623                 drm_property_destroy(connector->dev,
1624                                      intel_sdvo_connector->tv_format);
1625
1626         intel_sdvo_destroy_enhance_property(connector);
1627         drm_sysfs_connector_remove(connector);
1628         drm_connector_cleanup(connector);
1629         kfree(connector);
1630 }
1631
1632 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1633 {
1634         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1635         struct edid *edid;
1636         bool has_audio = false;
1637
1638         if (!intel_sdvo->is_hdmi)
1639                 return false;
1640
1641         edid = intel_sdvo_get_edid(connector);
1642         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1643                 has_audio = drm_detect_monitor_audio(edid);
1644
1645         return has_audio;
1646 }
1647
1648 static int
1649 intel_sdvo_set_property(struct drm_connector *connector,
1650                         struct drm_property *property,
1651                         uint64_t val)
1652 {
1653         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1654         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1655         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1656         uint16_t temp_value;
1657         uint8_t cmd;
1658         int ret;
1659
1660         ret = drm_connector_property_set_value(connector, property, val);
1661         if (ret)
1662                 return ret;
1663
1664         if (property == dev_priv->force_audio_property) {
1665                 int i = val;
1666                 bool has_audio;
1667
1668                 if (i == intel_sdvo_connector->force_audio)
1669                         return 0;
1670
1671                 intel_sdvo_connector->force_audio = i;
1672
1673                 if (i == 0)
1674                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1675                 else
1676                         has_audio = i > 0;
1677
1678                 if (has_audio == intel_sdvo->has_hdmi_audio)
1679                         return 0;
1680
1681                 intel_sdvo->has_hdmi_audio = has_audio;
1682                 goto done;
1683         }
1684
1685         if (property == dev_priv->broadcast_rgb_property) {
1686                 if (val == !!intel_sdvo->color_range)
1687                         return 0;
1688
1689                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1690                 goto done;
1691         }
1692
1693 #define CHECK_PROPERTY(name, NAME) \
1694         if (intel_sdvo_connector->name == property) { \
1695                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1696                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1697                 cmd = SDVO_CMD_SET_##NAME; \
1698                 intel_sdvo_connector->cur_##name = temp_value; \
1699                 goto set_value; \
1700         }
1701
1702         if (property == intel_sdvo_connector->tv_format) {
1703                 if (val >= TV_FORMAT_NUM)
1704                         return -EINVAL;
1705
1706                 if (intel_sdvo->tv_format_index ==
1707                     intel_sdvo_connector->tv_format_supported[val])
1708                         return 0;
1709
1710                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1711                 goto done;
1712         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1713                 temp_value = val;
1714                 if (intel_sdvo_connector->left == property) {
1715                         drm_connector_property_set_value(connector,
1716                                                          intel_sdvo_connector->right, val);
1717                         if (intel_sdvo_connector->left_margin == temp_value)
1718                                 return 0;
1719
1720                         intel_sdvo_connector->left_margin = temp_value;
1721                         intel_sdvo_connector->right_margin = temp_value;
1722                         temp_value = intel_sdvo_connector->max_hscan -
1723                                 intel_sdvo_connector->left_margin;
1724                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1725                         goto set_value;
1726                 } else if (intel_sdvo_connector->right == property) {
1727                         drm_connector_property_set_value(connector,
1728                                                          intel_sdvo_connector->left, val);
1729                         if (intel_sdvo_connector->right_margin == temp_value)
1730                                 return 0;
1731
1732                         intel_sdvo_connector->left_margin = temp_value;
1733                         intel_sdvo_connector->right_margin = temp_value;
1734                         temp_value = intel_sdvo_connector->max_hscan -
1735                                 intel_sdvo_connector->left_margin;
1736                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1737                         goto set_value;
1738                 } else if (intel_sdvo_connector->top == property) {
1739                         drm_connector_property_set_value(connector,
1740                                                          intel_sdvo_connector->bottom, val);
1741                         if (intel_sdvo_connector->top_margin == temp_value)
1742                                 return 0;
1743
1744                         intel_sdvo_connector->top_margin = temp_value;
1745                         intel_sdvo_connector->bottom_margin = temp_value;
1746                         temp_value = intel_sdvo_connector->max_vscan -
1747                                 intel_sdvo_connector->top_margin;
1748                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1749                         goto set_value;
1750                 } else if (intel_sdvo_connector->bottom == property) {
1751                         drm_connector_property_set_value(connector,
1752                                                          intel_sdvo_connector->top, val);
1753                         if (intel_sdvo_connector->bottom_margin == temp_value)
1754                                 return 0;
1755
1756                         intel_sdvo_connector->top_margin = temp_value;
1757                         intel_sdvo_connector->bottom_margin = temp_value;
1758                         temp_value = intel_sdvo_connector->max_vscan -
1759                                 intel_sdvo_connector->top_margin;
1760                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1761                         goto set_value;
1762                 }
1763                 CHECK_PROPERTY(hpos, HPOS)
1764                 CHECK_PROPERTY(vpos, VPOS)
1765                 CHECK_PROPERTY(saturation, SATURATION)
1766                 CHECK_PROPERTY(contrast, CONTRAST)
1767                 CHECK_PROPERTY(hue, HUE)
1768                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1769                 CHECK_PROPERTY(sharpness, SHARPNESS)
1770                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1771                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1772                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1773                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1774                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1775                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1776         }
1777
1778         return -EINVAL; /* unknown property */
1779
1780 set_value:
1781         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1782                 return -EIO;
1783
1784
1785 done:
1786         if (intel_sdvo->base.base.crtc) {
1787                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1788                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1789                                          crtc->y, crtc->fb);
1790         }
1791
1792         return 0;
1793 #undef CHECK_PROPERTY
1794 }
1795
1796 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1797         .dpms = intel_sdvo_dpms,
1798         .mode_fixup = intel_sdvo_mode_fixup,
1799         .prepare = intel_encoder_prepare,
1800         .mode_set = intel_sdvo_mode_set,
1801         .commit = intel_encoder_commit,
1802 };
1803
1804 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1805         .dpms = drm_helper_connector_dpms,
1806         .detect = intel_sdvo_detect,
1807         .fill_modes = drm_helper_probe_single_connector_modes,
1808         .set_property = intel_sdvo_set_property,
1809         .destroy = intel_sdvo_destroy,
1810 };
1811
1812 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1813         .get_modes = intel_sdvo_get_modes,
1814         .mode_valid = intel_sdvo_mode_valid,
1815         .best_encoder = intel_best_encoder,
1816 };
1817
1818 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1819 {
1820         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1821
1822         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1823                 drm_mode_destroy(encoder->dev,
1824                                  intel_sdvo->sdvo_lvds_fixed_mode);
1825
1826         i2c_del_adapter(&intel_sdvo->ddc);
1827         intel_encoder_destroy(encoder);
1828 }
1829
1830 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1831         .destroy = intel_sdvo_enc_destroy,
1832 };
1833
1834 static void
1835 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1836 {
1837         uint16_t mask = 0;
1838         unsigned int num_bits;
1839
1840         /* Make a mask of outputs less than or equal to our own priority in the
1841          * list.
1842          */
1843         switch (sdvo->controlled_output) {
1844         case SDVO_OUTPUT_LVDS1:
1845                 mask |= SDVO_OUTPUT_LVDS1;
1846         case SDVO_OUTPUT_LVDS0:
1847                 mask |= SDVO_OUTPUT_LVDS0;
1848         case SDVO_OUTPUT_TMDS1:
1849                 mask |= SDVO_OUTPUT_TMDS1;
1850         case SDVO_OUTPUT_TMDS0:
1851                 mask |= SDVO_OUTPUT_TMDS0;
1852         case SDVO_OUTPUT_RGB1:
1853                 mask |= SDVO_OUTPUT_RGB1;
1854         case SDVO_OUTPUT_RGB0:
1855                 mask |= SDVO_OUTPUT_RGB0;
1856                 break;
1857         }
1858
1859         /* Count bits to find what number we are in the priority list. */
1860         mask &= sdvo->caps.output_flags;
1861         num_bits = hweight16(mask);
1862         /* If more than 3 outputs, default to DDC bus 3 for now. */
1863         if (num_bits > 3)
1864                 num_bits = 3;
1865
1866         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1867         sdvo->ddc_bus = 1 << num_bits;
1868 }
1869
1870 /**
1871  * Choose the appropriate DDC bus for control bus switch command for this
1872  * SDVO output based on the controlled output.
1873  *
1874  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1875  * outputs, then LVDS outputs.
1876  */
1877 static void
1878 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1879                           struct intel_sdvo *sdvo, u32 reg)
1880 {
1881         struct sdvo_device_mapping *mapping;
1882
1883         if (IS_SDVOB(reg))
1884                 mapping = &(dev_priv->sdvo_mappings[0]);
1885         else
1886                 mapping = &(dev_priv->sdvo_mappings[1]);
1887
1888         if (mapping->initialized)
1889                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1890         else
1891                 intel_sdvo_guess_ddc_bus(sdvo);
1892 }
1893
1894 static void
1895 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1896                           struct intel_sdvo *sdvo, u32 reg)
1897 {
1898         struct sdvo_device_mapping *mapping;
1899         u8 pin, speed;
1900
1901         if (IS_SDVOB(reg))
1902                 mapping = &dev_priv->sdvo_mappings[0];
1903         else
1904                 mapping = &dev_priv->sdvo_mappings[1];
1905
1906         pin = GMBUS_PORT_DPB;
1907         speed = GMBUS_RATE_1MHZ >> 8;
1908         if (mapping->initialized) {
1909                 pin = mapping->i2c_pin;
1910                 speed = mapping->i2c_speed;
1911         }
1912
1913         if (pin < GMBUS_NUM_PORTS) {
1914                 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1915                 intel_gmbus_set_speed(sdvo->i2c, speed);
1916                 intel_gmbus_force_bit(sdvo->i2c, true);
1917         } else
1918                 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1919 }
1920
1921 static bool
1922 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1923 {
1924         return intel_sdvo_check_supp_encode(intel_sdvo);
1925 }
1926
1927 static u8
1928 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1929 {
1930         struct drm_i915_private *dev_priv = dev->dev_private;
1931         struct sdvo_device_mapping *my_mapping, *other_mapping;
1932
1933         if (IS_SDVOB(sdvo_reg)) {
1934                 my_mapping = &dev_priv->sdvo_mappings[0];
1935                 other_mapping = &dev_priv->sdvo_mappings[1];
1936         } else {
1937                 my_mapping = &dev_priv->sdvo_mappings[1];
1938                 other_mapping = &dev_priv->sdvo_mappings[0];
1939         }
1940
1941         /* If the BIOS described our SDVO device, take advantage of it. */
1942         if (my_mapping->slave_addr)
1943                 return my_mapping->slave_addr;
1944
1945         /* If the BIOS only described a different SDVO device, use the
1946          * address that it isn't using.
1947          */
1948         if (other_mapping->slave_addr) {
1949                 if (other_mapping->slave_addr == 0x70)
1950                         return 0x72;
1951                 else
1952                         return 0x70;
1953         }
1954
1955         /* No SDVO device info is found for another DVO port,
1956          * so use mapping assumption we had before BIOS parsing.
1957          */
1958         if (IS_SDVOB(sdvo_reg))
1959                 return 0x70;
1960         else
1961                 return 0x72;
1962 }
1963
1964 static void
1965 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1966                           struct intel_sdvo *encoder)
1967 {
1968         drm_connector_init(encoder->base.base.dev,
1969                            &connector->base.base,
1970                            &intel_sdvo_connector_funcs,
1971                            connector->base.base.connector_type);
1972
1973         drm_connector_helper_add(&connector->base.base,
1974                                  &intel_sdvo_connector_helper_funcs);
1975
1976         connector->base.base.interlace_allowed = 0;
1977         connector->base.base.doublescan_allowed = 0;
1978         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1979
1980         intel_connector_attach_encoder(&connector->base, &encoder->base);
1981         drm_sysfs_connector_add(&connector->base.base);
1982 }
1983
1984 static void
1985 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1986 {
1987         struct drm_device *dev = connector->base.base.dev;
1988
1989         intel_attach_force_audio_property(&connector->base.base);
1990         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
1991                 intel_attach_broadcast_rgb_property(&connector->base.base);
1992 }
1993
1994 static bool
1995 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
1996 {
1997         struct drm_encoder *encoder = &intel_sdvo->base.base;
1998         struct drm_connector *connector;
1999         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2000         struct intel_connector *intel_connector;
2001         struct intel_sdvo_connector *intel_sdvo_connector;
2002
2003         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2004         if (!intel_sdvo_connector)
2005                 return false;
2006
2007         if (device == 0) {
2008                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2009                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2010         } else if (device == 1) {
2011                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2012                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2013         }
2014
2015         intel_connector = &intel_sdvo_connector->base;
2016         connector = &intel_connector->base;
2017         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2018                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2019                 intel_sdvo->hotplug_active[0] |= 1 << device;
2020                 /* Some SDVO devices have one-shot hotplug interrupts.
2021                  * Ensure that they get re-enabled when an interrupt happens.
2022                  */
2023                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2024                 intel_sdvo_enable_hotplug(intel_encoder);
2025         }
2026         else
2027                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2028         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2029         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2030
2031         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2032                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2033                 intel_sdvo->is_hdmi = true;
2034         }
2035         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2036                                        (1 << INTEL_ANALOG_CLONE_BIT));
2037
2038         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2039         if (intel_sdvo->is_hdmi)
2040                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2041
2042         return true;
2043 }
2044
2045 static bool
2046 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2047 {
2048         struct drm_encoder *encoder = &intel_sdvo->base.base;
2049         struct drm_connector *connector;
2050         struct intel_connector *intel_connector;
2051         struct intel_sdvo_connector *intel_sdvo_connector;
2052
2053         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2054         if (!intel_sdvo_connector)
2055                 return false;
2056
2057         intel_connector = &intel_sdvo_connector->base;
2058         connector = &intel_connector->base;
2059         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2060         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2061
2062         intel_sdvo->controlled_output |= type;
2063         intel_sdvo_connector->output_flag = type;
2064
2065         intel_sdvo->is_tv = true;
2066         intel_sdvo->base.needs_tv_clock = true;
2067         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2068
2069         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2070
2071         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2072                 goto err;
2073
2074         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2075                 goto err;
2076
2077         return true;
2078
2079 err:
2080         intel_sdvo_destroy(connector);
2081         return false;
2082 }
2083
2084 static bool
2085 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2086 {
2087         struct drm_encoder *encoder = &intel_sdvo->base.base;
2088         struct drm_connector *connector;
2089         struct intel_connector *intel_connector;
2090         struct intel_sdvo_connector *intel_sdvo_connector;
2091
2092         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2093         if (!intel_sdvo_connector)
2094                 return false;
2095
2096         intel_connector = &intel_sdvo_connector->base;
2097         connector = &intel_connector->base;
2098         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2099         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2100         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2101
2102         if (device == 0) {
2103                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2104                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2105         } else if (device == 1) {
2106                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2107                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2108         }
2109
2110         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2111                                        (1 << INTEL_ANALOG_CLONE_BIT));
2112
2113         intel_sdvo_connector_init(intel_sdvo_connector,
2114                                   intel_sdvo);
2115         return true;
2116 }
2117
2118 static bool
2119 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2120 {
2121         struct drm_encoder *encoder = &intel_sdvo->base.base;
2122         struct drm_connector *connector;
2123         struct intel_connector *intel_connector;
2124         struct intel_sdvo_connector *intel_sdvo_connector;
2125
2126         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2127         if (!intel_sdvo_connector)
2128                 return false;
2129
2130         intel_connector = &intel_sdvo_connector->base;
2131         connector = &intel_connector->base;
2132         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2133         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2134
2135         if (device == 0) {
2136                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2137                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2138         } else if (device == 1) {
2139                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2140                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2141         }
2142
2143         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2144                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2145
2146         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2147         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2148                 goto err;
2149
2150         return true;
2151
2152 err:
2153         intel_sdvo_destroy(connector);
2154         return false;
2155 }
2156
2157 static bool
2158 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2159 {
2160         intel_sdvo->is_tv = false;
2161         intel_sdvo->base.needs_tv_clock = false;
2162         intel_sdvo->is_lvds = false;
2163
2164         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2165
2166         if (flags & SDVO_OUTPUT_TMDS0)
2167                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2168                         return false;
2169
2170         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2171                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2172                         return false;
2173
2174         /* TV has no XXX1 function block */
2175         if (flags & SDVO_OUTPUT_SVID0)
2176                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2177                         return false;
2178
2179         if (flags & SDVO_OUTPUT_CVBS0)
2180                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2181                         return false;
2182
2183         if (flags & SDVO_OUTPUT_RGB0)
2184                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2185                         return false;
2186
2187         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2188                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2189                         return false;
2190
2191         if (flags & SDVO_OUTPUT_LVDS0)
2192                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2193                         return false;
2194
2195         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2196                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2197                         return false;
2198
2199         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2200                 unsigned char bytes[2];
2201
2202                 intel_sdvo->controlled_output = 0;
2203                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2204                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2205                               SDVO_NAME(intel_sdvo),
2206                               bytes[0], bytes[1]);
2207                 return false;
2208         }
2209         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2210
2211         return true;
2212 }
2213
2214 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2215                                           struct intel_sdvo_connector *intel_sdvo_connector,
2216                                           int type)
2217 {
2218         struct drm_device *dev = intel_sdvo->base.base.dev;
2219         struct intel_sdvo_tv_format format;
2220         uint32_t format_map, i;
2221
2222         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2223                 return false;
2224
2225         BUILD_BUG_ON(sizeof(format) != 6);
2226         if (!intel_sdvo_get_value(intel_sdvo,
2227                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2228                                   &format, sizeof(format)))
2229                 return false;
2230
2231         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2232
2233         if (format_map == 0)
2234                 return false;
2235
2236         intel_sdvo_connector->format_supported_num = 0;
2237         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2238                 if (format_map & (1 << i))
2239                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2240
2241
2242         intel_sdvo_connector->tv_format =
2243                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2244                                             "mode", intel_sdvo_connector->format_supported_num);
2245         if (!intel_sdvo_connector->tv_format)
2246                 return false;
2247
2248         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2249                 drm_property_add_enum(
2250                                 intel_sdvo_connector->tv_format, i,
2251                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2252
2253         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2254         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2255                                       intel_sdvo_connector->tv_format, 0);
2256         return true;
2257
2258 }
2259
2260 #define ENHANCEMENT(name, NAME) do { \
2261         if (enhancements.name) { \
2262                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2263                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2264                         return false; \
2265                 intel_sdvo_connector->max_##name = data_value[0]; \
2266                 intel_sdvo_connector->cur_##name = response; \
2267                 intel_sdvo_connector->name = \
2268                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2269                 if (!intel_sdvo_connector->name) return false; \
2270                 intel_sdvo_connector->name->values[0] = 0; \
2271                 intel_sdvo_connector->name->values[1] = data_value[0]; \
2272                 drm_connector_attach_property(connector, \
2273                                               intel_sdvo_connector->name, \
2274                                               intel_sdvo_connector->cur_##name); \
2275                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2276                               data_value[0], data_value[1], response); \
2277         } \
2278 } while(0)
2279
2280 static bool
2281 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2282                                       struct intel_sdvo_connector *intel_sdvo_connector,
2283                                       struct intel_sdvo_enhancements_reply enhancements)
2284 {
2285         struct drm_device *dev = intel_sdvo->base.base.dev;
2286         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2287         uint16_t response, data_value[2];
2288
2289         /* when horizontal overscan is supported, Add the left/right  property */
2290         if (enhancements.overscan_h) {
2291                 if (!intel_sdvo_get_value(intel_sdvo,
2292                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2293                                           &data_value, 4))
2294                         return false;
2295
2296                 if (!intel_sdvo_get_value(intel_sdvo,
2297                                           SDVO_CMD_GET_OVERSCAN_H,
2298                                           &response, 2))
2299                         return false;
2300
2301                 intel_sdvo_connector->max_hscan = data_value[0];
2302                 intel_sdvo_connector->left_margin = data_value[0] - response;
2303                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2304                 intel_sdvo_connector->left =
2305                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2306                                             "left_margin", 2);
2307                 if (!intel_sdvo_connector->left)
2308                         return false;
2309
2310                 intel_sdvo_connector->left->values[0] = 0;
2311                 intel_sdvo_connector->left->values[1] = data_value[0];
2312                 drm_connector_attach_property(connector,
2313                                               intel_sdvo_connector->left,
2314                                               intel_sdvo_connector->left_margin);
2315
2316                 intel_sdvo_connector->right =
2317                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2318                                             "right_margin", 2);
2319                 if (!intel_sdvo_connector->right)
2320                         return false;
2321
2322                 intel_sdvo_connector->right->values[0] = 0;
2323                 intel_sdvo_connector->right->values[1] = data_value[0];
2324                 drm_connector_attach_property(connector,
2325                                               intel_sdvo_connector->right,
2326                                               intel_sdvo_connector->right_margin);
2327                 DRM_DEBUG_KMS("h_overscan: max %d, "
2328                               "default %d, current %d\n",
2329                               data_value[0], data_value[1], response);
2330         }
2331
2332         if (enhancements.overscan_v) {
2333                 if (!intel_sdvo_get_value(intel_sdvo,
2334                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2335                                           &data_value, 4))
2336                         return false;
2337
2338                 if (!intel_sdvo_get_value(intel_sdvo,
2339                                           SDVO_CMD_GET_OVERSCAN_V,
2340                                           &response, 2))
2341                         return false;
2342
2343                 intel_sdvo_connector->max_vscan = data_value[0];
2344                 intel_sdvo_connector->top_margin = data_value[0] - response;
2345                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2346                 intel_sdvo_connector->top =
2347                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2348                                             "top_margin", 2);
2349                 if (!intel_sdvo_connector->top)
2350                         return false;
2351
2352                 intel_sdvo_connector->top->values[0] = 0;
2353                 intel_sdvo_connector->top->values[1] = data_value[0];
2354                 drm_connector_attach_property(connector,
2355                                               intel_sdvo_connector->top,
2356                                               intel_sdvo_connector->top_margin);
2357
2358                 intel_sdvo_connector->bottom =
2359                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2360                                             "bottom_margin", 2);
2361                 if (!intel_sdvo_connector->bottom)
2362                         return false;
2363
2364                 intel_sdvo_connector->bottom->values[0] = 0;
2365                 intel_sdvo_connector->bottom->values[1] = data_value[0];
2366                 drm_connector_attach_property(connector,
2367                                               intel_sdvo_connector->bottom,
2368                                               intel_sdvo_connector->bottom_margin);
2369                 DRM_DEBUG_KMS("v_overscan: max %d, "
2370                               "default %d, current %d\n",
2371                               data_value[0], data_value[1], response);
2372         }
2373
2374         ENHANCEMENT(hpos, HPOS);
2375         ENHANCEMENT(vpos, VPOS);
2376         ENHANCEMENT(saturation, SATURATION);
2377         ENHANCEMENT(contrast, CONTRAST);
2378         ENHANCEMENT(hue, HUE);
2379         ENHANCEMENT(sharpness, SHARPNESS);
2380         ENHANCEMENT(brightness, BRIGHTNESS);
2381         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2382         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2383         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2384         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2385         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2386
2387         if (enhancements.dot_crawl) {
2388                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2389                         return false;
2390
2391                 intel_sdvo_connector->max_dot_crawl = 1;
2392                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2393                 intel_sdvo_connector->dot_crawl =
2394                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2395                 if (!intel_sdvo_connector->dot_crawl)
2396                         return false;
2397
2398                 intel_sdvo_connector->dot_crawl->values[0] = 0;
2399                 intel_sdvo_connector->dot_crawl->values[1] = 1;
2400                 drm_connector_attach_property(connector,
2401                                               intel_sdvo_connector->dot_crawl,
2402                                               intel_sdvo_connector->cur_dot_crawl);
2403                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2404         }
2405
2406         return true;
2407 }
2408
2409 static bool
2410 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2411                                         struct intel_sdvo_connector *intel_sdvo_connector,
2412                                         struct intel_sdvo_enhancements_reply enhancements)
2413 {
2414         struct drm_device *dev = intel_sdvo->base.base.dev;
2415         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2416         uint16_t response, data_value[2];
2417
2418         ENHANCEMENT(brightness, BRIGHTNESS);
2419
2420         return true;
2421 }
2422 #undef ENHANCEMENT
2423
2424 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2425                                                struct intel_sdvo_connector *intel_sdvo_connector)
2426 {
2427         union {
2428                 struct intel_sdvo_enhancements_reply reply;
2429                 uint16_t response;
2430         } enhancements;
2431
2432         BUILD_BUG_ON(sizeof(enhancements) != 2);
2433
2434         enhancements.response = 0;
2435         intel_sdvo_get_value(intel_sdvo,
2436                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2437                              &enhancements, sizeof(enhancements));
2438         if (enhancements.response == 0) {
2439                 DRM_DEBUG_KMS("No enhancement is supported\n");
2440                 return true;
2441         }
2442
2443         if (IS_TV(intel_sdvo_connector))
2444                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2445         else if(IS_LVDS(intel_sdvo_connector))
2446                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2447         else
2448                 return true;
2449 }
2450
2451 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2452                                      struct i2c_msg *msgs,
2453                                      int num)
2454 {
2455         struct intel_sdvo *sdvo = adapter->algo_data;
2456
2457         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2458                 return -EIO;
2459
2460         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2461 }
2462
2463 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2464 {
2465         struct intel_sdvo *sdvo = adapter->algo_data;
2466         return sdvo->i2c->algo->functionality(sdvo->i2c);
2467 }
2468
2469 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2470         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2471         .functionality  = intel_sdvo_ddc_proxy_func
2472 };
2473
2474 static bool
2475 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2476                           struct drm_device *dev)
2477 {
2478         sdvo->ddc.owner = THIS_MODULE;
2479         sdvo->ddc.class = I2C_CLASS_DDC;
2480         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2481         sdvo->ddc.dev.parent = &dev->pdev->dev;
2482         sdvo->ddc.algo_data = sdvo;
2483         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2484
2485         return i2c_add_adapter(&sdvo->ddc) == 0;
2486 }
2487
2488 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2489 {
2490         struct drm_i915_private *dev_priv = dev->dev_private;
2491         struct intel_encoder *intel_encoder;
2492         struct intel_sdvo *intel_sdvo;
2493         int i;
2494
2495         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2496         if (!intel_sdvo)
2497                 return false;
2498
2499         intel_sdvo->sdvo_reg = sdvo_reg;
2500         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2501         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2502         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2503                 kfree(intel_sdvo);
2504                 return false;
2505         }
2506
2507         /* encoder type will be decided later */
2508         intel_encoder = &intel_sdvo->base;
2509         intel_encoder->type = INTEL_OUTPUT_SDVO;
2510         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2511
2512         /* Read the regs to test if we can talk to the device */
2513         for (i = 0; i < 0x40; i++) {
2514                 u8 byte;
2515
2516                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2517                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2518                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2519                         goto err;
2520                 }
2521         }
2522
2523         if (IS_SDVOB(sdvo_reg))
2524                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2525         else
2526                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2527
2528         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2529
2530         /* In default case sdvo lvds is false */
2531         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2532                 goto err;
2533
2534         /* Set up hotplug command - note paranoia about contents of reply.
2535          * We assume that the hardware is in a sane state, and only touch
2536          * the bits we think we understand.
2537          */
2538         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2539                              &intel_sdvo->hotplug_active, 2);
2540         intel_sdvo->hotplug_active[0] &= ~0x3;
2541
2542         if (intel_sdvo_output_setup(intel_sdvo,
2543                                     intel_sdvo->caps.output_flags) != true) {
2544                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2545                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2546                 goto err;
2547         }
2548
2549         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2550
2551         /* Set the input timing to the screen. Assume always input 0. */
2552         if (!intel_sdvo_set_target_input(intel_sdvo))
2553                 goto err;
2554
2555         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2556                                                     &intel_sdvo->pixel_clock_min,
2557                                                     &intel_sdvo->pixel_clock_max))
2558                 goto err;
2559
2560         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2561                         "clock range %dMHz - %dMHz, "
2562                         "input 1: %c, input 2: %c, "
2563                         "output 1: %c, output 2: %c\n",
2564                         SDVO_NAME(intel_sdvo),
2565                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2566                         intel_sdvo->caps.device_rev_id,
2567                         intel_sdvo->pixel_clock_min / 1000,
2568                         intel_sdvo->pixel_clock_max / 1000,
2569                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2570                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2571                         /* check currently supported outputs */
2572                         intel_sdvo->caps.output_flags &
2573                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2574                         intel_sdvo->caps.output_flags &
2575                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2576         return true;
2577
2578 err:
2579         drm_encoder_cleanup(&intel_encoder->base);
2580         i2c_del_adapter(&intel_sdvo->ddc);
2581         kfree(intel_sdvo);
2582
2583         return false;
2584 }