2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
36 #include "intel_drv.h"
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
69 struct intel_encoder base;
71 struct i2c_adapter *i2c;
74 struct i2c_adapter ddc;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output;
98 * Hotplug activation bits for this device
100 uint8_t hotplug_active[2];
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
106 uint32_t color_range;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* This is for current tv format name */
121 * This is set if we treat the device as HDMI, instead of DVI.
124 bool has_hdmi_monitor;
128 * This is set if we detect output of sdvo device as LVDS and
129 * have a valid fixed mode to use with the panel.
134 * This is sdvo fixed pannel mode pointer
136 struct drm_display_mode *sdvo_lvds_fixed_mode;
138 /* DDC bus used by this SDVO encoder */
141 /* Input timings for adjusted_mode */
142 struct intel_sdvo_dtd input_dtd;
145 struct intel_sdvo_connector {
146 struct intel_connector base;
148 /* Mark the type of connector */
149 uint16_t output_flag;
153 /* This contains all current supported TV format */
154 u8 tv_format_supported[TV_FORMAT_NUM];
155 int format_supported_num;
156 struct drm_property *tv_format;
158 /* add the property for the SDVO-TV */
159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
174 struct drm_property *dot_crawl;
176 /* add the property for the SDVO-TV/LVDS */
177 struct drm_property *brightness;
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
196 u32 cur_dot_crawl, max_dot_crawl;
199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
201 return container_of(encoder, struct intel_sdvo, base.base);
204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
232 struct drm_device *dev = intel_sdvo->base.base.dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 bval = val, cval = val;
237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
243 if (intel_sdvo->sdvo_reg == SDVOB) {
244 cval = I915_READ(SDVOC);
246 bval = I915_READ(SDVOB);
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
253 for (i = 0; i < 2; i++)
255 I915_WRITE(SDVOB, bval);
257 I915_WRITE(SDVOC, cval);
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
264 struct i2c_msg msgs[] = {
266 .addr = intel_sdvo->slave_addr,
272 .addr = intel_sdvo->slave_addr,
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
292 } sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
406 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
407 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
409 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
410 const void *args, int args_len)
414 DRM_DEBUG_KMS("%s: W: %02X ",
415 SDVO_NAME(intel_sdvo), cmd);
416 for (i = 0; i < args_len; i++)
417 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
420 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
421 if (cmd == sdvo_cmd_names[i].cmd) {
422 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
426 if (i == ARRAY_SIZE(sdvo_cmd_names))
427 DRM_LOG_KMS("(%02X)", cmd);
431 static const char *cmd_status_names[] = {
437 "Target not specified",
438 "Scaling not supported"
441 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
442 const void *args, int args_len)
444 u8 buf[args_len*2 + 2], status;
445 struct i2c_msg msgs[args_len + 3];
448 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
450 for (i = 0; i < args_len; i++) {
451 msgs[i].addr = intel_sdvo->slave_addr;
454 msgs[i].buf = buf + 2 *i;
455 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
456 buf[2*i + 1] = ((u8*)args)[i];
458 msgs[i].addr = intel_sdvo->slave_addr;
461 msgs[i].buf = buf + 2*i;
462 buf[2*i + 0] = SDVO_I2C_OPCODE;
465 /* the following two are to read the response */
466 status = SDVO_I2C_CMD_STATUS;
467 msgs[i+1].addr = intel_sdvo->slave_addr;
470 msgs[i+1].buf = &status;
472 msgs[i+2].addr = intel_sdvo->slave_addr;
473 msgs[i+2].flags = I2C_M_RD;
475 msgs[i+2].buf = &status;
477 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
479 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
483 /* failure in I2C transfer */
484 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
491 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
492 void *response, int response_len)
498 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
506 * Check 5 times in case the hardware failed to read the docs.
508 if (!intel_sdvo_read_byte(intel_sdvo,
513 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
515 if (!intel_sdvo_read_byte(intel_sdvo,
521 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
522 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
524 DRM_LOG_KMS("(??? %d)", status);
526 if (status != SDVO_CMD_STATUS_SUCCESS)
529 /* Read the command response */
530 for (i = 0; i < response_len; i++) {
531 if (!intel_sdvo_read_byte(intel_sdvo,
532 SDVO_I2C_RETURN_0 + i,
533 &((u8 *)response)[i]))
535 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
541 DRM_LOG_KMS("... failed\n");
545 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
547 if (mode->clock >= 100000)
549 else if (mode->clock >= 50000)
555 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
558 /* This must be the immediately preceding write before the i2c xfer */
559 return intel_sdvo_write_cmd(intel_sdvo,
560 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
564 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
569 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
573 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
575 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
578 return intel_sdvo_read_response(intel_sdvo, value, len);
581 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
583 struct intel_sdvo_set_target_input_args targets = {0};
584 return intel_sdvo_set_value(intel_sdvo,
585 SDVO_CMD_SET_TARGET_INPUT,
586 &targets, sizeof(targets));
590 * Return whether each input is trained.
592 * This function is making an assumption about the layout of the response,
593 * which should be checked against the docs.
595 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
597 struct intel_sdvo_get_trained_inputs_response response;
599 BUILD_BUG_ON(sizeof(response) != 1);
600 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
601 &response, sizeof(response)))
604 *input_1 = response.input0_trained;
605 *input_2 = response.input1_trained;
609 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
612 return intel_sdvo_set_value(intel_sdvo,
613 SDVO_CMD_SET_ACTIVE_OUTPUTS,
614 &outputs, sizeof(outputs));
617 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
620 u8 state = SDVO_ENCODER_STATE_ON;
623 case DRM_MODE_DPMS_ON:
624 state = SDVO_ENCODER_STATE_ON;
626 case DRM_MODE_DPMS_STANDBY:
627 state = SDVO_ENCODER_STATE_STANDBY;
629 case DRM_MODE_DPMS_SUSPEND:
630 state = SDVO_ENCODER_STATE_SUSPEND;
632 case DRM_MODE_DPMS_OFF:
633 state = SDVO_ENCODER_STATE_OFF;
637 return intel_sdvo_set_value(intel_sdvo,
638 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
641 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
645 struct intel_sdvo_pixel_clock_range clocks;
647 BUILD_BUG_ON(sizeof(clocks) != 4);
648 if (!intel_sdvo_get_value(intel_sdvo,
649 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
650 &clocks, sizeof(clocks)))
653 /* Convert the values from units of 10 kHz to kHz. */
654 *clock_min = clocks.min * 10;
655 *clock_max = clocks.max * 10;
659 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
662 return intel_sdvo_set_value(intel_sdvo,
663 SDVO_CMD_SET_TARGET_OUTPUT,
664 &outputs, sizeof(outputs));
667 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
668 struct intel_sdvo_dtd *dtd)
670 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
671 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
674 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
675 struct intel_sdvo_dtd *dtd)
677 return intel_sdvo_set_timing(intel_sdvo,
678 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
681 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
682 struct intel_sdvo_dtd *dtd)
684 return intel_sdvo_set_timing(intel_sdvo,
685 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
689 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
694 struct intel_sdvo_preferred_input_timing_args args;
696 memset(&args, 0, sizeof(args));
699 args.height = height;
702 if (intel_sdvo->is_lvds &&
703 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
704 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
707 return intel_sdvo_set_value(intel_sdvo,
708 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
709 &args, sizeof(args));
712 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
713 struct intel_sdvo_dtd *dtd)
715 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
716 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
717 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
718 &dtd->part1, sizeof(dtd->part1)) &&
719 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
720 &dtd->part2, sizeof(dtd->part2));
723 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
725 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
728 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
729 const struct drm_display_mode *mode)
731 uint16_t width, height;
732 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
733 uint16_t h_sync_offset, v_sync_offset;
736 width = mode->crtc_hdisplay;
737 height = mode->crtc_vdisplay;
739 /* do some mode translations */
740 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
741 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
743 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
744 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
746 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
747 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
749 mode_clock = mode->clock;
750 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
752 dtd->part1.clock = mode_clock;
754 dtd->part1.h_active = width & 0xff;
755 dtd->part1.h_blank = h_blank_len & 0xff;
756 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
757 ((h_blank_len >> 8) & 0xf);
758 dtd->part1.v_active = height & 0xff;
759 dtd->part1.v_blank = v_blank_len & 0xff;
760 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
761 ((v_blank_len >> 8) & 0xf);
763 dtd->part2.h_sync_off = h_sync_offset & 0xff;
764 dtd->part2.h_sync_width = h_sync_len & 0xff;
765 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
767 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
768 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
769 ((v_sync_len & 0x30) >> 4);
771 dtd->part2.dtd_flags = 0x18;
772 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
773 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
774 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
775 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
776 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
777 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
779 dtd->part2.sdvo_flags = 0;
780 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
781 dtd->part2.reserved = 0;
784 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
785 const struct intel_sdvo_dtd *dtd)
787 mode->hdisplay = dtd->part1.h_active;
788 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
789 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
790 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
791 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
792 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
793 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
794 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
796 mode->vdisplay = dtd->part1.v_active;
797 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
798 mode->vsync_start = mode->vdisplay;
799 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
800 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
801 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
802 mode->vsync_end = mode->vsync_start +
803 (dtd->part2.v_sync_off_width & 0xf);
804 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
805 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
806 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
808 mode->clock = dtd->part1.clock * 10;
810 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
811 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
812 mode->flags |= DRM_MODE_FLAG_INTERLACE;
813 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
814 mode->flags |= DRM_MODE_FLAG_PHSYNC;
815 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
816 mode->flags |= DRM_MODE_FLAG_PVSYNC;
819 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
821 struct intel_sdvo_encode encode;
823 BUILD_BUG_ON(sizeof(encode) != 2);
824 return intel_sdvo_get_value(intel_sdvo,
825 SDVO_CMD_GET_SUPP_ENCODE,
826 &encode, sizeof(encode));
829 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
832 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
835 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
838 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
842 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
845 uint8_t set_buf_index[2];
851 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
853 for (i = 0; i <= av_split; i++) {
854 set_buf_index[0] = i; set_buf_index[1] = 0;
855 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
857 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
858 intel_sdvo_read_response(encoder, &buf_size, 1);
861 for (j = 0; j <= buf_size; j += 8) {
862 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
864 intel_sdvo_read_response(encoder, pos, 8);
871 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
872 unsigned if_index, uint8_t tx_rate,
873 uint8_t *data, unsigned length)
875 uint8_t set_buf_index[2] = { if_index, 0 };
876 uint8_t hbuf_size, tmp[8];
879 if (!intel_sdvo_set_value(intel_sdvo,
880 SDVO_CMD_SET_HBUF_INDEX,
884 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
888 /* Buffer size is 0 based, hooray! */
891 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
892 if_index, length, hbuf_size);
894 for (i = 0; i < hbuf_size; i += 8) {
897 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
899 if (!intel_sdvo_set_value(intel_sdvo,
900 SDVO_CMD_SET_HBUF_DATA,
905 return intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_TXRATE,
910 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
912 struct dip_infoframe avi_if = {
913 .type = DIP_TYPE_AVI,
914 .ver = DIP_VERSION_AVI,
917 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
919 intel_dip_infoframe_csum(&avi_if);
921 /* sdvo spec says that the ecc is handled by the hw, and it looks like
922 * we must not send the ecc field, either. */
923 memcpy(sdvo_data, &avi_if, 3);
924 sdvo_data[3] = avi_if.checksum;
925 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
927 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
929 sdvo_data, sizeof(sdvo_data));
932 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
934 struct intel_sdvo_tv_format format;
937 format_map = 1 << intel_sdvo->tv_format_index;
938 memset(&format, 0, sizeof(format));
939 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
941 BUILD_BUG_ON(sizeof(format) != 6);
942 return intel_sdvo_set_value(intel_sdvo,
943 SDVO_CMD_SET_TV_FORMAT,
944 &format, sizeof(format));
948 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
949 struct drm_display_mode *mode)
951 struct intel_sdvo_dtd output_dtd;
953 if (!intel_sdvo_set_target_output(intel_sdvo,
954 intel_sdvo->attached_output))
957 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
958 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
965 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
966 struct drm_display_mode *mode,
967 struct drm_display_mode *adjusted_mode)
969 /* Reset the input timing to the screen. Assume always input 0. */
970 if (!intel_sdvo_set_target_input(intel_sdvo))
973 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
979 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
980 &intel_sdvo->input_dtd))
983 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
985 drm_mode_set_crtcinfo(adjusted_mode, 0);
989 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
990 struct drm_display_mode *mode,
991 struct drm_display_mode *adjusted_mode)
993 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
996 /* We need to construct preferred input timings based on our
997 * output timings. To do that, we have to set the output
998 * timings, even though this isn't really the right place in
999 * the sequence to do it. Oh well.
1001 if (intel_sdvo->is_tv) {
1002 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1005 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1008 } else if (intel_sdvo->is_lvds) {
1009 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1010 intel_sdvo->sdvo_lvds_fixed_mode))
1013 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1018 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1019 * SDVO device will factor out the multiplier during mode_set.
1021 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1022 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1027 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1028 struct drm_display_mode *mode,
1029 struct drm_display_mode *adjusted_mode)
1031 struct drm_device *dev = encoder->dev;
1032 struct drm_i915_private *dev_priv = dev->dev_private;
1033 struct drm_crtc *crtc = encoder->crtc;
1034 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1035 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1037 struct intel_sdvo_in_out_map in_out;
1038 struct intel_sdvo_dtd input_dtd, output_dtd;
1039 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1045 /* First, set the input mapping for the first input to our controlled
1046 * output. This is only correct if we're a single-input device, in
1047 * which case the first input is the output from the appropriate SDVO
1048 * channel on the motherboard. In a two-input device, the first input
1049 * will be SDVOB and the second SDVOC.
1051 in_out.in0 = intel_sdvo->attached_output;
1054 intel_sdvo_set_value(intel_sdvo,
1055 SDVO_CMD_SET_IN_OUT_MAP,
1056 &in_out, sizeof(in_out));
1058 /* Set the output timings to the screen */
1059 if (!intel_sdvo_set_target_output(intel_sdvo,
1060 intel_sdvo->attached_output))
1063 /* lvds has a special fixed output timing. */
1064 if (intel_sdvo->is_lvds)
1065 intel_sdvo_get_dtd_from_mode(&output_dtd,
1066 intel_sdvo->sdvo_lvds_fixed_mode);
1068 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1069 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1071 /* Set the input timing to the screen. Assume always input 0. */
1072 if (!intel_sdvo_set_target_input(intel_sdvo))
1075 if (intel_sdvo->has_hdmi_monitor) {
1076 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1077 intel_sdvo_set_colorimetry(intel_sdvo,
1078 SDVO_COLORIMETRY_RGB256);
1079 intel_sdvo_set_avi_infoframe(intel_sdvo);
1081 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1083 if (intel_sdvo->is_tv &&
1084 !intel_sdvo_set_tv_format(intel_sdvo))
1087 /* We have tried to get input timing in mode_fixup, and filled into
1090 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1091 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1093 switch (pixel_multiplier) {
1095 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1096 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1097 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1099 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1102 /* Set the SDVO control regs. */
1103 if (INTEL_INFO(dev)->gen >= 4) {
1104 /* The real mode polarity is set by the SDVO commands, using
1105 * struct intel_sdvo_dtd. */
1106 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1107 if (intel_sdvo->is_hdmi)
1108 sdvox |= intel_sdvo->color_range;
1109 if (INTEL_INFO(dev)->gen < 5)
1110 sdvox |= SDVO_BORDER_ENABLE;
1112 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1113 switch (intel_sdvo->sdvo_reg) {
1115 sdvox &= SDVOB_PRESERVE_MASK;
1118 sdvox &= SDVOC_PRESERVE_MASK;
1121 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1124 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1125 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1127 sdvox |= TRANSCODER(intel_crtc->pipe);
1129 if (intel_sdvo->has_hdmi_audio)
1130 sdvox |= SDVO_AUDIO_ENABLE;
1132 if (INTEL_INFO(dev)->gen >= 4) {
1133 /* done in crtc_mode_set as the dpll_md reg must be written early */
1134 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1135 /* done in crtc_mode_set as it lives inside the dpll register */
1137 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1140 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1141 INTEL_INFO(dev)->gen < 5)
1142 sdvox |= SDVO_STALL_SELECT;
1143 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1146 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1148 struct drm_device *dev = encoder->dev;
1149 struct drm_i915_private *dev_priv = dev->dev_private;
1150 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1151 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1154 if (mode != DRM_MODE_DPMS_ON) {
1155 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1157 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1159 if (mode == DRM_MODE_DPMS_OFF) {
1160 temp = I915_READ(intel_sdvo->sdvo_reg);
1161 if ((temp & SDVO_ENABLE) != 0) {
1162 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1166 bool input1, input2;
1170 temp = I915_READ(intel_sdvo->sdvo_reg);
1171 if ((temp & SDVO_ENABLE) == 0)
1172 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1173 for (i = 0; i < 2; i++)
1174 intel_wait_for_vblank(dev, intel_crtc->pipe);
1176 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1177 /* Warn if the device reported failure to sync.
1178 * A lot of SDVO devices fail to notify of sync, but it's
1179 * a given it the status is a success, we succeeded.
1181 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1182 DRM_DEBUG_KMS("First %s output reported failure to "
1183 "sync\n", SDVO_NAME(intel_sdvo));
1187 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1188 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1193 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1194 struct drm_display_mode *mode)
1196 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1198 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1199 return MODE_NO_DBLESCAN;
1201 if (intel_sdvo->pixel_clock_min > mode->clock)
1202 return MODE_CLOCK_LOW;
1204 if (intel_sdvo->pixel_clock_max < mode->clock)
1205 return MODE_CLOCK_HIGH;
1207 if (intel_sdvo->is_lvds) {
1208 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1211 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1218 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1220 BUILD_BUG_ON(sizeof(*caps) != 8);
1221 if (!intel_sdvo_get_value(intel_sdvo,
1222 SDVO_CMD_GET_DEVICE_CAPS,
1223 caps, sizeof(*caps)))
1226 DRM_DEBUG_KMS("SDVO capabilities:\n"
1229 " device_rev_id: %d\n"
1230 " sdvo_version_major: %d\n"
1231 " sdvo_version_minor: %d\n"
1232 " sdvo_inputs_mask: %d\n"
1233 " smooth_scaling: %d\n"
1234 " sharp_scaling: %d\n"
1236 " down_scaling: %d\n"
1237 " stall_support: %d\n"
1238 " output_flags: %d\n",
1241 caps->device_rev_id,
1242 caps->sdvo_version_major,
1243 caps->sdvo_version_minor,
1244 caps->sdvo_inputs_mask,
1245 caps->smooth_scaling,
1246 caps->sharp_scaling,
1249 caps->stall_support,
1250 caps->output_flags);
1255 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1257 struct drm_device *dev = intel_sdvo->base.base.dev;
1260 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1262 if (IS_I945G(dev) || IS_I945GM(dev))
1265 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1266 &response, 2) && response[0];
1269 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1271 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1273 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1277 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1279 /* Is there more than one type of output? */
1280 return hweight16(intel_sdvo->caps.output_flags) > 1;
1283 static struct edid *
1284 intel_sdvo_get_edid(struct drm_connector *connector)
1286 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1287 return drm_get_edid(connector, &sdvo->ddc);
1290 /* Mac mini hack -- use the same DDC as the analog connector */
1291 static struct edid *
1292 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1294 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1296 return drm_get_edid(connector,
1297 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1300 enum drm_connector_status
1301 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1303 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1304 enum drm_connector_status status;
1307 edid = intel_sdvo_get_edid(connector);
1309 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1310 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1313 * Don't use the 1 as the argument of DDC bus switch to get
1314 * the EDID. It is used for SDVO SPD ROM.
1316 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1317 intel_sdvo->ddc_bus = ddc;
1318 edid = intel_sdvo_get_edid(connector);
1323 * If we found the EDID on the other bus,
1324 * assume that is the correct DDC bus.
1327 intel_sdvo->ddc_bus = saved_ddc;
1331 * When there is no edid and no monitor is connected with VGA
1332 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1335 edid = intel_sdvo_get_analog_edid(connector);
1337 status = connector_status_unknown;
1339 /* DDC bus is shared, match EDID to connector type */
1340 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1341 status = connector_status_connected;
1342 if (intel_sdvo->is_hdmi) {
1343 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1344 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1347 status = connector_status_disconnected;
1348 connector->display_info.raw_edid = NULL;
1352 if (status == connector_status_connected) {
1353 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1354 if (intel_sdvo_connector->force_audio)
1355 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1362 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1365 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1366 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1368 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1369 connector_is_digital, monitor_is_digital);
1370 return connector_is_digital == monitor_is_digital;
1373 static enum drm_connector_status
1374 intel_sdvo_detect(struct drm_connector *connector, bool force)
1377 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1378 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1379 enum drm_connector_status ret;
1381 if (!intel_sdvo_write_cmd(intel_sdvo,
1382 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1383 return connector_status_unknown;
1385 /* add 30ms delay when the output type might be TV */
1386 if (intel_sdvo->caps.output_flags &
1387 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1390 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1391 return connector_status_unknown;
1393 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1394 response & 0xff, response >> 8,
1395 intel_sdvo_connector->output_flag);
1398 return connector_status_disconnected;
1400 intel_sdvo->attached_output = response;
1402 intel_sdvo->has_hdmi_monitor = false;
1403 intel_sdvo->has_hdmi_audio = false;
1405 if ((intel_sdvo_connector->output_flag & response) == 0)
1406 ret = connector_status_disconnected;
1407 else if (IS_TMDS(intel_sdvo_connector))
1408 ret = intel_sdvo_tmds_sink_detect(connector);
1412 /* if we have an edid check it matches the connection */
1413 edid = intel_sdvo_get_edid(connector);
1415 edid = intel_sdvo_get_analog_edid(connector);
1417 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1419 ret = connector_status_connected;
1421 ret = connector_status_disconnected;
1423 connector->display_info.raw_edid = NULL;
1426 ret = connector_status_connected;
1429 /* May update encoder flag for like clock for SDVO TV, etc.*/
1430 if (ret == connector_status_connected) {
1431 intel_sdvo->is_tv = false;
1432 intel_sdvo->is_lvds = false;
1433 intel_sdvo->base.needs_tv_clock = false;
1435 if (response & SDVO_TV_MASK) {
1436 intel_sdvo->is_tv = true;
1437 intel_sdvo->base.needs_tv_clock = true;
1439 if (response & SDVO_LVDS_MASK)
1440 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1446 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1450 /* set the bus switch and get the modes */
1451 edid = intel_sdvo_get_edid(connector);
1454 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1455 * link between analog and digital outputs. So, if the regular SDVO
1456 * DDC fails, check to see if the analog output is disconnected, in
1457 * which case we'll look there for the digital DDC data.
1460 edid = intel_sdvo_get_analog_edid(connector);
1463 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1465 drm_mode_connector_update_edid_property(connector, edid);
1466 drm_add_edid_modes(connector, edid);
1469 connector->display_info.raw_edid = NULL;
1475 * Set of SDVO TV modes.
1476 * Note! This is in reply order (see loop in get_tv_modes).
1477 * XXX: all 60Hz refresh?
1479 static const struct drm_display_mode sdvo_tv_modes[] = {
1480 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1481 416, 0, 200, 201, 232, 233, 0,
1482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1484 416, 0, 240, 241, 272, 273, 0,
1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1487 496, 0, 300, 301, 332, 333, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1490 736, 0, 350, 351, 382, 383, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1493 736, 0, 400, 401, 432, 433, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1496 736, 0, 480, 481, 512, 513, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1499 800, 0, 480, 481, 512, 513, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1502 800, 0, 576, 577, 608, 609, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1505 816, 0, 350, 351, 382, 383, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1508 816, 0, 400, 401, 432, 433, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1511 816, 0, 480, 481, 512, 513, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1514 816, 0, 540, 541, 572, 573, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1517 816, 0, 576, 577, 608, 609, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1520 864, 0, 576, 577, 608, 609, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1523 896, 0, 600, 601, 632, 633, 0,
1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1526 928, 0, 624, 625, 656, 657, 0,
1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1529 1016, 0, 766, 767, 798, 799, 0,
1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1532 1120, 0, 768, 769, 800, 801, 0,
1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1535 1376, 0, 1024, 1025, 1056, 1057, 0,
1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1539 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1541 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1542 struct intel_sdvo_sdtv_resolution_request tv_res;
1543 uint32_t reply = 0, format_map = 0;
1546 /* Read the list of supported input resolutions for the selected TV
1549 format_map = 1 << intel_sdvo->tv_format_index;
1550 memcpy(&tv_res, &format_map,
1551 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1553 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1556 BUILD_BUG_ON(sizeof(tv_res) != 3);
1557 if (!intel_sdvo_write_cmd(intel_sdvo,
1558 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1559 &tv_res, sizeof(tv_res)))
1561 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1564 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1565 if (reply & (1 << i)) {
1566 struct drm_display_mode *nmode;
1567 nmode = drm_mode_duplicate(connector->dev,
1570 drm_mode_probed_add(connector, nmode);
1574 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1576 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1577 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1578 struct drm_display_mode *newmode;
1581 * Attempt to get the mode list from DDC.
1582 * Assume that the preferred modes are
1583 * arranged in priority order.
1585 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1586 if (list_empty(&connector->probed_modes) == false)
1589 /* Fetch modes from VBT */
1590 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1591 newmode = drm_mode_duplicate(connector->dev,
1592 dev_priv->sdvo_lvds_vbt_mode);
1593 if (newmode != NULL) {
1594 /* Guarantee the mode is preferred */
1595 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1596 DRM_MODE_TYPE_DRIVER);
1597 drm_mode_probed_add(connector, newmode);
1602 list_for_each_entry(newmode, &connector->probed_modes, head) {
1603 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1604 intel_sdvo->sdvo_lvds_fixed_mode =
1605 drm_mode_duplicate(connector->dev, newmode);
1607 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1610 intel_sdvo->is_lvds = true;
1617 static int intel_sdvo_get_modes(struct drm_connector *connector)
1619 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1621 if (IS_TV(intel_sdvo_connector))
1622 intel_sdvo_get_tv_modes(connector);
1623 else if (IS_LVDS(intel_sdvo_connector))
1624 intel_sdvo_get_lvds_modes(connector);
1626 intel_sdvo_get_ddc_modes(connector);
1628 return !list_empty(&connector->probed_modes);
1632 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1634 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1635 struct drm_device *dev = connector->dev;
1637 if (intel_sdvo_connector->left)
1638 drm_property_destroy(dev, intel_sdvo_connector->left);
1639 if (intel_sdvo_connector->right)
1640 drm_property_destroy(dev, intel_sdvo_connector->right);
1641 if (intel_sdvo_connector->top)
1642 drm_property_destroy(dev, intel_sdvo_connector->top);
1643 if (intel_sdvo_connector->bottom)
1644 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1645 if (intel_sdvo_connector->hpos)
1646 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1647 if (intel_sdvo_connector->vpos)
1648 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1649 if (intel_sdvo_connector->saturation)
1650 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1651 if (intel_sdvo_connector->contrast)
1652 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1653 if (intel_sdvo_connector->hue)
1654 drm_property_destroy(dev, intel_sdvo_connector->hue);
1655 if (intel_sdvo_connector->sharpness)
1656 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1657 if (intel_sdvo_connector->flicker_filter)
1658 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1659 if (intel_sdvo_connector->flicker_filter_2d)
1660 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1661 if (intel_sdvo_connector->flicker_filter_adaptive)
1662 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1663 if (intel_sdvo_connector->tv_luma_filter)
1664 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1665 if (intel_sdvo_connector->tv_chroma_filter)
1666 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1667 if (intel_sdvo_connector->dot_crawl)
1668 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1669 if (intel_sdvo_connector->brightness)
1670 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1673 static void intel_sdvo_destroy(struct drm_connector *connector)
1675 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1677 if (intel_sdvo_connector->tv_format)
1678 drm_property_destroy(connector->dev,
1679 intel_sdvo_connector->tv_format);
1681 intel_sdvo_destroy_enhance_property(connector);
1682 drm_sysfs_connector_remove(connector);
1683 drm_connector_cleanup(connector);
1687 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1689 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1691 bool has_audio = false;
1693 if (!intel_sdvo->is_hdmi)
1696 edid = intel_sdvo_get_edid(connector);
1697 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1698 has_audio = drm_detect_monitor_audio(edid);
1704 intel_sdvo_set_property(struct drm_connector *connector,
1705 struct drm_property *property,
1708 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1709 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1710 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1711 uint16_t temp_value;
1715 ret = drm_connector_property_set_value(connector, property, val);
1719 if (property == dev_priv->force_audio_property) {
1723 if (i == intel_sdvo_connector->force_audio)
1726 intel_sdvo_connector->force_audio = i;
1729 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1733 if (has_audio == intel_sdvo->has_hdmi_audio)
1736 intel_sdvo->has_hdmi_audio = has_audio;
1740 if (property == dev_priv->broadcast_rgb_property) {
1741 if (val == !!intel_sdvo->color_range)
1744 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1748 #define CHECK_PROPERTY(name, NAME) \
1749 if (intel_sdvo_connector->name == property) { \
1750 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1751 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1752 cmd = SDVO_CMD_SET_##NAME; \
1753 intel_sdvo_connector->cur_##name = temp_value; \
1757 if (property == intel_sdvo_connector->tv_format) {
1758 if (val >= TV_FORMAT_NUM)
1761 if (intel_sdvo->tv_format_index ==
1762 intel_sdvo_connector->tv_format_supported[val])
1765 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1767 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1769 if (intel_sdvo_connector->left == property) {
1770 drm_connector_property_set_value(connector,
1771 intel_sdvo_connector->right, val);
1772 if (intel_sdvo_connector->left_margin == temp_value)
1775 intel_sdvo_connector->left_margin = temp_value;
1776 intel_sdvo_connector->right_margin = temp_value;
1777 temp_value = intel_sdvo_connector->max_hscan -
1778 intel_sdvo_connector->left_margin;
1779 cmd = SDVO_CMD_SET_OVERSCAN_H;
1781 } else if (intel_sdvo_connector->right == property) {
1782 drm_connector_property_set_value(connector,
1783 intel_sdvo_connector->left, val);
1784 if (intel_sdvo_connector->right_margin == temp_value)
1787 intel_sdvo_connector->left_margin = temp_value;
1788 intel_sdvo_connector->right_margin = temp_value;
1789 temp_value = intel_sdvo_connector->max_hscan -
1790 intel_sdvo_connector->left_margin;
1791 cmd = SDVO_CMD_SET_OVERSCAN_H;
1793 } else if (intel_sdvo_connector->top == property) {
1794 drm_connector_property_set_value(connector,
1795 intel_sdvo_connector->bottom, val);
1796 if (intel_sdvo_connector->top_margin == temp_value)
1799 intel_sdvo_connector->top_margin = temp_value;
1800 intel_sdvo_connector->bottom_margin = temp_value;
1801 temp_value = intel_sdvo_connector->max_vscan -
1802 intel_sdvo_connector->top_margin;
1803 cmd = SDVO_CMD_SET_OVERSCAN_V;
1805 } else if (intel_sdvo_connector->bottom == property) {
1806 drm_connector_property_set_value(connector,
1807 intel_sdvo_connector->top, val);
1808 if (intel_sdvo_connector->bottom_margin == temp_value)
1811 intel_sdvo_connector->top_margin = temp_value;
1812 intel_sdvo_connector->bottom_margin = temp_value;
1813 temp_value = intel_sdvo_connector->max_vscan -
1814 intel_sdvo_connector->top_margin;
1815 cmd = SDVO_CMD_SET_OVERSCAN_V;
1818 CHECK_PROPERTY(hpos, HPOS)
1819 CHECK_PROPERTY(vpos, VPOS)
1820 CHECK_PROPERTY(saturation, SATURATION)
1821 CHECK_PROPERTY(contrast, CONTRAST)
1822 CHECK_PROPERTY(hue, HUE)
1823 CHECK_PROPERTY(brightness, BRIGHTNESS)
1824 CHECK_PROPERTY(sharpness, SHARPNESS)
1825 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1826 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1827 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1828 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1829 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1830 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1833 return -EINVAL; /* unknown property */
1836 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1841 if (intel_sdvo->base.base.crtc) {
1842 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1843 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1848 #undef CHECK_PROPERTY
1851 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1852 .dpms = intel_sdvo_dpms,
1853 .mode_fixup = intel_sdvo_mode_fixup,
1854 .prepare = intel_encoder_prepare,
1855 .mode_set = intel_sdvo_mode_set,
1856 .commit = intel_encoder_commit,
1859 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1860 .dpms = drm_helper_connector_dpms,
1861 .detect = intel_sdvo_detect,
1862 .fill_modes = drm_helper_probe_single_connector_modes,
1863 .set_property = intel_sdvo_set_property,
1864 .destroy = intel_sdvo_destroy,
1867 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1868 .get_modes = intel_sdvo_get_modes,
1869 .mode_valid = intel_sdvo_mode_valid,
1870 .best_encoder = intel_best_encoder,
1873 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1875 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1877 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1878 drm_mode_destroy(encoder->dev,
1879 intel_sdvo->sdvo_lvds_fixed_mode);
1881 i2c_del_adapter(&intel_sdvo->ddc);
1882 intel_encoder_destroy(encoder);
1885 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1886 .destroy = intel_sdvo_enc_destroy,
1890 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1893 unsigned int num_bits;
1895 /* Make a mask of outputs less than or equal to our own priority in the
1898 switch (sdvo->controlled_output) {
1899 case SDVO_OUTPUT_LVDS1:
1900 mask |= SDVO_OUTPUT_LVDS1;
1901 case SDVO_OUTPUT_LVDS0:
1902 mask |= SDVO_OUTPUT_LVDS0;
1903 case SDVO_OUTPUT_TMDS1:
1904 mask |= SDVO_OUTPUT_TMDS1;
1905 case SDVO_OUTPUT_TMDS0:
1906 mask |= SDVO_OUTPUT_TMDS0;
1907 case SDVO_OUTPUT_RGB1:
1908 mask |= SDVO_OUTPUT_RGB1;
1909 case SDVO_OUTPUT_RGB0:
1910 mask |= SDVO_OUTPUT_RGB0;
1914 /* Count bits to find what number we are in the priority list. */
1915 mask &= sdvo->caps.output_flags;
1916 num_bits = hweight16(mask);
1917 /* If more than 3 outputs, default to DDC bus 3 for now. */
1921 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1922 sdvo->ddc_bus = 1 << num_bits;
1926 * Choose the appropriate DDC bus for control bus switch command for this
1927 * SDVO output based on the controlled output.
1929 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1930 * outputs, then LVDS outputs.
1933 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1934 struct intel_sdvo *sdvo, u32 reg)
1936 struct sdvo_device_mapping *mapping;
1939 mapping = &(dev_priv->sdvo_mappings[0]);
1941 mapping = &(dev_priv->sdvo_mappings[1]);
1943 if (mapping->initialized)
1944 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1946 intel_sdvo_guess_ddc_bus(sdvo);
1950 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1951 struct intel_sdvo *sdvo, u32 reg)
1953 struct sdvo_device_mapping *mapping;
1957 mapping = &dev_priv->sdvo_mappings[0];
1959 mapping = &dev_priv->sdvo_mappings[1];
1961 pin = GMBUS_PORT_DPB;
1962 if (mapping->initialized)
1963 pin = mapping->i2c_pin;
1965 if (pin < GMBUS_NUM_PORTS) {
1966 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1967 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1968 intel_gmbus_force_bit(sdvo->i2c, true);
1970 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1975 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1977 return intel_sdvo_check_supp_encode(intel_sdvo);
1981 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1983 struct drm_i915_private *dev_priv = dev->dev_private;
1984 struct sdvo_device_mapping *my_mapping, *other_mapping;
1986 if (IS_SDVOB(sdvo_reg)) {
1987 my_mapping = &dev_priv->sdvo_mappings[0];
1988 other_mapping = &dev_priv->sdvo_mappings[1];
1990 my_mapping = &dev_priv->sdvo_mappings[1];
1991 other_mapping = &dev_priv->sdvo_mappings[0];
1994 /* If the BIOS described our SDVO device, take advantage of it. */
1995 if (my_mapping->slave_addr)
1996 return my_mapping->slave_addr;
1998 /* If the BIOS only described a different SDVO device, use the
1999 * address that it isn't using.
2001 if (other_mapping->slave_addr) {
2002 if (other_mapping->slave_addr == 0x70)
2008 /* No SDVO device info is found for another DVO port,
2009 * so use mapping assumption we had before BIOS parsing.
2011 if (IS_SDVOB(sdvo_reg))
2018 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2019 struct intel_sdvo *encoder)
2021 drm_connector_init(encoder->base.base.dev,
2022 &connector->base.base,
2023 &intel_sdvo_connector_funcs,
2024 connector->base.base.connector_type);
2026 drm_connector_helper_add(&connector->base.base,
2027 &intel_sdvo_connector_helper_funcs);
2029 connector->base.base.interlace_allowed = 0;
2030 connector->base.base.doublescan_allowed = 0;
2031 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2033 intel_connector_attach_encoder(&connector->base, &encoder->base);
2034 drm_sysfs_connector_add(&connector->base.base);
2038 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2040 struct drm_device *dev = connector->base.base.dev;
2042 intel_attach_force_audio_property(&connector->base.base);
2043 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2044 intel_attach_broadcast_rgb_property(&connector->base.base);
2048 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2050 struct drm_encoder *encoder = &intel_sdvo->base.base;
2051 struct drm_connector *connector;
2052 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2053 struct intel_connector *intel_connector;
2054 struct intel_sdvo_connector *intel_sdvo_connector;
2056 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2057 if (!intel_sdvo_connector)
2061 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2062 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2063 } else if (device == 1) {
2064 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2065 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2068 intel_connector = &intel_sdvo_connector->base;
2069 connector = &intel_connector->base;
2070 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2071 connector->polled = DRM_CONNECTOR_POLL_HPD;
2072 intel_sdvo->hotplug_active[0] |= 1 << device;
2073 /* Some SDVO devices have one-shot hotplug interrupts.
2074 * Ensure that they get re-enabled when an interrupt happens.
2076 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2077 intel_sdvo_enable_hotplug(intel_encoder);
2080 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2081 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2082 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2084 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2085 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2086 intel_sdvo->is_hdmi = true;
2088 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2089 (1 << INTEL_ANALOG_CLONE_BIT));
2091 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2092 if (intel_sdvo->is_hdmi)
2093 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2099 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2101 struct drm_encoder *encoder = &intel_sdvo->base.base;
2102 struct drm_connector *connector;
2103 struct intel_connector *intel_connector;
2104 struct intel_sdvo_connector *intel_sdvo_connector;
2106 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2107 if (!intel_sdvo_connector)
2110 intel_connector = &intel_sdvo_connector->base;
2111 connector = &intel_connector->base;
2112 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2113 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2115 intel_sdvo->controlled_output |= type;
2116 intel_sdvo_connector->output_flag = type;
2118 intel_sdvo->is_tv = true;
2119 intel_sdvo->base.needs_tv_clock = true;
2120 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2122 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2124 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2127 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2133 intel_sdvo_destroy(connector);
2138 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2140 struct drm_encoder *encoder = &intel_sdvo->base.base;
2141 struct drm_connector *connector;
2142 struct intel_connector *intel_connector;
2143 struct intel_sdvo_connector *intel_sdvo_connector;
2145 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2146 if (!intel_sdvo_connector)
2149 intel_connector = &intel_sdvo_connector->base;
2150 connector = &intel_connector->base;
2151 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2152 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2153 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2156 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2157 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2158 } else if (device == 1) {
2159 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2160 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2163 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2164 (1 << INTEL_ANALOG_CLONE_BIT));
2166 intel_sdvo_connector_init(intel_sdvo_connector,
2172 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2174 struct drm_encoder *encoder = &intel_sdvo->base.base;
2175 struct drm_connector *connector;
2176 struct intel_connector *intel_connector;
2177 struct intel_sdvo_connector *intel_sdvo_connector;
2179 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2180 if (!intel_sdvo_connector)
2183 intel_connector = &intel_sdvo_connector->base;
2184 connector = &intel_connector->base;
2185 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2186 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2189 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2190 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2191 } else if (device == 1) {
2192 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2193 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2196 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2197 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2199 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2200 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2206 intel_sdvo_destroy(connector);
2211 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2213 intel_sdvo->is_tv = false;
2214 intel_sdvo->base.needs_tv_clock = false;
2215 intel_sdvo->is_lvds = false;
2217 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2219 if (flags & SDVO_OUTPUT_TMDS0)
2220 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2223 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2224 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2227 /* TV has no XXX1 function block */
2228 if (flags & SDVO_OUTPUT_SVID0)
2229 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2232 if (flags & SDVO_OUTPUT_CVBS0)
2233 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2236 if (flags & SDVO_OUTPUT_RGB0)
2237 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2240 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2241 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2244 if (flags & SDVO_OUTPUT_LVDS0)
2245 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2248 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2249 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2252 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2253 unsigned char bytes[2];
2255 intel_sdvo->controlled_output = 0;
2256 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2257 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2258 SDVO_NAME(intel_sdvo),
2259 bytes[0], bytes[1]);
2262 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2267 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2268 struct intel_sdvo_connector *intel_sdvo_connector,
2271 struct drm_device *dev = intel_sdvo->base.base.dev;
2272 struct intel_sdvo_tv_format format;
2273 uint32_t format_map, i;
2275 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2278 BUILD_BUG_ON(sizeof(format) != 6);
2279 if (!intel_sdvo_get_value(intel_sdvo,
2280 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2281 &format, sizeof(format)))
2284 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2286 if (format_map == 0)
2289 intel_sdvo_connector->format_supported_num = 0;
2290 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2291 if (format_map & (1 << i))
2292 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2295 intel_sdvo_connector->tv_format =
2296 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2297 "mode", intel_sdvo_connector->format_supported_num);
2298 if (!intel_sdvo_connector->tv_format)
2301 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2302 drm_property_add_enum(
2303 intel_sdvo_connector->tv_format, i,
2304 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2306 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2307 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2308 intel_sdvo_connector->tv_format, 0);
2313 #define ENHANCEMENT(name, NAME) do { \
2314 if (enhancements.name) { \
2315 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2316 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2318 intel_sdvo_connector->max_##name = data_value[0]; \
2319 intel_sdvo_connector->cur_##name = response; \
2320 intel_sdvo_connector->name = \
2321 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2322 if (!intel_sdvo_connector->name) return false; \
2323 intel_sdvo_connector->name->values[0] = 0; \
2324 intel_sdvo_connector->name->values[1] = data_value[0]; \
2325 drm_connector_attach_property(connector, \
2326 intel_sdvo_connector->name, \
2327 intel_sdvo_connector->cur_##name); \
2328 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2329 data_value[0], data_value[1], response); \
2334 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2335 struct intel_sdvo_connector *intel_sdvo_connector,
2336 struct intel_sdvo_enhancements_reply enhancements)
2338 struct drm_device *dev = intel_sdvo->base.base.dev;
2339 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2340 uint16_t response, data_value[2];
2342 /* when horizontal overscan is supported, Add the left/right property */
2343 if (enhancements.overscan_h) {
2344 if (!intel_sdvo_get_value(intel_sdvo,
2345 SDVO_CMD_GET_MAX_OVERSCAN_H,
2349 if (!intel_sdvo_get_value(intel_sdvo,
2350 SDVO_CMD_GET_OVERSCAN_H,
2354 intel_sdvo_connector->max_hscan = data_value[0];
2355 intel_sdvo_connector->left_margin = data_value[0] - response;
2356 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2357 intel_sdvo_connector->left =
2358 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2360 if (!intel_sdvo_connector->left)
2363 intel_sdvo_connector->left->values[0] = 0;
2364 intel_sdvo_connector->left->values[1] = data_value[0];
2365 drm_connector_attach_property(connector,
2366 intel_sdvo_connector->left,
2367 intel_sdvo_connector->left_margin);
2369 intel_sdvo_connector->right =
2370 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2372 if (!intel_sdvo_connector->right)
2375 intel_sdvo_connector->right->values[0] = 0;
2376 intel_sdvo_connector->right->values[1] = data_value[0];
2377 drm_connector_attach_property(connector,
2378 intel_sdvo_connector->right,
2379 intel_sdvo_connector->right_margin);
2380 DRM_DEBUG_KMS("h_overscan: max %d, "
2381 "default %d, current %d\n",
2382 data_value[0], data_value[1], response);
2385 if (enhancements.overscan_v) {
2386 if (!intel_sdvo_get_value(intel_sdvo,
2387 SDVO_CMD_GET_MAX_OVERSCAN_V,
2391 if (!intel_sdvo_get_value(intel_sdvo,
2392 SDVO_CMD_GET_OVERSCAN_V,
2396 intel_sdvo_connector->max_vscan = data_value[0];
2397 intel_sdvo_connector->top_margin = data_value[0] - response;
2398 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2399 intel_sdvo_connector->top =
2400 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2402 if (!intel_sdvo_connector->top)
2405 intel_sdvo_connector->top->values[0] = 0;
2406 intel_sdvo_connector->top->values[1] = data_value[0];
2407 drm_connector_attach_property(connector,
2408 intel_sdvo_connector->top,
2409 intel_sdvo_connector->top_margin);
2411 intel_sdvo_connector->bottom =
2412 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2413 "bottom_margin", 2);
2414 if (!intel_sdvo_connector->bottom)
2417 intel_sdvo_connector->bottom->values[0] = 0;
2418 intel_sdvo_connector->bottom->values[1] = data_value[0];
2419 drm_connector_attach_property(connector,
2420 intel_sdvo_connector->bottom,
2421 intel_sdvo_connector->bottom_margin);
2422 DRM_DEBUG_KMS("v_overscan: max %d, "
2423 "default %d, current %d\n",
2424 data_value[0], data_value[1], response);
2427 ENHANCEMENT(hpos, HPOS);
2428 ENHANCEMENT(vpos, VPOS);
2429 ENHANCEMENT(saturation, SATURATION);
2430 ENHANCEMENT(contrast, CONTRAST);
2431 ENHANCEMENT(hue, HUE);
2432 ENHANCEMENT(sharpness, SHARPNESS);
2433 ENHANCEMENT(brightness, BRIGHTNESS);
2434 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2435 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2436 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2437 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2438 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2440 if (enhancements.dot_crawl) {
2441 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2444 intel_sdvo_connector->max_dot_crawl = 1;
2445 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2446 intel_sdvo_connector->dot_crawl =
2447 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2448 if (!intel_sdvo_connector->dot_crawl)
2451 intel_sdvo_connector->dot_crawl->values[0] = 0;
2452 intel_sdvo_connector->dot_crawl->values[1] = 1;
2453 drm_connector_attach_property(connector,
2454 intel_sdvo_connector->dot_crawl,
2455 intel_sdvo_connector->cur_dot_crawl);
2456 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2463 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2464 struct intel_sdvo_connector *intel_sdvo_connector,
2465 struct intel_sdvo_enhancements_reply enhancements)
2467 struct drm_device *dev = intel_sdvo->base.base.dev;
2468 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2469 uint16_t response, data_value[2];
2471 ENHANCEMENT(brightness, BRIGHTNESS);
2477 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2478 struct intel_sdvo_connector *intel_sdvo_connector)
2481 struct intel_sdvo_enhancements_reply reply;
2485 BUILD_BUG_ON(sizeof(enhancements) != 2);
2487 enhancements.response = 0;
2488 intel_sdvo_get_value(intel_sdvo,
2489 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2490 &enhancements, sizeof(enhancements));
2491 if (enhancements.response == 0) {
2492 DRM_DEBUG_KMS("No enhancement is supported\n");
2496 if (IS_TV(intel_sdvo_connector))
2497 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2498 else if (IS_LVDS(intel_sdvo_connector))
2499 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2504 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2505 struct i2c_msg *msgs,
2508 struct intel_sdvo *sdvo = adapter->algo_data;
2510 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2513 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2516 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2518 struct intel_sdvo *sdvo = adapter->algo_data;
2519 return sdvo->i2c->algo->functionality(sdvo->i2c);
2522 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2523 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2524 .functionality = intel_sdvo_ddc_proxy_func
2528 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2529 struct drm_device *dev)
2531 sdvo->ddc.owner = THIS_MODULE;
2532 sdvo->ddc.class = I2C_CLASS_DDC;
2533 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2534 sdvo->ddc.dev.parent = &dev->pdev->dev;
2535 sdvo->ddc.algo_data = sdvo;
2536 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2538 return i2c_add_adapter(&sdvo->ddc) == 0;
2541 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2543 struct drm_i915_private *dev_priv = dev->dev_private;
2544 struct intel_encoder *intel_encoder;
2545 struct intel_sdvo *intel_sdvo;
2549 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2553 intel_sdvo->sdvo_reg = sdvo_reg;
2554 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2555 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2556 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2561 /* encoder type will be decided later */
2562 intel_encoder = &intel_sdvo->base;
2563 intel_encoder->type = INTEL_OUTPUT_SDVO;
2564 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2566 /* Read the regs to test if we can talk to the device */
2567 for (i = 0; i < 0x40; i++) {
2570 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2571 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2572 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2579 hotplug_mask = IS_SDVOB(sdvo_reg) ?
2580 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2581 } else if (IS_GEN4(dev)) {
2582 hotplug_mask = IS_SDVOB(sdvo_reg) ?
2583 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2585 hotplug_mask = IS_SDVOB(sdvo_reg) ?
2586 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2589 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2591 /* In default case sdvo lvds is false */
2592 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2595 if (intel_sdvo_output_setup(intel_sdvo,
2596 intel_sdvo->caps.output_flags) != true) {
2597 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2598 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2602 /* Only enable the hotplug irq if we need it, to work around noisy
2605 if (intel_sdvo->hotplug_active[0])
2606 dev_priv->hotplug_supported_mask |= hotplug_mask;
2608 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2610 /* Set the input timing to the screen. Assume always input 0. */
2611 if (!intel_sdvo_set_target_input(intel_sdvo))
2614 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2615 &intel_sdvo->pixel_clock_min,
2616 &intel_sdvo->pixel_clock_max))
2619 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2620 "clock range %dMHz - %dMHz, "
2621 "input 1: %c, input 2: %c, "
2622 "output 1: %c, output 2: %c\n",
2623 SDVO_NAME(intel_sdvo),
2624 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2625 intel_sdvo->caps.device_rev_id,
2626 intel_sdvo->pixel_clock_min / 1000,
2627 intel_sdvo->pixel_clock_max / 1000,
2628 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2629 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2630 /* check currently supported outputs */
2631 intel_sdvo->caps.output_flags &
2632 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2633 intel_sdvo->caps.output_flags &
2634 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2638 drm_encoder_cleanup(&intel_encoder->base);
2639 i2c_del_adapter(&intel_sdvo->ddc);