drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include "drmP.h"
  29 #include "drm.h"
  30 #include "drm_crtc.h"
  31 #include "drm_crtc_helper.h"
  32 #include "intel_drv.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  37 {
  38         struct drm_device *dev = encoder->dev;
  39         struct drm_i915_private *dev_priv = dev->dev_private;
  40         u32 temp;
  41
  42         temp = I915_READ(ADPA);
  43         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  44         temp |= ADPA_DAC_ENABLE;
  45
  46         switch(mode) {
  47         case DRM_MODE_DPMS_ON:
  48                 temp |= ADPA_DAC_ENABLE;
  49                 break;
  50         case DRM_MODE_DPMS_STANDBY:
  51                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  52                 break;
  53         case DRM_MODE_DPMS_SUSPEND:
  54                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  55                 break;
  56         case DRM_MODE_DPMS_OFF:
  57                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  58                 break;
  59         }
  60
  61         I915_WRITE(ADPA, temp);
  62 }
  63
  64 static int intel_crt_mode_valid(struct drm_connector *connector,
  65                                 struct drm_display_mode *mode)
  66 {
  67         struct drm_device *dev = connector->dev;
  68
  69         int max_clock = 0;
  70         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  71                 return MODE_NO_DBLESCAN;
  72
  73         if (mode->clock < 25000)
  74                 return MODE_CLOCK_LOW;
  75
  76         if (!IS_I9XX(dev))
  77                 max_clock = 350000;
  78         else
  79                 max_clock = 400000;
  80         if (mode->clock > max_clock)
  81                 return MODE_CLOCK_HIGH;
  82
  83         return MODE_OK;
  84 }
  85
  86 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  87                                  struct drm_display_mode *mode,
  88                                  struct drm_display_mode *adjusted_mode)
  89 {
  90         return true;
  91 }
  92
  93 static void intel_crt_mode_set(struct drm_encoder *encoder,
  94                                struct drm_display_mode *mode,
  95                                struct drm_display_mode *adjusted_mode)
  96 {
  97
  98         struct drm_device *dev = encoder->dev;
  99         struct drm_crtc *crtc = encoder->crtc;
 100         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 101         struct drm_i915_private *dev_priv = dev->dev_private;
 102         int dpll_md_reg;
 103         u32 adpa, dpll_md;
 104
 105         if (intel_crtc->pipe == 0)
 106                 dpll_md_reg = DPLL_A_MD;
 107         else
 108                 dpll_md_reg = DPLL_B_MD;
 109
 110         /*
 111          * Disable separate mode multiplier used when cloning SDVO to CRT
 112          * XXX this needs to be adjusted when we really are cloning
 113          */
 114         if (IS_I965G(dev)) {
 115                 dpll_md = I915_READ(dpll_md_reg);
 116                 I915_WRITE(dpll_md_reg,
 117                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 118         }
 119
 120         adpa = 0;
 121         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 122                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 123         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 124                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 125
 126         if (intel_crtc->pipe == 0) {
 127                 adpa |= ADPA_PIPE_A_SELECT;
 128                 I915_WRITE(BCLRPAT_A, 0);
 129         } else {
 130                 adpa |= ADPA_PIPE_B_SELECT;
 131                 I915_WRITE(BCLRPAT_B, 0);
 132         }
 133
 134         I915_WRITE(ADPA, adpa);
 135 }
 136
 137 /**
 138  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 139  *
 140  * Not for i915G/i915GM
 141  *
 142  * \return true if CRT is connected.
 143  * \return false if CRT is disconnected.
 144  */
 145 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 146 {
 147         struct drm_device *dev = connector->dev;
 148         struct drm_i915_private *dev_priv = dev->dev_private;
 149         u32 hotplug_en;
 150         int i, tries = 0;
 151         /*
 152          * On 4 series desktop, CRT detect sequence need to be done twice
 153          * to get a reliable result.
 154          */
 155
 156         if (IS_G4X(dev) && !IS_GM45(dev))
 157                 tries = 2;
 158         else
 159                 tries = 1;
 160         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 161         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
 162         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 163
 164         if (IS_G4X(dev))
 165                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
 166
 167         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
 168
 169         for (i = 0; i < tries ; i++) {
 170                 unsigned long timeout;
 171                 /* turn on the FORCE_DETECT */
 172                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 173                 timeout = jiffies + msecs_to_jiffies(1000);
 174                 /* wait for FORCE_DETECT to go off */
 175                 do {
 176                         if (!(I915_READ(PORT_HOTPLUG_EN) &
 177                                         CRT_HOTPLUG_FORCE_DETECT))
 178                                 break;
 179                         msleep(1);
 180                 } while (time_after(timeout, jiffies));
 181         }
 182
 183         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
 184             CRT_HOTPLUG_MONITOR_COLOR)
 185                 return true;
 186
 187         return false;
 188 }
 189
 190 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 191 {
 192         struct intel_output *intel_output = to_intel_output(connector);
 193
 194         /* CRT should always be at 0, but check anyway */
 195         if (intel_output->type != INTEL_OUTPUT_ANALOG)
 196                 return false;
 197
 198         return intel_ddc_probe(intel_output);
 199 }
 200
 201 static enum drm_connector_status
 202 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
 203 {
 204         struct drm_encoder *encoder = &intel_output->enc;
 205         struct drm_device *dev = encoder->dev;
 206         struct drm_i915_private *dev_priv = dev->dev_private;
 207         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 208         uint32_t pipe = intel_crtc->pipe;
 209         uint32_t save_bclrpat;
 210         uint32_t save_vtotal;
 211         uint32_t vtotal, vactive;
 212         uint32_t vsample;
 213         uint32_t vblank, vblank_start, vblank_end;
 214         uint32_t dsl;
 215         uint32_t bclrpat_reg;
 216         uint32_t vtotal_reg;
 217         uint32_t vblank_reg;
 218         uint32_t vsync_reg;
 219         uint32_t pipeconf_reg;
 220         uint32_t pipe_dsl_reg;
 221         uint8_t st00;
 222         enum drm_connector_status status;
 223
 224         if (pipe == 0) {
 225                 bclrpat_reg = BCLRPAT_A;
 226                 vtotal_reg = VTOTAL_A;
 227                 vblank_reg = VBLANK_A;
 228                 vsync_reg = VSYNC_A;
 229                 pipeconf_reg = PIPEACONF;
 230                 pipe_dsl_reg = PIPEADSL;
 231         } else {
 232                 bclrpat_reg = BCLRPAT_B;
 233                 vtotal_reg = VTOTAL_B;
 234                 vblank_reg = VBLANK_B;
 235                 vsync_reg = VSYNC_B;
 236                 pipeconf_reg = PIPEBCONF;
 237                 pipe_dsl_reg = PIPEBDSL;
 238         }
 239
 240         save_bclrpat = I915_READ(bclrpat_reg);
 241         save_vtotal = I915_READ(vtotal_reg);
 242         vblank = I915_READ(vblank_reg);
 243
 244         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 245         vactive = (save_vtotal & 0x7ff) + 1;
 246
 247         vblank_start = (vblank & 0xfff) + 1;
 248         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 249
 250         /* Set the border color to purple. */
 251         I915_WRITE(bclrpat_reg, 0x500050);
 252
 253         if (IS_I9XX(dev)) {
 254                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 255                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 256                 /* Wait for next Vblank to substitue
 257                  * border color for Color info */
 258                 intel_wait_for_vblank(dev);
 259                 st00 = I915_READ8(VGA_MSR_WRITE);
 260                 status = ((st00 & (1 << 4)) != 0) ?
 261                         connector_status_connected :
 262                         connector_status_disconnected;
 263
 264                 I915_WRITE(pipeconf_reg, pipeconf);
 265         } else {
 266                 bool restore_vblank = false;
 267                 int count, detect;
 268
 269                 /*
 270                 * If there isn't any border, add some.
 271                 * Yes, this will flicker
 272                 */
 273                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 274                         uint32_t vsync = I915_READ(vsync_reg);
 275                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 276
 277                         vblank_start = vsync_start;
 278                         I915_WRITE(vblank_reg,
 279                                    (vblank_start - 1) |
 280                                    ((vblank_end - 1) << 16));
 281                         restore_vblank = true;
 282                 }
 283                 /* sample in the vertical border, selecting the larger one */
 284                 if (vblank_start - vactive >= vtotal - vblank_end)
 285                         vsample = (vblank_start + vactive) >> 1;
 286                 else
 287                         vsample = (vtotal + vblank_end) >> 1;
 288
 289                 /*
 290                  * Wait for the border to be displayed
 291                  */
 292                 while (I915_READ(pipe_dsl_reg) >= vactive)
 293                         ;
 294                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 295                         ;
 296                 /*
 297                  * Watch ST00 for an entire scanline
 298                  */
 299                 detect = 0;
 300                 count = 0;
 301                 do {
 302                         count++;
 303                         /* Read the ST00 VGA status register */
 304                         st00 = I915_READ8(VGA_MSR_WRITE);
 305                         if (st00 & (1 << 4))
 306                                 detect++;
 307                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 308
 309                 /* restore vblank if necessary */
 310                 if (restore_vblank)
 311                         I915_WRITE(vblank_reg, vblank);
 312                 /*
 313                  * If more than 3/4 of the scanline detected a monitor,
 314                  * then it is assumed to be present. This works even on i830,
 315                  * where there isn't any way to force the border color across
 316                  * the screen
 317                  */
 318                 status = detect * 4 > count * 3 ?
 319                          connector_status_connected :
 320                          connector_status_disconnected;
 321         }
 322
 323         /* Restore previous settings */
 324         I915_WRITE(bclrpat_reg, save_bclrpat);
 325
 326         return status;
 327 }
 328
 329 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
 330 {
 331         struct drm_device *dev = connector->dev;
 332         struct intel_output *intel_output = to_intel_output(connector);
 333         struct drm_encoder *encoder = &intel_output->enc;
 334         struct drm_crtc *crtc;
 335         int dpms_mode;
 336         enum drm_connector_status status;
 337
 338         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 339                 if (intel_crt_detect_hotplug(connector))
 340                         return connector_status_connected;
 341                 else
 342                         return connector_status_disconnected;
 343         }
 344
 345         if (intel_crt_detect_ddc(connector))
 346                 return connector_status_connected;
 347
 348         /* for pre-945g platforms use load detect */
 349         if (encoder->crtc && encoder->crtc->enabled) {
 350                 status = intel_crt_load_detect(encoder->crtc, intel_output);
 351         } else {
 352                 crtc = intel_get_load_detect_pipe(intel_output,
 353                                                   NULL, &dpms_mode);
 354                 if (crtc) {
 355                         status = intel_crt_load_detect(crtc, intel_output);
 356                         intel_release_load_detect_pipe(intel_output, dpms_mode);
 357                 } else
 358                         status = connector_status_unknown;
 359         }
 360
 361         return status;
 362 }
 363
 364 static void intel_crt_destroy(struct drm_connector *connector)
 365 {
 366         struct intel_output *intel_output = to_intel_output(connector);
 367
 368         intel_i2c_destroy(intel_output->ddc_bus);
 369         drm_sysfs_connector_remove(connector);
 370         drm_connector_cleanup(connector);
 371         kfree(connector);
 372 }
 373
 374 static int intel_crt_get_modes(struct drm_connector *connector)
 375 {
 376         struct intel_output *intel_output = to_intel_output(connector);
 377         return intel_ddc_get_modes(intel_output);
 378 }
 379
 380 static int intel_crt_set_property(struct drm_connector *connector,
 381                                   struct drm_property *property,
 382                                   uint64_t value)
 383 {
 384         return 0;
 385 }
 386
 387 /*
 388  * Routines for controlling stuff on the analog port
 389  */
 390
 391 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 392         .dpms = intel_crt_dpms,
 393         .mode_fixup = intel_crt_mode_fixup,
 394         .prepare = intel_encoder_prepare,
 395         .commit = intel_encoder_commit,
 396         .mode_set = intel_crt_mode_set,
 397 };
 398
 399 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 400         .dpms = drm_helper_connector_dpms,
 401         .detect = intel_crt_detect,
 402         .fill_modes = drm_helper_probe_single_connector_modes,
 403         .destroy = intel_crt_destroy,
 404         .set_property = intel_crt_set_property,
 405 };
 406
 407 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 408         .mode_valid = intel_crt_mode_valid,
 409         .get_modes = intel_crt_get_modes,
 410         .best_encoder = intel_best_encoder,
 411 };
 412
 413 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
 414 {
 415         drm_encoder_cleanup(encoder);
 416 }
 417
 418 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 419         .destroy = intel_crt_enc_destroy,
 420 };
 421
 422 void intel_crt_init(struct drm_device *dev)
 423 {
 424         struct drm_connector *connector;
 425         struct intel_output *intel_output;
 426
 427         intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
 428         if (!intel_output)
 429                 return;
 430
 431         connector = &intel_output->base;
 432         drm_connector_init(dev, &intel_output->base,
 433                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 434
 435         drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
 436                          DRM_MODE_ENCODER_DAC);
 437
 438         drm_mode_connector_attach_encoder(&intel_output->base,
 439                                           &intel_output->enc);
 440
 441         /* Set up the DDC bus. */
 442         intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
 443         if (!intel_output->ddc_bus) {
 444                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 445                            "failed.\n");
 446                 return;
 447         }
 448
 449         intel_output->type = INTEL_OUTPUT_ANALOG;
 450         connector->interlace_allowed = 0;
 451         connector->doublescan_allowed = 0;
 452
 453         drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
 454         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 455
 456         drm_sysfs_connector_add(connector);
 457 }