drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include "drmP.h"
  29 #include "drm.h"
  30 #include "drm_crtc.h"
  31 #include "drm_crtc_helper.h"
  32 #include "intel_drv.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  37 {
  38         struct drm_device *dev = encoder->dev;
  39         struct drm_i915_private *dev_priv = dev->dev_private;
  40         u32 temp, reg;
  41
  42         if (IS_IGDNG(dev))
  43                 reg = PCH_ADPA;
  44         else
  45                 reg = ADPA;
  46
  47         temp = I915_READ(reg);
  48         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  49         temp &= ~ADPA_DAC_ENABLE;
  50
  51         switch(mode) {
  52         case DRM_MODE_DPMS_ON:
  53                 temp |= ADPA_DAC_ENABLE;
  54                 break;
  55         case DRM_MODE_DPMS_STANDBY:
  56                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  57                 break;
  58         case DRM_MODE_DPMS_SUSPEND:
  59                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  60                 break;
  61         case DRM_MODE_DPMS_OFF:
  62                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  63                 break;
  64         }
  65
  66         I915_WRITE(reg, temp);
  67
  68         if (IS_IGD(dev)) {
  69                 if (mode == DRM_MODE_DPMS_OFF) {
  70                         /* turn off DAC */
  71                         temp = I915_READ(PORT_HOTPLUG_EN);
  72                         temp &= ~CRT_EOS_INT_EN;
  73                         I915_WRITE(PORT_HOTPLUG_EN, temp);
  74
  75                         temp = I915_READ(PORT_HOTPLUG_STAT);
  76                         if (temp & CRT_EOS_INT_STATUS)
  77                                 I915_WRITE(PORT_HOTPLUG_STAT,
  78                                         CRT_EOS_INT_STATUS);
  79                 } else {
  80                         /* turn on DAC. EOS interrupt must be enabled after DAC
  81                          * is enabled, so it sounds not good to enable it in
  82                          * i915_driver_irq_postinstall()
  83                          * wait 12.5ms after DAC is enabled
  84                          */
  85                         msleep(13);
  86                         temp = I915_READ(PORT_HOTPLUG_STAT);
  87                         if (temp & CRT_EOS_INT_STATUS)
  88                                 I915_WRITE(PORT_HOTPLUG_STAT,
  89                                         CRT_EOS_INT_STATUS);
  90                         temp = I915_READ(PORT_HOTPLUG_EN);
  91                         temp |= CRT_EOS_INT_EN;
  92                         I915_WRITE(PORT_HOTPLUG_EN, temp);
  93                 }
  94         }
  95 }
  96
  97 static int intel_crt_mode_valid(struct drm_connector *connector,
  98                                 struct drm_display_mode *mode)
  99 {
 100         struct drm_device *dev = connector->dev;
 101
 102         int max_clock = 0;
 103         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 104                 return MODE_NO_DBLESCAN;
 105
 106         if (mode->clock < 25000)
 107                 return MODE_CLOCK_LOW;
 108
 109         if (!IS_I9XX(dev))
 110                 max_clock = 350000;
 111         else
 112                 max_clock = 400000;
 113         if (mode->clock > max_clock)
 114                 return MODE_CLOCK_HIGH;
 115
 116         return MODE_OK;
 117 }
 118
 119 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 120                                  struct drm_display_mode *mode,
 121                                  struct drm_display_mode *adjusted_mode)
 122 {
 123         return true;
 124 }
 125
 126 static void intel_crt_mode_set(struct drm_encoder *encoder,
 127                                struct drm_display_mode *mode,
 128                                struct drm_display_mode *adjusted_mode)
 129 {
 130
 131         struct drm_device *dev = encoder->dev;
 132         struct drm_crtc *crtc = encoder->crtc;
 133         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 134         struct drm_i915_private *dev_priv = dev->dev_private;
 135         int dpll_md_reg;
 136         u32 adpa, dpll_md;
 137         u32 adpa_reg;
 138
 139         if (intel_crtc->pipe == 0)
 140                 dpll_md_reg = DPLL_A_MD;
 141         else
 142                 dpll_md_reg = DPLL_B_MD;
 143
 144         if (IS_IGDNG(dev))
 145                 adpa_reg = PCH_ADPA;
 146         else
 147                 adpa_reg = ADPA;
 148
 149         /*
 150          * Disable separate mode multiplier used when cloning SDVO to CRT
 151          * XXX this needs to be adjusted when we really are cloning
 152          */
 153         if (IS_I965G(dev) && !IS_IGDNG(dev)) {
 154                 dpll_md = I915_READ(dpll_md_reg);
 155                 I915_WRITE(dpll_md_reg,
 156                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 157         }
 158
 159         adpa = 0;
 160         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 161                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 162         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 163                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 164
 165         if (intel_crtc->pipe == 0) {
 166                 adpa |= ADPA_PIPE_A_SELECT;
 167                 if (!IS_IGDNG(dev))
 168                         I915_WRITE(BCLRPAT_A, 0);
 169         } else {
 170                 adpa |= ADPA_PIPE_B_SELECT;
 171                 if (!IS_IGDNG(dev))
 172                         I915_WRITE(BCLRPAT_B, 0);
 173         }
 174
 175         I915_WRITE(adpa_reg, adpa);
 176 }
 177
 178 static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
 179 {
 180         struct drm_device *dev = connector->dev;
 181         struct drm_i915_private *dev_priv = dev->dev_private;
 182         u32 adpa;
 183         bool ret;
 184
 185         adpa = I915_READ(PCH_ADPA);
 186
 187         adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 188
 189         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 190                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
 191                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
 192                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
 193                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
 194                         ADPA_CRT_HOTPLUG_ENABLE |
 195                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 196
 197         DRM_DEBUG("pch crt adpa 0x%x", adpa);
 198         I915_WRITE(PCH_ADPA, adpa);
 199
 200         while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
 201                 ;
 202
 203         /* Check the status to see if both blue and green are on now */
 204         adpa = I915_READ(PCH_ADPA);
 205         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
 206         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
 207                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
 208                 ret = true;
 209         else
 210                 ret = false;
 211
 212         return ret;
 213 }
 214
 215 /**
 216  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 217  *
 218  * Not for i915G/i915GM
 219  *
 220  * \return true if CRT is connected.
 221  * \return false if CRT is disconnected.
 222  */
 223 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 224 {
 225         struct drm_device *dev = connector->dev;
 226         struct drm_i915_private *dev_priv = dev->dev_private;
 227         u32 hotplug_en;
 228         int i, tries = 0;
 229
 230         if (IS_IGDNG(dev))
 231                 return intel_igdng_crt_detect_hotplug(connector);
 232
 233         /*
 234          * On 4 series desktop, CRT detect sequence need to be done twice
 235          * to get a reliable result.
 236          */
 237
 238         if (IS_G4X(dev) && !IS_GM45(dev))
 239                 tries = 2;
 240         else
 241                 tries = 1;
 242         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 243         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
 244         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 245
 246         if (IS_G4X(dev))
 247                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
 248
 249         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
 250
 251         for (i = 0; i < tries ; i++) {
 252                 unsigned long timeout;
 253                 /* turn on the FORCE_DETECT */
 254                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 255                 timeout = jiffies + msecs_to_jiffies(1000);
 256                 /* wait for FORCE_DETECT to go off */
 257                 do {
 258                         if (!(I915_READ(PORT_HOTPLUG_EN) &
 259                                         CRT_HOTPLUG_FORCE_DETECT))
 260                                 break;
 261                         msleep(1);
 262                 } while (time_after(timeout, jiffies));
 263         }
 264
 265         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
 266             CRT_HOTPLUG_MONITOR_COLOR)
 267                 return true;
 268
 269         return false;
 270 }
 271
 272 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 273 {
 274         struct intel_output *intel_output = to_intel_output(connector);
 275
 276         /* CRT should always be at 0, but check anyway */
 277         if (intel_output->type != INTEL_OUTPUT_ANALOG)
 278                 return false;
 279
 280         return intel_ddc_probe(intel_output);
 281 }
 282
 283 static enum drm_connector_status
 284 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
 285 {
 286         struct drm_encoder *encoder = &intel_output->enc;
 287         struct drm_device *dev = encoder->dev;
 288         struct drm_i915_private *dev_priv = dev->dev_private;
 289         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 290         uint32_t pipe = intel_crtc->pipe;
 291         uint32_t save_bclrpat;
 292         uint32_t save_vtotal;
 293         uint32_t vtotal, vactive;
 294         uint32_t vsample;
 295         uint32_t vblank, vblank_start, vblank_end;
 296         uint32_t dsl;
 297         uint32_t bclrpat_reg;
 298         uint32_t vtotal_reg;
 299         uint32_t vblank_reg;
 300         uint32_t vsync_reg;
 301         uint32_t pipeconf_reg;
 302         uint32_t pipe_dsl_reg;
 303         uint8_t st00;
 304         enum drm_connector_status status;
 305
 306         if (pipe == 0) {
 307                 bclrpat_reg = BCLRPAT_A;
 308                 vtotal_reg = VTOTAL_A;
 309                 vblank_reg = VBLANK_A;
 310                 vsync_reg = VSYNC_A;
 311                 pipeconf_reg = PIPEACONF;
 312                 pipe_dsl_reg = PIPEADSL;
 313         } else {
 314                 bclrpat_reg = BCLRPAT_B;
 315                 vtotal_reg = VTOTAL_B;
 316                 vblank_reg = VBLANK_B;
 317                 vsync_reg = VSYNC_B;
 318                 pipeconf_reg = PIPEBCONF;
 319                 pipe_dsl_reg = PIPEBDSL;
 320         }
 321
 322         save_bclrpat = I915_READ(bclrpat_reg);
 323         save_vtotal = I915_READ(vtotal_reg);
 324         vblank = I915_READ(vblank_reg);
 325
 326         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 327         vactive = (save_vtotal & 0x7ff) + 1;
 328
 329         vblank_start = (vblank & 0xfff) + 1;
 330         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 331
 332         /* Set the border color to purple. */
 333         I915_WRITE(bclrpat_reg, 0x500050);
 334
 335         if (IS_I9XX(dev)) {
 336                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 337                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 338                 /* Wait for next Vblank to substitue
 339                  * border color for Color info */
 340                 intel_wait_for_vblank(dev);
 341                 st00 = I915_READ8(VGA_MSR_WRITE);
 342                 status = ((st00 & (1 << 4)) != 0) ?
 343                         connector_status_connected :
 344                         connector_status_disconnected;
 345
 346                 I915_WRITE(pipeconf_reg, pipeconf);
 347         } else {
 348                 bool restore_vblank = false;
 349                 int count, detect;
 350
 351                 /*
 352                 * If there isn't any border, add some.
 353                 * Yes, this will flicker
 354                 */
 355                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 356                         uint32_t vsync = I915_READ(vsync_reg);
 357                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 358
 359                         vblank_start = vsync_start;
 360                         I915_WRITE(vblank_reg,
 361                                    (vblank_start - 1) |
 362                                    ((vblank_end - 1) << 16));
 363                         restore_vblank = true;
 364                 }
 365                 /* sample in the vertical border, selecting the larger one */
 366                 if (vblank_start - vactive >= vtotal - vblank_end)
 367                         vsample = (vblank_start + vactive) >> 1;
 368                 else
 369                         vsample = (vtotal + vblank_end) >> 1;
 370
 371                 /*
 372                  * Wait for the border to be displayed
 373                  */
 374                 while (I915_READ(pipe_dsl_reg) >= vactive)
 375                         ;
 376                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 377                         ;
 378                 /*
 379                  * Watch ST00 for an entire scanline
 380                  */
 381                 detect = 0;
 382                 count = 0;
 383                 do {
 384                         count++;
 385                         /* Read the ST00 VGA status register */
 386                         st00 = I915_READ8(VGA_MSR_WRITE);
 387                         if (st00 & (1 << 4))
 388                                 detect++;
 389                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 390
 391                 /* restore vblank if necessary */
 392                 if (restore_vblank)
 393                         I915_WRITE(vblank_reg, vblank);
 394                 /*
 395                  * If more than 3/4 of the scanline detected a monitor,
 396                  * then it is assumed to be present. This works even on i830,
 397                  * where there isn't any way to force the border color across
 398                  * the screen
 399                  */
 400                 status = detect * 4 > count * 3 ?
 401                          connector_status_connected :
 402                          connector_status_disconnected;
 403         }
 404
 405         /* Restore previous settings */
 406         I915_WRITE(bclrpat_reg, save_bclrpat);
 407
 408         return status;
 409 }
 410
 411 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
 412 {
 413         struct drm_device *dev = connector->dev;
 414         struct intel_output *intel_output = to_intel_output(connector);
 415         struct drm_encoder *encoder = &intel_output->enc;
 416         struct drm_crtc *crtc;
 417         int dpms_mode;
 418         enum drm_connector_status status;
 419
 420         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 421                 if (intel_crt_detect_hotplug(connector))
 422                         return connector_status_connected;
 423                 else
 424                         return connector_status_disconnected;
 425         }
 426
 427         if (intel_crt_detect_ddc(connector))
 428                 return connector_status_connected;
 429
 430         /* for pre-945g platforms use load detect */
 431         if (encoder->crtc && encoder->crtc->enabled) {
 432                 status = intel_crt_load_detect(encoder->crtc, intel_output);
 433         } else {
 434                 crtc = intel_get_load_detect_pipe(intel_output,
 435                                                   NULL, &dpms_mode);
 436                 if (crtc) {
 437                         status = intel_crt_load_detect(crtc, intel_output);
 438                         intel_release_load_detect_pipe(intel_output, dpms_mode);
 439                 } else
 440                         status = connector_status_unknown;
 441         }
 442
 443         return status;
 444 }
 445
 446 static void intel_crt_destroy(struct drm_connector *connector)
 447 {
 448         struct intel_output *intel_output = to_intel_output(connector);
 449
 450         intel_i2c_destroy(intel_output->ddc_bus);
 451         drm_sysfs_connector_remove(connector);
 452         drm_connector_cleanup(connector);
 453         kfree(connector);
 454 }
 455
 456 static int intel_crt_get_modes(struct drm_connector *connector)
 457 {
 458         int ret;
 459         struct intel_output *intel_output = to_intel_output(connector);
 460         struct i2c_adapter *ddcbus;
 461         struct drm_device *dev = connector->dev;
 462
 463
 464         ret = intel_ddc_get_modes(intel_output);
 465         if (ret || !IS_G4X(dev))
 466                 goto end;
 467
 468         ddcbus = intel_output->ddc_bus;
 469         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 470         intel_output->ddc_bus =
 471                 intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
 472
 473         if (!intel_output->ddc_bus) {
 474                 intel_output->ddc_bus = ddcbus;
 475                 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
 476                            "DDC bus registration failed for CRTDDC_D.\n");
 477                 goto end;
 478         }
 479         /* Try to get modes by GPIOD port */
 480         ret = intel_ddc_get_modes(intel_output);
 481         intel_i2c_destroy(ddcbus);
 482
 483 end:
 484         return ret;
 485
 486 }
 487
 488 static int intel_crt_set_property(struct drm_connector *connector,
 489                                   struct drm_property *property,
 490                                   uint64_t value)
 491 {
 492         return 0;
 493 }
 494
 495 /*
 496  * Routines for controlling stuff on the analog port
 497  */
 498
 499 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 500         .dpms = intel_crt_dpms,
 501         .mode_fixup = intel_crt_mode_fixup,
 502         .prepare = intel_encoder_prepare,
 503         .commit = intel_encoder_commit,
 504         .mode_set = intel_crt_mode_set,
 505 };
 506
 507 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 508         .dpms = drm_helper_connector_dpms,
 509         .detect = intel_crt_detect,
 510         .fill_modes = drm_helper_probe_single_connector_modes,
 511         .destroy = intel_crt_destroy,
 512         .set_property = intel_crt_set_property,
 513 };
 514
 515 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 516         .mode_valid = intel_crt_mode_valid,
 517         .get_modes = intel_crt_get_modes,
 518         .best_encoder = intel_best_encoder,
 519 };
 520
 521 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
 522 {
 523         drm_encoder_cleanup(encoder);
 524 }
 525
 526 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 527         .destroy = intel_crt_enc_destroy,
 528 };
 529
 530 void intel_crt_init(struct drm_device *dev)
 531 {
 532         struct drm_connector *connector;
 533         struct intel_output *intel_output;
 534         struct drm_i915_private *dev_priv = dev->dev_private;
 535         u32 i2c_reg;
 536
 537         intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
 538         if (!intel_output)
 539                 return;
 540
 541         connector = &intel_output->base;
 542         drm_connector_init(dev, &intel_output->base,
 543                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 544
 545         drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
 546                          DRM_MODE_ENCODER_DAC);
 547
 548         drm_mode_connector_attach_encoder(&intel_output->base,
 549                                           &intel_output->enc);
 550
 551         /* Set up the DDC bus. */
 552         if (IS_IGDNG(dev))
 553                 i2c_reg = PCH_GPIOA;
 554         else {
 555                 i2c_reg = GPIOA;
 556                 /* Use VBT information for CRT DDC if available */
 557                 if (dev_priv->crt_ddc_bus != -1)
 558                         i2c_reg = dev_priv->crt_ddc_bus;
 559         }
 560         intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
 561         if (!intel_output->ddc_bus) {
 562                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 563                            "failed.\n");
 564                 return;
 565         }
 566
 567         intel_output->type = INTEL_OUTPUT_ANALOG;
 568         intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 569                                    (1 << INTEL_ANALOG_CLONE_BIT) |
 570                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 571         intel_output->crtc_mask = (1 << 0) | (1 << 1);
 572         connector->interlace_allowed = 0;
 573         connector->doublescan_allowed = 0;
 574
 575         drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
 576         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 577
 578         drm_sysfs_connector_add(connector);
 579 }