drivers/gpu/drm/i915/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include <linux/device.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 #include <linux/console.h>
  37 #include "drm_crtc_helper.h"
  38
  39 static int i915_modeset = -1;
  40 module_param_named(modeset, i915_modeset, int, 0400);
  41
  42 unsigned int i915_fbpercrtc = 0;
  43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  44
  45 unsigned int i915_powersave = 1;
  46 module_param_named(powersave, i915_powersave, int, 0400);
  47
  48 unsigned int i915_lvds_downclock = 0;
  49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  50
  51 static struct drm_driver driver;
  52 extern int intel_agp_enabled;
  53
  54 #define INTEL_VGA_DEVICE(id, info) {            \
  55         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
  56         .class_mask = 0xffff00,                 \
  57         .vendor = 0x8086,                       \
  58         .device = id,                           \
  59         .subvendor = PCI_ANY_ID,                \
  60         .subdevice = PCI_ANY_ID,                \
  61         .driver_data = (unsigned long) info }
  62
  63 static const struct intel_device_info intel_i830_info = {
  64         .gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  65 };
  66
  67 static const struct intel_device_info intel_845g_info = {
  68         .gen = 2, .is_i8xx = 1,
  69 };
  70
  71 static const struct intel_device_info intel_i85x_info = {
  72         .gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
  73         .cursor_needs_physical = 1,
  74 };
  75
  76 static const struct intel_device_info intel_i865g_info = {
  77         .gen = 2, .is_i8xx = 1,
  78 };
  79
  80 static const struct intel_device_info intel_i915g_info = {
  81         .gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  82 };
  83 static const struct intel_device_info intel_i915gm_info = {
  84         .gen = 3, .is_i9xx = 1,  .is_mobile = 1,
  85         .cursor_needs_physical = 1,
  86 };
  87 static const struct intel_device_info intel_i945g_info = {
  88         .gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  89 };
  90 static const struct intel_device_info intel_i945gm_info = {
  91         .gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
  92         .has_hotplug = 1, .cursor_needs_physical = 1,
  93 };
  94
  95 static const struct intel_device_info intel_i965g_info = {
  96         .gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1,
  97         .has_hotplug = 1,
  98 };
  99
 100 static const struct intel_device_info intel_i965gm_info = {
 101         .gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
 102         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 103 };
 104
 105 static const struct intel_device_info intel_g33_info = {
 106         .gen = 3, .is_g33 = 1, .is_i9xx = 1,
 107         .need_gfx_hws = 1, .has_hotplug = 1,
 108 };
 109
 110 static const struct intel_device_info intel_g45_info = {
 111         .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 112         .has_pipe_cxsr = 1, .has_hotplug = 1,
 113 };
 114
 115 static const struct intel_device_info intel_gm45_info = {
 116         .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1,
 117         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
 118         .has_pipe_cxsr = 1, .has_hotplug = 1,
 119 };
 120
 121 static const struct intel_device_info intel_pineview_info = {
 122         .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
 123         .need_gfx_hws = 1, .has_hotplug = 1,
 124 };
 125
 126 static const struct intel_device_info intel_ironlake_d_info = {
 127         .gen = 5, .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1,
 128         .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
 129 };
 130
 131 static const struct intel_device_info intel_ironlake_m_info = {
 132         .gen = 5, .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
 133         .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 134 };
 135
 136 static const struct intel_device_info intel_sandybridge_d_info = {
 137         .gen = 6, .is_i965g = 1, .is_i9xx = 1,
 138         .need_gfx_hws = 1, .has_hotplug = 1,
 139 };
 140
 141 static const struct intel_device_info intel_sandybridge_m_info = {
 142         .gen = 6, .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1,
 143         .need_gfx_hws = 1, .has_hotplug = 1,
 144 };
 145
 146 static const struct pci_device_id pciidlist[] = {               /* aka */
 147         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),             /* I830_M */
 148         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),             /* 845_G */
 149         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),             /* I855_GM */
 150         INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
 151         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),            /* I865_G */
 152         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),            /* I915_G */
 153         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),            /* E7221_G */
 154         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),           /* I915_GM */
 155         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),            /* I945_G */
 156         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),           /* I945_GM */
 157         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),           /* I945_GME */
 158         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),            /* I946_GZ */
 159         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),            /* G35_G */
 160         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),            /* I965_Q */
 161         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),            /* I965_G */
 162         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),              /* Q35_G */
 163         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),              /* G33_G */
 164         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),              /* Q33_G */
 165         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),           /* I965_GM */
 166         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),           /* I965_GME */
 167         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),             /* GM45_G */
 168         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),              /* IGD_E_G */
 169         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),              /* Q45_G */
 170         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),              /* G45_G */
 171         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),              /* G41_G */
 172         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),              /* B43_G */
 173         INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),              /* B43_G.1 */
 174         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
 175         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
 176         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
 177         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
 178         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
 179         INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
 180         INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
 181         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
 182         INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
 183         INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
 184         INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
 185         {0, 0, 0}
 186 };
 187
 188 #if defined(CONFIG_DRM_I915_KMS)
 189 MODULE_DEVICE_TABLE(pci, pciidlist);
 190 #endif
 191
 192 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
 193 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 194
 195 void intel_detect_pch (struct drm_device *dev)
 196 {
 197         struct drm_i915_private *dev_priv = dev->dev_private;
 198         struct pci_dev *pch;
 199
 200         /*
 201          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 202          * make graphics device passthrough work easy for VMM, that only
 203          * need to expose ISA bridge to let driver know the real hardware
 204          * underneath. This is a requirement from virtualization team.
 205          */
 206         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
 207         if (pch) {
 208                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
 209                         int id;
 210                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 211
 212                         if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 213                                 dev_priv->pch_type = PCH_CPT;
 214                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 215                         }
 216                 }
 217                 pci_dev_put(pch);
 218         }
 219 }
 220
 221 static int i915_drm_freeze(struct drm_device *dev)
 222 {
 223         struct drm_i915_private *dev_priv = dev->dev_private;
 224
 225         pci_save_state(dev->pdev);
 226
 227         /* If KMS is active, we do the leavevt stuff here */
 228         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 229                 int error = i915_gem_idle(dev);
 230                 if (error) {
 231                         dev_err(&dev->pdev->dev,
 232                                 "GEM idle failed, resume might fail\n");
 233                         return error;
 234                 }
 235                 drm_irq_uninstall(dev);
 236         }
 237
 238         i915_save_state(dev);
 239
 240         intel_opregion_free(dev, 1);
 241
 242         /* Modeset on resume, not lid events */
 243         dev_priv->modeset_on_lid = 0;
 244
 245         return 0;
 246 }
 247
 248 int i915_suspend(struct drm_device *dev, pm_message_t state)
 249 {
 250         int error;
 251
 252         if (!dev || !dev->dev_private) {
 253                 DRM_ERROR("dev: %p\n", dev);
 254                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
 255                 return -ENODEV;
 256         }
 257
 258         if (state.event == PM_EVENT_PRETHAW)
 259                 return 0;
 260
 261         error = i915_drm_freeze(dev);
 262         if (error)
 263                 return error;
 264
 265         if (state.event == PM_EVENT_SUSPEND) {
 266                 /* Shut down the device */
 267                 pci_disable_device(dev->pdev);
 268                 pci_set_power_state(dev->pdev, PCI_D3hot);
 269         }
 270
 271         return 0;
 272 }
 273
 274 static int i915_drm_thaw(struct drm_device *dev)
 275 {
 276         struct drm_i915_private *dev_priv = dev->dev_private;
 277         int error = 0;
 278
 279         i915_restore_state(dev);
 280
 281         intel_opregion_init(dev, 1);
 282
 283         /* KMS EnterVT equivalent */
 284         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 285                 mutex_lock(&dev->struct_mutex);
 286                 dev_priv->mm.suspended = 0;
 287
 288                 error = i915_gem_init_ringbuffer(dev);
 289                 mutex_unlock(&dev->struct_mutex);
 290
 291                 drm_irq_install(dev);
 292
 293                 /* Resume the modeset for every activated CRTC */
 294                 drm_helper_resume_force_mode(dev);
 295         }
 296
 297         dev_priv->modeset_on_lid = 0;
 298
 299         return error;
 300 }
 301
 302 int i915_resume(struct drm_device *dev)
 303 {
 304         if (pci_enable_device(dev->pdev))
 305                 return -EIO;
 306
 307         pci_set_master(dev->pdev);
 308
 309         return i915_drm_thaw(dev);
 310 }
 311
 312 /**
 313  * i965_reset - reset chip after a hang
 314  * @dev: drm device to reset
 315  * @flags: reset domains
 316  *
 317  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 318  * reset or otherwise an error code.
 319  *
 320  * Procedure is fairly simple:
 321  *   - reset the chip using the reset reg
 322  *   - re-init context state
 323  *   - re-init hardware status page
 324  *   - re-init ring buffer
 325  *   - re-init interrupt state
 326  *   - re-init display
 327  */
 328 int i965_reset(struct drm_device *dev, u8 flags)
 329 {
 330         drm_i915_private_t *dev_priv = dev->dev_private;
 331         unsigned long timeout;
 332         u8 gdrst;
 333         /*
 334          * We really should only reset the display subsystem if we actually
 335          * need to
 336          */
 337         bool need_display = true;
 338
 339         mutex_lock(&dev->struct_mutex);
 340
 341         /*
 342          * Clear request list
 343          */
 344         i915_gem_retire_requests(dev);
 345
 346         if (need_display)
 347                 i915_save_display(dev);
 348
 349         if (IS_I965G(dev) || IS_G4X(dev)) {
 350                 /*
 351                  * Set the domains we want to reset, then the reset bit (bit 0).
 352                  * Clear the reset bit after a while and wait for hardware status
 353                  * bit (bit 1) to be set
 354                  */
 355                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 356                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
 357                 udelay(50);
 358                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
 359
 360                 /* ...we don't want to loop forever though, 500ms should be plenty */
 361                timeout = jiffies + msecs_to_jiffies(500);
 362                 do {
 363                         udelay(100);
 364                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 365                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
 366
 367                 if (gdrst & 0x1) {
 368                         WARN(true, "i915: Failed to reset chip\n");
 369                         mutex_unlock(&dev->struct_mutex);
 370                         return -EIO;
 371                 }
 372         } else {
 373                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
 374                 mutex_unlock(&dev->struct_mutex);
 375                 return -ENODEV;
 376         }
 377
 378         /* Ok, now get things going again... */
 379
 380         /*
 381          * Everything depends on having the GTT running, so we need to start
 382          * there.  Fortunately we don't need to do this unless we reset the
 383          * chip at a PCI level.
 384          *
 385          * Next we need to restore the context, but we don't use those
 386          * yet either...
 387          *
 388          * Ring buffer needs to be re-initialized in the KMS case, or if X
 389          * was running at the time of the reset (i.e. we weren't VT
 390          * switched away).
 391          */
 392         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
 393                         !dev_priv->mm.suspended) {
 394                 struct intel_ring_buffer *ring = &dev_priv->render_ring;
 395                 dev_priv->mm.suspended = 0;
 396                 ring->init(dev, ring);
 397                 mutex_unlock(&dev->struct_mutex);
 398                 drm_irq_uninstall(dev);
 399                 drm_irq_install(dev);
 400                 mutex_lock(&dev->struct_mutex);
 401         }
 402
 403         /*
 404          * Display needs restore too...
 405          */
 406         if (need_display)
 407                 i915_restore_display(dev);
 408
 409         mutex_unlock(&dev->struct_mutex);
 410         return 0;
 411 }
 412
 413
 414 static int __devinit
 415 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 416 {
 417         return drm_get_pci_dev(pdev, ent, &driver);
 418 }
 419
 420 static void
 421 i915_pci_remove(struct pci_dev *pdev)
 422 {
 423         struct drm_device *dev = pci_get_drvdata(pdev);
 424
 425         drm_put_dev(dev);
 426 }
 427
 428 static int i915_pm_suspend(struct device *dev)
 429 {
 430         struct pci_dev *pdev = to_pci_dev(dev);
 431         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 432         int error;
 433
 434         if (!drm_dev || !drm_dev->dev_private) {
 435                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 436                 return -ENODEV;
 437         }
 438
 439         error = i915_drm_freeze(drm_dev);
 440         if (error)
 441                 return error;
 442
 443         pci_disable_device(pdev);
 444         pci_set_power_state(pdev, PCI_D3hot);
 445
 446         return 0;
 447 }
 448
 449 static int i915_pm_resume(struct device *dev)
 450 {
 451         struct pci_dev *pdev = to_pci_dev(dev);
 452         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 453
 454         return i915_resume(drm_dev);
 455 }
 456
 457 static int i915_pm_freeze(struct device *dev)
 458 {
 459         struct pci_dev *pdev = to_pci_dev(dev);
 460         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 461
 462         if (!drm_dev || !drm_dev->dev_private) {
 463                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 464                 return -ENODEV;
 465         }
 466
 467         return i915_drm_freeze(drm_dev);
 468 }
 469
 470 static int i915_pm_thaw(struct device *dev)
 471 {
 472         struct pci_dev *pdev = to_pci_dev(dev);
 473         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 474
 475         return i915_drm_thaw(drm_dev);
 476 }
 477
 478 static int i915_pm_poweroff(struct device *dev)
 479 {
 480         struct pci_dev *pdev = to_pci_dev(dev);
 481         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 482
 483         return i915_drm_freeze(drm_dev);
 484 }
 485
 486 static const struct dev_pm_ops i915_pm_ops = {
 487      .suspend = i915_pm_suspend,
 488      .resume = i915_pm_resume,
 489      .freeze = i915_pm_freeze,
 490      .thaw = i915_pm_thaw,
 491      .poweroff = i915_pm_poweroff,
 492      .restore = i915_pm_resume,
 493 };
 494
 495 static struct vm_operations_struct i915_gem_vm_ops = {
 496         .fault = i915_gem_fault,
 497         .open = drm_gem_vm_open,
 498         .close = drm_gem_vm_close,
 499 };
 500
 501 static struct drm_driver driver = {
 502         /* don't use mtrr's here, the Xserver or user space app should
 503          * deal with them for intel hardware.
 504          */
 505         .driver_features =
 506             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
 507             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 508         .load = i915_driver_load,
 509         .unload = i915_driver_unload,
 510         .open = i915_driver_open,
 511         .lastclose = i915_driver_lastclose,
 512         .preclose = i915_driver_preclose,
 513         .postclose = i915_driver_postclose,
 514
 515         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 516         .suspend = i915_suspend,
 517         .resume = i915_resume,
 518
 519         .device_is_agp = i915_driver_device_is_agp,
 520         .enable_vblank = i915_enable_vblank,
 521         .disable_vblank = i915_disable_vblank,
 522         .irq_preinstall = i915_driver_irq_preinstall,
 523         .irq_postinstall = i915_driver_irq_postinstall,
 524         .irq_uninstall = i915_driver_irq_uninstall,
 525         .irq_handler = i915_driver_irq_handler,
 526         .reclaim_buffers = drm_core_reclaim_buffers,
 527         .get_map_ofs = drm_core_get_map_ofs,
 528         .get_reg_ofs = drm_core_get_reg_ofs,
 529         .master_create = i915_master_create,
 530         .master_destroy = i915_master_destroy,
 531 #if defined(CONFIG_DEBUG_FS)
 532         .debugfs_init = i915_debugfs_init,
 533         .debugfs_cleanup = i915_debugfs_cleanup,
 534 #endif
 535         .gem_init_object = i915_gem_init_object,
 536         .gem_free_object = i915_gem_free_object,
 537         .gem_vm_ops = &i915_gem_vm_ops,
 538         .ioctls = i915_ioctls,
 539         .fops = {
 540                  .owner = THIS_MODULE,
 541                  .open = drm_open,
 542                  .release = drm_release,
 543                  .unlocked_ioctl = drm_ioctl,
 544                  .mmap = drm_gem_mmap,
 545                  .poll = drm_poll,
 546                  .fasync = drm_fasync,
 547                  .read = drm_read,
 548 #ifdef CONFIG_COMPAT
 549                  .compat_ioctl = i915_compat_ioctl,
 550 #endif
 551         },
 552
 553         .pci_driver = {
 554                  .name = DRIVER_NAME,
 555                  .id_table = pciidlist,
 556                  .probe = i915_pci_probe,
 557                  .remove = i915_pci_remove,
 558                  .driver.pm = &i915_pm_ops,
 559         },
 560
 561         .name = DRIVER_NAME,
 562         .desc = DRIVER_DESC,
 563         .date = DRIVER_DATE,
 564         .major = DRIVER_MAJOR,
 565         .minor = DRIVER_MINOR,
 566         .patchlevel = DRIVER_PATCHLEVEL,
 567 };
 568
 569 static int __init i915_init(void)
 570 {
 571         if (!intel_agp_enabled) {
 572                 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 573                 return -ENODEV;
 574         }
 575
 576         driver.num_ioctls = i915_max_ioctl;
 577
 578         i915_gem_shrinker_init();
 579
 580         /*
 581          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
 582          * explicitly disabled with the module pararmeter.
 583          *
 584          * Otherwise, just follow the parameter (defaulting to off).
 585          *
 586          * Allow optional vga_text_mode_force boot option to override
 587          * the default behavior.
 588          */
 589 #if defined(CONFIG_DRM_I915_KMS)
 590         if (i915_modeset != 0)
 591                 driver.driver_features |= DRIVER_MODESET;
 592 #endif
 593         if (i915_modeset == 1)
 594                 driver.driver_features |= DRIVER_MODESET;
 595
 596 #ifdef CONFIG_VGA_CONSOLE
 597         if (vgacon_text_force() && i915_modeset == -1)
 598                 driver.driver_features &= ~DRIVER_MODESET;
 599 #endif
 600
 601         if (!(driver.driver_features & DRIVER_MODESET)) {
 602                 driver.suspend = i915_suspend;
 603                 driver.resume = i915_resume;
 604         }
 605
 606         return drm_init(&driver);
 607 }
 608
 609 static void __exit i915_exit(void)
 610 {
 611         i915_gem_shrinker_exit();
 612         drm_exit(&driver);
 613 }
 614
 615 module_init(i915_init);
 616 module_exit(i915_exit);
 617
 618 MODULE_AUTHOR(DRIVER_AUTHOR);
 619 MODULE_DESCRIPTION(DRIVER_DESC);
 620 MODULE_LICENSE("GPL and additional rights");