drivers/cpufreq/powernow-k8.c

   1 /*
   2  *   (c) 2003-2010 Advanced Micro Devices, Inc.
   3  *  Your use of this code is subject to the terms and conditions of the
   4  *  GNU general public license version 2. See "COPYING" or
   5  *  http://www.gnu.org/licenses/gpl.html
   6  *
   7  *  Support : mark.langsdorf@amd.com
   8  *
   9  *  Based on the powernow-k7.c module written by Dave Jones.
  10  *  (C) 2003 Dave Jones on behalf of SuSE Labs
  11  *  (C) 2004 Dominik Brodowski <linux@brodo.de>
  12  *  (C) 2004 Pavel Machek <pavel@ucw.cz>
  13  *  Licensed under the terms of the GNU GPL License version 2.
  14  *  Based upon datasheets & sample CPUs kindly provided by AMD.
  15  *
  16  *  Valuable input gratefully received from Dave Jones, Pavel Machek,
  17  *  Dominik Brodowski, Jacob Shin, and others.
  18  *  Originally developed by Paul Devriendt.
  19  *  Processor information obtained from Chapter 9 (Power and Thermal Management)
  20  *  of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21  *  Opteron Processors" available for download from www.amd.com
  22  *
  23  *  Tables for specific CPUs can be inferred from
  24  *     http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25  */
  26
  27 #include <linux/kernel.h>
  28 #include <linux/smp.h>
  29 #include <linux/module.h>
  30 #include <linux/init.h>
  31 #include <linux/cpufreq.h>
  32 #include <linux/slab.h>
  33 #include <linux/string.h>
  34 #include <linux/cpumask.h>
  35 #include <linux/io.h>
  36 #include <linux/delay.h>
  37
  38 #include <asm/msr.h>
  39
  40 #include <linux/acpi.h>
  41 #include <linux/mutex.h>
  42 #include <acpi/processor.h>
  43
  44 #define PFX "powernow-k8: "
  45 #define VERSION "version 2.20.00"
  46 #include "powernow-k8.h"
  47 #include "mperf.h"
  48
  49 /* serialize freq changes  */
  50 static DEFINE_MUTEX(fidvid_mutex);
  51
  52 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
  53
  54 static int cpu_family = CPU_OPTERON;
  55
  56 /* array to map SW pstate number to acpi state */
  57 static u32 ps_to_as[8];
  58
  59 /* core performance boost */
  60 static bool cpb_capable, cpb_enabled;
  61 static struct msr __percpu *msrs;
  62
  63 static struct cpufreq_driver cpufreq_amd64_driver;
  64
  65 #ifndef CONFIG_SMP
  66 static inline const struct cpumask *cpu_core_mask(int cpu)
  67 {
  68         return cpumask_of(0);
  69 }
  70 #endif
  71
  72 /* Return a frequency in MHz, given an input fid */
  73 static u32 find_freq_from_fid(u32 fid)
  74 {
  75         return 800 + (fid * 100);
  76 }
  77
  78 /* Return a frequency in KHz, given an input fid */
  79 static u32 find_khz_freq_from_fid(u32 fid)
  80 {
  81         return 1000 * find_freq_from_fid(fid);
  82 }
  83
  84 static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
  85                                      u32 pstate)
  86 {
  87         return data[ps_to_as[pstate]].frequency;
  88 }
  89
  90 /* Return the vco fid for an input fid
  91  *
  92  * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  93  * only from corresponding high fids. This returns "high" fid corresponding to
  94  * "low" one.
  95  */
  96 static u32 convert_fid_to_vco_fid(u32 fid)
  97 {
  98         if (fid < HI_FID_TABLE_BOTTOM)
  99                 return 8 + (2 * fid);
 100         else
 101                 return fid;
 102 }
 103
 104 /*
 105  * Return 1 if the pending bit is set. Unless we just instructed the processor
 106  * to transition to a new state, seeing this bit set is really bad news.
 107  */
 108 static int pending_bit_stuck(void)
 109 {
 110         u32 lo, hi;
 111
 112         if (cpu_family == CPU_HW_PSTATE)
 113                 return 0;
 114
 115         rdmsr(MSR_FIDVID_STATUS, lo, hi);
 116         return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
 117 }
 118
 119 /*
 120  * Update the global current fid / vid values from the status msr.
 121  * Returns 1 on error.
 122  */
 123 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
 124 {
 125         u32 lo, hi;
 126         u32 i = 0;
 127
 128         if (cpu_family == CPU_HW_PSTATE) {
 129                 rdmsr(MSR_PSTATE_STATUS, lo, hi);
 130                 i = lo & HW_PSTATE_MASK;
 131                 data->currpstate = i;
 132
 133                 /*
 134                  * a workaround for family 11h erratum 311 might cause
 135                  * an "out-of-range Pstate if the core is in Pstate-0
 136                  */
 137                 if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
 138                         data->currpstate = HW_PSTATE_0;
 139
 140                 return 0;
 141         }
 142         do {
 143                 if (i++ > 10000) {
 144                         pr_debug("detected change pending stuck\n");
 145                         return 1;
 146                 }
 147                 rdmsr(MSR_FIDVID_STATUS, lo, hi);
 148         } while (lo & MSR_S_LO_CHANGE_PENDING);
 149
 150         data->currvid = hi & MSR_S_HI_CURRENT_VID;
 151         data->currfid = lo & MSR_S_LO_CURRENT_FID;
 152
 153         return 0;
 154 }
 155
 156 /* the isochronous relief time */
 157 static void count_off_irt(struct powernow_k8_data *data)
 158 {
 159         udelay((1 << data->irt) * 10);
 160         return;
 161 }
 162
 163 /* the voltage stabilization time */
 164 static void count_off_vst(struct powernow_k8_data *data)
 165 {
 166         udelay(data->vstable * VST_UNITS_20US);
 167         return;
 168 }
 169
 170 /* need to init the control msr to a safe value (for each cpu) */
 171 static void fidvid_msr_init(void)
 172 {
 173         u32 lo, hi;
 174         u8 fid, vid;
 175
 176         rdmsr(MSR_FIDVID_STATUS, lo, hi);
 177         vid = hi & MSR_S_HI_CURRENT_VID;
 178         fid = lo & MSR_S_LO_CURRENT_FID;
 179         lo = fid | (vid << MSR_C_LO_VID_SHIFT);
 180         hi = MSR_C_HI_STP_GNT_BENIGN;
 181         pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
 182         wrmsr(MSR_FIDVID_CTL, lo, hi);
 183 }
 184
 185 /* write the new fid value along with the other control fields to the msr */
 186 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
 187 {
 188         u32 lo;
 189         u32 savevid = data->currvid;
 190         u32 i = 0;
 191
 192         if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
 193                 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
 194                 return 1;
 195         }
 196
 197         lo = fid;
 198         lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
 199         lo |= MSR_C_LO_INIT_FID_VID;
 200
 201         pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
 202                 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
 203
 204         do {
 205                 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
 206                 if (i++ > 100) {
 207                         printk(KERN_ERR PFX
 208                                 "Hardware error - pending bit very stuck - "
 209                                 "no further pstate changes possible\n");
 210                         return 1;
 211                 }
 212         } while (query_current_values_with_pending_wait(data));
 213
 214         count_off_irt(data);
 215
 216         if (savevid != data->currvid) {
 217                 printk(KERN_ERR PFX
 218                         "vid change on fid trans, old 0x%x, new 0x%x\n",
 219                         savevid, data->currvid);
 220                 return 1;
 221         }
 222
 223         if (fid != data->currfid) {
 224                 printk(KERN_ERR PFX
 225                         "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
 226                         data->currfid);
 227                 return 1;
 228         }
 229
 230         return 0;
 231 }
 232
 233 /* Write a new vid to the hardware */
 234 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
 235 {
 236         u32 lo;
 237         u32 savefid = data->currfid;
 238         int i = 0;
 239
 240         if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
 241                 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
 242                 return 1;
 243         }
 244
 245         lo = data->currfid;
 246         lo |= (vid << MSR_C_LO_VID_SHIFT);
 247         lo |= MSR_C_LO_INIT_FID_VID;
 248
 249         pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
 250                 vid, lo, STOP_GRANT_5NS);
 251
 252         do {
 253                 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
 254                 if (i++ > 100) {
 255                         printk(KERN_ERR PFX "internal error - pending bit "
 256                                         "very stuck - no further pstate "
 257                                         "changes possible\n");
 258                         return 1;
 259                 }
 260         } while (query_current_values_with_pending_wait(data));
 261
 262         if (savefid != data->currfid) {
 263                 printk(KERN_ERR PFX "fid changed on vid trans, old "
 264                         "0x%x new 0x%x\n",
 265                        savefid, data->currfid);
 266                 return 1;
 267         }
 268
 269         if (vid != data->currvid) {
 270                 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
 271                                 "curr 0x%x\n",
 272                                 vid, data->currvid);
 273                 return 1;
 274         }
 275
 276         return 0;
 277 }
 278
 279 /*
 280  * Reduce the vid by the max of step or reqvid.
 281  * Decreasing vid codes represent increasing voltages:
 282  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
 283  */
 284 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
 285                 u32 reqvid, u32 step)
 286 {
 287         if ((data->currvid - reqvid) > step)
 288                 reqvid = data->currvid - step;
 289
 290         if (write_new_vid(data, reqvid))
 291                 return 1;
 292
 293         count_off_vst(data);
 294
 295         return 0;
 296 }
 297
 298 /* Change hardware pstate by single MSR write */
 299 static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
 300 {
 301         wrmsr(MSR_PSTATE_CTRL, pstate, 0);
 302         data->currpstate = pstate;
 303         return 0;
 304 }
 305
 306 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
 307 static int transition_fid_vid(struct powernow_k8_data *data,
 308                 u32 reqfid, u32 reqvid)
 309 {
 310         if (core_voltage_pre_transition(data, reqvid, reqfid))
 311                 return 1;
 312
 313         if (core_frequency_transition(data, reqfid))
 314                 return 1;
 315
 316         if (core_voltage_post_transition(data, reqvid))
 317                 return 1;
 318
 319         if (query_current_values_with_pending_wait(data))
 320                 return 1;
 321
 322         if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
 323                 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
 324                                 "curr 0x%x 0x%x\n",
 325                                 smp_processor_id(),
 326                                 reqfid, reqvid, data->currfid, data->currvid);
 327                 return 1;
 328         }
 329
 330         pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
 331                 smp_processor_id(), data->currfid, data->currvid);
 332
 333         return 0;
 334 }
 335
 336 /* Phase 1 - core voltage transition ... setup voltage */
 337 static int core_voltage_pre_transition(struct powernow_k8_data *data,
 338                 u32 reqvid, u32 reqfid)
 339 {
 340         u32 rvosteps = data->rvo;
 341         u32 savefid = data->currfid;
 342         u32 maxvid, lo, rvomult = 1;
 343
 344         pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
 345                 "reqvid 0x%x, rvo 0x%x\n",
 346                 smp_processor_id(),
 347                 data->currfid, data->currvid, reqvid, data->rvo);
 348
 349         if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
 350                 rvomult = 2;
 351         rvosteps *= rvomult;
 352         rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
 353         maxvid = 0x1f & (maxvid >> 16);
 354         pr_debug("ph1 maxvid=0x%x\n", maxvid);
 355         if (reqvid < maxvid) /* lower numbers are higher voltages */
 356                 reqvid = maxvid;
 357
 358         while (data->currvid > reqvid) {
 359                 pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
 360                         data->currvid, reqvid);
 361                 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
 362                         return 1;
 363         }
 364
 365         while ((rvosteps > 0) &&
 366                         ((rvomult * data->rvo + data->currvid) > reqvid)) {
 367                 if (data->currvid == maxvid) {
 368                         rvosteps = 0;
 369                 } else {
 370                         pr_debug("ph1: changing vid for rvo, req 0x%x\n",
 371                                 data->currvid - 1);
 372                         if (decrease_vid_code_by_step(data, data->currvid-1, 1))
 373                                 return 1;
 374                         rvosteps--;
 375                 }
 376         }
 377
 378         if (query_current_values_with_pending_wait(data))
 379                 return 1;
 380
 381         if (savefid != data->currfid) {
 382                 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
 383                                 data->currfid);
 384                 return 1;
 385         }
 386
 387         pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
 388                 data->currfid, data->currvid);
 389
 390         return 0;
 391 }
 392
 393 /* Phase 2 - core frequency transition */
 394 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 395 {
 396         u32 vcoreqfid, vcocurrfid, vcofiddiff;
 397         u32 fid_interval, savevid = data->currvid;
 398
 399         if (data->currfid == reqfid) {
 400                 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
 401                                 data->currfid);
 402                 return 0;
 403         }
 404
 405         pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
 406                 "reqfid 0x%x\n",
 407                 smp_processor_id(),
 408                 data->currfid, data->currvid, reqfid);
 409
 410         vcoreqfid = convert_fid_to_vco_fid(reqfid);
 411         vcocurrfid = convert_fid_to_vco_fid(data->currfid);
 412         vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
 413             : vcoreqfid - vcocurrfid;
 414
 415         if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
 416                 vcofiddiff = 0;
 417
 418         while (vcofiddiff > 2) {
 419                 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
 420
 421                 if (reqfid > data->currfid) {
 422                         if (data->currfid > LO_FID_TABLE_TOP) {
 423                                 if (write_new_fid(data,
 424                                                 data->currfid + fid_interval))
 425                                         return 1;
 426                         } else {
 427                                 if (write_new_fid
 428                                     (data,
 429                                      2 + convert_fid_to_vco_fid(data->currfid)))
 430                                         return 1;
 431                         }
 432                 } else {
 433                         if (write_new_fid(data, data->currfid - fid_interval))
 434                                 return 1;
 435                 }
 436
 437                 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
 438                 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
 439                     : vcoreqfid - vcocurrfid;
 440         }
 441
 442         if (write_new_fid(data, reqfid))
 443                 return 1;
 444
 445         if (query_current_values_with_pending_wait(data))
 446                 return 1;
 447
 448         if (data->currfid != reqfid) {
 449                 printk(KERN_ERR PFX
 450                         "ph2: mismatch, failed fid transition, "
 451                         "curr 0x%x, req 0x%x\n",
 452                         data->currfid, reqfid);
 453                 return 1;
 454         }
 455
 456         if (savevid != data->currvid) {
 457                 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
 458                         savevid, data->currvid);
 459                 return 1;
 460         }
 461
 462         pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
 463                 data->currfid, data->currvid);
 464
 465         return 0;
 466 }
 467
 468 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
 469 static int core_voltage_post_transition(struct powernow_k8_data *data,
 470                 u32 reqvid)
 471 {
 472         u32 savefid = data->currfid;
 473         u32 savereqvid = reqvid;
 474
 475         pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
 476                 smp_processor_id(),
 477                 data->currfid, data->currvid);
 478
 479         if (reqvid != data->currvid) {
 480                 if (write_new_vid(data, reqvid))
 481                         return 1;
 482
 483                 if (savefid != data->currfid) {
 484                         printk(KERN_ERR PFX
 485                                "ph3: bad fid change, save 0x%x, curr 0x%x\n",
 486                                savefid, data->currfid);
 487                         return 1;
 488                 }
 489
 490                 if (data->currvid != reqvid) {
 491                         printk(KERN_ERR PFX
 492                                "ph3: failed vid transition\n, "
 493                                "req 0x%x, curr 0x%x",
 494                                reqvid, data->currvid);
 495                         return 1;
 496                 }
 497         }
 498
 499         if (query_current_values_with_pending_wait(data))
 500                 return 1;
 501
 502         if (savereqvid != data->currvid) {
 503                 pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
 504                 return 1;
 505         }
 506
 507         if (savefid != data->currfid) {
 508                 pr_debug("ph3 failed, currfid changed 0x%x\n",
 509                         data->currfid);
 510                 return 1;
 511         }
 512
 513         pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
 514                 data->currfid, data->currvid);
 515
 516         return 0;
 517 }
 518
 519 static void check_supported_cpu(void *_rc)
 520 {
 521         u32 eax, ebx, ecx, edx;
 522         int *rc = _rc;
 523
 524         *rc = -ENODEV;
 525
 526         if (__this_cpu_read(cpu_info.x86_vendor) != X86_VENDOR_AMD)
 527                 return;
 528
 529         eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
 530         if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
 531             ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
 532                 return;
 533
 534         if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
 535                 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
 536                     ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
 537                         printk(KERN_INFO PFX
 538                                 "Processor cpuid %x not supported\n", eax);
 539                         return;
 540                 }
 541
 542                 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
 543                 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
 544                         printk(KERN_INFO PFX
 545                                "No frequency change capabilities detected\n");
 546                         return;
 547                 }
 548
 549                 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
 550                 if ((edx & P_STATE_TRANSITION_CAPABLE)
 551                         != P_STATE_TRANSITION_CAPABLE) {
 552                         printk(KERN_INFO PFX
 553                                 "Power state transitions not supported\n");
 554                         return;
 555                 }
 556         } else { /* must be a HW Pstate capable processor */
 557                 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
 558                 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
 559                         cpu_family = CPU_HW_PSTATE;
 560                 else
 561                         return;
 562         }
 563
 564         *rc = 0;
 565 }
 566
 567 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
 568                 u8 maxvid)
 569 {
 570         unsigned int j;
 571         u8 lastfid = 0xff;
 572
 573         for (j = 0; j < data->numps; j++) {
 574                 if (pst[j].vid > LEAST_VID) {
 575                         printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
 576                                j, pst[j].vid);
 577                         return -EINVAL;
 578                 }
 579                 if (pst[j].vid < data->rvo) {
 580                         /* vid + rvo >= 0 */
 581                         printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
 582                                " %d\n", j);
 583                         return -ENODEV;
 584                 }
 585                 if (pst[j].vid < maxvid + data->rvo) {
 586                         /* vid + rvo >= maxvid */
 587                         printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
 588                                " %d\n", j);
 589                         return -ENODEV;
 590                 }
 591                 if (pst[j].fid > MAX_FID) {
 592                         printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
 593                                " %d\n", j);
 594                         return -ENODEV;
 595                 }
 596                 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
 597                         /* Only first fid is allowed to be in "low" range */
 598                         printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
 599                                "0x%x\n", j, pst[j].fid);
 600                         return -EINVAL;
 601                 }
 602                 if (pst[j].fid < lastfid)
 603                         lastfid = pst[j].fid;
 604         }
 605         if (lastfid & 1) {
 606                 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
 607                 return -EINVAL;
 608         }
 609         if (lastfid > LO_FID_TABLE_TOP)
 610                 printk(KERN_INFO FW_BUG PFX
 611                         "first fid not from lo freq table\n");
 612
 613         return 0;
 614 }
 615
 616 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
 617                 unsigned int entry)
 618 {
 619         powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
 620 }
 621
 622 static void print_basics(struct powernow_k8_data *data)
 623 {
 624         int j;
 625         for (j = 0; j < data->numps; j++) {
 626                 if (data->powernow_table[j].frequency !=
 627                                 CPUFREQ_ENTRY_INVALID) {
 628                         if (cpu_family == CPU_HW_PSTATE) {
 629                                 printk(KERN_INFO PFX
 630                                         "   %d : pstate %d (%d MHz)\n", j,
 631                                         data->powernow_table[j].index,
 632                                         data->powernow_table[j].frequency/1000);
 633                         } else {
 634                                 printk(KERN_INFO PFX
 635                                         "fid 0x%x (%d MHz), vid 0x%x\n",
 636                                         data->powernow_table[j].index & 0xff,
 637                                         data->powernow_table[j].frequency/1000,
 638                                         data->powernow_table[j].index >> 8);
 639                         }
 640                 }
 641         }
 642         if (data->batps)
 643                 printk(KERN_INFO PFX "Only %d pstates on battery\n",
 644                                 data->batps);
 645 }
 646
 647 static u32 freq_from_fid_did(u32 fid, u32 did)
 648 {
 649         u32 mhz = 0;
 650
 651         if (boot_cpu_data.x86 == 0x10)
 652                 mhz = (100 * (fid + 0x10)) >> did;
 653         else if (boot_cpu_data.x86 == 0x11)
 654                 mhz = (100 * (fid + 8)) >> did;
 655         else
 656                 BUG();
 657
 658         return mhz * 1000;
 659 }
 660
 661 static int fill_powernow_table(struct powernow_k8_data *data,
 662                 struct pst_s *pst, u8 maxvid)
 663 {
 664         struct cpufreq_frequency_table *powernow_table;
 665         unsigned int j;
 666
 667         if (data->batps) {
 668                 /* use ACPI support to get full speed on mains power */
 669                 printk(KERN_WARNING PFX
 670                         "Only %d pstates usable (use ACPI driver for full "
 671                         "range\n", data->batps);
 672                 data->numps = data->batps;
 673         }
 674
 675         for (j = 1; j < data->numps; j++) {
 676                 if (pst[j-1].fid >= pst[j].fid) {
 677                         printk(KERN_ERR PFX "PST out of sequence\n");
 678                         return -EINVAL;
 679                 }
 680         }
 681
 682         if (data->numps < 2) {
 683                 printk(KERN_ERR PFX "no p states to transition\n");
 684                 return -ENODEV;
 685         }
 686
 687         if (check_pst_table(data, pst, maxvid))
 688                 return -EINVAL;
 689
 690         powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
 691                 * (data->numps + 1)), GFP_KERNEL);
 692         if (!powernow_table) {
 693                 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
 694                 return -ENOMEM;
 695         }
 696
 697         for (j = 0; j < data->numps; j++) {
 698                 int freq;
 699                 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
 700                 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
 701                 freq = find_khz_freq_from_fid(pst[j].fid);
 702                 powernow_table[j].frequency = freq;
 703         }
 704         powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
 705         powernow_table[data->numps].index = 0;
 706
 707         if (query_current_values_with_pending_wait(data)) {
 708                 kfree(powernow_table);
 709                 return -EIO;
 710         }
 711
 712         pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
 713         data->powernow_table = powernow_table;
 714         if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
 715                 print_basics(data);
 716
 717         for (j = 0; j < data->numps; j++)
 718                 if ((pst[j].fid == data->currfid) &&
 719                     (pst[j].vid == data->currvid))
 720                         return 0;
 721
 722         pr_debug("currfid/vid do not match PST, ignoring\n");
 723         return 0;
 724 }
 725
 726 /* Find and validate the PSB/PST table in BIOS. */
 727 static int find_psb_table(struct powernow_k8_data *data)
 728 {
 729         struct psb_s *psb;
 730         unsigned int i;
 731         u32 mvs;
 732         u8 maxvid;
 733         u32 cpst = 0;
 734         u32 thiscpuid;
 735
 736         for (i = 0xc0000; i < 0xffff0; i += 0x10) {
 737                 /* Scan BIOS looking for the signature. */
 738                 /* It can not be at ffff0 - it is too big. */
 739
 740                 psb = phys_to_virt(i);
 741                 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
 742                         continue;
 743
 744                 pr_debug("found PSB header at 0x%p\n", psb);
 745
 746                 pr_debug("table vers: 0x%x\n", psb->tableversion);
 747                 if (psb->tableversion != PSB_VERSION_1_4) {
 748                         printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
 749                         return -ENODEV;
 750                 }
 751
 752                 pr_debug("flags: 0x%x\n", psb->flags1);
 753                 if (psb->flags1) {
 754                         printk(KERN_ERR FW_BUG PFX "unknown flags\n");
 755                         return -ENODEV;
 756                 }
 757
 758                 data->vstable = psb->vstable;
 759                 pr_debug("voltage stabilization time: %d(*20us)\n",
 760                                 data->vstable);
 761
 762                 pr_debug("flags2: 0x%x\n", psb->flags2);
 763                 data->rvo = psb->flags2 & 3;
 764                 data->irt = ((psb->flags2) >> 2) & 3;
 765                 mvs = ((psb->flags2) >> 4) & 3;
 766                 data->vidmvs = 1 << mvs;
 767                 data->batps = ((psb->flags2) >> 6) & 3;
 768
 769                 pr_debug("ramp voltage offset: %d\n", data->rvo);
 770                 pr_debug("isochronous relief time: %d\n", data->irt);
 771                 pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
 772
 773                 pr_debug("numpst: 0x%x\n", psb->num_tables);
 774                 cpst = psb->num_tables;
 775                 if ((psb->cpuid == 0x00000fc0) ||
 776                     (psb->cpuid == 0x00000fe0)) {
 777                         thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
 778                         if ((thiscpuid == 0x00000fc0) ||
 779                             (thiscpuid == 0x00000fe0))
 780                                 cpst = 1;
 781                 }
 782                 if (cpst != 1) {
 783                         printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
 784                         return -ENODEV;
 785                 }
 786
 787                 data->plllock = psb->plllocktime;
 788                 pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
 789                 pr_debug("maxfid: 0x%x\n", psb->maxfid);
 790                 pr_debug("maxvid: 0x%x\n", psb->maxvid);
 791                 maxvid = psb->maxvid;
 792
 793                 data->numps = psb->numps;
 794                 pr_debug("numpstates: 0x%x\n", data->numps);
 795                 return fill_powernow_table(data,
 796                                 (struct pst_s *)(psb+1), maxvid);
 797         }
 798         /*
 799          * If you see this message, complain to BIOS manufacturer. If
 800          * he tells you "we do not support Linux" or some similar
 801          * nonsense, remember that Windows 2000 uses the same legacy
 802          * mechanism that the old Linux PSB driver uses. Tell them it
 803          * is broken with Windows 2000.
 804          *
 805          * The reference to the AMD documentation is chapter 9 in the
 806          * BIOS and Kernel Developer's Guide, which is available on
 807          * www.amd.com
 808          */
 809         printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
 810         printk(KERN_ERR PFX "Make sure that your BIOS is up to date"
 811                 " and Cool'N'Quiet support is enabled in BIOS setup\n");
 812         return -ENODEV;
 813 }
 814
 815 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
 816                 unsigned int index)
 817 {
 818         u64 control;
 819
 820         if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
 821                 return;
 822
 823         control = data->acpi_data.states[index].control;
 824         data->irt = (control >> IRT_SHIFT) & IRT_MASK;
 825         data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
 826         data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
 827         data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
 828         data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
 829         data->vstable = (control >> VST_SHIFT) & VST_MASK;
 830 }
 831
 832 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 833 {
 834         struct cpufreq_frequency_table *powernow_table;
 835         int ret_val = -ENODEV;
 836         u64 control, status;
 837
 838         if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
 839                 pr_debug("register performance failed: bad ACPI data\n");
 840                 return -EIO;
 841         }
 842
 843         /* verify the data contained in the ACPI structures */
 844         if (data->acpi_data.state_count <= 1) {
 845                 pr_debug("No ACPI P-States\n");
 846                 goto err_out;
 847         }
 848
 849         control = data->acpi_data.control_register.space_id;
 850         status = data->acpi_data.status_register.space_id;
 851
 852         if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
 853             (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
 854                 pr_debug("Invalid control/status registers (%llx - %llx)\n",
 855                         control, status);
 856                 goto err_out;
 857         }
 858
 859         /* fill in data->powernow_table */
 860         powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
 861                 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
 862         if (!powernow_table) {
 863                 pr_debug("powernow_table memory alloc failure\n");
 864                 goto err_out;
 865         }
 866
 867         /* fill in data */
 868         data->numps = data->acpi_data.state_count;
 869         powernow_k8_acpi_pst_values(data, 0);
 870
 871         if (cpu_family == CPU_HW_PSTATE)
 872                 ret_val = fill_powernow_table_pstate(data, powernow_table);
 873         else
 874                 ret_val = fill_powernow_table_fidvid(data, powernow_table);
 875         if (ret_val)
 876                 goto err_out_mem;
 877
 878         powernow_table[data->acpi_data.state_count].frequency =
 879                 CPUFREQ_TABLE_END;
 880         powernow_table[data->acpi_data.state_count].index = 0;
 881         data->powernow_table = powernow_table;
 882
 883         if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
 884                 print_basics(data);
 885
 886         /* notify BIOS that we exist */
 887         acpi_processor_notify_smm(THIS_MODULE);
 888
 889         if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
 890                 printk(KERN_ERR PFX
 891                                 "unable to alloc powernow_k8_data cpumask\n");
 892                 ret_val = -ENOMEM;
 893                 goto err_out_mem;
 894         }
 895
 896         return 0;
 897
 898 err_out_mem:
 899         kfree(powernow_table);
 900
 901 err_out:
 902         acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
 903
 904         /* data->acpi_data.state_count informs us at ->exit()
 905          * whether ACPI was used */
 906         data->acpi_data.state_count = 0;
 907
 908         return ret_val;
 909 }
 910
 911 static int fill_powernow_table_pstate(struct powernow_k8_data *data,
 912                 struct cpufreq_frequency_table *powernow_table)
 913 {
 914         int i;
 915         u32 hi = 0, lo = 0;
 916         rdmsr(MSR_PSTATE_CUR_LIMIT, lo, hi);
 917         data->max_hw_pstate = (lo & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
 918
 919         for (i = 0; i < data->acpi_data.state_count; i++) {
 920                 u32 index;
 921
 922                 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
 923                 if (index > data->max_hw_pstate) {
 924                         printk(KERN_ERR PFX "invalid pstate %d - "
 925                                         "bad value %d.\n", i, index);
 926                         printk(KERN_ERR PFX "Please report to BIOS "
 927                                         "manufacturer\n");
 928                         invalidate_entry(powernow_table, i);
 929                         continue;
 930                 }
 931
 932                 ps_to_as[index] = i;
 933
 934                 /* Frequency may be rounded for these */
 935                 if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
 936                                  || boot_cpu_data.x86 == 0x11) {
 937
 938                         rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
 939                         if (!(hi & HW_PSTATE_VALID_MASK)) {
 940                                 pr_debug("invalid pstate %d, ignoring\n", index);
 941                                 invalidate_entry(powernow_table, i);
 942                                 continue;
 943                         }
 944
 945                         powernow_table[i].frequency =
 946                                 freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
 947                 } else
 948                         powernow_table[i].frequency =
 949                                 data->acpi_data.states[i].core_frequency * 1000;
 950
 951                 powernow_table[i].index = index;
 952         }
 953         return 0;
 954 }
 955
 956 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
 957                 struct cpufreq_frequency_table *powernow_table)
 958 {
 959         int i;
 960
 961         for (i = 0; i < data->acpi_data.state_count; i++) {
 962                 u32 fid;
 963                 u32 vid;
 964                 u32 freq, index;
 965                 u64 status, control;
 966
 967                 if (data->exttype) {
 968                         status =  data->acpi_data.states[i].status;
 969                         fid = status & EXT_FID_MASK;
 970                         vid = (status >> VID_SHIFT) & EXT_VID_MASK;
 971                 } else {
 972                         control =  data->acpi_data.states[i].control;
 973                         fid = control & FID_MASK;
 974                         vid = (control >> VID_SHIFT) & VID_MASK;
 975                 }
 976
 977                 pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
 978
 979                 index = fid | (vid<<8);
 980                 powernow_table[i].index = index;
 981
 982                 freq = find_khz_freq_from_fid(fid);
 983                 powernow_table[i].frequency = freq;
 984
 985                 /* verify frequency is OK */
 986                 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
 987                         pr_debug("invalid freq %u kHz, ignoring\n", freq);
 988                         invalidate_entry(powernow_table, i);
 989                         continue;
 990                 }
 991
 992                 /* verify voltage is OK -
 993                  * BIOSs are using "off" to indicate invalid */
 994                 if (vid == VID_OFF) {
 995                         pr_debug("invalid vid %u, ignoring\n", vid);
 996                         invalidate_entry(powernow_table, i);
 997                         continue;
 998                 }
 999
1000                 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
1001                         printk(KERN_INFO PFX "invalid freq entries "
1002                                 "%u kHz vs. %u kHz\n", freq,
1003                                 (unsigned int)
1004                                 (data->acpi_data.states[i].core_frequency
1005                                  * 1000));
1006                         invalidate_entry(powernow_table, i);
1007                         continue;
1008                 }
1009         }
1010         return 0;
1011 }
1012
1013 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
1014 {
1015         if (data->acpi_data.state_count)
1016                 acpi_processor_unregister_performance(&data->acpi_data,
1017                                 data->cpu);
1018         free_cpumask_var(data->acpi_data.shared_cpu_map);
1019 }
1020
1021 static int get_transition_latency(struct powernow_k8_data *data)
1022 {
1023         int max_latency = 0;
1024         int i;
1025         for (i = 0; i < data->acpi_data.state_count; i++) {
1026                 int cur_latency = data->acpi_data.states[i].transition_latency
1027                         + data->acpi_data.states[i].bus_master_latency;
1028                 if (cur_latency > max_latency)
1029                         max_latency = cur_latency;
1030         }
1031         if (max_latency == 0) {
1032                 /*
1033                  * Fam 11h and later may return 0 as transition latency. This
1034                  * is intended and means "very fast". While cpufreq core and
1035                  * governors currently can handle that gracefully, better set it
1036                  * to 1 to avoid problems in the future.
1037                  */
1038                 if (boot_cpu_data.x86 < 0x11)
1039                         printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
1040                                 "latency\n");
1041                 max_latency = 1;
1042         }
1043         /* value in usecs, needs to be in nanoseconds */
1044         return 1000 * max_latency;
1045 }
1046
1047 /* Take a frequency, and issue the fid/vid transition command */
1048 static int transition_frequency_fidvid(struct powernow_k8_data *data,
1049                 unsigned int index)
1050 {
1051         u32 fid = 0;
1052         u32 vid = 0;
1053         int res, i;
1054         struct cpufreq_freqs freqs;
1055
1056         pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
1057
1058         /* fid/vid correctness check for k8 */
1059         /* fid are the lower 8 bits of the index we stored into
1060          * the cpufreq frequency table in find_psb_table, vid
1061          * are the upper 8 bits.
1062          */
1063         fid = data->powernow_table[index].index & 0xFF;
1064         vid = (data->powernow_table[index].index & 0xFF00) >> 8;
1065
1066         pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
1067
1068         if (query_current_values_with_pending_wait(data))
1069                 return 1;
1070
1071         if ((data->currvid == vid) && (data->currfid == fid)) {
1072                 pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
1073                         fid, vid);
1074                 return 0;
1075         }
1076
1077         pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
1078                 smp_processor_id(), fid, vid);
1079         freqs.old = find_khz_freq_from_fid(data->currfid);
1080         freqs.new = find_khz_freq_from_fid(fid);
1081
1082         for_each_cpu(i, data->available_cores) {
1083                 freqs.cpu = i;
1084                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1085         }
1086
1087         res = transition_fid_vid(data, fid, vid);
1088         if (res)
1089                 return res;
1090
1091         freqs.new = find_khz_freq_from_fid(data->currfid);
1092
1093         for_each_cpu(i, data->available_cores) {
1094                 freqs.cpu = i;
1095                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1096         }
1097         return res;
1098 }
1099
1100 /* Take a frequency, and issue the hardware pstate transition command */
1101 static int transition_frequency_pstate(struct powernow_k8_data *data,
1102                 unsigned int index)
1103 {
1104         u32 pstate = 0;
1105         int res, i;
1106         struct cpufreq_freqs freqs;
1107
1108         pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
1109
1110         /* get MSR index for hardware pstate transition */
1111         pstate = index & HW_PSTATE_MASK;
1112         if (pstate > data->max_hw_pstate)
1113                 return -EINVAL;
1114
1115         freqs.old = find_khz_freq_from_pstate(data->powernow_table,
1116                         data->currpstate);
1117         freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1118
1119         for_each_cpu(i, data->available_cores) {
1120                 freqs.cpu = i;
1121                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1122         }
1123
1124         res = transition_pstate(data, pstate);
1125         freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1126
1127         for_each_cpu(i, data->available_cores) {
1128                 freqs.cpu = i;
1129                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1130         }
1131         return res;
1132 }
1133
1134 struct powernowk8_target_arg {
1135         struct cpufreq_policy           *pol;
1136         unsigned                        targfreq;
1137         unsigned                        relation;
1138 };
1139
1140 static long powernowk8_target_fn(void *arg)
1141 {
1142         struct powernowk8_target_arg *pta = arg;
1143         struct cpufreq_policy *pol = pta->pol;
1144         unsigned targfreq = pta->targfreq;
1145         unsigned relation = pta->relation;
1146         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1147         u32 checkfid;
1148         u32 checkvid;
1149         unsigned int newstate;
1150         int ret;
1151
1152         if (!data)
1153                 return -EINVAL;
1154
1155         checkfid = data->currfid;
1156         checkvid = data->currvid;
1157
1158         if (pending_bit_stuck()) {
1159                 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1160                 return -EIO;
1161         }
1162
1163         pr_debug("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1164                 pol->cpu, targfreq, pol->min, pol->max, relation);
1165
1166         if (query_current_values_with_pending_wait(data))
1167                 return -EIO;
1168
1169         if (cpu_family != CPU_HW_PSTATE) {
1170                 pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
1171                 data->currfid, data->currvid);
1172
1173                 if ((checkvid != data->currvid) ||
1174                     (checkfid != data->currfid)) {
1175                         printk(KERN_INFO PFX
1176                                 "error - out of sync, fix 0x%x 0x%x, "
1177                                 "vid 0x%x 0x%x\n",
1178                                 checkfid, data->currfid,
1179                                 checkvid, data->currvid);
1180                 }
1181         }
1182
1183         if (cpufreq_frequency_table_target(pol, data->powernow_table,
1184                                 targfreq, relation, &newstate))
1185                 return -EIO;
1186
1187         mutex_lock(&fidvid_mutex);
1188
1189         powernow_k8_acpi_pst_values(data, newstate);
1190
1191         if (cpu_family == CPU_HW_PSTATE)
1192                 ret = transition_frequency_pstate(data,
1193                         data->powernow_table[newstate].index);
1194         else
1195                 ret = transition_frequency_fidvid(data, newstate);
1196         if (ret) {
1197                 printk(KERN_ERR PFX "transition frequency failed\n");
1198                 mutex_unlock(&fidvid_mutex);
1199                 return 1;
1200         }
1201         mutex_unlock(&fidvid_mutex);
1202
1203         if (cpu_family == CPU_HW_PSTATE)
1204                 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1205                                 data->powernow_table[newstate].index);
1206         else
1207                 pol->cur = find_khz_freq_from_fid(data->currfid);
1208
1209         return 0;
1210 }
1211
1212 /* Driver entry point to switch to the target frequency */
1213 static int powernowk8_target(struct cpufreq_policy *pol,
1214                 unsigned targfreq, unsigned relation)
1215 {
1216         struct powernowk8_target_arg pta = { .pol = pol, .targfreq = targfreq,
1217                                              .relation = relation };
1218
1219         return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
1220 }
1221
1222 /* Driver entry point to verify the policy and range of frequencies */
1223 static int powernowk8_verify(struct cpufreq_policy *pol)
1224 {
1225         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1226
1227         if (!data)
1228                 return -EINVAL;
1229
1230         return cpufreq_frequency_table_verify(pol, data->powernow_table);
1231 }
1232
1233 struct init_on_cpu {
1234         struct powernow_k8_data *data;
1235         int rc;
1236 };
1237
1238 static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1239 {
1240         struct init_on_cpu *init_on_cpu = _init_on_cpu;
1241
1242         if (pending_bit_stuck()) {
1243                 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1244                 init_on_cpu->rc = -ENODEV;
1245                 return;
1246         }
1247
1248         if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1249                 init_on_cpu->rc = -ENODEV;
1250                 return;
1251         }
1252
1253         if (cpu_family == CPU_OPTERON)
1254                 fidvid_msr_init();
1255
1256         init_on_cpu->rc = 0;
1257 }
1258
1259 /* per CPU init entry point to the driver */
1260 static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1261 {
1262         static const char ACPI_PSS_BIOS_BUG_MSG[] =
1263                 KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
1264                 FW_BUG PFX "Try again with latest BIOS.\n";
1265         struct powernow_k8_data *data;
1266         struct init_on_cpu init_on_cpu;
1267         int rc;
1268         struct cpuinfo_x86 *c = &cpu_data(pol->cpu);
1269
1270         if (!cpu_online(pol->cpu))
1271                 return -ENODEV;
1272
1273         smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1274         if (rc)
1275                 return -ENODEV;
1276
1277         data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1278         if (!data) {
1279                 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1280                 return -ENOMEM;
1281         }
1282
1283         data->cpu = pol->cpu;
1284         data->currpstate = HW_PSTATE_INVALID;
1285
1286         if (powernow_k8_cpu_init_acpi(data)) {
1287                 /*
1288                  * Use the PSB BIOS structure. This is only available on
1289                  * an UP version, and is deprecated by AMD.
1290                  */
1291                 if (num_online_cpus() != 1) {
1292                         printk_once(ACPI_PSS_BIOS_BUG_MSG);
1293                         goto err_out;
1294                 }
1295                 if (pol->cpu != 0) {
1296                         printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1297                                "CPU other than CPU0. Complain to your BIOS "
1298                                "vendor.\n");
1299                         goto err_out;
1300                 }
1301                 rc = find_psb_table(data);
1302                 if (rc)
1303                         goto err_out;
1304
1305                 /* Take a crude guess here.
1306                  * That guess was in microseconds, so multiply with 1000 */
1307                 pol->cpuinfo.transition_latency = (
1308                          ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1309                          ((1 << data->irt) * 30)) * 1000;
1310         } else /* ACPI _PSS objects available */
1311                 pol->cpuinfo.transition_latency = get_transition_latency(data);
1312
1313         /* only run on specific CPU from here on */
1314         init_on_cpu.data = data;
1315         smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1316                                  &init_on_cpu, 1);
1317         rc = init_on_cpu.rc;
1318         if (rc != 0)
1319                 goto err_out_exit_acpi;
1320
1321         if (cpu_family == CPU_HW_PSTATE)
1322                 cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
1323         else
1324                 cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
1325         data->available_cores = pol->cpus;
1326
1327         if (cpu_family == CPU_HW_PSTATE)
1328                 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1329                                 data->currpstate);
1330         else
1331                 pol->cur = find_khz_freq_from_fid(data->currfid);
1332         pr_debug("policy current frequency %d kHz\n", pol->cur);
1333
1334         /* min/max the cpu is capable of */
1335         if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1336                 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1337                 powernow_k8_cpu_exit_acpi(data);
1338                 kfree(data->powernow_table);
1339                 kfree(data);
1340                 return -EINVAL;
1341         }
1342
1343         /* Check for APERF/MPERF support in hardware */
1344         if (cpu_has(c, X86_FEATURE_APERFMPERF))
1345                 cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf;
1346
1347         cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1348
1349         if (cpu_family == CPU_HW_PSTATE)
1350                 pr_debug("cpu_init done, current pstate 0x%x\n",
1351                                 data->currpstate);
1352         else
1353                 pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1354                         data->currfid, data->currvid);
1355
1356         per_cpu(powernow_data, pol->cpu) = data;
1357
1358         return 0;
1359
1360 err_out_exit_acpi:
1361         powernow_k8_cpu_exit_acpi(data);
1362
1363 err_out:
1364         kfree(data);
1365         return -ENODEV;
1366 }
1367
1368 static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
1369 {
1370         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1371
1372         if (!data)
1373                 return -EINVAL;
1374
1375         powernow_k8_cpu_exit_acpi(data);
1376
1377         cpufreq_frequency_table_put_attr(pol->cpu);
1378
1379         kfree(data->powernow_table);
1380         kfree(data);
1381         per_cpu(powernow_data, pol->cpu) = NULL;
1382
1383         return 0;
1384 }
1385
1386 static void query_values_on_cpu(void *_err)
1387 {
1388         int *err = _err;
1389         struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1390
1391         *err = query_current_values_with_pending_wait(data);
1392 }
1393
1394 static unsigned int powernowk8_get(unsigned int cpu)
1395 {
1396         struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1397         unsigned int khz = 0;
1398         int err;
1399
1400         if (!data)
1401                 return 0;
1402
1403         smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1404         if (err)
1405                 goto out;
1406
1407         if (cpu_family == CPU_HW_PSTATE)
1408                 khz = find_khz_freq_from_pstate(data->powernow_table,
1409                                                 data->currpstate);
1410         else
1411                 khz = find_khz_freq_from_fid(data->currfid);
1412
1413
1414 out:
1415         return khz;
1416 }
1417
1418 static void _cpb_toggle_msrs(bool t)
1419 {
1420         int cpu;
1421
1422         get_online_cpus();
1423
1424         rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1425
1426         for_each_cpu(cpu, cpu_online_mask) {
1427                 struct msr *reg = per_cpu_ptr(msrs, cpu);
1428                 if (t)
1429                         reg->l &= ~BIT(25);
1430                 else
1431                         reg->l |= BIT(25);
1432         }
1433         wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1434
1435         put_online_cpus();
1436 }
1437
1438 /*
1439  * Switch on/off core performance boosting.
1440  *
1441  * 0=disable
1442  * 1=enable.
1443  */
1444 static void cpb_toggle(bool t)
1445 {
1446         if (!cpb_capable)
1447                 return;
1448
1449         if (t && !cpb_enabled) {
1450                 cpb_enabled = true;
1451                 _cpb_toggle_msrs(t);
1452                 printk(KERN_INFO PFX "Core Boosting enabled.\n");
1453         } else if (!t && cpb_enabled) {
1454                 cpb_enabled = false;
1455                 _cpb_toggle_msrs(t);
1456                 printk(KERN_INFO PFX "Core Boosting disabled.\n");
1457         }
1458 }
1459
1460 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
1461                                  size_t count)
1462 {
1463         int ret = -EINVAL;
1464         unsigned long val = 0;
1465
1466         ret = strict_strtoul(buf, 10, &val);
1467         if (!ret && (val == 0 || val == 1) && cpb_capable)
1468                 cpb_toggle(val);
1469         else
1470                 return -EINVAL;
1471
1472         return count;
1473 }
1474
1475 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
1476 {
1477         return sprintf(buf, "%u\n", cpb_enabled);
1478 }
1479
1480 #define define_one_rw(_name) \
1481 static struct freq_attr _name = \
1482 __ATTR(_name, 0644, show_##_name, store_##_name)
1483
1484 define_one_rw(cpb);
1485
1486 static struct freq_attr *powernow_k8_attr[] = {
1487         &cpufreq_freq_attr_scaling_available_freqs,
1488         &cpb,
1489         NULL,
1490 };
1491
1492 static struct cpufreq_driver cpufreq_amd64_driver = {
1493         .verify         = powernowk8_verify,
1494         .target         = powernowk8_target,
1495         .bios_limit     = acpi_processor_get_bios_limit,
1496         .init           = powernowk8_cpu_init,
1497         .exit           = __devexit_p(powernowk8_cpu_exit),
1498         .get            = powernowk8_get,
1499         .name           = "powernow-k8",
1500         .owner          = THIS_MODULE,
1501         .attr           = powernow_k8_attr,
1502 };
1503
1504 /*
1505  * Clear the boost-disable flag on the CPU_DOWN path so that this cpu
1506  * cannot block the remaining ones from boosting. On the CPU_UP path we
1507  * simply keep the boost-disable flag in sync with the current global
1508  * state.
1509  */
1510 static int cpb_notify(struct notifier_block *nb, unsigned long action,
1511                       void *hcpu)
1512 {
1513         unsigned cpu = (long)hcpu;
1514         u32 lo, hi;
1515
1516         switch (action) {
1517         case CPU_UP_PREPARE:
1518         case CPU_UP_PREPARE_FROZEN:
1519
1520                 if (!cpb_enabled) {
1521                         rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1522                         lo |= BIT(25);
1523                         wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1524                 }
1525                 break;
1526
1527         case CPU_DOWN_PREPARE:
1528         case CPU_DOWN_PREPARE_FROZEN:
1529                 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1530                 lo &= ~BIT(25);
1531                 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1532                 break;
1533
1534         default:
1535                 break;
1536         }
1537
1538         return NOTIFY_OK;
1539 }
1540
1541 static struct notifier_block cpb_nb = {
1542         .notifier_call          = cpb_notify,
1543 };
1544
1545 /* driver entry point for init */
1546 static int __cpuinit powernowk8_init(void)
1547 {
1548         unsigned int i, supported_cpus = 0, cpu;
1549         int rv;
1550
1551         for_each_online_cpu(i) {
1552                 int rc;
1553                 smp_call_function_single(i, check_supported_cpu, &rc, 1);
1554                 if (rc == 0)
1555                         supported_cpus++;
1556         }
1557
1558         if (supported_cpus != num_online_cpus())
1559                 return -ENODEV;
1560
1561         printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
1562                 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1563
1564         if (boot_cpu_has(X86_FEATURE_CPB)) {
1565
1566                 cpb_capable = true;
1567
1568                 msrs = msrs_alloc();
1569                 if (!msrs) {
1570                         printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
1571                         return -ENOMEM;
1572                 }
1573
1574                 register_cpu_notifier(&cpb_nb);
1575
1576                 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1577
1578                 for_each_cpu(cpu, cpu_online_mask) {
1579                         struct msr *reg = per_cpu_ptr(msrs, cpu);
1580                         cpb_enabled |= !(!!(reg->l & BIT(25)));
1581                 }
1582
1583                 printk(KERN_INFO PFX "Core Performance Boosting: %s.\n",
1584                         (cpb_enabled ? "on" : "off"));
1585         }
1586
1587         rv = cpufreq_register_driver(&cpufreq_amd64_driver);
1588         if (rv < 0 && boot_cpu_has(X86_FEATURE_CPB)) {
1589                 unregister_cpu_notifier(&cpb_nb);
1590                 msrs_free(msrs);
1591                 msrs = NULL;
1592         }
1593         return rv;
1594 }
1595
1596 /* driver entry point for term */
1597 static void __exit powernowk8_exit(void)
1598 {
1599         pr_debug("exit\n");
1600
1601         if (boot_cpu_has(X86_FEATURE_CPB)) {
1602                 msrs_free(msrs);
1603                 msrs = NULL;
1604
1605                 unregister_cpu_notifier(&cpb_nb);
1606         }
1607
1608         cpufreq_unregister_driver(&cpufreq_amd64_driver);
1609 }
1610
1611 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
1612                 "Mark Langsdorf <mark.langsdorf@amd.com>");
1613 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1614 MODULE_LICENSE("GPL");
1615
1616 late_initcall(powernowk8_init);
1617 module_exit(powernowk8_exit);