drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/seq_file.h>
  55 #include <linux/slab.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/vmalloc.h>
  58 #include <linux/init.h>
  59 #include <linux/delay.h>
  60 #include <linux/ioctl.h>
  61 #include <linux/synclink.h>
  62
  63 #include <asm/system.h>
  64 #include <asm/io.h>
  65 #include <asm/irq.h>
  66 #include <asm/dma.h>
  67 #include <linux/bitops.h>
  68 #include <asm/types.h>
  69 #include <linux/termios.h>
  70 #include <linux/workqueue.h>
  71 #include <linux/hdlc.h>
  72
  73 #include <pcmcia/cistpl.h>
  74 #include <pcmcia/cisreg.h>
  75 #include <pcmcia/ds.h>
  76
  77 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  78 #define SYNCLINK_GENERIC_HDLC 1
  79 #else
  80 #define SYNCLINK_GENERIC_HDLC 0
  81 #endif
  82
  83 #define GET_USER(error,value,addr) error = get_user(value,addr)
  84 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  85 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  86 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  87
  88 #include <asm/uaccess.h>
  89
  90 static MGSL_PARAMS default_params = {
  91         MGSL_MODE_HDLC,                 /* unsigned long mode */
  92         0,                              /* unsigned char loopback; */
  93         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  94         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  95         0,                              /* unsigned long clock_speed; */
  96         0xff,                           /* unsigned char addr_filter; */
  97         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  98         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
  99         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 100         9600,                           /* unsigned long data_rate; */
 101         8,                              /* unsigned char data_bits; */
 102         1,                              /* unsigned char stop_bits; */
 103         ASYNC_PARITY_NONE               /* unsigned char parity; */
 104 };
 105
 106 typedef struct
 107 {
 108         int count;
 109         unsigned char status;
 110         char data[1];
 111 } RXBUF;
 112
 113 /* The queue of BH actions to be performed */
 114
 115 #define BH_RECEIVE  1
 116 #define BH_TRANSMIT 2
 117 #define BH_STATUS   4
 118
 119 #define IO_PIN_SHUTDOWN_LIMIT 100
 120
 121 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 122
 123 struct _input_signal_events {
 124         int     ri_up;
 125         int     ri_down;
 126         int     dsr_up;
 127         int     dsr_down;
 128         int     dcd_up;
 129         int     dcd_down;
 130         int     cts_up;
 131         int     cts_down;
 132 };
 133
 134
 135 /*
 136  * Device instance data structure
 137  */
 138
 139 typedef struct _mgslpc_info {
 140         struct tty_port         port;
 141         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 142         int                     magic;
 143         int                     line;
 144
 145         struct mgsl_icount      icount;
 146
 147         int                     timeout;
 148         int                     x_char;         /* xon/xoff character */
 149         unsigned char           read_status_mask;
 150         unsigned char           ignore_status_mask;
 151
 152         unsigned char *tx_buf;
 153         int            tx_put;
 154         int            tx_get;
 155         int            tx_count;
 156
 157         /* circular list of fixed length rx buffers */
 158
 159         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 160         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 161         int            rx_put;         /* index of next empty rx buffer */
 162         int            rx_get;         /* index of next full rx buffer */
 163         int            rx_buf_size;    /* size in bytes of single rx buffer */
 164         int            rx_buf_count;   /* total number of rx buffers */
 165         int            rx_frame_count; /* number of full rx buffers */
 166
 167         wait_queue_head_t       status_event_wait_q;
 168         wait_queue_head_t       event_wait_q;
 169         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 170         struct _mgslpc_info     *next_device;   /* device list link */
 171
 172         unsigned short imra_value;
 173         unsigned short imrb_value;
 174         unsigned char  pim_value;
 175
 176         spinlock_t lock;
 177         struct work_struct task;                /* task structure for scheduling bh */
 178
 179         u32 max_frame_size;
 180
 181         u32 pending_bh;
 182
 183         bool bh_running;
 184         bool bh_requested;
 185
 186         int dcd_chkcount; /* check counts to prevent */
 187         int cts_chkcount; /* too many IRQs if a signal */
 188         int dsr_chkcount; /* is floating */
 189         int ri_chkcount;
 190
 191         bool rx_enabled;
 192         bool rx_overflow;
 193
 194         bool tx_enabled;
 195         bool tx_active;
 196         bool tx_aborting;
 197         u32 idle_mode;
 198
 199         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 200
 201         char device_name[25];           /* device instance name */
 202
 203         unsigned int io_base;   /* base I/O address of adapter */
 204         unsigned int irq_level;
 205
 206         MGSL_PARAMS params;             /* communications parameters */
 207
 208         unsigned char serial_signals;   /* current serial signal states */
 209
 210         bool irq_occurred;              /* for diagnostics use */
 211         char testing_irq;
 212         unsigned int init_error;        /* startup error (DIAGS)        */
 213
 214         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 215         bool drop_rts_on_tx_done;
 216
 217         struct  _input_signal_events    input_signal_events;
 218
 219         /* PCMCIA support */
 220         struct pcmcia_device    *p_dev;
 221         int                   stop;
 222
 223         /* SPPP/Cisco HDLC device parts */
 224         int netcount;
 225         spinlock_t netlock;
 226
 227 #if SYNCLINK_GENERIC_HDLC
 228         struct net_device *netdev;
 229 #endif
 230
 231 } MGSLPC_INFO;
 232
 233 #define MGSLPC_MAGIC 0x5402
 234
 235 /*
 236  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 237  */
 238 #define TXBUFSIZE 4096
 239
 240
 241 #define CHA     0x00   /* channel A offset */
 242 #define CHB     0x40   /* channel B offset */
 243
 244 /*
 245  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 246  */
 247 #undef PVR
 248
 249 #define RXFIFO  0
 250 #define TXFIFO  0
 251 #define STAR    0x20
 252 #define CMDR    0x20
 253 #define RSTA    0x21
 254 #define PRE     0x21
 255 #define MODE    0x22
 256 #define TIMR    0x23
 257 #define XAD1    0x24
 258 #define XAD2    0x25
 259 #define RAH1    0x26
 260 #define RAH2    0x27
 261 #define DAFO    0x27
 262 #define RAL1    0x28
 263 #define RFC     0x28
 264 #define RHCR    0x29
 265 #define RAL2    0x29
 266 #define RBCL    0x2a
 267 #define XBCL    0x2a
 268 #define RBCH    0x2b
 269 #define XBCH    0x2b
 270 #define CCR0    0x2c
 271 #define CCR1    0x2d
 272 #define CCR2    0x2e
 273 #define CCR3    0x2f
 274 #define VSTR    0x34
 275 #define BGR     0x34
 276 #define RLCR    0x35
 277 #define AML     0x36
 278 #define AMH     0x37
 279 #define GIS     0x38
 280 #define IVA     0x38
 281 #define IPC     0x39
 282 #define ISR     0x3a
 283 #define IMR     0x3a
 284 #define PVR     0x3c
 285 #define PIS     0x3d
 286 #define PIM     0x3d
 287 #define PCR     0x3e
 288 #define CCR4    0x3f
 289
 290 // IMR/ISR
 291
 292 #define IRQ_BREAK_ON    BIT15   // rx break detected
 293 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 294 #define IRQ_ALLSENT     BIT13   // all sent
 295 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 296 #define IRQ_TIMER       BIT11   // timer interrupt
 297 #define IRQ_CTS         BIT10   // CTS status change
 298 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 299 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 300 #define IRQ_RXEOM       BIT7    // receive message end
 301 #define IRQ_EXITHUNT    BIT6    // receive frame start
 302 #define IRQ_RXTIME      BIT6    // rx char timeout
 303 #define IRQ_DCD         BIT2    // carrier detect status change
 304 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 305 #define IRQ_RXFIFO      BIT0    // receive pool full
 306
 307 // STAR
 308
 309 #define XFW   BIT6              // transmit FIFO write enable
 310 #define CEC   BIT2              // command executing
 311 #define CTS   BIT1              // CTS state
 312
 313 #define PVR_DTR      BIT0
 314 #define PVR_DSR      BIT1
 315 #define PVR_RI       BIT2
 316 #define PVR_AUTOCTS  BIT3
 317 #define PVR_RS232    0x20   /* 0010b */
 318 #define PVR_V35      0xe0   /* 1110b */
 319 #define PVR_RS422    0x40   /* 0100b */
 320
 321 /* Register access functions */
 322
 323 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 324 #define read_reg(info, reg) inb((info)->io_base + (reg))
 325
 326 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 327 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 328
 329 #define set_reg_bits(info, reg, mask) \
 330     write_reg(info, (reg), \
 331                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 332 #define clear_reg_bits(info, reg, mask) \
 333     write_reg(info, (reg), \
 334                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 335 /*
 336  * interrupt enable/disable routines
 337  */
 338 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 339 {
 340         if (channel == CHA) {
 341                 info->imra_value |= mask;
 342                 write_reg16(info, CHA + IMR, info->imra_value);
 343         } else {
 344                 info->imrb_value |= mask;
 345                 write_reg16(info, CHB + IMR, info->imrb_value);
 346         }
 347 }
 348 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 349 {
 350         if (channel == CHA) {
 351                 info->imra_value &= ~mask;
 352                 write_reg16(info, CHA + IMR, info->imra_value);
 353         } else {
 354                 info->imrb_value &= ~mask;
 355                 write_reg16(info, CHB + IMR, info->imrb_value);
 356         }
 357 }
 358
 359 #define port_irq_disable(info, mask) \
 360   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 361
 362 #define port_irq_enable(info, mask) \
 363   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 364
 365 static void rx_start(MGSLPC_INFO *info);
 366 static void rx_stop(MGSLPC_INFO *info);
 367
 368 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 369 static void tx_stop(MGSLPC_INFO *info);
 370 static void tx_set_idle(MGSLPC_INFO *info);
 371
 372 static void get_signals(MGSLPC_INFO *info);
 373 static void set_signals(MGSLPC_INFO *info);
 374
 375 static void reset_device(MGSLPC_INFO *info);
 376
 377 static void hdlc_mode(MGSLPC_INFO *info);
 378 static void async_mode(MGSLPC_INFO *info);
 379
 380 static void tx_timeout(unsigned long context);
 381
 382 static int carrier_raised(struct tty_port *port);
 383 static void dtr_rts(struct tty_port *port, int onoff);
 384
 385 #if SYNCLINK_GENERIC_HDLC
 386 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 387 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 388 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 389 static int  hdlcdev_init(MGSLPC_INFO *info);
 390 static void hdlcdev_exit(MGSLPC_INFO *info);
 391 #endif
 392
 393 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 394
 395 static bool register_test(MGSLPC_INFO *info);
 396 static bool irq_test(MGSLPC_INFO *info);
 397 static int adapter_test(MGSLPC_INFO *info);
 398
 399 static int claim_resources(MGSLPC_INFO *info);
 400 static void release_resources(MGSLPC_INFO *info);
 401 static void mgslpc_add_device(MGSLPC_INFO *info);
 402 static void mgslpc_remove_device(MGSLPC_INFO *info);
 403
 404 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 405 static void rx_reset_buffers(MGSLPC_INFO *info);
 406 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 407 static void rx_free_buffers(MGSLPC_INFO *info);
 408
 409 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 410
 411 /*
 412  * Bottom half interrupt handlers
 413  */
 414 static void bh_handler(struct work_struct *work);
 415 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 416 static void bh_status(MGSLPC_INFO *info);
 417
 418 /*
 419  * ioctl handlers
 420  */
 421 static int tiocmget(struct tty_struct *tty, struct file *file);
 422 static int tiocmset(struct tty_struct *tty, struct file *file,
 423                     unsigned int set, unsigned int clear);
 424 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 425 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 426 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 427 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 428 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 429 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 430 static int tx_abort(MGSLPC_INFO *info);
 431 static int set_rxenable(MGSLPC_INFO *info, int enable);
 432 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 433
 434 static MGSLPC_INFO *mgslpc_device_list = NULL;
 435 static int mgslpc_device_count = 0;
 436
 437 /*
 438  * Set this param to non-zero to load eax with the
 439  * .text section address and breakpoint on module load.
 440  * This is useful for use with gdb and add-symbol-file command.
 441  */
 442 static int break_on_load=0;
 443
 444 /*
 445  * Driver major number, defaults to zero to get auto
 446  * assigned major number. May be forced as module parameter.
 447  */
 448 static int ttymajor=0;
 449
 450 static int debug_level = 0;
 451 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 452
 453 module_param(break_on_load, bool, 0);
 454 module_param(ttymajor, int, 0);
 455 module_param(debug_level, int, 0);
 456 module_param_array(maxframe, int, NULL, 0);
 457
 458 MODULE_LICENSE("GPL");
 459
 460 static char *driver_name = "SyncLink PC Card driver";
 461 static char *driver_version = "$Revision: 4.34 $";
 462
 463 static struct tty_driver *serial_driver;
 464
 465 /* number of characters left in xmit buffer before we ask for more */
 466 #define WAKEUP_CHARS 256
 467
 468 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 469 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 470
 471 /* PCMCIA prototypes */
 472
 473 static int mgslpc_config(struct pcmcia_device *link);
 474 static void mgslpc_release(u_long arg);
 475 static void mgslpc_detach(struct pcmcia_device *p_dev);
 476
 477 /*
 478  * 1st function defined in .text section. Calling this function in
 479  * init_module() followed by a breakpoint allows a remote debugger
 480  * (gdb) to get the .text address for the add-symbol-file command.
 481  * This allows remote debugging of dynamically loadable modules.
 482  */
 483 static void* mgslpc_get_text_ptr(void)
 484 {
 485         return mgslpc_get_text_ptr;
 486 }
 487
 488 /**
 489  * line discipline callback wrappers
 490  *
 491  * The wrappers maintain line discipline references
 492  * while calling into the line discipline.
 493  *
 494  * ldisc_receive_buf  - pass receive data to line discipline
 495  */
 496
 497 static void ldisc_receive_buf(struct tty_struct *tty,
 498                               const __u8 *data, char *flags, int count)
 499 {
 500         struct tty_ldisc *ld;
 501         if (!tty)
 502                 return;
 503         ld = tty_ldisc_ref(tty);
 504         if (ld) {
 505                 if (ld->ops->receive_buf)
 506                         ld->ops->receive_buf(tty, data, flags, count);
 507                 tty_ldisc_deref(ld);
 508         }
 509 }
 510
 511 static const struct tty_port_operations mgslpc_port_ops = {
 512         .carrier_raised = carrier_raised,
 513         .dtr_rts = dtr_rts
 514 };
 515
 516 static int mgslpc_probe(struct pcmcia_device *link)
 517 {
 518     MGSLPC_INFO *info;
 519     int ret;
 520
 521     if (debug_level >= DEBUG_LEVEL_INFO)
 522             printk("mgslpc_attach\n");
 523
 524     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 525     if (!info) {
 526             printk("Error can't allocate device instance data\n");
 527             return -ENOMEM;
 528     }
 529
 530     info->magic = MGSLPC_MAGIC;
 531     tty_port_init(&info->port);
 532     info->port.ops = &mgslpc_port_ops;
 533     INIT_WORK(&info->task, bh_handler);
 534     info->max_frame_size = 4096;
 535     info->port.close_delay = 5*HZ/10;
 536     info->port.closing_wait = 30*HZ;
 537     init_waitqueue_head(&info->status_event_wait_q);
 538     init_waitqueue_head(&info->event_wait_q);
 539     spin_lock_init(&info->lock);
 540     spin_lock_init(&info->netlock);
 541     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 542     info->idle_mode = HDLC_TXIDLE_FLAGS;
 543     info->imra_value = 0xffff;
 544     info->imrb_value = 0xffff;
 545     info->pim_value = 0xff;
 546
 547     info->p_dev = link;
 548     link->priv = info;
 549
 550     /* Initialize the struct pcmcia_device structure */
 551
 552     ret = mgslpc_config(link);
 553     if (ret)
 554             return ret;
 555
 556     mgslpc_add_device(info);
 557
 558     return 0;
 559 }
 560
 561 /* Card has been inserted.
 562  */
 563
 564 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
 565 {
 566         return pcmcia_request_io(p_dev);
 567 }
 568
 569 static int mgslpc_config(struct pcmcia_device *link)
 570 {
 571     MGSLPC_INFO *info = link->priv;
 572     int ret;
 573
 574     if (debug_level >= DEBUG_LEVEL_INFO)
 575             printk("mgslpc_config(0x%p)\n", link);
 576
 577     link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
 578
 579     ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
 580     if (ret != 0)
 581             goto failed;
 582
 583     link->config_index = 8;
 584     link->config_regs = PRESENT_OPTION;
 585
 586     ret = pcmcia_request_irq(link, mgslpc_isr);
 587     if (ret)
 588             goto failed;
 589     ret = pcmcia_enable_device(link);
 590     if (ret)
 591             goto failed;
 592
 593     info->io_base = link->resource[0]->start;
 594     info->irq_level = link->irq;
 595
 596     dev_info(&link->dev, "index 0x%02x:",
 597             link->config_index);
 598     printk(", irq %d", link->irq);
 599     if (link->resource[0])
 600             printk(", io %pR", link->resource[0]);
 601     printk("\n");
 602     return 0;
 603
 604 failed:
 605     mgslpc_release((u_long)link);
 606     return -ENODEV;
 607 }
 608
 609 /* Card has been removed.
 610  * Unregister device and release PCMCIA configuration.
 611  * If device is open, postpone until it is closed.
 612  */
 613 static void mgslpc_release(u_long arg)
 614 {
 615         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 616
 617         if (debug_level >= DEBUG_LEVEL_INFO)
 618                 printk("mgslpc_release(0x%p)\n", link);
 619
 620         pcmcia_disable_device(link);
 621 }
 622
 623 static void mgslpc_detach(struct pcmcia_device *link)
 624 {
 625         if (debug_level >= DEBUG_LEVEL_INFO)
 626                 printk("mgslpc_detach(0x%p)\n", link);
 627
 628         ((MGSLPC_INFO *)link->priv)->stop = 1;
 629         mgslpc_release((u_long)link);
 630
 631         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 632 }
 633
 634 static int mgslpc_suspend(struct pcmcia_device *link)
 635 {
 636         MGSLPC_INFO *info = link->priv;
 637
 638         info->stop = 1;
 639
 640         return 0;
 641 }
 642
 643 static int mgslpc_resume(struct pcmcia_device *link)
 644 {
 645         MGSLPC_INFO *info = link->priv;
 646
 647         info->stop = 0;
 648
 649         return 0;
 650 }
 651
 652
 653 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 654                                         char *name, const char *routine)
 655 {
 656 #ifdef MGSLPC_PARANOIA_CHECK
 657         static const char *badmagic =
 658                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 659         static const char *badinfo =
 660                 "Warning: null mgslpc_info for (%s) in %s\n";
 661
 662         if (!info) {
 663                 printk(badinfo, name, routine);
 664                 return true;
 665         }
 666         if (info->magic != MGSLPC_MAGIC) {
 667                 printk(badmagic, name, routine);
 668                 return true;
 669         }
 670 #else
 671         if (!info)
 672                 return true;
 673 #endif
 674         return false;
 675 }
 676
 677
 678 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 679 #define CMD_RXRESET     BIT6    // receiver reset
 680 #define CMD_RXFIFO_READ BIT5
 681 #define CMD_START_TIMER BIT4
 682 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 683 #define CMD_TXEOM       BIT1    // transmit end message
 684 #define CMD_TXRESET     BIT0    // transmit reset
 685
 686 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 687 {
 688         int i = 0;
 689         /* wait for command completion */
 690         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 691                 udelay(1);
 692                 if (i++ == 1000)
 693                         return false;
 694         }
 695         return true;
 696 }
 697
 698 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 699 {
 700         wait_command_complete(info, channel);
 701         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 702 }
 703
 704 static void tx_pause(struct tty_struct *tty)
 705 {
 706         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 707         unsigned long flags;
 708
 709         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 710                 return;
 711         if (debug_level >= DEBUG_LEVEL_INFO)
 712                 printk("tx_pause(%s)\n",info->device_name);
 713
 714         spin_lock_irqsave(&info->lock,flags);
 715         if (info->tx_enabled)
 716                 tx_stop(info);
 717         spin_unlock_irqrestore(&info->lock,flags);
 718 }
 719
 720 static void tx_release(struct tty_struct *tty)
 721 {
 722         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 723         unsigned long flags;
 724
 725         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 726                 return;
 727         if (debug_level >= DEBUG_LEVEL_INFO)
 728                 printk("tx_release(%s)\n",info->device_name);
 729
 730         spin_lock_irqsave(&info->lock,flags);
 731         if (!info->tx_enabled)
 732                 tx_start(info, tty);
 733         spin_unlock_irqrestore(&info->lock,flags);
 734 }
 735
 736 /* Return next bottom half action to perform.
 737  * or 0 if nothing to do.
 738  */
 739 static int bh_action(MGSLPC_INFO *info)
 740 {
 741         unsigned long flags;
 742         int rc = 0;
 743
 744         spin_lock_irqsave(&info->lock,flags);
 745
 746         if (info->pending_bh & BH_RECEIVE) {
 747                 info->pending_bh &= ~BH_RECEIVE;
 748                 rc = BH_RECEIVE;
 749         } else if (info->pending_bh & BH_TRANSMIT) {
 750                 info->pending_bh &= ~BH_TRANSMIT;
 751                 rc = BH_TRANSMIT;
 752         } else if (info->pending_bh & BH_STATUS) {
 753                 info->pending_bh &= ~BH_STATUS;
 754                 rc = BH_STATUS;
 755         }
 756
 757         if (!rc) {
 758                 /* Mark BH routine as complete */
 759                 info->bh_running = false;
 760                 info->bh_requested = false;
 761         }
 762
 763         spin_unlock_irqrestore(&info->lock,flags);
 764
 765         return rc;
 766 }
 767
 768 static void bh_handler(struct work_struct *work)
 769 {
 770         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 771         struct tty_struct *tty;
 772         int action;
 773
 774         if (!info)
 775                 return;
 776
 777         if (debug_level >= DEBUG_LEVEL_BH)
 778                 printk( "%s(%d):bh_handler(%s) entry\n",
 779                         __FILE__,__LINE__,info->device_name);
 780
 781         info->bh_running = true;
 782         tty = tty_port_tty_get(&info->port);
 783
 784         while((action = bh_action(info)) != 0) {
 785
 786                 /* Process work item */
 787                 if ( debug_level >= DEBUG_LEVEL_BH )
 788                         printk( "%s(%d):bh_handler() work item action=%d\n",
 789                                 __FILE__,__LINE__,action);
 790
 791                 switch (action) {
 792
 793                 case BH_RECEIVE:
 794                         while(rx_get_frame(info, tty));
 795                         break;
 796                 case BH_TRANSMIT:
 797                         bh_transmit(info, tty);
 798                         break;
 799                 case BH_STATUS:
 800                         bh_status(info);
 801                         break;
 802                 default:
 803                         /* unknown work item ID */
 804                         printk("Unknown work item ID=%08X!\n", action);
 805                         break;
 806                 }
 807         }
 808
 809         tty_kref_put(tty);
 810         if (debug_level >= DEBUG_LEVEL_BH)
 811                 printk( "%s(%d):bh_handler(%s) exit\n",
 812                         __FILE__,__LINE__,info->device_name);
 813 }
 814
 815 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 816 {
 817         if (debug_level >= DEBUG_LEVEL_BH)
 818                 printk("bh_transmit() entry on %s\n", info->device_name);
 819
 820         if (tty)
 821                 tty_wakeup(tty);
 822 }
 823
 824 static void bh_status(MGSLPC_INFO *info)
 825 {
 826         info->ri_chkcount = 0;
 827         info->dsr_chkcount = 0;
 828         info->dcd_chkcount = 0;
 829         info->cts_chkcount = 0;
 830 }
 831
 832 /* eom: non-zero = end of frame */
 833 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 834 {
 835         unsigned char data[2];
 836         unsigned char fifo_count, read_count, i;
 837         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 838
 839         if (debug_level >= DEBUG_LEVEL_ISR)
 840                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 841
 842         if (!info->rx_enabled)
 843                 return;
 844
 845         if (info->rx_frame_count >= info->rx_buf_count) {
 846                 /* no more free buffers */
 847                 issue_command(info, CHA, CMD_RXRESET);
 848                 info->pending_bh |= BH_RECEIVE;
 849                 info->rx_overflow = true;
 850                 info->icount.buf_overrun++;
 851                 return;
 852         }
 853
 854         if (eom) {
 855                 /* end of frame, get FIFO count from RBCL register */
 856                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 857                         fifo_count = 32;
 858         } else
 859                 fifo_count = 32;
 860
 861         do {
 862                 if (fifo_count == 1) {
 863                         read_count = 1;
 864                         data[0] = read_reg(info, CHA + RXFIFO);
 865                 } else {
 866                         read_count = 2;
 867                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 868                 }
 869                 fifo_count -= read_count;
 870                 if (!fifo_count && eom)
 871                         buf->status = data[--read_count];
 872
 873                 for (i = 0; i < read_count; i++) {
 874                         if (buf->count >= info->max_frame_size) {
 875                                 /* frame too large, reset receiver and reset current buffer */
 876                                 issue_command(info, CHA, CMD_RXRESET);
 877                                 buf->count = 0;
 878                                 return;
 879                         }
 880                         *(buf->data + buf->count) = data[i];
 881                         buf->count++;
 882                 }
 883         } while (fifo_count);
 884
 885         if (eom) {
 886                 info->pending_bh |= BH_RECEIVE;
 887                 info->rx_frame_count++;
 888                 info->rx_put++;
 889                 if (info->rx_put >= info->rx_buf_count)
 890                         info->rx_put = 0;
 891         }
 892         issue_command(info, CHA, CMD_RXFIFO);
 893 }
 894
 895 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
 896 {
 897         unsigned char data, status, flag;
 898         int fifo_count;
 899         int work = 0;
 900         struct mgsl_icount *icount = &info->icount;
 901
 902         if (tcd) {
 903                 /* early termination, get FIFO count from RBCL register */
 904                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 905
 906                 /* Zero fifo count could mean 0 or 32 bytes available.
 907                  * If BIT5 of STAR is set then at least 1 byte is available.
 908                  */
 909                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 910                         fifo_count = 32;
 911         } else
 912                 fifo_count = 32;
 913
 914         tty_buffer_request_room(tty, fifo_count);
 915         /* Flush received async data to receive data buffer. */
 916         while (fifo_count) {
 917                 data   = read_reg(info, CHA + RXFIFO);
 918                 status = read_reg(info, CHA + RXFIFO);
 919                 fifo_count -= 2;
 920
 921                 icount->rx++;
 922                 flag = TTY_NORMAL;
 923
 924                 // if no frameing/crc error then save data
 925                 // BIT7:parity error
 926                 // BIT6:framing error
 927
 928                 if (status & (BIT7 + BIT6)) {
 929                         if (status & BIT7)
 930                                 icount->parity++;
 931                         else
 932                                 icount->frame++;
 933
 934                         /* discard char if tty control flags say so */
 935                         if (status & info->ignore_status_mask)
 936                                 continue;
 937
 938                         status &= info->read_status_mask;
 939
 940                         if (status & BIT7)
 941                                 flag = TTY_PARITY;
 942                         else if (status & BIT6)
 943                                 flag = TTY_FRAME;
 944                 }
 945                 work += tty_insert_flip_char(tty, data, flag);
 946         }
 947         issue_command(info, CHA, CMD_RXFIFO);
 948
 949         if (debug_level >= DEBUG_LEVEL_ISR) {
 950                 printk("%s(%d):rx_ready_async",
 951                         __FILE__,__LINE__);
 952                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
 953                         __FILE__,__LINE__,icount->rx,icount->brk,
 954                         icount->parity,icount->frame,icount->overrun);
 955         }
 956
 957         if (work)
 958                 tty_flip_buffer_push(tty);
 959 }
 960
 961
 962 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
 963 {
 964         if (!info->tx_active)
 965                 return;
 966
 967         info->tx_active = false;
 968         info->tx_aborting = false;
 969
 970         if (info->params.mode == MGSL_MODE_ASYNC)
 971                 return;
 972
 973         info->tx_count = info->tx_put = info->tx_get = 0;
 974         del_timer(&info->tx_timer);
 975
 976         if (info->drop_rts_on_tx_done) {
 977                 get_signals(info);
 978                 if (info->serial_signals & SerialSignal_RTS) {
 979                         info->serial_signals &= ~SerialSignal_RTS;
 980                         set_signals(info);
 981                 }
 982                 info->drop_rts_on_tx_done = false;
 983         }
 984
 985 #if SYNCLINK_GENERIC_HDLC
 986         if (info->netcount)
 987                 hdlcdev_tx_done(info);
 988         else
 989 #endif
 990         {
 991                 if (tty->stopped || tty->hw_stopped) {
 992                         tx_stop(info);
 993                         return;
 994                 }
 995                 info->pending_bh |= BH_TRANSMIT;
 996         }
 997 }
 998
 999 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1000 {
1001         unsigned char fifo_count = 32;
1002         int c;
1003
1004         if (debug_level >= DEBUG_LEVEL_ISR)
1005                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1006
1007         if (info->params.mode == MGSL_MODE_HDLC) {
1008                 if (!info->tx_active)
1009                         return;
1010         } else {
1011                 if (tty->stopped || tty->hw_stopped) {
1012                         tx_stop(info);
1013                         return;
1014                 }
1015                 if (!info->tx_count)
1016                         info->tx_active = false;
1017         }
1018
1019         if (!info->tx_count)
1020                 return;
1021
1022         while (info->tx_count && fifo_count) {
1023                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1024
1025                 if (c == 1) {
1026                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1027                 } else {
1028                         write_reg16(info, CHA + TXFIFO,
1029                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1030                 }
1031                 info->tx_count -= c;
1032                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1033                 fifo_count -= c;
1034         }
1035
1036         if (info->params.mode == MGSL_MODE_ASYNC) {
1037                 if (info->tx_count < WAKEUP_CHARS)
1038                         info->pending_bh |= BH_TRANSMIT;
1039                 issue_command(info, CHA, CMD_TXFIFO);
1040         } else {
1041                 if (info->tx_count)
1042                         issue_command(info, CHA, CMD_TXFIFO);
1043                 else
1044                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1045         }
1046 }
1047
1048 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1049 {
1050         get_signals(info);
1051         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1052                 irq_disable(info, CHB, IRQ_CTS);
1053         info->icount.cts++;
1054         if (info->serial_signals & SerialSignal_CTS)
1055                 info->input_signal_events.cts_up++;
1056         else
1057                 info->input_signal_events.cts_down++;
1058         wake_up_interruptible(&info->status_event_wait_q);
1059         wake_up_interruptible(&info->event_wait_q);
1060
1061         if (info->port.flags & ASYNC_CTS_FLOW) {
1062                 if (tty->hw_stopped) {
1063                         if (info->serial_signals & SerialSignal_CTS) {
1064                                 if (debug_level >= DEBUG_LEVEL_ISR)
1065                                         printk("CTS tx start...");
1066                                 if (tty)
1067                                         tty->hw_stopped = 0;
1068                                 tx_start(info, tty);
1069                                 info->pending_bh |= BH_TRANSMIT;
1070                                 return;
1071                         }
1072                 } else {
1073                         if (!(info->serial_signals & SerialSignal_CTS)) {
1074                                 if (debug_level >= DEBUG_LEVEL_ISR)
1075                                         printk("CTS tx stop...");
1076                                 if (tty)
1077                                         tty->hw_stopped = 1;
1078                                 tx_stop(info);
1079                         }
1080                 }
1081         }
1082         info->pending_bh |= BH_STATUS;
1083 }
1084
1085 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1086 {
1087         get_signals(info);
1088         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1089                 irq_disable(info, CHB, IRQ_DCD);
1090         info->icount.dcd++;
1091         if (info->serial_signals & SerialSignal_DCD) {
1092                 info->input_signal_events.dcd_up++;
1093         }
1094         else
1095                 info->input_signal_events.dcd_down++;
1096 #if SYNCLINK_GENERIC_HDLC
1097         if (info->netcount) {
1098                 if (info->serial_signals & SerialSignal_DCD)
1099                         netif_carrier_on(info->netdev);
1100                 else
1101                         netif_carrier_off(info->netdev);
1102         }
1103 #endif
1104         wake_up_interruptible(&info->status_event_wait_q);
1105         wake_up_interruptible(&info->event_wait_q);
1106
1107         if (info->port.flags & ASYNC_CHECK_CD) {
1108                 if (debug_level >= DEBUG_LEVEL_ISR)
1109                         printk("%s CD now %s...", info->device_name,
1110                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1111                 if (info->serial_signals & SerialSignal_DCD)
1112                         wake_up_interruptible(&info->port.open_wait);
1113                 else {
1114                         if (debug_level >= DEBUG_LEVEL_ISR)
1115                                 printk("doing serial hangup...");
1116                         if (tty)
1117                                 tty_hangup(tty);
1118                 }
1119         }
1120         info->pending_bh |= BH_STATUS;
1121 }
1122
1123 static void dsr_change(MGSLPC_INFO *info)
1124 {
1125         get_signals(info);
1126         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1127                 port_irq_disable(info, PVR_DSR);
1128         info->icount.dsr++;
1129         if (info->serial_signals & SerialSignal_DSR)
1130                 info->input_signal_events.dsr_up++;
1131         else
1132                 info->input_signal_events.dsr_down++;
1133         wake_up_interruptible(&info->status_event_wait_q);
1134         wake_up_interruptible(&info->event_wait_q);
1135         info->pending_bh |= BH_STATUS;
1136 }
1137
1138 static void ri_change(MGSLPC_INFO *info)
1139 {
1140         get_signals(info);
1141         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1142                 port_irq_disable(info, PVR_RI);
1143         info->icount.rng++;
1144         if (info->serial_signals & SerialSignal_RI)
1145                 info->input_signal_events.ri_up++;
1146         else
1147                 info->input_signal_events.ri_down++;
1148         wake_up_interruptible(&info->status_event_wait_q);
1149         wake_up_interruptible(&info->event_wait_q);
1150         info->pending_bh |= BH_STATUS;
1151 }
1152
1153 /* Interrupt service routine entry point.
1154  *
1155  * Arguments:
1156  *
1157  * irq     interrupt number that caused interrupt
1158  * dev_id  device ID supplied during interrupt registration
1159  */
1160 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1161 {
1162         MGSLPC_INFO *info = dev_id;
1163         struct tty_struct *tty;
1164         unsigned short isr;
1165         unsigned char gis, pis;
1166         int count=0;
1167
1168         if (debug_level >= DEBUG_LEVEL_ISR)
1169                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1170
1171         if (!(info->p_dev->_locked))
1172                 return IRQ_HANDLED;
1173
1174         tty = tty_port_tty_get(&info->port);
1175
1176         spin_lock(&info->lock);
1177
1178         while ((gis = read_reg(info, CHA + GIS))) {
1179                 if (debug_level >= DEBUG_LEVEL_ISR)
1180                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1181
1182                 if ((gis & 0x70) || count > 1000) {
1183                         printk("synclink_cs:hardware failed or ejected\n");
1184                         break;
1185                 }
1186                 count++;
1187
1188                 if (gis & (BIT1 + BIT0)) {
1189                         isr = read_reg16(info, CHB + ISR);
1190                         if (isr & IRQ_DCD)
1191                                 dcd_change(info, tty);
1192                         if (isr & IRQ_CTS)
1193                                 cts_change(info, tty);
1194                 }
1195                 if (gis & (BIT3 + BIT2))
1196                 {
1197                         isr = read_reg16(info, CHA + ISR);
1198                         if (isr & IRQ_TIMER) {
1199                                 info->irq_occurred = true;
1200                                 irq_disable(info, CHA, IRQ_TIMER);
1201                         }
1202
1203                         /* receive IRQs */
1204                         if (isr & IRQ_EXITHUNT) {
1205                                 info->icount.exithunt++;
1206                                 wake_up_interruptible(&info->event_wait_q);
1207                         }
1208                         if (isr & IRQ_BREAK_ON) {
1209                                 info->icount.brk++;
1210                                 if (info->port.flags & ASYNC_SAK)
1211                                         do_SAK(tty);
1212                         }
1213                         if (isr & IRQ_RXTIME) {
1214                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1215                         }
1216                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1217                                 if (info->params.mode == MGSL_MODE_HDLC)
1218                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1219                                 else
1220                                         rx_ready_async(info, isr & IRQ_RXEOM, tty);
1221                         }
1222
1223                         /* transmit IRQs */
1224                         if (isr & IRQ_UNDERRUN) {
1225                                 if (info->tx_aborting)
1226                                         info->icount.txabort++;
1227                                 else
1228                                         info->icount.txunder++;
1229                                 tx_done(info, tty);
1230                         }
1231                         else if (isr & IRQ_ALLSENT) {
1232                                 info->icount.txok++;
1233                                 tx_done(info, tty);
1234                         }
1235                         else if (isr & IRQ_TXFIFO)
1236                                 tx_ready(info, tty);
1237                 }
1238                 if (gis & BIT7) {
1239                         pis = read_reg(info, CHA + PIS);
1240                         if (pis & BIT1)
1241                                 dsr_change(info);
1242                         if (pis & BIT2)
1243                                 ri_change(info);
1244                 }
1245         }
1246
1247         /* Request bottom half processing if there's something
1248          * for it to do and the bh is not already running
1249          */
1250
1251         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1252                 if ( debug_level >= DEBUG_LEVEL_ISR )
1253                         printk("%s(%d):%s queueing bh task.\n",
1254                                 __FILE__,__LINE__,info->device_name);
1255                 schedule_work(&info->task);
1256                 info->bh_requested = true;
1257         }
1258
1259         spin_unlock(&info->lock);
1260         tty_kref_put(tty);
1261
1262         if (debug_level >= DEBUG_LEVEL_ISR)
1263                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1264                        __FILE__, __LINE__, info->irq_level);
1265
1266         return IRQ_HANDLED;
1267 }
1268
1269 /* Initialize and start device.
1270  */
1271 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1272 {
1273         int retval = 0;
1274
1275         if (debug_level >= DEBUG_LEVEL_INFO)
1276                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1277
1278         if (info->port.flags & ASYNC_INITIALIZED)
1279                 return 0;
1280
1281         if (!info->tx_buf) {
1282                 /* allocate a page of memory for a transmit buffer */
1283                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1284                 if (!info->tx_buf) {
1285                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1286                                 __FILE__,__LINE__,info->device_name);
1287                         return -ENOMEM;
1288                 }
1289         }
1290
1291         info->pending_bh = 0;
1292
1293         memset(&info->icount, 0, sizeof(info->icount));
1294
1295         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1296
1297         /* Allocate and claim adapter resources */
1298         retval = claim_resources(info);
1299
1300         /* perform existance check and diagnostics */
1301         if ( !retval )
1302                 retval = adapter_test(info);
1303
1304         if ( retval ) {
1305                 if (capable(CAP_SYS_ADMIN) && tty)
1306                         set_bit(TTY_IO_ERROR, &tty->flags);
1307                 release_resources(info);
1308                 return retval;
1309         }
1310
1311         /* program hardware for current parameters */
1312         mgslpc_change_params(info, tty);
1313
1314         if (tty)
1315                 clear_bit(TTY_IO_ERROR, &tty->flags);
1316
1317         info->port.flags |= ASYNC_INITIALIZED;
1318
1319         return 0;
1320 }
1321
1322 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1323  */
1324 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1325 {
1326         unsigned long flags;
1327
1328         if (!(info->port.flags & ASYNC_INITIALIZED))
1329                 return;
1330
1331         if (debug_level >= DEBUG_LEVEL_INFO)
1332                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1333                          __FILE__,__LINE__, info->device_name );
1334
1335         /* clear status wait queue because status changes */
1336         /* can't happen after shutting down the hardware */
1337         wake_up_interruptible(&info->status_event_wait_q);
1338         wake_up_interruptible(&info->event_wait_q);
1339
1340         del_timer_sync(&info->tx_timer);
1341
1342         if (info->tx_buf) {
1343                 free_page((unsigned long) info->tx_buf);
1344                 info->tx_buf = NULL;
1345         }
1346
1347         spin_lock_irqsave(&info->lock,flags);
1348
1349         rx_stop(info);
1350         tx_stop(info);
1351
1352         /* TODO:disable interrupts instead of reset to preserve signal states */
1353         reset_device(info);
1354
1355         if (!tty || tty->termios->c_cflag & HUPCL) {
1356                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1357                 set_signals(info);
1358         }
1359
1360         spin_unlock_irqrestore(&info->lock,flags);
1361
1362         release_resources(info);
1363
1364         if (tty)
1365                 set_bit(TTY_IO_ERROR, &tty->flags);
1366
1367         info->port.flags &= ~ASYNC_INITIALIZED;
1368 }
1369
1370 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1371 {
1372         unsigned long flags;
1373
1374         spin_lock_irqsave(&info->lock,flags);
1375
1376         rx_stop(info);
1377         tx_stop(info);
1378         info->tx_count = info->tx_put = info->tx_get = 0;
1379
1380         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1381                 hdlc_mode(info);
1382         else
1383                 async_mode(info);
1384
1385         set_signals(info);
1386
1387         info->dcd_chkcount = 0;
1388         info->cts_chkcount = 0;
1389         info->ri_chkcount = 0;
1390         info->dsr_chkcount = 0;
1391
1392         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1393         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1394         get_signals(info);
1395
1396         if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1397                 rx_start(info);
1398
1399         spin_unlock_irqrestore(&info->lock,flags);
1400 }
1401
1402 /* Reconfigure adapter based on new parameters
1403  */
1404 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1405 {
1406         unsigned cflag;
1407         int bits_per_char;
1408
1409         if (!tty || !tty->termios)
1410                 return;
1411
1412         if (debug_level >= DEBUG_LEVEL_INFO)
1413                 printk("%s(%d):mgslpc_change_params(%s)\n",
1414                          __FILE__,__LINE__, info->device_name );
1415
1416         cflag = tty->termios->c_cflag;
1417
1418         /* if B0 rate (hangup) specified then negate DTR and RTS */
1419         /* otherwise assert DTR and RTS */
1420         if (cflag & CBAUD)
1421                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1422         else
1423                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1424
1425         /* byte size and parity */
1426
1427         switch (cflag & CSIZE) {
1428         case CS5: info->params.data_bits = 5; break;
1429         case CS6: info->params.data_bits = 6; break;
1430         case CS7: info->params.data_bits = 7; break;
1431         case CS8: info->params.data_bits = 8; break;
1432         default:  info->params.data_bits = 7; break;
1433         }
1434
1435         if (cflag & CSTOPB)
1436                 info->params.stop_bits = 2;
1437         else
1438                 info->params.stop_bits = 1;
1439
1440         info->params.parity = ASYNC_PARITY_NONE;
1441         if (cflag & PARENB) {
1442                 if (cflag & PARODD)
1443                         info->params.parity = ASYNC_PARITY_ODD;
1444                 else
1445                         info->params.parity = ASYNC_PARITY_EVEN;
1446 #ifdef CMSPAR
1447                 if (cflag & CMSPAR)
1448                         info->params.parity = ASYNC_PARITY_SPACE;
1449 #endif
1450         }
1451
1452         /* calculate number of jiffies to transmit a full
1453          * FIFO (32 bytes) at specified data rate
1454          */
1455         bits_per_char = info->params.data_bits +
1456                         info->params.stop_bits + 1;
1457
1458         /* if port data rate is set to 460800 or less then
1459          * allow tty settings to override, otherwise keep the
1460          * current data rate.
1461          */
1462         if (info->params.data_rate <= 460800) {
1463                 info->params.data_rate = tty_get_baud_rate(tty);
1464         }
1465
1466         if ( info->params.data_rate ) {
1467                 info->timeout = (32*HZ*bits_per_char) /
1468                                 info->params.data_rate;
1469         }
1470         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1471
1472         if (cflag & CRTSCTS)
1473                 info->port.flags |= ASYNC_CTS_FLOW;
1474         else
1475                 info->port.flags &= ~ASYNC_CTS_FLOW;
1476
1477         if (cflag & CLOCAL)
1478                 info->port.flags &= ~ASYNC_CHECK_CD;
1479         else
1480                 info->port.flags |= ASYNC_CHECK_CD;
1481
1482         /* process tty input control flags */
1483
1484         info->read_status_mask = 0;
1485         if (I_INPCK(tty))
1486                 info->read_status_mask |= BIT7 | BIT6;
1487         if (I_IGNPAR(tty))
1488                 info->ignore_status_mask |= BIT7 | BIT6;
1489
1490         mgslpc_program_hw(info, tty);
1491 }
1492
1493 /* Add a character to the transmit buffer
1494  */
1495 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1496 {
1497         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1498         unsigned long flags;
1499
1500         if (debug_level >= DEBUG_LEVEL_INFO) {
1501                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1502                         __FILE__,__LINE__,ch,info->device_name);
1503         }
1504
1505         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1506                 return 0;
1507
1508         if (!info->tx_buf)
1509                 return 0;
1510
1511         spin_lock_irqsave(&info->lock,flags);
1512
1513         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1514                 if (info->tx_count < TXBUFSIZE - 1) {
1515                         info->tx_buf[info->tx_put++] = ch;
1516                         info->tx_put &= TXBUFSIZE-1;
1517                         info->tx_count++;
1518                 }
1519         }
1520
1521         spin_unlock_irqrestore(&info->lock,flags);
1522         return 1;
1523 }
1524
1525 /* Enable transmitter so remaining characters in the
1526  * transmit buffer are sent.
1527  */
1528 static void mgslpc_flush_chars(struct tty_struct *tty)
1529 {
1530         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1531         unsigned long flags;
1532
1533         if (debug_level >= DEBUG_LEVEL_INFO)
1534                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1535                         __FILE__,__LINE__,info->device_name,info->tx_count);
1536
1537         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1538                 return;
1539
1540         if (info->tx_count <= 0 || tty->stopped ||
1541             tty->hw_stopped || !info->tx_buf)
1542                 return;
1543
1544         if (debug_level >= DEBUG_LEVEL_INFO)
1545                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1546                         __FILE__,__LINE__,info->device_name);
1547
1548         spin_lock_irqsave(&info->lock,flags);
1549         if (!info->tx_active)
1550                 tx_start(info, tty);
1551         spin_unlock_irqrestore(&info->lock,flags);
1552 }
1553
1554 /* Send a block of data
1555  *
1556  * Arguments:
1557  *
1558  * tty        pointer to tty information structure
1559  * buf        pointer to buffer containing send data
1560  * count      size of send data in bytes
1561  *
1562  * Returns: number of characters written
1563  */
1564 static int mgslpc_write(struct tty_struct * tty,
1565                         const unsigned char *buf, int count)
1566 {
1567         int c, ret = 0;
1568         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1569         unsigned long flags;
1570
1571         if (debug_level >= DEBUG_LEVEL_INFO)
1572                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1573                         __FILE__,__LINE__,info->device_name,count);
1574
1575         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1576                 !info->tx_buf)
1577                 goto cleanup;
1578
1579         if (info->params.mode == MGSL_MODE_HDLC) {
1580                 if (count > TXBUFSIZE) {
1581                         ret = -EIO;
1582                         goto cleanup;
1583                 }
1584                 if (info->tx_active)
1585                         goto cleanup;
1586                 else if (info->tx_count)
1587                         goto start;
1588         }
1589
1590         for (;;) {
1591                 c = min(count,
1592                         min(TXBUFSIZE - info->tx_count - 1,
1593                             TXBUFSIZE - info->tx_put));
1594                 if (c <= 0)
1595                         break;
1596
1597                 memcpy(info->tx_buf + info->tx_put, buf, c);
1598
1599                 spin_lock_irqsave(&info->lock,flags);
1600                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1601                 info->tx_count += c;
1602                 spin_unlock_irqrestore(&info->lock,flags);
1603
1604                 buf += c;
1605                 count -= c;
1606                 ret += c;
1607         }
1608 start:
1609         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1610                 spin_lock_irqsave(&info->lock,flags);
1611                 if (!info->tx_active)
1612                         tx_start(info, tty);
1613                 spin_unlock_irqrestore(&info->lock,flags);
1614         }
1615 cleanup:
1616         if (debug_level >= DEBUG_LEVEL_INFO)
1617                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1618                         __FILE__,__LINE__,info->device_name,ret);
1619         return ret;
1620 }
1621
1622 /* Return the count of free bytes in transmit buffer
1623  */
1624 static int mgslpc_write_room(struct tty_struct *tty)
1625 {
1626         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1627         int ret;
1628
1629         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1630                 return 0;
1631
1632         if (info->params.mode == MGSL_MODE_HDLC) {
1633                 /* HDLC (frame oriented) mode */
1634                 if (info->tx_active)
1635                         return 0;
1636                 else
1637                         return HDLC_MAX_FRAME_SIZE;
1638         } else {
1639                 ret = TXBUFSIZE - info->tx_count - 1;
1640                 if (ret < 0)
1641                         ret = 0;
1642         }
1643
1644         if (debug_level >= DEBUG_LEVEL_INFO)
1645                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1646                          __FILE__,__LINE__, info->device_name, ret);
1647         return ret;
1648 }
1649
1650 /* Return the count of bytes in transmit buffer
1651  */
1652 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1653 {
1654         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1655         int rc;
1656
1657         if (debug_level >= DEBUG_LEVEL_INFO)
1658                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1659                          __FILE__,__LINE__, info->device_name );
1660
1661         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1662                 return 0;
1663
1664         if (info->params.mode == MGSL_MODE_HDLC)
1665                 rc = info->tx_active ? info->max_frame_size : 0;
1666         else
1667                 rc = info->tx_count;
1668
1669         if (debug_level >= DEBUG_LEVEL_INFO)
1670                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1671                          __FILE__,__LINE__, info->device_name, rc);
1672
1673         return rc;
1674 }
1675
1676 /* Discard all data in the send buffer
1677  */
1678 static void mgslpc_flush_buffer(struct tty_struct *tty)
1679 {
1680         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1681         unsigned long flags;
1682
1683         if (debug_level >= DEBUG_LEVEL_INFO)
1684                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1685                          __FILE__,__LINE__, info->device_name );
1686
1687         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1688                 return;
1689
1690         spin_lock_irqsave(&info->lock,flags);
1691         info->tx_count = info->tx_put = info->tx_get = 0;
1692         del_timer(&info->tx_timer);
1693         spin_unlock_irqrestore(&info->lock,flags);
1694
1695         wake_up_interruptible(&tty->write_wait);
1696         tty_wakeup(tty);
1697 }
1698
1699 /* Send a high-priority XON/XOFF character
1700  */
1701 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1702 {
1703         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1704         unsigned long flags;
1705
1706         if (debug_level >= DEBUG_LEVEL_INFO)
1707                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1708                          __FILE__,__LINE__, info->device_name, ch );
1709
1710         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1711                 return;
1712
1713         info->x_char = ch;
1714         if (ch) {
1715                 spin_lock_irqsave(&info->lock,flags);
1716                 if (!info->tx_enabled)
1717                         tx_start(info, tty);
1718                 spin_unlock_irqrestore(&info->lock,flags);
1719         }
1720 }
1721
1722 /* Signal remote device to throttle send data (our receive data)
1723  */
1724 static void mgslpc_throttle(struct tty_struct * tty)
1725 {
1726         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1727         unsigned long flags;
1728
1729         if (debug_level >= DEBUG_LEVEL_INFO)
1730                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1731                          __FILE__,__LINE__, info->device_name );
1732
1733         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1734                 return;
1735
1736         if (I_IXOFF(tty))
1737                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1738
1739         if (tty->termios->c_cflag & CRTSCTS) {
1740                 spin_lock_irqsave(&info->lock,flags);
1741                 info->serial_signals &= ~SerialSignal_RTS;
1742                 set_signals(info);
1743                 spin_unlock_irqrestore(&info->lock,flags);
1744         }
1745 }
1746
1747 /* Signal remote device to stop throttling send data (our receive data)
1748  */
1749 static void mgslpc_unthrottle(struct tty_struct * tty)
1750 {
1751         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1752         unsigned long flags;
1753
1754         if (debug_level >= DEBUG_LEVEL_INFO)
1755                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1756                          __FILE__,__LINE__, info->device_name );
1757
1758         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1759                 return;
1760
1761         if (I_IXOFF(tty)) {
1762                 if (info->x_char)
1763                         info->x_char = 0;
1764                 else
1765                         mgslpc_send_xchar(tty, START_CHAR(tty));
1766         }
1767
1768         if (tty->termios->c_cflag & CRTSCTS) {
1769                 spin_lock_irqsave(&info->lock,flags);
1770                 info->serial_signals |= SerialSignal_RTS;
1771                 set_signals(info);
1772                 spin_unlock_irqrestore(&info->lock,flags);
1773         }
1774 }
1775
1776 /* get the current serial statistics
1777  */
1778 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1779 {
1780         int err;
1781         if (debug_level >= DEBUG_LEVEL_INFO)
1782                 printk("get_params(%s)\n", info->device_name);
1783         if (!user_icount) {
1784                 memset(&info->icount, 0, sizeof(info->icount));
1785         } else {
1786                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1787                 if (err)
1788                         return -EFAULT;
1789         }
1790         return 0;
1791 }
1792
1793 /* get the current serial parameters
1794  */
1795 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1796 {
1797         int err;
1798         if (debug_level >= DEBUG_LEVEL_INFO)
1799                 printk("get_params(%s)\n", info->device_name);
1800         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1801         if (err)
1802                 return -EFAULT;
1803         return 0;
1804 }
1805
1806 /* set the serial parameters
1807  *
1808  * Arguments:
1809  *
1810  *      info            pointer to device instance data
1811  *      new_params      user buffer containing new serial params
1812  *
1813  * Returns:     0 if success, otherwise error code
1814  */
1815 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1816 {
1817         unsigned long flags;
1818         MGSL_PARAMS tmp_params;
1819         int err;
1820
1821         if (debug_level >= DEBUG_LEVEL_INFO)
1822                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1823                         info->device_name );
1824         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1825         if (err) {
1826                 if ( debug_level >= DEBUG_LEVEL_INFO )
1827                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1828                                 __FILE__,__LINE__,info->device_name);
1829                 return -EFAULT;
1830         }
1831
1832         spin_lock_irqsave(&info->lock,flags);
1833         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1834         spin_unlock_irqrestore(&info->lock,flags);
1835
1836         mgslpc_change_params(info, tty);
1837
1838         return 0;
1839 }
1840
1841 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1842 {
1843         int err;
1844         if (debug_level >= DEBUG_LEVEL_INFO)
1845                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1846         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1847         if (err)
1848                 return -EFAULT;
1849         return 0;
1850 }
1851
1852 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1853 {
1854         unsigned long flags;
1855         if (debug_level >= DEBUG_LEVEL_INFO)
1856                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1857         spin_lock_irqsave(&info->lock,flags);
1858         info->idle_mode = idle_mode;
1859         tx_set_idle(info);
1860         spin_unlock_irqrestore(&info->lock,flags);
1861         return 0;
1862 }
1863
1864 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1865 {
1866         int err;
1867         if (debug_level >= DEBUG_LEVEL_INFO)
1868                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1869         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1870         if (err)
1871                 return -EFAULT;
1872         return 0;
1873 }
1874
1875 static int set_interface(MGSLPC_INFO * info, int if_mode)
1876 {
1877         unsigned long flags;
1878         unsigned char val;
1879         if (debug_level >= DEBUG_LEVEL_INFO)
1880                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1881         spin_lock_irqsave(&info->lock,flags);
1882         info->if_mode = if_mode;
1883
1884         val = read_reg(info, PVR) & 0x0f;
1885         switch (info->if_mode)
1886         {
1887         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1888         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1889         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1890         }
1891         write_reg(info, PVR, val);
1892
1893         spin_unlock_irqrestore(&info->lock,flags);
1894         return 0;
1895 }
1896
1897 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1898 {
1899         unsigned long flags;
1900
1901         if (debug_level >= DEBUG_LEVEL_INFO)
1902                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1903
1904         spin_lock_irqsave(&info->lock,flags);
1905         if (enable) {
1906                 if (!info->tx_enabled)
1907                         tx_start(info, tty);
1908         } else {
1909                 if (info->tx_enabled)
1910                         tx_stop(info);
1911         }
1912         spin_unlock_irqrestore(&info->lock,flags);
1913         return 0;
1914 }
1915
1916 static int tx_abort(MGSLPC_INFO * info)
1917 {
1918         unsigned long flags;
1919
1920         if (debug_level >= DEBUG_LEVEL_INFO)
1921                 printk("tx_abort(%s)\n", info->device_name);
1922
1923         spin_lock_irqsave(&info->lock,flags);
1924         if (info->tx_active && info->tx_count &&
1925             info->params.mode == MGSL_MODE_HDLC) {
1926                 /* clear data count so FIFO is not filled on next IRQ.
1927                  * This results in underrun and abort transmission.
1928                  */
1929                 info->tx_count = info->tx_put = info->tx_get = 0;
1930                 info->tx_aborting = true;
1931         }
1932         spin_unlock_irqrestore(&info->lock,flags);
1933         return 0;
1934 }
1935
1936 static int set_rxenable(MGSLPC_INFO * info, int enable)
1937 {
1938         unsigned long flags;
1939
1940         if (debug_level >= DEBUG_LEVEL_INFO)
1941                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1942
1943         spin_lock_irqsave(&info->lock,flags);
1944         if (enable) {
1945                 if (!info->rx_enabled)
1946                         rx_start(info);
1947         } else {
1948                 if (info->rx_enabled)
1949                         rx_stop(info);
1950         }
1951         spin_unlock_irqrestore(&info->lock,flags);
1952         return 0;
1953 }
1954
1955 /* wait for specified event to occur
1956  *
1957  * Arguments:           info    pointer to device instance data
1958  *                      mask    pointer to bitmask of events to wait for
1959  * Return Value:        0       if successful and bit mask updated with
1960  *                              of events triggerred,
1961  *                      otherwise error code
1962  */
1963 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1964 {
1965         unsigned long flags;
1966         int s;
1967         int rc=0;
1968         struct mgsl_icount cprev, cnow;
1969         int events;
1970         int mask;
1971         struct  _input_signal_events oldsigs, newsigs;
1972         DECLARE_WAITQUEUE(wait, current);
1973
1974         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1975         if (rc)
1976                 return  -EFAULT;
1977
1978         if (debug_level >= DEBUG_LEVEL_INFO)
1979                 printk("wait_events(%s,%d)\n", info->device_name, mask);
1980
1981         spin_lock_irqsave(&info->lock,flags);
1982
1983         /* return immediately if state matches requested events */
1984         get_signals(info);
1985         s = info->serial_signals;
1986         events = mask &
1987                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1988                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1989                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1990                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1991         if (events) {
1992                 spin_unlock_irqrestore(&info->lock,flags);
1993                 goto exit;
1994         }
1995
1996         /* save current irq counts */
1997         cprev = info->icount;
1998         oldsigs = info->input_signal_events;
1999
2000         if ((info->params.mode == MGSL_MODE_HDLC) &&
2001             (mask & MgslEvent_ExitHuntMode))
2002                 irq_enable(info, CHA, IRQ_EXITHUNT);
2003
2004         set_current_state(TASK_INTERRUPTIBLE);
2005         add_wait_queue(&info->event_wait_q, &wait);
2006
2007         spin_unlock_irqrestore(&info->lock,flags);
2008
2009
2010         for(;;) {
2011                 schedule();
2012                 if (signal_pending(current)) {
2013                         rc = -ERESTARTSYS;
2014                         break;
2015                 }
2016
2017                 /* get current irq counts */
2018                 spin_lock_irqsave(&info->lock,flags);
2019                 cnow = info->icount;
2020                 newsigs = info->input_signal_events;
2021                 set_current_state(TASK_INTERRUPTIBLE);
2022                 spin_unlock_irqrestore(&info->lock,flags);
2023
2024                 /* if no change, wait aborted for some reason */
2025                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2026                     newsigs.dsr_down == oldsigs.dsr_down &&
2027                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2028                     newsigs.dcd_down == oldsigs.dcd_down &&
2029                     newsigs.cts_up   == oldsigs.cts_up   &&
2030                     newsigs.cts_down == oldsigs.cts_down &&
2031                     newsigs.ri_up    == oldsigs.ri_up    &&
2032                     newsigs.ri_down  == oldsigs.ri_down  &&
2033                     cnow.exithunt    == cprev.exithunt   &&
2034                     cnow.rxidle      == cprev.rxidle) {
2035                         rc = -EIO;
2036                         break;
2037                 }
2038
2039                 events = mask &
2040                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2041                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2042                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2043                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2044                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2045                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2046                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2047                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2048                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2049                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2050                 if (events)
2051                         break;
2052
2053                 cprev = cnow;
2054                 oldsigs = newsigs;
2055         }
2056
2057         remove_wait_queue(&info->event_wait_q, &wait);
2058         set_current_state(TASK_RUNNING);
2059
2060         if (mask & MgslEvent_ExitHuntMode) {
2061                 spin_lock_irqsave(&info->lock,flags);
2062                 if (!waitqueue_active(&info->event_wait_q))
2063                         irq_disable(info, CHA, IRQ_EXITHUNT);
2064                 spin_unlock_irqrestore(&info->lock,flags);
2065         }
2066 exit:
2067         if (rc == 0)
2068                 PUT_USER(rc, events, mask_ptr);
2069         return rc;
2070 }
2071
2072 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2073 {
2074         unsigned long flags;
2075         int rc;
2076         struct mgsl_icount cprev, cnow;
2077         DECLARE_WAITQUEUE(wait, current);
2078
2079         /* save current irq counts */
2080         spin_lock_irqsave(&info->lock,flags);
2081         cprev = info->icount;
2082         add_wait_queue(&info->status_event_wait_q, &wait);
2083         set_current_state(TASK_INTERRUPTIBLE);
2084         spin_unlock_irqrestore(&info->lock,flags);
2085
2086         for(;;) {
2087                 schedule();
2088                 if (signal_pending(current)) {
2089                         rc = -ERESTARTSYS;
2090                         break;
2091                 }
2092
2093                 /* get new irq counts */
2094                 spin_lock_irqsave(&info->lock,flags);
2095                 cnow = info->icount;
2096                 set_current_state(TASK_INTERRUPTIBLE);
2097                 spin_unlock_irqrestore(&info->lock,flags);
2098
2099                 /* if no change, wait aborted for some reason */
2100                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2101                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2102                         rc = -EIO;
2103                         break;
2104                 }
2105
2106                 /* check for change in caller specified modem input */
2107                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2108                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2109                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2110                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2111                         rc = 0;
2112                         break;
2113                 }
2114
2115                 cprev = cnow;
2116         }
2117         remove_wait_queue(&info->status_event_wait_q, &wait);
2118         set_current_state(TASK_RUNNING);
2119         return rc;
2120 }
2121
2122 /* return the state of the serial control and status signals
2123  */
2124 static int tiocmget(struct tty_struct *tty, struct file *file)
2125 {
2126         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2127         unsigned int result;
2128         unsigned long flags;
2129
2130         spin_lock_irqsave(&info->lock,flags);
2131         get_signals(info);
2132         spin_unlock_irqrestore(&info->lock,flags);
2133
2134         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2135                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2136                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2137                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2138                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2139                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2140
2141         if (debug_level >= DEBUG_LEVEL_INFO)
2142                 printk("%s(%d):%s tiocmget() value=%08X\n",
2143                          __FILE__,__LINE__, info->device_name, result );
2144         return result;
2145 }
2146
2147 /* set modem control signals (DTR/RTS)
2148  */
2149 static int tiocmset(struct tty_struct *tty, struct file *file,
2150                     unsigned int set, unsigned int clear)
2151 {
2152         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2153         unsigned long flags;
2154
2155         if (debug_level >= DEBUG_LEVEL_INFO)
2156                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2157                         __FILE__,__LINE__,info->device_name, set, clear);
2158
2159         if (set & TIOCM_RTS)
2160                 info->serial_signals |= SerialSignal_RTS;
2161         if (set & TIOCM_DTR)
2162                 info->serial_signals |= SerialSignal_DTR;
2163         if (clear & TIOCM_RTS)
2164                 info->serial_signals &= ~SerialSignal_RTS;
2165         if (clear & TIOCM_DTR)
2166                 info->serial_signals &= ~SerialSignal_DTR;
2167
2168         spin_lock_irqsave(&info->lock,flags);
2169         set_signals(info);
2170         spin_unlock_irqrestore(&info->lock,flags);
2171
2172         return 0;
2173 }
2174
2175 /* Set or clear transmit break condition
2176  *
2177  * Arguments:           tty             pointer to tty instance data
2178  *                      break_state     -1=set break condition, 0=clear
2179  */
2180 static int mgslpc_break(struct tty_struct *tty, int break_state)
2181 {
2182         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2183         unsigned long flags;
2184
2185         if (debug_level >= DEBUG_LEVEL_INFO)
2186                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2187                          __FILE__,__LINE__, info->device_name, break_state);
2188
2189         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2190                 return -EINVAL;
2191
2192         spin_lock_irqsave(&info->lock,flags);
2193         if (break_state == -1)
2194                 set_reg_bits(info, CHA+DAFO, BIT6);
2195         else
2196                 clear_reg_bits(info, CHA+DAFO, BIT6);
2197         spin_unlock_irqrestore(&info->lock,flags);
2198         return 0;
2199 }
2200
2201 /* Service an IOCTL request
2202  *
2203  * Arguments:
2204  *
2205  *      tty     pointer to tty instance data
2206  *      file    pointer to associated file object for device
2207  *      cmd     IOCTL command code
2208  *      arg     command argument/context
2209  *
2210  * Return Value:        0 if success, otherwise error code
2211  */
2212 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2213                         unsigned int cmd, unsigned long arg)
2214 {
2215         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2216         int error;
2217         struct mgsl_icount cnow;        /* kernel counter temps */
2218         struct serial_icounter_struct __user *p_cuser;  /* user space */
2219         void __user *argp = (void __user *)arg;
2220         unsigned long flags;
2221
2222         if (debug_level >= DEBUG_LEVEL_INFO)
2223                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2224                         info->device_name, cmd );
2225
2226         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2227                 return -ENODEV;
2228
2229         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2230             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2231                 if (tty->flags & (1 << TTY_IO_ERROR))
2232                     return -EIO;
2233         }
2234
2235         switch (cmd) {
2236         case MGSL_IOCGPARAMS:
2237                 return get_params(info, argp);
2238         case MGSL_IOCSPARAMS:
2239                 return set_params(info, argp, tty);
2240         case MGSL_IOCGTXIDLE:
2241                 return get_txidle(info, argp);
2242         case MGSL_IOCSTXIDLE:
2243                 return set_txidle(info, (int)arg);
2244         case MGSL_IOCGIF:
2245                 return get_interface(info, argp);
2246         case MGSL_IOCSIF:
2247                 return set_interface(info,(int)arg);
2248         case MGSL_IOCTXENABLE:
2249                 return set_txenable(info,(int)arg, tty);
2250         case MGSL_IOCRXENABLE:
2251                 return set_rxenable(info,(int)arg);
2252         case MGSL_IOCTXABORT:
2253                 return tx_abort(info);
2254         case MGSL_IOCGSTATS:
2255                 return get_stats(info, argp);
2256         case MGSL_IOCWAITEVENT:
2257                 return wait_events(info, argp);
2258         case TIOCMIWAIT:
2259                 return modem_input_wait(info,(int)arg);
2260         case TIOCGICOUNT:
2261                 spin_lock_irqsave(&info->lock,flags);
2262                 cnow = info->icount;
2263                 spin_unlock_irqrestore(&info->lock,flags);
2264                 p_cuser = argp;
2265                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2266                 if (error) return error;
2267                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2268                 if (error) return error;
2269                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2270                 if (error) return error;
2271                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2272                 if (error) return error;
2273                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2274                 if (error) return error;
2275                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2276                 if (error) return error;
2277                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2278                 if (error) return error;
2279                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2280                 if (error) return error;
2281                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2282                 if (error) return error;
2283                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2284                 if (error) return error;
2285                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2286                 if (error) return error;
2287                 return 0;
2288         default:
2289                 return -ENOIOCTLCMD;
2290         }
2291         return 0;
2292 }
2293
2294 /* Set new termios settings
2295  *
2296  * Arguments:
2297  *
2298  *      tty             pointer to tty structure
2299  *      termios         pointer to buffer to hold returned old termios
2300  */
2301 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2302 {
2303         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2304         unsigned long flags;
2305
2306         if (debug_level >= DEBUG_LEVEL_INFO)
2307                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2308                         tty->driver->name );
2309
2310         /* just return if nothing has changed */
2311         if ((tty->termios->c_cflag == old_termios->c_cflag)
2312             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2313                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2314           return;
2315
2316         mgslpc_change_params(info, tty);
2317
2318         /* Handle transition to B0 status */
2319         if (old_termios->c_cflag & CBAUD &&
2320             !(tty->termios->c_cflag & CBAUD)) {
2321                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2322                 spin_lock_irqsave(&info->lock,flags);
2323                 set_signals(info);
2324                 spin_unlock_irqrestore(&info->lock,flags);
2325         }
2326
2327         /* Handle transition away from B0 status */
2328         if (!(old_termios->c_cflag & CBAUD) &&
2329             tty->termios->c_cflag & CBAUD) {
2330                 info->serial_signals |= SerialSignal_DTR;
2331                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2332                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2333                         info->serial_signals |= SerialSignal_RTS;
2334                 }
2335                 spin_lock_irqsave(&info->lock,flags);
2336                 set_signals(info);
2337                 spin_unlock_irqrestore(&info->lock,flags);
2338         }
2339
2340         /* Handle turning off CRTSCTS */
2341         if (old_termios->c_cflag & CRTSCTS &&
2342             !(tty->termios->c_cflag & CRTSCTS)) {
2343                 tty->hw_stopped = 0;
2344                 tx_release(tty);
2345         }
2346 }
2347
2348 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2349 {
2350         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2351         struct tty_port *port = &info->port;
2352
2353         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2354                 return;
2355
2356         if (debug_level >= DEBUG_LEVEL_INFO)
2357                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2358                          __FILE__,__LINE__, info->device_name, port->count);
2359
2360         WARN_ON(!port->count);
2361
2362         if (tty_port_close_start(port, tty, filp) == 0)
2363                 goto cleanup;
2364
2365         if (port->flags & ASYNC_INITIALIZED)
2366                 mgslpc_wait_until_sent(tty, info->timeout);
2367
2368         mgslpc_flush_buffer(tty);
2369
2370         tty_ldisc_flush(tty);
2371         shutdown(info, tty);
2372
2373         tty_port_close_end(port, tty);
2374         tty_port_tty_set(port, NULL);
2375 cleanup:
2376         if (debug_level >= DEBUG_LEVEL_INFO)
2377                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2378                         tty->driver->name, port->count);
2379 }
2380
2381 /* Wait until the transmitter is empty.
2382  */
2383 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2384 {
2385         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2386         unsigned long orig_jiffies, char_time;
2387
2388         if (!info )
2389                 return;
2390
2391         if (debug_level >= DEBUG_LEVEL_INFO)
2392                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2393                          __FILE__,__LINE__, info->device_name );
2394
2395         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2396                 return;
2397
2398         if (!(info->port.flags & ASYNC_INITIALIZED))
2399                 goto exit;
2400
2401         orig_jiffies = jiffies;
2402
2403         /* Set check interval to 1/5 of estimated time to
2404          * send a character, and make it at least 1. The check
2405          * interval should also be less than the timeout.
2406          * Note: use tight timings here to satisfy the NIST-PCTS.
2407          */
2408
2409         if ( info->params.data_rate ) {
2410                 char_time = info->timeout/(32 * 5);
2411                 if (!char_time)
2412                         char_time++;
2413         } else
2414                 char_time = 1;
2415
2416         if (timeout)
2417                 char_time = min_t(unsigned long, char_time, timeout);
2418
2419         if (info->params.mode == MGSL_MODE_HDLC) {
2420                 while (info->tx_active) {
2421                         msleep_interruptible(jiffies_to_msecs(char_time));
2422                         if (signal_pending(current))
2423                                 break;
2424                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2425                                 break;
2426                 }
2427         } else {
2428                 while ((info->tx_count || info->tx_active) &&
2429                         info->tx_enabled) {
2430                         msleep_interruptible(jiffies_to_msecs(char_time));
2431                         if (signal_pending(current))
2432                                 break;
2433                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2434                                 break;
2435                 }
2436         }
2437
2438 exit:
2439         if (debug_level >= DEBUG_LEVEL_INFO)
2440                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2441                          __FILE__,__LINE__, info->device_name );
2442 }
2443
2444 /* Called by tty_hangup() when a hangup is signaled.
2445  * This is the same as closing all open files for the port.
2446  */
2447 static void mgslpc_hangup(struct tty_struct *tty)
2448 {
2449         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2450
2451         if (debug_level >= DEBUG_LEVEL_INFO)
2452                 printk("%s(%d):mgslpc_hangup(%s)\n",
2453                          __FILE__,__LINE__, info->device_name );
2454
2455         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2456                 return;
2457
2458         mgslpc_flush_buffer(tty);
2459         shutdown(info, tty);
2460         tty_port_hangup(&info->port);
2461 }
2462
2463 static int carrier_raised(struct tty_port *port)
2464 {
2465         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2466         unsigned long flags;
2467
2468         spin_lock_irqsave(&info->lock,flags);
2469         get_signals(info);
2470         spin_unlock_irqrestore(&info->lock,flags);
2471
2472         if (info->serial_signals & SerialSignal_DCD)
2473                 return 1;
2474         return 0;
2475 }
2476
2477 static void dtr_rts(struct tty_port *port, int onoff)
2478 {
2479         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2480         unsigned long flags;
2481
2482         spin_lock_irqsave(&info->lock,flags);
2483         if (onoff)
2484                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2485         else
2486                 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2487         set_signals(info);
2488         spin_unlock_irqrestore(&info->lock,flags);
2489 }
2490
2491
2492 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2493 {
2494         MGSLPC_INFO     *info;
2495         struct tty_port *port;
2496         int                     retval, line;
2497         unsigned long flags;
2498
2499         /* verify range of specified line number */
2500         line = tty->index;
2501         if ((line < 0) || (line >= mgslpc_device_count)) {
2502                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2503                         __FILE__,__LINE__,line);
2504                 return -ENODEV;
2505         }
2506
2507         /* find the info structure for the specified line */
2508         info = mgslpc_device_list;
2509         while(info && info->line != line)
2510                 info = info->next_device;
2511         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2512                 return -ENODEV;
2513
2514         port = &info->port;
2515         tty->driver_data = info;
2516         tty_port_tty_set(port, tty);
2517
2518         if (debug_level >= DEBUG_LEVEL_INFO)
2519                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2520                          __FILE__,__LINE__,tty->driver->name, port->count);
2521
2522         /* If port is closing, signal caller to try again */
2523         if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2524                 if (port->flags & ASYNC_CLOSING)
2525                         interruptible_sleep_on(&port->close_wait);
2526                 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2527                         -EAGAIN : -ERESTARTSYS);
2528                 goto cleanup;
2529         }
2530
2531         tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2532
2533         spin_lock_irqsave(&info->netlock, flags);
2534         if (info->netcount) {
2535                 retval = -EBUSY;
2536                 spin_unlock_irqrestore(&info->netlock, flags);
2537                 goto cleanup;
2538         }
2539         spin_lock(&port->lock);
2540         port->count++;
2541         spin_unlock(&port->lock);
2542         spin_unlock_irqrestore(&info->netlock, flags);
2543
2544         if (port->count == 1) {
2545                 /* 1st open on this device, init hardware */
2546                 retval = startup(info, tty);
2547                 if (retval < 0)
2548                         goto cleanup;
2549         }
2550
2551         retval = tty_port_block_til_ready(&info->port, tty, filp);
2552         if (retval) {
2553                 if (debug_level >= DEBUG_LEVEL_INFO)
2554                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2555                                  __FILE__,__LINE__, info->device_name, retval);
2556                 goto cleanup;
2557         }
2558
2559         if (debug_level >= DEBUG_LEVEL_INFO)
2560                 printk("%s(%d):mgslpc_open(%s) success\n",
2561                          __FILE__,__LINE__, info->device_name);
2562         retval = 0;
2563
2564 cleanup:
2565         return retval;
2566 }
2567
2568 /*
2569  * /proc fs routines....
2570  */
2571
2572 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2573 {
2574         char    stat_buf[30];
2575         unsigned long flags;
2576
2577         seq_printf(m, "%s:io:%04X irq:%d",
2578                       info->device_name, info->io_base, info->irq_level);
2579
2580         /* output current serial signal states */
2581         spin_lock_irqsave(&info->lock,flags);
2582         get_signals(info);
2583         spin_unlock_irqrestore(&info->lock,flags);
2584
2585         stat_buf[0] = 0;
2586         stat_buf[1] = 0;
2587         if (info->serial_signals & SerialSignal_RTS)
2588                 strcat(stat_buf, "|RTS");
2589         if (info->serial_signals & SerialSignal_CTS)
2590                 strcat(stat_buf, "|CTS");
2591         if (info->serial_signals & SerialSignal_DTR)
2592                 strcat(stat_buf, "|DTR");
2593         if (info->serial_signals & SerialSignal_DSR)
2594                 strcat(stat_buf, "|DSR");
2595         if (info->serial_signals & SerialSignal_DCD)
2596                 strcat(stat_buf, "|CD");
2597         if (info->serial_signals & SerialSignal_RI)
2598                 strcat(stat_buf, "|RI");
2599
2600         if (info->params.mode == MGSL_MODE_HDLC) {
2601                 seq_printf(m, " HDLC txok:%d rxok:%d",
2602                               info->icount.txok, info->icount.rxok);
2603                 if (info->icount.txunder)
2604                         seq_printf(m, " txunder:%d", info->icount.txunder);
2605                 if (info->icount.txabort)
2606                         seq_printf(m, " txabort:%d", info->icount.txabort);
2607                 if (info->icount.rxshort)
2608                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2609                 if (info->icount.rxlong)
2610                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2611                 if (info->icount.rxover)
2612                         seq_printf(m, " rxover:%d", info->icount.rxover);
2613                 if (info->icount.rxcrc)
2614                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2615         } else {
2616                 seq_printf(m, " ASYNC tx:%d rx:%d",
2617                               info->icount.tx, info->icount.rx);
2618                 if (info->icount.frame)
2619                         seq_printf(m, " fe:%d", info->icount.frame);
2620                 if (info->icount.parity)
2621                         seq_printf(m, " pe:%d", info->icount.parity);
2622                 if (info->icount.brk)
2623                         seq_printf(m, " brk:%d", info->icount.brk);
2624                 if (info->icount.overrun)
2625                         seq_printf(m, " oe:%d", info->icount.overrun);
2626         }
2627
2628         /* Append serial signal status to end */
2629         seq_printf(m, " %s\n", stat_buf+1);
2630
2631         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2632                        info->tx_active,info->bh_requested,info->bh_running,
2633                        info->pending_bh);
2634 }
2635
2636 /* Called to print information about devices
2637  */
2638 static int mgslpc_proc_show(struct seq_file *m, void *v)
2639 {
2640         MGSLPC_INFO *info;
2641
2642         seq_printf(m, "synclink driver:%s\n", driver_version);
2643
2644         info = mgslpc_device_list;
2645         while( info ) {
2646                 line_info(m, info);
2647                 info = info->next_device;
2648         }
2649         return 0;
2650 }
2651
2652 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2653 {
2654         return single_open(file, mgslpc_proc_show, NULL);
2655 }
2656
2657 static const struct file_operations mgslpc_proc_fops = {
2658         .owner          = THIS_MODULE,
2659         .open           = mgslpc_proc_open,
2660         .read           = seq_read,
2661         .llseek         = seq_lseek,
2662         .release        = single_release,
2663 };
2664
2665 static int rx_alloc_buffers(MGSLPC_INFO *info)
2666 {
2667         /* each buffer has header and data */
2668         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2669
2670         /* calculate total allocation size for 8 buffers */
2671         info->rx_buf_total_size = info->rx_buf_size * 8;
2672
2673         /* limit total allocated memory */
2674         if (info->rx_buf_total_size > 0x10000)
2675                 info->rx_buf_total_size = 0x10000;
2676
2677         /* calculate number of buffers */
2678         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2679
2680         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2681         if (info->rx_buf == NULL)
2682                 return -ENOMEM;
2683
2684         rx_reset_buffers(info);
2685         return 0;
2686 }
2687
2688 static void rx_free_buffers(MGSLPC_INFO *info)
2689 {
2690         kfree(info->rx_buf);
2691         info->rx_buf = NULL;
2692 }
2693
2694 static int claim_resources(MGSLPC_INFO *info)
2695 {
2696         if (rx_alloc_buffers(info) < 0 ) {
2697                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2698                 release_resources(info);
2699                 return -ENODEV;
2700         }
2701         return 0;
2702 }
2703
2704 static void release_resources(MGSLPC_INFO *info)
2705 {
2706         if (debug_level >= DEBUG_LEVEL_INFO)
2707                 printk("release_resources(%s)\n", info->device_name);
2708         rx_free_buffers(info);
2709 }
2710
2711 /* Add the specified device instance data structure to the
2712  * global linked list of devices and increment the device count.
2713  *
2714  * Arguments:           info    pointer to device instance data
2715  */
2716 static void mgslpc_add_device(MGSLPC_INFO *info)
2717 {
2718         info->next_device = NULL;
2719         info->line = mgslpc_device_count;
2720         sprintf(info->device_name,"ttySLP%d",info->line);
2721
2722         if (info->line < MAX_DEVICE_COUNT) {
2723                 if (maxframe[info->line])
2724                         info->max_frame_size = maxframe[info->line];
2725         }
2726
2727         mgslpc_device_count++;
2728
2729         if (!mgslpc_device_list)
2730                 mgslpc_device_list = info;
2731         else {
2732                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2733                 while( current_dev->next_device )
2734                         current_dev = current_dev->next_device;
2735                 current_dev->next_device = info;
2736         }
2737
2738         if (info->max_frame_size < 4096)
2739                 info->max_frame_size = 4096;
2740         else if (info->max_frame_size > 65535)
2741                 info->max_frame_size = 65535;
2742
2743         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2744                 info->device_name, info->io_base, info->irq_level);
2745
2746 #if SYNCLINK_GENERIC_HDLC
2747         hdlcdev_init(info);
2748 #endif
2749 }
2750
2751 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2752 {
2753         MGSLPC_INFO *info = mgslpc_device_list;
2754         MGSLPC_INFO *last = NULL;
2755
2756         while(info) {
2757                 if (info == remove_info) {
2758                         if (last)
2759                                 last->next_device = info->next_device;
2760                         else
2761                                 mgslpc_device_list = info->next_device;
2762 #if SYNCLINK_GENERIC_HDLC
2763                         hdlcdev_exit(info);
2764 #endif
2765                         release_resources(info);
2766                         kfree(info);
2767                         mgslpc_device_count--;
2768                         return;
2769                 }
2770                 last = info;
2771                 info = info->next_device;
2772         }
2773 }
2774
2775 static struct pcmcia_device_id mgslpc_ids[] = {
2776         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2777         PCMCIA_DEVICE_NULL
2778 };
2779 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2780
2781 static struct pcmcia_driver mgslpc_driver = {
2782         .owner          = THIS_MODULE,
2783         .drv            = {
2784                 .name   = "synclink_cs",
2785         },
2786         .probe          = mgslpc_probe,
2787         .remove         = mgslpc_detach,
2788         .id_table       = mgslpc_ids,
2789         .suspend        = mgslpc_suspend,
2790         .resume         = mgslpc_resume,
2791 };
2792
2793 static const struct tty_operations mgslpc_ops = {
2794         .open = mgslpc_open,
2795         .close = mgslpc_close,
2796         .write = mgslpc_write,
2797         .put_char = mgslpc_put_char,
2798         .flush_chars = mgslpc_flush_chars,
2799         .write_room = mgslpc_write_room,
2800         .chars_in_buffer = mgslpc_chars_in_buffer,
2801         .flush_buffer = mgslpc_flush_buffer,
2802         .ioctl = mgslpc_ioctl,
2803         .throttle = mgslpc_throttle,
2804         .unthrottle = mgslpc_unthrottle,
2805         .send_xchar = mgslpc_send_xchar,
2806         .break_ctl = mgslpc_break,
2807         .wait_until_sent = mgslpc_wait_until_sent,
2808         .set_termios = mgslpc_set_termios,
2809         .stop = tx_pause,
2810         .start = tx_release,
2811         .hangup = mgslpc_hangup,
2812         .tiocmget = tiocmget,
2813         .tiocmset = tiocmset,
2814         .proc_fops = &mgslpc_proc_fops,
2815 };
2816
2817 static void synclink_cs_cleanup(void)
2818 {
2819         int rc;
2820
2821         printk("Unloading %s: version %s\n", driver_name, driver_version);
2822
2823         while(mgslpc_device_list)
2824                 mgslpc_remove_device(mgslpc_device_list);
2825
2826         if (serial_driver) {
2827                 if ((rc = tty_unregister_driver(serial_driver)))
2828                         printk("%s(%d) failed to unregister tty driver err=%d\n",
2829                                __FILE__,__LINE__,rc);
2830                 put_tty_driver(serial_driver);
2831         }
2832
2833         pcmcia_unregister_driver(&mgslpc_driver);
2834 }
2835
2836 static int __init synclink_cs_init(void)
2837 {
2838     int rc;
2839
2840     if (break_on_load) {
2841             mgslpc_get_text_ptr();
2842             BREAKPOINT();
2843     }
2844
2845     printk("%s %s\n", driver_name, driver_version);
2846
2847     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2848             return rc;
2849
2850     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2851     if (!serial_driver) {
2852             rc = -ENOMEM;
2853             goto error;
2854     }
2855
2856     /* Initialize the tty_driver structure */
2857
2858     serial_driver->owner = THIS_MODULE;
2859     serial_driver->driver_name = "synclink_cs";
2860     serial_driver->name = "ttySLP";
2861     serial_driver->major = ttymajor;
2862     serial_driver->minor_start = 64;
2863     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2864     serial_driver->subtype = SERIAL_TYPE_NORMAL;
2865     serial_driver->init_termios = tty_std_termios;
2866     serial_driver->init_termios.c_cflag =
2867             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2868     serial_driver->flags = TTY_DRIVER_REAL_RAW;
2869     tty_set_operations(serial_driver, &mgslpc_ops);
2870
2871     if ((rc = tty_register_driver(serial_driver)) < 0) {
2872             printk("%s(%d):Couldn't register serial driver\n",
2873                    __FILE__,__LINE__);
2874             put_tty_driver(serial_driver);
2875             serial_driver = NULL;
2876             goto error;
2877     }
2878
2879     printk("%s %s, tty major#%d\n",
2880            driver_name, driver_version,
2881            serial_driver->major);
2882
2883     return 0;
2884
2885 error:
2886     synclink_cs_cleanup();
2887     return rc;
2888 }
2889
2890 static void __exit synclink_cs_exit(void)
2891 {
2892         synclink_cs_cleanup();
2893 }
2894
2895 module_init(synclink_cs_init);
2896 module_exit(synclink_cs_exit);
2897
2898 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2899 {
2900         unsigned int M, N;
2901         unsigned char val;
2902
2903         /* note:standard BRG mode is broken in V3.2 chip
2904          * so enhanced mode is always used
2905          */
2906
2907         if (rate) {
2908                 N = 3686400 / rate;
2909                 if (!N)
2910                         N = 1;
2911                 N >>= 1;
2912                 for (M = 1; N > 64 && M < 16; M++)
2913                         N >>= 1;
2914                 N--;
2915
2916                 /* BGR[5..0] = N
2917                  * BGR[9..6] = M
2918                  * BGR[7..0] contained in BGR register
2919                  * BGR[9..8] contained in CCR2[7..6]
2920                  * divisor = (N+1)*2^M
2921                  *
2922                  * Note: M *must* not be zero (causes asymetric duty cycle)
2923                  */
2924                 write_reg(info, (unsigned char) (channel + BGR),
2925                                   (unsigned char) ((M << 6) + N));
2926                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2927                 val |= ((M << 4) & 0xc0);
2928                 write_reg(info, (unsigned char) (channel + CCR2), val);
2929         }
2930 }
2931
2932 /* Enabled the AUX clock output at the specified frequency.
2933  */
2934 static void enable_auxclk(MGSLPC_INFO *info)
2935 {
2936         unsigned char val;
2937
2938         /* MODE
2939          *
2940          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2941          * 05      ADM Address Mode, 0 = no addr recognition
2942          * 04      TMD Timer Mode, 0 = external
2943          * 03      RAC Receiver Active, 0 = inactive
2944          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2945          * 01      TRS Timer Resolution, 1=512
2946          * 00      TLP Test Loop, 0 = no loop
2947          *
2948          * 1000 0010
2949          */
2950         val = 0x82;
2951
2952         /* channel B RTS is used to enable AUXCLK driver on SP505 */
2953         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2954                 val |= BIT2;
2955         write_reg(info, CHB + MODE, val);
2956
2957         /* CCR0
2958          *
2959          * 07      PU Power Up, 1=active, 0=power down
2960          * 06      MCE Master Clock Enable, 1=enabled
2961          * 05      Reserved, 0
2962          * 04..02  SC[2..0] Encoding
2963          * 01..00  SM[1..0] Serial Mode, 00=HDLC
2964          *
2965          * 11000000
2966          */
2967         write_reg(info, CHB + CCR0, 0xc0);
2968
2969         /* CCR1
2970          *
2971          * 07      SFLG Shared Flag, 0 = disable shared flags
2972          * 06      GALP Go Active On Loop, 0 = not used
2973          * 05      GLP Go On Loop, 0 = not used
2974          * 04      ODS Output Driver Select, 1=TxD is push-pull output
2975          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2976          * 02..00  CM[2..0] Clock Mode
2977          *
2978          * 0001 0111
2979          */
2980         write_reg(info, CHB + CCR1, 0x17);
2981
2982         /* CCR2 (Channel B)
2983          *
2984          * 07..06  BGR[9..8] Baud rate bits 9..8
2985          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2986          * 04      SSEL Clock source select, 1=submode b
2987          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2988          * 02      RWX Read/Write Exchange 0=disabled
2989          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2990          * 00      DIV, data inversion 0=disabled, 1=enabled
2991          *
2992          * 0011 1000
2993          */
2994         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2995                 write_reg(info, CHB + CCR2, 0x38);
2996         else
2997                 write_reg(info, CHB + CCR2, 0x30);
2998
2999         /* CCR4
3000          *
3001          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3002          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3003          * 05      TST1 Test Pin, 0=normal operation
3004          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3005          * 03..02  Reserved, must be 0
3006          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3007          *
3008          * 0101 0000
3009          */
3010         write_reg(info, CHB + CCR4, 0x50);
3011
3012         /* if auxclk not enabled, set internal BRG so
3013          * CTS transitions can be detected (requires TxC)
3014          */
3015         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3016                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3017         else
3018                 mgslpc_set_rate(info, CHB, 921600);
3019 }
3020
3021 static void loopback_enable(MGSLPC_INFO *info)
3022 {
3023         unsigned char val;
3024
3025         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3026         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3027         write_reg(info, CHA + CCR1, val);
3028
3029         /* CCR2:04 SSEL Clock source select, 1=submode b */
3030         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3031         write_reg(info, CHA + CCR2, val);
3032
3033         /* set LinkSpeed if available, otherwise default to 2Mbps */
3034         if (info->params.clock_speed)
3035                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3036         else
3037                 mgslpc_set_rate(info, CHA, 1843200);
3038
3039         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3040         val = read_reg(info, CHA + MODE) | BIT0;
3041         write_reg(info, CHA + MODE, val);
3042 }
3043
3044 static void hdlc_mode(MGSLPC_INFO *info)
3045 {
3046         unsigned char val;
3047         unsigned char clkmode, clksubmode;
3048
3049         /* disable all interrupts */
3050         irq_disable(info, CHA, 0xffff);
3051         irq_disable(info, CHB, 0xffff);
3052         port_irq_disable(info, 0xff);
3053
3054         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3055         clkmode = clksubmode = 0;
3056         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3057             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3058                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3059                 clkmode = 7;
3060         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3061                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3062                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3063                 clkmode = 7;
3064                 clksubmode = 1;
3065         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3066                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3067                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3068                         clkmode = 6;
3069                         clksubmode = 1;
3070                 } else {
3071                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3072                         clkmode = 6;
3073                 }
3074         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3075                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3076                 clksubmode = 1;
3077         }
3078
3079         /* MODE
3080          *
3081          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3082          * 05      ADM Address Mode, 0 = no addr recognition
3083          * 04      TMD Timer Mode, 0 = external
3084          * 03      RAC Receiver Active, 0 = inactive
3085          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3086          * 01      TRS Timer Resolution, 1=512
3087          * 00      TLP Test Loop, 0 = no loop
3088          *
3089          * 1000 0010
3090          */
3091         val = 0x82;
3092         if (info->params.loopback)
3093                 val |= BIT0;
3094
3095         /* preserve RTS state */
3096         if (info->serial_signals & SerialSignal_RTS)
3097                 val |= BIT2;
3098         write_reg(info, CHA + MODE, val);
3099
3100         /* CCR0
3101          *
3102          * 07      PU Power Up, 1=active, 0=power down
3103          * 06      MCE Master Clock Enable, 1=enabled
3104          * 05      Reserved, 0
3105          * 04..02  SC[2..0] Encoding
3106          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3107          *
3108          * 11000000
3109          */
3110         val = 0xc0;
3111         switch (info->params.encoding)
3112         {
3113         case HDLC_ENCODING_NRZI:
3114                 val |= BIT3;
3115                 break;
3116         case HDLC_ENCODING_BIPHASE_SPACE:
3117                 val |= BIT4;
3118                 break;          // FM0
3119         case HDLC_ENCODING_BIPHASE_MARK:
3120                 val |= BIT4 + BIT2;
3121                 break;          // FM1
3122         case HDLC_ENCODING_BIPHASE_LEVEL:
3123                 val |= BIT4 + BIT3;
3124                 break;          // Manchester
3125         }
3126         write_reg(info, CHA + CCR0, val);
3127
3128         /* CCR1
3129          *
3130          * 07      SFLG Shared Flag, 0 = disable shared flags
3131          * 06      GALP Go Active On Loop, 0 = not used
3132          * 05      GLP Go On Loop, 0 = not used
3133          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3134          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3135          * 02..00  CM[2..0] Clock Mode
3136          *
3137          * 0001 0000
3138          */
3139         val = 0x10 + clkmode;
3140         write_reg(info, CHA + CCR1, val);
3141
3142         /* CCR2
3143          *
3144          * 07..06  BGR[9..8] Baud rate bits 9..8
3145          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3146          * 04      SSEL Clock source select, 1=submode b
3147          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3148          * 02      RWX Read/Write Exchange 0=disabled
3149          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3150          * 00      DIV, data inversion 0=disabled, 1=enabled
3151          *
3152          * 0000 0000
3153          */
3154         val = 0x00;
3155         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3156             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3157                 val |= BIT5;
3158         if (clksubmode)
3159                 val |= BIT4;
3160         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3161                 val |= BIT1;
3162         if (info->params.encoding == HDLC_ENCODING_NRZB)
3163                 val |= BIT0;
3164         write_reg(info, CHA + CCR2, val);
3165
3166         /* CCR3
3167          *
3168          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3169          * 05      EPT Enable preamble transmission, 1=enabled
3170          * 04      RADD Receive address pushed to FIFO, 0=disabled
3171          * 03      CRL CRC Reset Level, 0=FFFF
3172          * 02      RCRC Rx CRC 0=On 1=Off
3173          * 01      TCRC Tx CRC 0=On 1=Off
3174          * 00      PSD DPLL Phase Shift Disable
3175          *
3176          * 0000 0000
3177          */
3178         val = 0x00;
3179         if (info->params.crc_type == HDLC_CRC_NONE)
3180                 val |= BIT2 + BIT1;
3181         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3182                 val |= BIT5;
3183         switch (info->params.preamble_length)
3184         {
3185         case HDLC_PREAMBLE_LENGTH_16BITS:
3186                 val |= BIT6;
3187                 break;
3188         case HDLC_PREAMBLE_LENGTH_32BITS:
3189                 val |= BIT6;
3190                 break;
3191         case HDLC_PREAMBLE_LENGTH_64BITS:
3192                 val |= BIT7 + BIT6;
3193                 break;
3194         }
3195         write_reg(info, CHA + CCR3, val);
3196
3197         /* PRE - Preamble pattern */
3198         val = 0;
3199         switch (info->params.preamble)
3200         {
3201         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3202         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3203         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3204         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3205         }
3206         write_reg(info, CHA + PRE, val);
3207
3208         /* CCR4
3209          *
3210          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3211          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3212          * 05      TST1 Test Pin, 0=normal operation
3213          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3214          * 03..02  Reserved, must be 0
3215          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3216          *
3217          * 0101 0000
3218          */
3219         val = 0x50;
3220         write_reg(info, CHA + CCR4, val);
3221         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3222                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3223         else
3224                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3225
3226         /* RLCR Receive length check register
3227          *
3228          * 7     1=enable receive length check
3229          * 6..0  Max frame length = (RL + 1) * 32
3230          */
3231         write_reg(info, CHA + RLCR, 0);
3232
3233         /* XBCH Transmit Byte Count High
3234          *
3235          * 07      DMA mode, 0 = interrupt driven
3236          * 06      NRM, 0=ABM (ignored)
3237          * 05      CAS Carrier Auto Start
3238          * 04      XC Transmit Continuously (ignored)
3239          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3240          *
3241          * 0000 0000
3242          */
3243         val = 0x00;
3244         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3245                 val |= BIT5;
3246         write_reg(info, CHA + XBCH, val);
3247         enable_auxclk(info);
3248         if (info->params.loopback || info->testing_irq)
3249                 loopback_enable(info);
3250         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3251         {
3252                 irq_enable(info, CHB, IRQ_CTS);
3253                 /* PVR[3] 1=AUTO CTS active */
3254                 set_reg_bits(info, CHA + PVR, BIT3);
3255         } else
3256                 clear_reg_bits(info, CHA + PVR, BIT3);
3257
3258         irq_enable(info, CHA,
3259                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3260                          IRQ_UNDERRUN + IRQ_TXFIFO);
3261         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3262         wait_command_complete(info, CHA);
3263         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3264
3265         /* Master clock mode enabled above to allow reset commands
3266          * to complete even if no data clocks are present.
3267          *
3268          * Disable master clock mode for normal communications because
3269          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3270          * IRQ when in master clock mode.
3271          *
3272          * Leave master clock mode enabled for IRQ test because the
3273          * timer IRQ used by the test can only happen in master clock mode.
3274          */
3275         if (!info->testing_irq)
3276                 clear_reg_bits(info, CHA + CCR0, BIT6);
3277
3278         tx_set_idle(info);
3279
3280         tx_stop(info);
3281         rx_stop(info);
3282 }
3283
3284 static void rx_stop(MGSLPC_INFO *info)
3285 {
3286         if (debug_level >= DEBUG_LEVEL_ISR)
3287                 printk("%s(%d):rx_stop(%s)\n",
3288                          __FILE__,__LINE__, info->device_name );
3289
3290         /* MODE:03 RAC Receiver Active, 0=inactive */
3291         clear_reg_bits(info, CHA + MODE, BIT3);
3292
3293         info->rx_enabled = false;
3294         info->rx_overflow = false;
3295 }
3296
3297 static void rx_start(MGSLPC_INFO *info)
3298 {
3299         if (debug_level >= DEBUG_LEVEL_ISR)
3300                 printk("%s(%d):rx_start(%s)\n",
3301                          __FILE__,__LINE__, info->device_name );
3302
3303         rx_reset_buffers(info);
3304         info->rx_enabled = false;
3305         info->rx_overflow = false;
3306
3307         /* MODE:03 RAC Receiver Active, 1=active */
3308         set_reg_bits(info, CHA + MODE, BIT3);
3309
3310         info->rx_enabled = true;
3311 }
3312
3313 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3314 {
3315         if (debug_level >= DEBUG_LEVEL_ISR)
3316                 printk("%s(%d):tx_start(%s)\n",
3317                          __FILE__,__LINE__, info->device_name );
3318
3319         if (info->tx_count) {
3320                 /* If auto RTS enabled and RTS is inactive, then assert */
3321                 /* RTS and set a flag indicating that the driver should */
3322                 /* negate RTS when the transmission completes. */
3323                 info->drop_rts_on_tx_done = false;
3324
3325                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3326                         get_signals(info);
3327                         if (!(info->serial_signals & SerialSignal_RTS)) {
3328                                 info->serial_signals |= SerialSignal_RTS;
3329                                 set_signals(info);
3330                                 info->drop_rts_on_tx_done = true;
3331                         }
3332                 }
3333
3334                 if (info->params.mode == MGSL_MODE_ASYNC) {
3335                         if (!info->tx_active) {
3336                                 info->tx_active = true;
3337                                 tx_ready(info, tty);
3338                         }
3339                 } else {
3340                         info->tx_active = true;
3341                         tx_ready(info, tty);
3342                         mod_timer(&info->tx_timer, jiffies +
3343                                         msecs_to_jiffies(5000));
3344                 }
3345         }
3346
3347         if (!info->tx_enabled)
3348                 info->tx_enabled = true;
3349 }
3350
3351 static void tx_stop(MGSLPC_INFO *info)
3352 {
3353         if (debug_level >= DEBUG_LEVEL_ISR)
3354                 printk("%s(%d):tx_stop(%s)\n",
3355                          __FILE__,__LINE__, info->device_name );
3356
3357         del_timer(&info->tx_timer);
3358
3359         info->tx_enabled = false;
3360         info->tx_active = false;
3361 }
3362
3363 /* Reset the adapter to a known state and prepare it for further use.
3364  */
3365 static void reset_device(MGSLPC_INFO *info)
3366 {
3367         /* power up both channels (set BIT7) */
3368         write_reg(info, CHA + CCR0, 0x80);
3369         write_reg(info, CHB + CCR0, 0x80);
3370         write_reg(info, CHA + MODE, 0);
3371         write_reg(info, CHB + MODE, 0);
3372
3373         /* disable all interrupts */
3374         irq_disable(info, CHA, 0xffff);
3375         irq_disable(info, CHB, 0xffff);
3376         port_irq_disable(info, 0xff);
3377
3378         /* PCR Port Configuration Register
3379          *
3380          * 07..04  DEC[3..0] Serial I/F select outputs
3381          * 03      output, 1=AUTO CTS control enabled
3382          * 02      RI Ring Indicator input 0=active
3383          * 01      DSR input 0=active
3384          * 00      DTR output 0=active
3385          *
3386          * 0000 0110
3387          */
3388         write_reg(info, PCR, 0x06);
3389
3390         /* PVR Port Value Register
3391          *
3392          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3393          * 03      AUTO CTS output 1=enabled
3394          * 02      RI Ring Indicator input
3395          * 01      DSR input
3396          * 00      DTR output (1=inactive)
3397          *
3398          * 0000 0001
3399          */
3400 //      write_reg(info, PVR, PVR_DTR);
3401
3402         /* IPC Interrupt Port Configuration
3403          *
3404          * 07      VIS 1=Masked interrupts visible
3405          * 06..05  Reserved, 0
3406          * 04..03  SLA Slave address, 00 ignored
3407          * 02      CASM Cascading Mode, 1=daisy chain
3408          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3409          *
3410          * 0000 0101
3411          */
3412         write_reg(info, IPC, 0x05);
3413 }
3414
3415 static void async_mode(MGSLPC_INFO *info)
3416 {
3417         unsigned char val;
3418
3419         /* disable all interrupts */
3420         irq_disable(info, CHA, 0xffff);
3421         irq_disable(info, CHB, 0xffff);
3422         port_irq_disable(info, 0xff);
3423
3424         /* MODE
3425          *
3426          * 07      Reserved, 0
3427          * 06      FRTS RTS State, 0=active
3428          * 05      FCTS Flow Control on CTS
3429          * 04      FLON Flow Control Enable
3430          * 03      RAC Receiver Active, 0 = inactive
3431          * 02      RTS 0=Auto RTS, 1=manual RTS
3432          * 01      TRS Timer Resolution, 1=512
3433          * 00      TLP Test Loop, 0 = no loop
3434          *
3435          * 0000 0110
3436          */
3437         val = 0x06;
3438         if (info->params.loopback)
3439                 val |= BIT0;
3440
3441         /* preserve RTS state */
3442         if (!(info->serial_signals & SerialSignal_RTS))
3443                 val |= BIT6;
3444         write_reg(info, CHA + MODE, val);
3445
3446         /* CCR0
3447          *
3448          * 07      PU Power Up, 1=active, 0=power down
3449          * 06      MCE Master Clock Enable, 1=enabled
3450          * 05      Reserved, 0
3451          * 04..02  SC[2..0] Encoding, 000=NRZ
3452          * 01..00  SM[1..0] Serial Mode, 11=Async
3453          *
3454          * 1000 0011
3455          */
3456         write_reg(info, CHA + CCR0, 0x83);
3457
3458         /* CCR1
3459          *
3460          * 07..05  Reserved, 0
3461          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3462          * 03      BCR Bit Clock Rate, 1=16x
3463          * 02..00  CM[2..0] Clock Mode, 111=BRG
3464          *
3465          * 0001 1111
3466          */
3467         write_reg(info, CHA + CCR1, 0x1f);
3468
3469         /* CCR2 (channel A)
3470          *
3471          * 07..06  BGR[9..8] Baud rate bits 9..8
3472          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3473          * 04      SSEL Clock source select, 1=submode b
3474          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3475          * 02      RWX Read/Write Exchange 0=disabled
3476          * 01      Reserved, 0
3477          * 00      DIV, data inversion 0=disabled, 1=enabled
3478          *
3479          * 0001 0000
3480          */
3481         write_reg(info, CHA + CCR2, 0x10);
3482
3483         /* CCR3
3484          *
3485          * 07..01  Reserved, 0
3486          * 00      PSD DPLL Phase Shift Disable
3487          *
3488          * 0000 0000
3489          */
3490         write_reg(info, CHA + CCR3, 0);
3491
3492         /* CCR4
3493          *
3494          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3495          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3496          * 05      TST1 Test Pin, 0=normal operation
3497          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3498          * 03..00  Reserved, must be 0
3499          *
3500          * 0101 0000
3501          */
3502         write_reg(info, CHA + CCR4, 0x50);
3503         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3504
3505         /* DAFO Data Format
3506          *
3507          * 07      Reserved, 0
3508          * 06      XBRK transmit break, 0=normal operation
3509          * 05      Stop bits (0=1, 1=2)
3510          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3511          * 02      PAREN Parity Enable
3512          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3513          *
3514          */
3515         val = 0x00;
3516         if (info->params.data_bits != 8)
3517                 val |= BIT0;    /* 7 bits */
3518         if (info->params.stop_bits != 1)
3519                 val |= BIT5;
3520         if (info->params.parity != ASYNC_PARITY_NONE)
3521         {
3522                 val |= BIT2;    /* Parity enable */
3523                 if (info->params.parity == ASYNC_PARITY_ODD)
3524                         val |= BIT3;
3525                 else
3526                         val |= BIT4;
3527         }
3528         write_reg(info, CHA + DAFO, val);
3529
3530         /* RFC Rx FIFO Control
3531          *
3532          * 07      Reserved, 0
3533          * 06      DPS, 1=parity bit not stored in data byte
3534          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3535          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3536          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3537          * 01      Reserved, 0
3538          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3539          *
3540          * 0101 1100
3541          */
3542         write_reg(info, CHA + RFC, 0x5c);
3543
3544         /* RLCR Receive length check register
3545          *
3546          * Max frame length = (RL + 1) * 32
3547          */
3548         write_reg(info, CHA + RLCR, 0);
3549
3550         /* XBCH Transmit Byte Count High
3551          *
3552          * 07      DMA mode, 0 = interrupt driven
3553          * 06      NRM, 0=ABM (ignored)
3554          * 05      CAS Carrier Auto Start
3555          * 04      XC Transmit Continuously (ignored)
3556          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3557          *
3558          * 0000 0000
3559          */
3560         val = 0x00;
3561         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3562                 val |= BIT5;
3563         write_reg(info, CHA + XBCH, val);
3564         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3565                 irq_enable(info, CHA, IRQ_CTS);
3566
3567         /* MODE:03 RAC Receiver Active, 1=active */
3568         set_reg_bits(info, CHA + MODE, BIT3);
3569         enable_auxclk(info);
3570         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3571                 irq_enable(info, CHB, IRQ_CTS);
3572                 /* PVR[3] 1=AUTO CTS active */
3573                 set_reg_bits(info, CHA + PVR, BIT3);
3574         } else
3575                 clear_reg_bits(info, CHA + PVR, BIT3);
3576         irq_enable(info, CHA,
3577                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3578                           IRQ_ALLSENT + IRQ_TXFIFO);
3579         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3580         wait_command_complete(info, CHA);
3581         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3582 }
3583
3584 /* Set the HDLC idle mode for the transmitter.
3585  */
3586 static void tx_set_idle(MGSLPC_INFO *info)
3587 {
3588         /* Note: ESCC2 only supports flags and one idle modes */
3589         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3590                 set_reg_bits(info, CHA + CCR1, BIT3);
3591         else
3592                 clear_reg_bits(info, CHA + CCR1, BIT3);
3593 }
3594
3595 /* get state of the V24 status (input) signals.
3596  */
3597 static void get_signals(MGSLPC_INFO *info)
3598 {
3599         unsigned char status = 0;
3600
3601         /* preserve DTR and RTS */
3602         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3603
3604         if (read_reg(info, CHB + VSTR) & BIT7)
3605                 info->serial_signals |= SerialSignal_DCD;
3606         if (read_reg(info, CHB + STAR) & BIT1)
3607                 info->serial_signals |= SerialSignal_CTS;
3608
3609         status = read_reg(info, CHA + PVR);
3610         if (!(status & PVR_RI))
3611                 info->serial_signals |= SerialSignal_RI;
3612         if (!(status & PVR_DSR))
3613                 info->serial_signals |= SerialSignal_DSR;
3614 }
3615
3616 /* Set the state of DTR and RTS based on contents of
3617  * serial_signals member of device extension.
3618  */
3619 static void set_signals(MGSLPC_INFO *info)
3620 {
3621         unsigned char val;
3622
3623         val = read_reg(info, CHA + MODE);
3624         if (info->params.mode == MGSL_MODE_ASYNC) {
3625                 if (info->serial_signals & SerialSignal_RTS)
3626                         val &= ~BIT6;
3627                 else
3628                         val |= BIT6;
3629         } else {
3630                 if (info->serial_signals & SerialSignal_RTS)
3631                         val |= BIT2;
3632                 else
3633                         val &= ~BIT2;
3634         }
3635         write_reg(info, CHA + MODE, val);
3636
3637         if (info->serial_signals & SerialSignal_DTR)
3638                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3639         else
3640                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3641 }
3642
3643 static void rx_reset_buffers(MGSLPC_INFO *info)
3644 {
3645         RXBUF *buf;
3646         int i;
3647
3648         info->rx_put = 0;
3649         info->rx_get = 0;
3650         info->rx_frame_count = 0;
3651         for (i=0 ; i < info->rx_buf_count ; i++) {
3652                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3653                 buf->status = buf->count = 0;
3654         }
3655 }
3656
3657 /* Attempt to return a received HDLC frame
3658  * Only frames received without errors are returned.
3659  *
3660  * Returns true if frame returned, otherwise false
3661  */
3662 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3663 {
3664         unsigned short status;
3665         RXBUF *buf;
3666         unsigned int framesize = 0;
3667         unsigned long flags;
3668         bool return_frame = false;
3669
3670         if (info->rx_frame_count == 0)
3671                 return false;
3672
3673         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3674
3675         status = buf->status;
3676
3677         /* 07  VFR  1=valid frame
3678          * 06  RDO  1=data overrun
3679          * 05  CRC  1=OK, 0=error
3680          * 04  RAB  1=frame aborted
3681          */
3682         if ((status & 0xf0) != 0xA0) {
3683                 if (!(status & BIT7) || (status & BIT4))
3684                         info->icount.rxabort++;
3685                 else if (status & BIT6)
3686                         info->icount.rxover++;
3687                 else if (!(status & BIT5)) {
3688                         info->icount.rxcrc++;
3689                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3690                                 return_frame = true;
3691                 }
3692                 framesize = 0;
3693 #if SYNCLINK_GENERIC_HDLC
3694                 {
3695                         info->netdev->stats.rx_errors++;
3696                         info->netdev->stats.rx_frame_errors++;
3697                 }
3698 #endif
3699         } else
3700                 return_frame = true;
3701
3702         if (return_frame)
3703                 framesize = buf->count;
3704
3705         if (debug_level >= DEBUG_LEVEL_BH)
3706                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3707                         __FILE__,__LINE__,info->device_name,status,framesize);
3708
3709         if (debug_level >= DEBUG_LEVEL_DATA)
3710                 trace_block(info, buf->data, framesize, 0);
3711
3712         if (framesize) {
3713                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3714                       framesize+1 > info->max_frame_size) ||
3715                     framesize > info->max_frame_size)
3716                         info->icount.rxlong++;
3717                 else {
3718                         if (status & BIT5)
3719                                 info->icount.rxok++;
3720
3721                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3722                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3723                                 ++framesize;
3724                         }
3725
3726 #if SYNCLINK_GENERIC_HDLC
3727                         if (info->netcount)
3728                                 hdlcdev_rx(info, buf->data, framesize);
3729                         else
3730 #endif
3731                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3732                 }
3733         }
3734
3735         spin_lock_irqsave(&info->lock,flags);
3736         buf->status = buf->count = 0;
3737         info->rx_frame_count--;
3738         info->rx_get++;
3739         if (info->rx_get >= info->rx_buf_count)
3740                 info->rx_get = 0;
3741         spin_unlock_irqrestore(&info->lock,flags);
3742
3743         return true;
3744 }
3745
3746 static bool register_test(MGSLPC_INFO *info)
3747 {
3748         static unsigned char patterns[] =
3749             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3750         static unsigned int count = ARRAY_SIZE(patterns);
3751         unsigned int i;
3752         bool rc = true;
3753         unsigned long flags;
3754
3755         spin_lock_irqsave(&info->lock,flags);
3756         reset_device(info);
3757
3758         for (i = 0; i < count; i++) {
3759                 write_reg(info, XAD1, patterns[i]);
3760                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3761                 if ((read_reg(info, XAD1) != patterns[i]) ||
3762                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3763                         rc = false;
3764                         break;
3765                 }
3766         }
3767
3768         spin_unlock_irqrestore(&info->lock,flags);
3769         return rc;
3770 }
3771
3772 static bool irq_test(MGSLPC_INFO *info)
3773 {
3774         unsigned long end_time;
3775         unsigned long flags;
3776
3777         spin_lock_irqsave(&info->lock,flags);
3778         reset_device(info);
3779
3780         info->testing_irq = true;
3781         hdlc_mode(info);
3782
3783         info->irq_occurred = false;
3784
3785         /* init hdlc mode */
3786
3787         irq_enable(info, CHA, IRQ_TIMER);
3788         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3789         issue_command(info, CHA, CMD_START_TIMER);
3790
3791         spin_unlock_irqrestore(&info->lock,flags);
3792
3793         end_time=100;
3794         while(end_time-- && !info->irq_occurred) {
3795                 msleep_interruptible(10);
3796         }
3797
3798         info->testing_irq = false;
3799
3800         spin_lock_irqsave(&info->lock,flags);
3801         reset_device(info);
3802         spin_unlock_irqrestore(&info->lock,flags);
3803
3804         return info->irq_occurred;
3805 }
3806
3807 static int adapter_test(MGSLPC_INFO *info)
3808 {
3809         if (!register_test(info)) {
3810                 info->init_error = DiagStatus_AddressFailure;
3811                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3812                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3813                 return -ENODEV;
3814         }
3815
3816         if (!irq_test(info)) {
3817                 info->init_error = DiagStatus_IrqFailure;
3818                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3819                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3820                 return -ENODEV;
3821         }
3822
3823         if (debug_level >= DEBUG_LEVEL_INFO)
3824                 printk("%s(%d):device %s passed diagnostics\n",
3825                         __FILE__,__LINE__,info->device_name);
3826         return 0;
3827 }
3828
3829 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3830 {
3831         int i;
3832         int linecount;
3833         if (xmit)
3834                 printk("%s tx data:\n",info->device_name);
3835         else
3836                 printk("%s rx data:\n",info->device_name);
3837
3838         while(count) {
3839                 if (count > 16)
3840                         linecount = 16;
3841                 else
3842                         linecount = count;
3843
3844                 for(i=0;i<linecount;i++)
3845                         printk("%02X ",(unsigned char)data[i]);
3846                 for(;i<17;i++)
3847                         printk("   ");
3848                 for(i=0;i<linecount;i++) {
3849                         if (data[i]>=040 && data[i]<=0176)
3850                                 printk("%c",data[i]);
3851                         else
3852                                 printk(".");
3853                 }
3854                 printk("\n");
3855
3856                 data  += linecount;
3857                 count -= linecount;
3858         }
3859 }
3860
3861 /* HDLC frame time out
3862  * update stats and do tx completion processing
3863  */
3864 static void tx_timeout(unsigned long context)
3865 {
3866         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3867         unsigned long flags;
3868
3869         if ( debug_level >= DEBUG_LEVEL_INFO )
3870                 printk( "%s(%d):tx_timeout(%s)\n",
3871                         __FILE__,__LINE__,info->device_name);
3872         if(info->tx_active &&
3873            info->params.mode == MGSL_MODE_HDLC) {
3874                 info->icount.txtimeout++;
3875         }
3876         spin_lock_irqsave(&info->lock,flags);
3877         info->tx_active = false;
3878         info->tx_count = info->tx_put = info->tx_get = 0;
3879
3880         spin_unlock_irqrestore(&info->lock,flags);
3881
3882 #if SYNCLINK_GENERIC_HDLC
3883         if (info->netcount)
3884                 hdlcdev_tx_done(info);
3885         else
3886 #endif
3887         {
3888                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3889                 bh_transmit(info, tty);
3890                 tty_kref_put(tty);
3891         }
3892 }
3893
3894 #if SYNCLINK_GENERIC_HDLC
3895
3896 /**
3897  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3898  * set encoding and frame check sequence (FCS) options
3899  *
3900  * dev       pointer to network device structure
3901  * encoding  serial encoding setting
3902  * parity    FCS setting
3903  *
3904  * returns 0 if success, otherwise error code
3905  */
3906 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3907                           unsigned short parity)
3908 {
3909         MGSLPC_INFO *info = dev_to_port(dev);
3910         struct tty_struct *tty;
3911         unsigned char  new_encoding;
3912         unsigned short new_crctype;
3913
3914         /* return error if TTY interface open */
3915         if (info->port.count)
3916                 return -EBUSY;
3917
3918         switch (encoding)
3919         {
3920         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3921         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3922         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3923         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3924         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3925         default: return -EINVAL;
3926         }
3927
3928         switch (parity)
3929         {
3930         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3931         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3932         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3933         default: return -EINVAL;
3934         }
3935
3936         info->params.encoding = new_encoding;
3937         info->params.crc_type = new_crctype;
3938
3939         /* if network interface up, reprogram hardware */
3940         if (info->netcount) {
3941                 tty = tty_port_tty_get(&info->port);
3942                 mgslpc_program_hw(info, tty);
3943                 tty_kref_put(tty);
3944         }
3945
3946         return 0;
3947 }
3948
3949 /**
3950  * called by generic HDLC layer to send frame
3951  *
3952  * skb  socket buffer containing HDLC frame
3953  * dev  pointer to network device structure
3954  */
3955 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3956                                       struct net_device *dev)
3957 {
3958         MGSLPC_INFO *info = dev_to_port(dev);
3959         unsigned long flags;
3960
3961         if (debug_level >= DEBUG_LEVEL_INFO)
3962                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3963
3964         /* stop sending until this frame completes */
3965         netif_stop_queue(dev);
3966
3967         /* copy data to device buffers */
3968         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3969         info->tx_get = 0;
3970         info->tx_put = info->tx_count = skb->len;
3971
3972         /* update network statistics */
3973         dev->stats.tx_packets++;
3974         dev->stats.tx_bytes += skb->len;
3975
3976         /* done with socket buffer, so free it */
3977         dev_kfree_skb(skb);
3978
3979         /* save start time for transmit timeout detection */
3980         dev->trans_start = jiffies;
3981
3982         /* start hardware transmitter if necessary */
3983         spin_lock_irqsave(&info->lock,flags);
3984         if (!info->tx_active) {
3985                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3986                 tx_start(info, tty);
3987                 tty_kref_put(tty);
3988         }
3989         spin_unlock_irqrestore(&info->lock,flags);
3990
3991         return NETDEV_TX_OK;
3992 }
3993
3994 /**
3995  * called by network layer when interface enabled
3996  * claim resources and initialize hardware
3997  *
3998  * dev  pointer to network device structure
3999  *
4000  * returns 0 if success, otherwise error code
4001  */
4002 static int hdlcdev_open(struct net_device *dev)
4003 {
4004         MGSLPC_INFO *info = dev_to_port(dev);
4005         struct tty_struct *tty;
4006         int rc;
4007         unsigned long flags;
4008
4009         if (debug_level >= DEBUG_LEVEL_INFO)
4010                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4011
4012         /* generic HDLC layer open processing */
4013         if ((rc = hdlc_open(dev)))
4014                 return rc;
4015
4016         /* arbitrate between network and tty opens */
4017         spin_lock_irqsave(&info->netlock, flags);
4018         if (info->port.count != 0 || info->netcount != 0) {
4019                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4020                 spin_unlock_irqrestore(&info->netlock, flags);
4021                 return -EBUSY;
4022         }
4023         info->netcount=1;
4024         spin_unlock_irqrestore(&info->netlock, flags);
4025
4026         tty = tty_port_tty_get(&info->port);
4027         /* claim resources and init adapter */
4028         if ((rc = startup(info, tty)) != 0) {
4029                 tty_kref_put(tty);
4030                 spin_lock_irqsave(&info->netlock, flags);
4031                 info->netcount=0;
4032                 spin_unlock_irqrestore(&info->netlock, flags);
4033                 return rc;
4034         }
4035         /* assert DTR and RTS, apply hardware settings */
4036         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4037         mgslpc_program_hw(info, tty);
4038         tty_kref_put(tty);
4039
4040         /* enable network layer transmit */
4041         dev->trans_start = jiffies;
4042         netif_start_queue(dev);
4043
4044         /* inform generic HDLC layer of current DCD status */
4045         spin_lock_irqsave(&info->lock, flags);
4046         get_signals(info);
4047         spin_unlock_irqrestore(&info->lock, flags);
4048         if (info->serial_signals & SerialSignal_DCD)
4049                 netif_carrier_on(dev);
4050         else
4051                 netif_carrier_off(dev);
4052         return 0;
4053 }
4054
4055 /**
4056  * called by network layer when interface is disabled
4057  * shutdown hardware and release resources
4058  *
4059  * dev  pointer to network device structure
4060  *
4061  * returns 0 if success, otherwise error code
4062  */
4063 static int hdlcdev_close(struct net_device *dev)
4064 {
4065         MGSLPC_INFO *info = dev_to_port(dev);
4066         struct tty_struct *tty = tty_port_tty_get(&info->port);
4067         unsigned long flags;
4068
4069         if (debug_level >= DEBUG_LEVEL_INFO)
4070                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4071
4072         netif_stop_queue(dev);
4073
4074         /* shutdown adapter and release resources */
4075         shutdown(info, tty);
4076         tty_kref_put(tty);
4077         hdlc_close(dev);
4078
4079         spin_lock_irqsave(&info->netlock, flags);
4080         info->netcount=0;
4081         spin_unlock_irqrestore(&info->netlock, flags);
4082
4083         return 0;
4084 }
4085
4086 /**
4087  * called by network layer to process IOCTL call to network device
4088  *
4089  * dev  pointer to network device structure
4090  * ifr  pointer to network interface request structure
4091  * cmd  IOCTL command code
4092  *
4093  * returns 0 if success, otherwise error code
4094  */
4095 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4096 {
4097         const size_t size = sizeof(sync_serial_settings);
4098         sync_serial_settings new_line;
4099         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4100         MGSLPC_INFO *info = dev_to_port(dev);
4101         unsigned int flags;
4102
4103         if (debug_level >= DEBUG_LEVEL_INFO)
4104                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4105
4106         /* return error if TTY interface open */
4107         if (info->port.count)
4108                 return -EBUSY;
4109
4110         if (cmd != SIOCWANDEV)
4111                 return hdlc_ioctl(dev, ifr, cmd);
4112
4113         switch(ifr->ifr_settings.type) {
4114         case IF_GET_IFACE: /* return current sync_serial_settings */
4115
4116                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4117                 if (ifr->ifr_settings.size < size) {
4118                         ifr->ifr_settings.size = size; /* data size wanted */
4119                         return -ENOBUFS;
4120                 }
4121
4122                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4123                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4124                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4125                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4126
4127                 switch (flags){
4128                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4129                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4130                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4131                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4132                 default: new_line.clock_type = CLOCK_DEFAULT;
4133                 }
4134
4135                 new_line.clock_rate = info->params.clock_speed;
4136                 new_line.loopback   = info->params.loopback ? 1:0;
4137
4138                 if (copy_to_user(line, &new_line, size))
4139                         return -EFAULT;
4140                 return 0;
4141
4142         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4143
4144                 if(!capable(CAP_NET_ADMIN))
4145                         return -EPERM;
4146                 if (copy_from_user(&new_line, line, size))
4147                         return -EFAULT;
4148
4149                 switch (new_line.clock_type)
4150                 {
4151                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4152                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4153                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4154                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4155                 case CLOCK_DEFAULT:  flags = info->params.flags &
4156                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4157                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4158                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4159                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4160                 default: return -EINVAL;
4161                 }
4162
4163                 if (new_line.loopback != 0 && new_line.loopback != 1)
4164                         return -EINVAL;
4165
4166                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4167                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4168                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4169                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4170                 info->params.flags |= flags;
4171
4172                 info->params.loopback = new_line.loopback;
4173
4174                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4175                         info->params.clock_speed = new_line.clock_rate;
4176                 else
4177                         info->params.clock_speed = 0;
4178
4179                 /* if network interface up, reprogram hardware */
4180                 if (info->netcount) {
4181                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4182                         mgslpc_program_hw(info, tty);
4183                         tty_kref_put(tty);
4184                 }
4185                 return 0;
4186
4187         default:
4188                 return hdlc_ioctl(dev, ifr, cmd);
4189         }
4190 }
4191
4192 /**
4193  * called by network layer when transmit timeout is detected
4194  *
4195  * dev  pointer to network device structure
4196  */
4197 static void hdlcdev_tx_timeout(struct net_device *dev)
4198 {
4199         MGSLPC_INFO *info = dev_to_port(dev);
4200         unsigned long flags;
4201
4202         if (debug_level >= DEBUG_LEVEL_INFO)
4203                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4204
4205         dev->stats.tx_errors++;
4206         dev->stats.tx_aborted_errors++;
4207
4208         spin_lock_irqsave(&info->lock,flags);
4209         tx_stop(info);
4210         spin_unlock_irqrestore(&info->lock,flags);
4211
4212         netif_wake_queue(dev);
4213 }
4214
4215 /**
4216  * called by device driver when transmit completes
4217  * reenable network layer transmit if stopped
4218  *
4219  * info  pointer to device instance information
4220  */
4221 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4222 {
4223         if (netif_queue_stopped(info->netdev))
4224                 netif_wake_queue(info->netdev);
4225 }
4226
4227 /**
4228  * called by device driver when frame received
4229  * pass frame to network layer
4230  *
4231  * info  pointer to device instance information
4232  * buf   pointer to buffer contianing frame data
4233  * size  count of data bytes in buf
4234  */
4235 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4236 {
4237         struct sk_buff *skb = dev_alloc_skb(size);
4238         struct net_device *dev = info->netdev;
4239
4240         if (debug_level >= DEBUG_LEVEL_INFO)
4241                 printk("hdlcdev_rx(%s)\n",dev->name);
4242
4243         if (skb == NULL) {
4244                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4245                 dev->stats.rx_dropped++;
4246                 return;
4247         }
4248
4249         memcpy(skb_put(skb, size), buf, size);
4250
4251         skb->protocol = hdlc_type_trans(skb, dev);
4252
4253         dev->stats.rx_packets++;
4254         dev->stats.rx_bytes += size;
4255
4256         netif_rx(skb);
4257 }
4258
4259 static const struct net_device_ops hdlcdev_ops = {
4260         .ndo_open       = hdlcdev_open,
4261         .ndo_stop       = hdlcdev_close,
4262         .ndo_change_mtu = hdlc_change_mtu,
4263         .ndo_start_xmit = hdlc_start_xmit,
4264         .ndo_do_ioctl   = hdlcdev_ioctl,
4265         .ndo_tx_timeout = hdlcdev_tx_timeout,
4266 };
4267
4268 /**
4269  * called by device driver when adding device instance
4270  * do generic HDLC initialization
4271  *
4272  * info  pointer to device instance information
4273  *
4274  * returns 0 if success, otherwise error code
4275  */
4276 static int hdlcdev_init(MGSLPC_INFO *info)
4277 {
4278         int rc;
4279         struct net_device *dev;
4280         hdlc_device *hdlc;
4281
4282         /* allocate and initialize network and HDLC layer objects */
4283
4284         if (!(dev = alloc_hdlcdev(info))) {
4285                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4286                 return -ENOMEM;
4287         }
4288
4289         /* for network layer reporting purposes only */
4290         dev->base_addr = info->io_base;
4291         dev->irq       = info->irq_level;
4292
4293         /* network layer callbacks and settings */
4294         dev->netdev_ops     = &hdlcdev_ops;
4295         dev->watchdog_timeo = 10 * HZ;
4296         dev->tx_queue_len   = 50;
4297
4298         /* generic HDLC layer callbacks and settings */
4299         hdlc         = dev_to_hdlc(dev);
4300         hdlc->attach = hdlcdev_attach;
4301         hdlc->xmit   = hdlcdev_xmit;
4302
4303         /* register objects with HDLC layer */
4304         if ((rc = register_hdlc_device(dev))) {
4305                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4306                 free_netdev(dev);
4307                 return rc;
4308         }
4309
4310         info->netdev = dev;
4311         return 0;
4312 }
4313
4314 /**
4315  * called by device driver when removing device instance
4316  * do generic HDLC cleanup
4317  *
4318  * info  pointer to device instance information
4319  */
4320 static void hdlcdev_exit(MGSLPC_INFO *info)
4321 {
4322         unregister_hdlc_device(info->netdev);
4323         free_netdev(info->netdev);
4324         info->netdev = NULL;
4325 }
4326
4327 #endif /* CONFIG_HDLC */
4328