drivers/char/drm/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /**************************************************************************
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  **************************************************************************/
  29
  30 #include "drmP.h"
  31 #include "drm.h"
  32 #include "i915_drm.h"
  33 #include "i915_drv.h"
  34
  35 /* Really want an OS-independent resettable timer.  Would like to have
  36  * this loop run for (eg) 3 sec, but have the timer reset every time
  37  * the head pointer changes, so that EBUSY only happens if the ring
  38  * actually stalls for (eg) 3 seconds.
  39  */
  40 int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
  41 {
  42         drm_i915_private_t *dev_priv = dev->dev_private;
  43         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  44         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  45         int i;
  46
  47         for (i = 0; i < 10000; i++) {
  48                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  49                 ring->space = ring->head - (ring->tail + 8);
  50                 if (ring->space < 0)
  51                         ring->space += ring->Size;
  52                 if (ring->space >= n)
  53                         return 0;
  54
  55                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  56
  57                 if (ring->head != last_head)
  58                         i = 0;
  59
  60                 last_head = ring->head;
  61         }
  62
  63         return DRM_ERR(EBUSY);
  64 }
  65
  66 void i915_kernel_lost_context(drm_device_t * dev)
  67 {
  68         drm_i915_private_t *dev_priv = dev->dev_private;
  69         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  70
  71         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  72         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  73         ring->space = ring->head - (ring->tail + 8);
  74         if (ring->space < 0)
  75                 ring->space += ring->Size;
  76
  77         if (ring->head == ring->tail)
  78                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  79 }
  80
  81 static int i915_dma_cleanup(drm_device_t * dev)
  82 {
  83         /* Make sure interrupts are disabled here because the uninstall ioctl
  84          * may not have been called from userspace and after dev_private
  85          * is freed, it's too late.
  86          */
  87         if (dev->irq)
  88                 drm_irq_uninstall(dev);
  89
  90         if (dev->dev_private) {
  91                 drm_i915_private_t *dev_priv =
  92                     (drm_i915_private_t *) dev->dev_private;
  93
  94                 if (dev_priv->ring.virtual_start) {
  95                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
  96                 }
  97
  98                 if (dev_priv->status_page_dmah) {
  99                         drm_pci_free(dev, dev_priv->status_page_dmah);
 100                         /* Need to rewrite hardware status page */
 101                         I915_WRITE(0x02080, 0x1ffff000);
 102                 }
 103
 104                 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
 105                          DRM_MEM_DRIVER);
 106
 107                 dev->dev_private = NULL;
 108         }
 109
 110         return 0;
 111 }
 112
 113 static int i915_initialize(drm_device_t * dev,
 114                            drm_i915_private_t * dev_priv,
 115                            drm_i915_init_t * init)
 116 {
 117         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 118
 119         DRM_GETSAREA();
 120         if (!dev_priv->sarea) {
 121                 DRM_ERROR("can not find sarea!\n");
 122                 dev->dev_private = (void *)dev_priv;
 123                 i915_dma_cleanup(dev);
 124                 return DRM_ERR(EINVAL);
 125         }
 126
 127         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 128         if (!dev_priv->mmio_map) {
 129                 dev->dev_private = (void *)dev_priv;
 130                 i915_dma_cleanup(dev);
 131                 DRM_ERROR("can not find mmio map!\n");
 132                 return DRM_ERR(EINVAL);
 133         }
 134
 135         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 136             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 137
 138         dev_priv->ring.Start = init->ring_start;
 139         dev_priv->ring.End = init->ring_end;
 140         dev_priv->ring.Size = init->ring_size;
 141         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 142
 143         dev_priv->ring.map.offset = init->ring_start;
 144         dev_priv->ring.map.size = init->ring_size;
 145         dev_priv->ring.map.type = 0;
 146         dev_priv->ring.map.flags = 0;
 147         dev_priv->ring.map.mtrr = 0;
 148
 149         drm_core_ioremap(&dev_priv->ring.map, dev);
 150
 151         if (dev_priv->ring.map.handle == NULL) {
 152                 dev->dev_private = (void *)dev_priv;
 153                 i915_dma_cleanup(dev);
 154                 DRM_ERROR("can not ioremap virtual address for"
 155                           " ring buffer\n");
 156                 return DRM_ERR(ENOMEM);
 157         }
 158
 159         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 160
 161         dev_priv->back_offset = init->back_offset;
 162         dev_priv->front_offset = init->front_offset;
 163         dev_priv->current_page = 0;
 164         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 165
 166         /* We are using separate values as placeholders for mechanisms for
 167          * private backbuffer/depthbuffer usage.
 168          */
 169         dev_priv->use_mi_batchbuffer_start = 0;
 170
 171         /* Allow hardware batchbuffers unless told otherwise.
 172          */
 173         dev_priv->allow_batchbuffer = 1;
 174
 175         /* Program Hardware Status Page */
 176         dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,
 177                                                    0xffffffff);
 178
 179         if (!dev_priv->status_page_dmah) {
 180                 dev->dev_private = (void *)dev_priv;
 181                 i915_dma_cleanup(dev);
 182                 DRM_ERROR("Can not allocate hardware status page\n");
 183                 return DRM_ERR(ENOMEM);
 184         }
 185         dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 186         dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 187
 188         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 189         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 190
 191         I915_WRITE(0x02080, dev_priv->dma_status_page);
 192         DRM_DEBUG("Enabled hardware status page\n");
 193
 194         dev->dev_private = (void *)dev_priv;
 195
 196         return 0;
 197 }
 198
 199 static int i915_resume(drm_device_t * dev)
 200 {
 201         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 202
 203         DRM_DEBUG("%s\n", __FUNCTION__);
 204
 205         if (!dev_priv->sarea) {
 206                 DRM_ERROR("can not find sarea!\n");
 207                 return DRM_ERR(EINVAL);
 208         }
 209
 210         if (!dev_priv->mmio_map) {
 211                 DRM_ERROR("can not find mmio map!\n");
 212                 return DRM_ERR(EINVAL);
 213         }
 214
 215         if (dev_priv->ring.map.handle == NULL) {
 216                 DRM_ERROR("can not ioremap virtual address for"
 217                           " ring buffer\n");
 218                 return DRM_ERR(ENOMEM);
 219         }
 220
 221         /* Program Hardware Status Page */
 222         if (!dev_priv->hw_status_page) {
 223                 DRM_ERROR("Can not find hardware status page\n");
 224                 return DRM_ERR(EINVAL);
 225         }
 226         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 227
 228         I915_WRITE(0x02080, dev_priv->dma_status_page);
 229         DRM_DEBUG("Enabled hardware status page\n");
 230
 231         return 0;
 232 }
 233
 234 static int i915_dma_init(DRM_IOCTL_ARGS)
 235 {
 236         DRM_DEVICE;
 237         drm_i915_private_t *dev_priv;
 238         drm_i915_init_t init;
 239         int retcode = 0;
 240
 241         DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
 242                                  sizeof(init));
 243
 244         switch (init.func) {
 245         case I915_INIT_DMA:
 246                 dev_priv = drm_alloc(sizeof(drm_i915_private_t),
 247                                      DRM_MEM_DRIVER);
 248                 if (dev_priv == NULL)
 249                         return DRM_ERR(ENOMEM);
 250                 retcode = i915_initialize(dev, dev_priv, &init);
 251                 break;
 252         case I915_CLEANUP_DMA:
 253                 retcode = i915_dma_cleanup(dev);
 254                 break;
 255         case I915_RESUME_DMA:
 256                 retcode = i915_resume(dev);
 257                 break;
 258         default:
 259                 retcode = -EINVAL;
 260                 break;
 261         }
 262
 263         return retcode;
 264 }
 265
 266 /* Implement basically the same security restrictions as hardware does
 267  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 268  *
 269  * Most of the calculations below involve calculating the size of a
 270  * particular instruction.  It's important to get the size right as
 271  * that tells us where the next instruction to check is.  Any illegal
 272  * instruction detected will be given a size of zero, which is a
 273  * signal to abort the rest of the buffer.
 274  */
 275 static int do_validate_cmd(int cmd)
 276 {
 277         switch (((cmd >> 29) & 0x7)) {
 278         case 0x0:
 279                 switch ((cmd >> 23) & 0x3f) {
 280                 case 0x0:
 281                         return 1;       /* MI_NOOP */
 282                 case 0x4:
 283                         return 1;       /* MI_FLUSH */
 284                 default:
 285                         return 0;       /* disallow everything else */
 286                 }
 287                 break;
 288         case 0x1:
 289                 return 0;       /* reserved */
 290         case 0x2:
 291                 return (cmd & 0xff) + 2;        /* 2d commands */
 292         case 0x3:
 293                 if (((cmd >> 24) & 0x1f) <= 0x18)
 294                         return 1;
 295
 296                 switch ((cmd >> 24) & 0x1f) {
 297                 case 0x1c:
 298                         return 1;
 299                 case 0x1d:
 300                         switch ((cmd >> 16) & 0xff) {
 301                         case 0x3:
 302                                 return (cmd & 0x1f) + 2;
 303                         case 0x4:
 304                                 return (cmd & 0xf) + 2;
 305                         default:
 306                                 return (cmd & 0xffff) + 2;
 307                         }
 308                 case 0x1e:
 309                         if (cmd & (1 << 23))
 310                                 return (cmd & 0xffff) + 1;
 311                         else
 312                                 return 1;
 313                 case 0x1f:
 314                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 315                                 return (cmd & 0x1ffff) + 2;
 316                         else if (cmd & (1 << 17))       /* indirect random */
 317                                 if ((cmd & 0xffff) == 0)
 318                                         return 0;       /* unknown length, too hard */
 319                                 else
 320                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 321                         else
 322                                 return 2;       /* indirect sequential */
 323                 default:
 324                         return 0;
 325                 }
 326         default:
 327                 return 0;
 328         }
 329
 330         return 0;
 331 }
 332
 333 static int validate_cmd(int cmd)
 334 {
 335         int ret = do_validate_cmd(cmd);
 336
 337 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 338
 339         return ret;
 340 }
 341
 342 static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
 343 {
 344         drm_i915_private_t *dev_priv = dev->dev_private;
 345         int i;
 346         RING_LOCALS;
 347
 348         for (i = 0; i < dwords;) {
 349                 int cmd, sz;
 350
 351                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 352                         return DRM_ERR(EINVAL);
 353
 354 /*              printk("%d/%d ", i, dwords); */
 355
 356                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 357                         return DRM_ERR(EINVAL);
 358
 359                 BEGIN_LP_RING(sz);
 360                 OUT_RING(cmd);
 361
 362                 while (++i, --sz) {
 363                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 364                                                          sizeof(cmd))) {
 365                                 return DRM_ERR(EINVAL);
 366                         }
 367                         OUT_RING(cmd);
 368                 }
 369                 ADVANCE_LP_RING();
 370         }
 371
 372         return 0;
 373 }
 374
 375 static int i915_emit_box(drm_device_t * dev,
 376                          drm_clip_rect_t __user * boxes,
 377                          int i, int DR1, int DR4)
 378 {
 379         drm_i915_private_t *dev_priv = dev->dev_private;
 380         drm_clip_rect_t box;
 381         RING_LOCALS;
 382
 383         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 384                 return EFAULT;
 385         }
 386
 387         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 388                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 389                           box.x1, box.y1, box.x2, box.y2);
 390                 return DRM_ERR(EINVAL);
 391         }
 392
 393         BEGIN_LP_RING(6);
 394         OUT_RING(GFX_OP_DRAWRECT_INFO);
 395         OUT_RING(DR1);
 396         OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 397         OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 398         OUT_RING(DR4);
 399         OUT_RING(0);
 400         ADVANCE_LP_RING();
 401
 402         return 0;
 403 }
 404
 405 static int i915_dispatch_cmdbuffer(drm_device_t * dev,
 406                                    drm_i915_cmdbuffer_t * cmd)
 407 {
 408         int nbox = cmd->num_cliprects;
 409         int i = 0, count, ret;
 410
 411         if (cmd->sz & 0x3) {
 412                 DRM_ERROR("alignment");
 413                 return DRM_ERR(EINVAL);
 414         }
 415
 416         i915_kernel_lost_context(dev);
 417
 418         count = nbox ? nbox : 1;
 419
 420         for (i = 0; i < count; i++) {
 421                 if (i < nbox) {
 422                         ret = i915_emit_box(dev, cmd->cliprects, i,
 423                                             cmd->DR1, cmd->DR4);
 424                         if (ret)
 425                                 return ret;
 426                 }
 427
 428                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 429                 if (ret)
 430                         return ret;
 431         }
 432
 433         return 0;
 434 }
 435
 436 static int i915_dispatch_batchbuffer(drm_device_t * dev,
 437                                      drm_i915_batchbuffer_t * batch)
 438 {
 439         drm_i915_private_t *dev_priv = dev->dev_private;
 440         drm_clip_rect_t __user *boxes = batch->cliprects;
 441         int nbox = batch->num_cliprects;
 442         int i = 0, count;
 443         RING_LOCALS;
 444
 445         if ((batch->start | batch->used) & 0x7) {
 446                 DRM_ERROR("alignment");
 447                 return DRM_ERR(EINVAL);
 448         }
 449
 450         i915_kernel_lost_context(dev);
 451
 452         count = nbox ? nbox : 1;
 453
 454         for (i = 0; i < count; i++) {
 455                 if (i < nbox) {
 456                         int ret = i915_emit_box(dev, boxes, i,
 457                                                 batch->DR1, batch->DR4);
 458                         if (ret)
 459                                 return ret;
 460                 }
 461
 462                 if (dev_priv->use_mi_batchbuffer_start) {
 463                         BEGIN_LP_RING(2);
 464                         OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 465                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 466                         ADVANCE_LP_RING();
 467                 } else {
 468                         BEGIN_LP_RING(4);
 469                         OUT_RING(MI_BATCH_BUFFER);
 470                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 471                         OUT_RING(batch->start + batch->used - 4);
 472                         OUT_RING(0);
 473                         ADVANCE_LP_RING();
 474                 }
 475         }
 476
 477         dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
 478
 479         BEGIN_LP_RING(4);
 480         OUT_RING(CMD_STORE_DWORD_IDX);
 481         OUT_RING(20);
 482         OUT_RING(dev_priv->counter);
 483         OUT_RING(0);
 484         ADVANCE_LP_RING();
 485
 486         return 0;
 487 }
 488
 489 static int i915_dispatch_flip(drm_device_t * dev)
 490 {
 491         drm_i915_private_t *dev_priv = dev->dev_private;
 492         RING_LOCALS;
 493
 494         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
 495                   __FUNCTION__,
 496                   dev_priv->current_page,
 497                   dev_priv->sarea_priv->pf_current_page);
 498
 499         i915_kernel_lost_context(dev);
 500
 501         BEGIN_LP_RING(2);
 502         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
 503         OUT_RING(0);
 504         ADVANCE_LP_RING();
 505
 506         BEGIN_LP_RING(6);
 507         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
 508         OUT_RING(0);
 509         if (dev_priv->current_page == 0) {
 510                 OUT_RING(dev_priv->back_offset);
 511                 dev_priv->current_page = 1;
 512         } else {
 513                 OUT_RING(dev_priv->front_offset);
 514                 dev_priv->current_page = 0;
 515         }
 516         OUT_RING(0);
 517         ADVANCE_LP_RING();
 518
 519         BEGIN_LP_RING(2);
 520         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
 521         OUT_RING(0);
 522         ADVANCE_LP_RING();
 523
 524         dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
 525
 526         BEGIN_LP_RING(4);
 527         OUT_RING(CMD_STORE_DWORD_IDX);
 528         OUT_RING(20);
 529         OUT_RING(dev_priv->counter);
 530         OUT_RING(0);
 531         ADVANCE_LP_RING();
 532
 533         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 534         return 0;
 535 }
 536
 537 static int i915_quiescent(drm_device_t * dev)
 538 {
 539         drm_i915_private_t *dev_priv = dev->dev_private;
 540
 541         i915_kernel_lost_context(dev);
 542         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 543 }
 544
 545 static int i915_flush_ioctl(DRM_IOCTL_ARGS)
 546 {
 547         DRM_DEVICE;
 548
 549         LOCK_TEST_WITH_RETURN(dev, filp);
 550
 551         return i915_quiescent(dev);
 552 }
 553
 554 static int i915_batchbuffer(DRM_IOCTL_ARGS)
 555 {
 556         DRM_DEVICE;
 557         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 558         u32 *hw_status = dev_priv->hw_status_page;
 559         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 560             dev_priv->sarea_priv;
 561         drm_i915_batchbuffer_t batch;
 562         int ret;
 563
 564         if (!dev_priv->allow_batchbuffer) {
 565                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 566                 return DRM_ERR(EINVAL);
 567         }
 568
 569         DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
 570                                  sizeof(batch));
 571
 572         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 573                   batch.start, batch.used, batch.num_cliprects);
 574
 575         LOCK_TEST_WITH_RETURN(dev, filp);
 576
 577         if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
 578                                                        batch.num_cliprects *
 579                                                        sizeof(drm_clip_rect_t)))
 580                 return DRM_ERR(EFAULT);
 581
 582         ret = i915_dispatch_batchbuffer(dev, &batch);
 583
 584         sarea_priv->last_dispatch = (int)hw_status[5];
 585         return ret;
 586 }
 587
 588 static int i915_cmdbuffer(DRM_IOCTL_ARGS)
 589 {
 590         DRM_DEVICE;
 591         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 592         u32 *hw_status = dev_priv->hw_status_page;
 593         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 594             dev_priv->sarea_priv;
 595         drm_i915_cmdbuffer_t cmdbuf;
 596         int ret;
 597
 598         DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
 599                                  sizeof(cmdbuf));
 600
 601         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 602                   cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
 603
 604         LOCK_TEST_WITH_RETURN(dev, filp);
 605
 606         if (cmdbuf.num_cliprects &&
 607             DRM_VERIFYAREA_READ(cmdbuf.cliprects,
 608                                 cmdbuf.num_cliprects *
 609                                 sizeof(drm_clip_rect_t))) {
 610                 DRM_ERROR("Fault accessing cliprects\n");
 611                 return DRM_ERR(EFAULT);
 612         }
 613
 614         ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
 615         if (ret) {
 616                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 617                 return ret;
 618         }
 619
 620         sarea_priv->last_dispatch = (int)hw_status[5];
 621         return 0;
 622 }
 623
 624 static int i915_flip_bufs(DRM_IOCTL_ARGS)
 625 {
 626         DRM_DEVICE;
 627
 628         DRM_DEBUG("%s\n", __FUNCTION__);
 629
 630         LOCK_TEST_WITH_RETURN(dev, filp);
 631
 632         return i915_dispatch_flip(dev);
 633 }
 634
 635 static int i915_getparam(DRM_IOCTL_ARGS)
 636 {
 637         DRM_DEVICE;
 638         drm_i915_private_t *dev_priv = dev->dev_private;
 639         drm_i915_getparam_t param;
 640         int value;
 641
 642         if (!dev_priv) {
 643                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 644                 return DRM_ERR(EINVAL);
 645         }
 646
 647         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
 648                                  sizeof(param));
 649
 650         switch (param.param) {
 651         case I915_PARAM_IRQ_ACTIVE:
 652                 value = dev->irq ? 1 : 0;
 653                 break;
 654         case I915_PARAM_ALLOW_BATCHBUFFER:
 655                 value = dev_priv->allow_batchbuffer ? 1 : 0;
 656                 break;
 657         default:
 658                 DRM_ERROR("Unkown parameter %d\n", param.param);
 659                 return DRM_ERR(EINVAL);
 660         }
 661
 662         if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
 663                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
 664                 return DRM_ERR(EFAULT);
 665         }
 666
 667         return 0;
 668 }
 669
 670 static int i915_setparam(DRM_IOCTL_ARGS)
 671 {
 672         DRM_DEVICE;
 673         drm_i915_private_t *dev_priv = dev->dev_private;
 674         drm_i915_setparam_t param;
 675
 676         if (!dev_priv) {
 677                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 678                 return DRM_ERR(EINVAL);
 679         }
 680
 681         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
 682                                  sizeof(param));
 683
 684         switch (param.param) {
 685         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
 686                 dev_priv->use_mi_batchbuffer_start = param.value;
 687                 break;
 688         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
 689                 dev_priv->tex_lru_log_granularity = param.value;
 690                 break;
 691         case I915_SETPARAM_ALLOW_BATCHBUFFER:
 692                 dev_priv->allow_batchbuffer = param.value;
 693                 break;
 694         default:
 695                 DRM_ERROR("unknown parameter %d\n", param.param);
 696                 return DRM_ERR(EINVAL);
 697         }
 698
 699         return 0;
 700 }
 701
 702 void i915_driver_pretakedown(drm_device_t * dev)
 703 {
 704         if (dev->dev_private) {
 705                 drm_i915_private_t *dev_priv = dev->dev_private;
 706                 i915_mem_takedown(&(dev_priv->agp_heap));
 707         }
 708         i915_dma_cleanup(dev);
 709 }
 710
 711 void i915_driver_prerelease(drm_device_t * dev, DRMFILE filp)
 712 {
 713         if (dev->dev_private) {
 714                 drm_i915_private_t *dev_priv = dev->dev_private;
 715                 i915_mem_release(dev, filp, dev_priv->agp_heap);
 716         }
 717 }
 718
 719 drm_ioctl_desc_t i915_ioctls[] = {
 720         [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
 721         [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
 722         [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
 723         [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
 724         [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
 725         [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
 726         [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
 727         [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
 728         [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
 729         [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
 730         [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
 731         [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
 732 };
 733
 734 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
 735
 736 /**
 737  * Determine if the device really is AGP or not.
 738  *
 739  * All Intel graphics chipsets are treated as AGP, even if they are really
 740  * PCI-e.
 741  *
 742  * \param dev   The device to be tested.
 743  *
 744  * \returns
 745  * A value of 1 is always retured to indictate every i9x5 is AGP.
 746  */
 747 int i915_driver_device_is_agp(drm_device_t * dev)
 748 {
 749         return 1;
 750 }