2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/bio.h>
26 #include <linux/interrupt.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
32 #include <linux/blkpg.h>
33 #include <linux/timer.h>
34 #include <linux/proc_fs.h>
35 #include <linux/seq_file.h>
36 #include <linux/init.h>
37 #include <linux/hdreg.h>
38 #include <linux/mutex.h>
39 #include <linux/spinlock.h>
40 #include <linux/blkdev.h>
41 #include <linux/genhd.h>
42 #include <linux/scatterlist.h>
43 #include <asm/uaccess.h>
47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
52 /* Embedded module documentation macros - see modules.h */
53 /* Original author Chris Frantz - Compaq Computer Corporation */
54 MODULE_AUTHOR("Compaq Computer Corporation");
55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
56 MODULE_LICENSE("GPL");
61 #include "ida_ioctl.h"
63 #define READ_AHEAD 128
64 #define NR_CMDS 128 /* This could probably go as high as ~400 */
69 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
71 static DEFINE_MUTEX(cpqarray_mutex);
73 static ctlr_info_t *hba[MAX_CTLR];
77 #define NR_PRODUCTS ARRAY_SIZE(products)
79 /* board_id = Subsystem Device ID & Vendor ID
80 * product = Marketing Name for the board
81 * access = Address of the struct of function pointers
83 static struct board_type products[] = {
84 { 0x0040110E, "IDA", &smart1_access },
85 { 0x0140110E, "IDA-2", &smart1_access },
86 { 0x1040110E, "IAES", &smart1_access },
87 { 0x2040110E, "SMART", &smart1_access },
88 { 0x3040110E, "SMART-2/E", &smart2e_access },
89 { 0x40300E11, "SMART-2/P", &smart2_access },
90 { 0x40310E11, "SMART-2SL", &smart2_access },
91 { 0x40320E11, "Smart Array 3200", &smart2_access },
92 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
93 { 0x40340E11, "Smart Array 221", &smart2_access },
94 { 0x40400E11, "Integrated Array", &smart4_access },
95 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
96 { 0x40500E11, "Smart Array 4200", &smart4_access },
97 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
98 { 0x40580E11, "Smart Array 431", &smart4_access },
101 /* define the PCI info for the PCI cards this driver can control */
102 static const struct pci_device_id cpqarray_pci_device_id[] =
104 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
105 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */
106 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
107 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */
108 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
109 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */
110 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
111 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */
112 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
113 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */
114 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
115 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */
116 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
117 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/
118 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
119 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/
120 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
121 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/
122 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
123 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */
127 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
129 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
132 #define DBG(s) do { s } while(0)
133 /* Debug (general info)... */
134 #define DBGINFO(s) do { } while(0)
135 /* Debug Paranoid... */
136 #define DBGP(s) do { } while(0)
137 /* Debug Extra Paranoid... */
138 #define DBGPX(s) do { } while(0)
140 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
141 static void __iomem *remap_pci_mem(ulong base, ulong size);
142 static int cpqarray_eisa_detect(void);
143 static int pollcomplete(int ctlr);
144 static void getgeometry(int ctlr);
145 static void start_fwbk(int ctlr);
147 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
148 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
150 static void free_hba(int i);
151 static int alloc_cpqarray_hba(void);
160 unsigned int log_unit );
162 static int ida_unlocked_open(struct block_device *bdev, fmode_t mode);
163 static int ida_release(struct gendisk *disk, fmode_t mode);
164 static int ida_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg);
165 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
166 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
168 static void do_ida_request(struct request_queue *q);
169 static void start_io(ctlr_info_t *h);
171 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
172 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
173 static inline void complete_command(cmdlist_t *cmd, int timeout);
175 static irqreturn_t do_ida_intr(int irq, void *dev_id);
176 static void ida_timer(unsigned long tdata);
177 static int ida_revalidate(struct gendisk *disk);
178 static int revalidate_allvol(ctlr_info_t *host);
179 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
181 #ifdef CONFIG_PROC_FS
182 static void ida_procinit(int i);
184 static void ida_procinit(int i) {}
187 static inline drv_info_t *get_drv(struct gendisk *disk)
189 return disk->private_data;
192 static inline ctlr_info_t *get_host(struct gendisk *disk)
194 return disk->queue->queuedata;
198 static const struct block_device_operations ida_fops = {
199 .owner = THIS_MODULE,
200 .open = ida_unlocked_open,
201 .release = ida_release,
203 .getgeo = ida_getgeo,
204 .revalidate_disk= ida_revalidate,
208 #ifdef CONFIG_PROC_FS
210 static struct proc_dir_entry *proc_array;
211 static const struct file_operations ida_proc_fops;
214 * Get us a file in /proc/array that says something about each controller.
215 * Create /proc/array if it doesn't exist yet.
217 static void __init ida_procinit(int i)
219 if (proc_array == NULL) {
220 proc_array = proc_mkdir("driver/cpqarray", NULL);
221 if (!proc_array) return;
224 proc_create_data(hba[i]->devname, 0, proc_array, &ida_proc_fops, hba[i]);
228 * Report information about this controller.
230 static int ida_proc_show(struct seq_file *m, void *v)
233 ctlr_info_t *h = (ctlr_info_t*)m->private;
235 #ifdef CPQ_PROC_PRINT_QUEUES
241 seq_printf(m, "%s: Compaq %s Controller\n"
242 " Board ID: 0x%08lx\n"
243 " Firmware Revision: %c%c%c%c\n"
244 " Controller Sig: 0x%08lx\n"
245 " Memory Address: 0x%08lx\n"
246 " I/O Port: 0x%04x\n"
248 " Logical drives: %d\n"
249 " Physical drives: %d\n\n"
250 " Current Q depth: %d\n"
251 " Max Q depth since init: %d\n\n",
254 (unsigned long)h->board_id,
255 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
256 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
257 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
258 h->log_drives, h->phys_drives,
259 h->Qdepth, h->maxQsinceinit);
261 seq_puts(m, "Logical Drive Info:\n");
263 for(i=0; i<h->log_drives; i++) {
265 seq_printf(m, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
266 ctlr, i, drv->blk_size, drv->nr_blks);
269 #ifdef CPQ_PROC_PRINT_QUEUES
270 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
271 seq_puts(m, "\nCurrent Queues:\n");
274 seq_printf(m, "reqQ = %p", c);
276 while(c && c != h->reqQ) {
277 seq_printf(m, "->%p", c);
282 seq_printf(m, "\ncmpQ = %p", c);
284 while(c && c != h->cmpQ) {
285 seq_printf(m, "->%p", c);
290 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
292 seq_printf(m, "nr_allocs = %d\nnr_frees = %d\n",
293 h->nr_allocs, h->nr_frees);
297 static int ida_proc_open(struct inode *inode, struct file *file)
299 return single_open(file, ida_proc_show, PDE(inode)->data);
302 static const struct file_operations ida_proc_fops = {
303 .owner = THIS_MODULE,
304 .open = ida_proc_open,
307 .release = single_release,
309 #endif /* CONFIG_PROC_FS */
311 module_param_array(eisa, int, NULL, 0);
313 static void release_io_mem(ctlr_info_t *c)
315 /* if IO mem was not protected do nothing */
316 if( c->io_mem_addr == 0)
318 release_region(c->io_mem_addr, c->io_mem_length);
320 c->io_mem_length = 0;
323 static void __devexit cpqarray_remove_one(int i)
328 /* sendcmd will turn off interrupt, and send the flush...
329 * To write all data in the battery backed cache to disks
330 * no data returned, but don't want to send NULL to sendcmd */
331 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
333 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
336 free_irq(hba[i]->intr, hba[i]);
337 iounmap(hba[i]->vaddr);
338 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
339 del_timer(&hba[i]->timer);
340 remove_proc_entry(hba[i]->devname, proc_array);
341 pci_free_consistent(hba[i]->pci_dev,
342 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
343 hba[i]->cmd_pool_dhandle);
344 kfree(hba[i]->cmd_pool_bits);
345 for(j = 0; j < NWD; j++) {
346 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
347 del_gendisk(ida_gendisk[i][j]);
348 put_disk(ida_gendisk[i][j]);
350 blk_cleanup_queue(hba[i]->queue);
351 release_io_mem(hba[i]);
355 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
358 ctlr_info_t *tmp_ptr;
360 if (pci_get_drvdata(pdev) == NULL) {
361 printk( KERN_ERR "cpqarray: Unable to remove device \n");
365 tmp_ptr = pci_get_drvdata(pdev);
367 if (hba[i] == NULL) {
368 printk(KERN_ERR "cpqarray: controller %d appears to have"
369 "already been removed \n", i);
372 pci_set_drvdata(pdev, NULL);
374 cpqarray_remove_one(i);
377 /* removing an instance that was not removed automatically..
378 * must be an eisa card.
380 static void __devexit cpqarray_remove_one_eisa (int i)
382 if (hba[i] == NULL) {
383 printk(KERN_ERR "cpqarray: controller %d appears to have"
384 "already been removed \n", i);
387 cpqarray_remove_one(i);
390 /* pdev is NULL for eisa */
391 static int __devinit cpqarray_register_ctlr( int i, struct pci_dev *pdev)
393 struct request_queue *q;
397 * register block devices
398 * Find disks and fill in structs
399 * Get an interrupt, set the Q depth and get into /proc
402 /* If this successful it should insure that we are the only */
403 /* instance of the driver */
404 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
407 hba[i]->access.set_intr_mask(hba[i], 0);
408 if (request_irq(hba[i]->intr, do_ida_intr,
409 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
411 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
412 hba[i]->intr, hba[i]->devname);
416 for (j=0; j<NWD; j++) {
417 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
418 if (!ida_gendisk[i][j])
422 hba[i]->cmd_pool = pci_alloc_consistent(
423 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
424 &(hba[i]->cmd_pool_dhandle));
425 hba[i]->cmd_pool_bits = kcalloc(
426 DIV_ROUND_UP(NR_CMDS, BITS_PER_LONG), sizeof(unsigned long),
429 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
432 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
433 printk(KERN_INFO "cpqarray: Finding drives on %s",
436 spin_lock_init(&hba[i]->lock);
437 q = blk_init_queue(do_ida_request, &hba[i]->lock);
442 q->queuedata = hba[i];
450 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
452 /* This is a hardware imposed limit. */
453 blk_queue_max_segments(q, SG_MAX);
455 init_timer(&hba[i]->timer);
456 hba[i]->timer.expires = jiffies + IDA_TIMER;
457 hba[i]->timer.data = (unsigned long)hba[i];
458 hba[i]->timer.function = ida_timer;
459 add_timer(&hba[i]->timer);
461 /* Enable IRQ now that spinlock and rate limit timer are set up */
462 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
464 for(j=0; j<NWD; j++) {
465 struct gendisk *disk = ida_gendisk[i][j];
466 drv_info_t *drv = &hba[i]->drv[j];
467 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
468 disk->major = COMPAQ_SMART2_MAJOR + i;
469 disk->first_minor = j<<NWD_SHIFT;
470 disk->fops = &ida_fops;
471 if (j && !drv->nr_blks)
473 blk_queue_logical_block_size(hba[i]->queue, drv->blk_size);
474 set_capacity(disk, drv->nr_blks);
475 disk->queue = hba[i]->queue;
476 disk->private_data = drv;
485 kfree(hba[i]->cmd_pool_bits);
486 if (hba[i]->cmd_pool)
487 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
488 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
491 put_disk(ida_gendisk[i][j]);
492 ida_gendisk[i][j] = NULL;
494 free_irq(hba[i]->intr, hba[i]);
496 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
499 pci_set_drvdata(pdev, NULL);
500 release_io_mem(hba[i]);
503 printk( KERN_ERR "cpqarray: out of memory");
508 static int __devinit cpqarray_init_one( struct pci_dev *pdev,
509 const struct pci_device_id *ent)
513 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
514 " bus %d dev %d func %d\n",
515 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
516 PCI_FUNC(pdev->devfn));
517 i = alloc_cpqarray_hba();
520 memset(hba[i], 0, sizeof(ctlr_info_t));
521 sprintf(hba[i]->devname, "ida%d", i);
523 /* Initialize the pdev driver private data */
524 pci_set_drvdata(pdev, hba[i]);
526 if (cpqarray_pci_init(hba[i], pdev) != 0) {
527 pci_set_drvdata(pdev, NULL);
528 release_io_mem(hba[i]);
533 return (cpqarray_register_ctlr(i, pdev));
536 static struct pci_driver cpqarray_pci_driver = {
538 .probe = cpqarray_init_one,
539 .remove = __devexit_p(cpqarray_remove_one_pci),
540 .id_table = cpqarray_pci_device_id,
544 * This is it. Find all the controllers and register them.
545 * returns the number of block devices registered.
547 static int __init cpqarray_init(void)
549 int num_cntlrs_reg = 0;
553 /* detect controllers */
554 printk(DRIVER_NAME "\n");
556 rc = pci_register_driver(&cpqarray_pci_driver);
559 cpqarray_eisa_detect();
561 for (i=0; i < MAX_CTLR; i++) {
569 pci_unregister_driver(&cpqarray_pci_driver);
574 /* Function to find the first free pointer into our hba[] array */
575 /* Returns -1 if no free entries are left. */
576 static int alloc_cpqarray_hba(void)
580 for(i=0; i< MAX_CTLR; i++) {
581 if (hba[i] == NULL) {
582 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
584 printk(KERN_ERR "cpqarray: out of memory.\n");
590 printk(KERN_WARNING "cpqarray: This driver supports a maximum"
591 " of 8 controllers.\n");
595 static void free_hba(int i)
602 * Find the IO address of the controller, its IRQ and so forth. Fill
603 * in some basic stuff into the ctlr_info_t structure.
605 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
607 ushort vendor_id, device_id, command;
608 unchar cache_line_size, latency_timer;
609 unchar irq, revision;
610 unsigned long addr[6];
616 pci_set_master(pdev);
617 if (pci_enable_device(pdev)) {
618 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
621 vendor_id = pdev->vendor;
622 device_id = pdev->device;
623 revision = pdev->revision;
627 addr[i] = pci_resource_start(pdev, i);
629 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
631 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
635 pci_read_config_word(pdev, PCI_COMMAND, &command);
636 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
637 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
639 pci_read_config_dword(pdev, 0x2c, &board_id);
641 /* check to see if controller has been disabled */
642 if(!(command & 0x02)) {
644 "cpqarray: controller appears to be disabled\n");
649 printk("vendor_id = %x\n", vendor_id);
650 printk("device_id = %x\n", device_id);
651 printk("command = %x\n", command);
653 printk("addr[%d] = %lx\n", i, addr[i]);
654 printk("revision = %x\n", revision);
655 printk("irq = %x\n", irq);
656 printk("cache_line_size = %x\n", cache_line_size);
657 printk("latency_timer = %x\n", latency_timer);
658 printk("board_id = %x\n", board_id);
664 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
666 c->io_mem_addr = addr[i];
667 c->io_mem_length = pci_resource_end(pdev, i)
668 - pci_resource_start(pdev, i) + 1;
669 if(!request_region( c->io_mem_addr, c->io_mem_length,
672 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
674 c->io_mem_length = 0;
682 if (!(pci_resource_flags(pdev, i) &
683 PCI_BASE_ADDRESS_SPACE_IO)) {
684 c->paddr = pci_resource_start (pdev, i);
689 c->vaddr = remap_pci_mem(c->paddr, 128);
692 c->board_id = board_id;
694 for(i=0; i<NR_PRODUCTS; i++) {
695 if (board_id == products[i].board_id) {
696 c->product_name = products[i].product_name;
697 c->access = *(products[i].access);
701 if (i == NR_PRODUCTS) {
702 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
703 " to access the SMART Array controller %08lx\n",
704 (unsigned long)board_id);
712 * Map (physical) PCI mem into (virtual) kernel space
714 static void __iomem *remap_pci_mem(ulong base, ulong size)
716 ulong page_base = ((ulong) base) & PAGE_MASK;
717 ulong page_offs = ((ulong) base) - page_base;
718 void __iomem *page_remapped = ioremap(page_base, page_offs+size);
720 return (page_remapped ? (page_remapped + page_offs) : NULL);
725 * Config string is a comma separated set of i/o addresses of EISA cards.
727 static int cpqarray_setup(char *str)
731 (void)get_options(str, ARRAY_SIZE(ints), ints);
733 for(i=0; i<ints[0] && i<8; i++)
738 __setup("smart2=", cpqarray_setup);
743 * Find an EISA controller's signature. Set up an hba if we find it.
745 static int __devinit cpqarray_eisa_detect(void)
753 while(i<8 && eisa[i]) {
754 ctlr = alloc_cpqarray_hba();
757 board_id = inl(eisa[i]+0xC80);
758 for(j=0; j < NR_PRODUCTS; j++)
759 if (board_id == products[j].board_id)
762 if (j == NR_PRODUCTS) {
763 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
764 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
768 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
769 hba[ctlr]->io_mem_addr = eisa[i];
770 hba[ctlr]->io_mem_length = 0x7FF;
771 if(!request_region(hba[ctlr]->io_mem_addr,
772 hba[ctlr]->io_mem_length,
775 printk(KERN_WARNING "cpqarray: I/O range already in "
776 "use addr = %lx length = %ld\n",
777 hba[ctlr]->io_mem_addr,
778 hba[ctlr]->io_mem_length);
784 * Read the config register to find our interrupt
786 intr = inb(eisa[i]+0xCC0) >> 4;
787 if (intr & 1) intr = 11;
788 else if (intr & 2) intr = 10;
789 else if (intr & 4) intr = 14;
790 else if (intr & 8) intr = 15;
792 hba[ctlr]->intr = intr;
793 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
794 hba[ctlr]->product_name = products[j].product_name;
795 hba[ctlr]->access = *(products[j].access);
796 hba[ctlr]->ctlr = ctlr;
797 hba[ctlr]->board_id = board_id;
798 hba[ctlr]->pci_dev = NULL; /* not PCI */
801 printk("i = %d, j = %d\n", i, j);
802 printk("irq = %x\n", intr);
803 printk("product name = %s\n", products[j].product_name);
804 printk("board_id = %x\n", board_id);
810 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
812 "cpqarray: Can't register EISA controller %d\n",
821 * Open. Make sure the device is really there.
823 static int ida_open(struct block_device *bdev, fmode_t mode)
825 drv_info_t *drv = get_drv(bdev->bd_disk);
826 ctlr_info_t *host = get_host(bdev->bd_disk);
828 DBGINFO(printk("ida_open %s\n", bdev->bd_disk->disk_name));
830 * Root is allowed to open raw volume zero even if it's not configured
831 * so array config can still work. I don't think I really like this,
832 * but I'm already using way to many device nodes to claim another one
833 * for "raw controller".
836 if (!capable(CAP_SYS_RAWIO))
838 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
845 static int ida_unlocked_open(struct block_device *bdev, fmode_t mode)
849 mutex_lock(&cpqarray_mutex);
850 ret = ida_open(bdev, mode);
851 mutex_unlock(&cpqarray_mutex);
859 static int ida_release(struct gendisk *disk, fmode_t mode)
863 mutex_lock(&cpqarray_mutex);
864 host = get_host(disk);
866 mutex_unlock(&cpqarray_mutex);
872 * Enqueuing and dequeuing functions for cmdlists.
874 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
878 c->next = c->prev = c;
880 c->prev = (*Qptr)->prev;
882 (*Qptr)->prev->next = c;
887 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
889 if (c && c->next != c) {
890 if (*Qptr == c) *Qptr = c->next;
891 c->prev->next = c->next;
892 c->next->prev = c->prev;
900 * Get a request and submit it to the controller.
901 * This routine needs to grab all the requests it possibly can from the
902 * req Q and submit them. Interrupts are off (and need to be off) when you
903 * are in here (either via the dummy do_ida_request functions or by being
904 * called from the interrupt handler
906 static void do_ida_request(struct request_queue *q)
908 ctlr_info_t *h = q->queuedata;
910 struct request *creq;
911 struct scatterlist tmp_sg[SG_MAX];
915 creq = blk_peek_request(q);
919 BUG_ON(creq->nr_phys_segments > SG_MAX);
921 if ((c = cmd_alloc(h,1)) == NULL)
924 blk_start_request(creq);
927 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
928 c->hdr.size = sizeof(rblk_t) >> 2;
929 c->size += sizeof(rblk_t);
931 c->req.hdr.blk = blk_rq_pos(creq);
934 printk("sector=%d, nr_sectors=%u\n",
935 blk_rq_pos(creq), blk_rq_sectors(creq));
937 sg_init_table(tmp_sg, SG_MAX);
938 seg = blk_rq_map_sg(q, creq, tmp_sg);
940 /* Now do all the DMA Mappings */
941 if (rq_data_dir(creq) == READ)
942 dir = PCI_DMA_FROMDEVICE;
944 dir = PCI_DMA_TODEVICE;
945 for( i=0; i < seg; i++)
947 c->req.sg[i].size = tmp_sg[i].length;
948 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
951 tmp_sg[i].length, dir);
953 DBGPX( printk("Submitting %u sectors in %d segments\n", blk_rq_sectors(creq), seg); );
954 c->req.hdr.sg_cnt = seg;
955 c->req.hdr.blk_cnt = blk_rq_sectors(creq);
956 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
959 /* Put the request on the tail of the request queue */
962 if (h->Qdepth > h->maxQsinceinit)
963 h->maxQsinceinit = h->Qdepth;
972 * start_io submits everything on a controller's request queue
973 * and moves it to the completion queue.
975 * Interrupts had better be off if you're in here
977 static void start_io(ctlr_info_t *h)
981 while((c = h->reqQ) != NULL) {
982 /* Can't do anything if we're busy */
983 if (h->access.fifo_full(h) == 0)
986 /* Get the first entry from the request Q */
987 removeQ(&h->reqQ, c);
990 /* Tell the controller to do our bidding */
991 h->access.submit_command(h, c);
993 /* Get onto the completion Q */
999 * Mark all buffers that cmd was responsible for
1001 static inline void complete_command(cmdlist_t *cmd, int timeout)
1003 struct request *rq = cmd->rq;
1007 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1008 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1009 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1010 cmd->ctlr, cmd->hdr.unit);
1011 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1013 if (cmd->req.hdr.rcode & RCODE_FATAL) {
1014 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1015 cmd->ctlr, cmd->hdr.unit);
1018 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1019 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1020 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1021 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1022 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1027 /* unmap the DMA mapping for all the scatter gather elements */
1028 if (cmd->req.hdr.cmd == IDA_READ)
1029 ddir = PCI_DMA_FROMDEVICE;
1031 ddir = PCI_DMA_TODEVICE;
1032 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1033 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1034 cmd->req.sg[i].size, ddir);
1036 DBGPX(printk("Done with %p\n", rq););
1037 __blk_end_request_all(rq, error);
1041 * The controller will interrupt us upon completion of commands.
1042 * Find the command on the completion queue, remove it, tell the OS and
1043 * try to queue up more IO
1045 static irqreturn_t do_ida_intr(int irq, void *dev_id)
1047 ctlr_info_t *h = dev_id;
1049 unsigned long istat;
1050 unsigned long flags;
1053 istat = h->access.intr_pending(h);
1054 /* Is this interrupt for us? */
1059 * If there are completed commands in the completion queue,
1060 * we had better do something about it.
1062 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1063 if (istat & FIFO_NOT_EMPTY) {
1064 while((a = h->access.command_completed(h))) {
1066 if ((c = h->cmpQ) == NULL)
1068 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1071 while(c->busaddr != a) {
1077 * If we've found the command, take it off the
1078 * completion Q and free it
1080 if (c->busaddr == a) {
1081 removeQ(&h->cmpQ, c);
1082 /* Check for invalid command.
1083 * Controller returns command error,
1087 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1089 c->req.hdr.rcode = RCODE_INVREQ;
1091 if (c->type == CMD_RWREQ) {
1092 complete_command(c, 0);
1094 } else if (c->type == CMD_IOCTL_PEND) {
1095 c->type = CMD_IOCTL_DONE;
1103 * See if we can queue up some more IO
1105 do_ida_request(h->queue);
1106 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1111 * This timer was for timing out requests that haven't happened after
1112 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1113 * reset a flags structure so we don't flood the user with
1114 * "Non-Fatal error" messages.
1116 static void ida_timer(unsigned long tdata)
1118 ctlr_info_t *h = (ctlr_info_t*)tdata;
1120 h->timer.expires = jiffies + IDA_TIMER;
1121 add_timer(&h->timer);
1125 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1127 drv_info_t *drv = get_drv(bdev->bd_disk);
1129 if (drv->cylinders) {
1130 geo->heads = drv->heads;
1131 geo->sectors = drv->sectors;
1132 geo->cylinders = drv->cylinders;
1135 geo->sectors = 0x3f;
1136 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1143 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1144 * setting readahead and submitting commands from userspace to the controller.
1146 static int ida_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg)
1148 drv_info_t *drv = get_drv(bdev->bd_disk);
1149 ctlr_info_t *host = get_host(bdev->bd_disk);
1151 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1156 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1160 if (!capable(CAP_SYS_RAWIO))
1162 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1166 if (copy_from_user(my_io, io, sizeof(*my_io)))
1168 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1172 if (copy_to_user(io, my_io, sizeof(*my_io)))
1179 if (!arg) return -EINVAL;
1180 if (put_user(host->ctlr_sig, (int __user *)arg))
1183 case IDAREVALIDATEVOLS:
1184 if (MINOR(bdev->bd_dev) != 0)
1186 return revalidate_allvol(host);
1187 case IDADRIVERVERSION:
1188 if (!arg) return -EINVAL;
1189 if (put_user(DRIVER_VERSION, (unsigned long __user *)arg))
1195 ida_pci_info_struct pciinfo;
1197 if (!arg) return -EINVAL;
1198 memset(&pciinfo, 0, sizeof(pciinfo));
1199 pciinfo.bus = host->pci_dev->bus->number;
1200 pciinfo.dev_fn = host->pci_dev->devfn;
1201 pciinfo.board_id = host->board_id;
1202 if(copy_to_user((void __user *) arg, &pciinfo,
1203 sizeof( ida_pci_info_struct)))
1214 static int ida_ioctl(struct block_device *bdev, fmode_t mode,
1215 unsigned int cmd, unsigned long param)
1219 mutex_lock(&cpqarray_mutex);
1220 ret = ida_locked_ioctl(bdev, mode, cmd, param);
1221 mutex_unlock(&cpqarray_mutex);
1227 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1228 * The command block (io) has already been copied to kernel space for us,
1229 * however, any elements in the sglist need to be copied to kernel space
1230 * or copied back to userspace.
1232 * Only root may perform a controller passthru command, however I'm not doing
1233 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1234 * putting a 64M buffer in the sglist is probably a *bad* idea.
1236 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1241 unsigned long flags;
1244 if ((c = cmd_alloc(h, 0)) == NULL)
1247 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1248 c->hdr.size = sizeof(rblk_t) >> 2;
1249 c->size += sizeof(rblk_t);
1251 c->req.hdr.cmd = io->cmd;
1252 c->req.hdr.blk = io->blk;
1253 c->req.hdr.blk_cnt = io->blk_cnt;
1254 c->type = CMD_IOCTL_PEND;
1256 /* Pre submit processing */
1259 p = memdup_user(io->sg[0].addr, io->sg[0].size);
1265 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1266 sizeof(ida_ioctl_t),
1267 PCI_DMA_BIDIRECTIONAL);
1268 c->req.sg[0].size = io->sg[0].size;
1269 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1270 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1271 c->req.hdr.sg_cnt = 1;
1274 case READ_FLASH_ROM:
1275 case SENSE_CONTROLLER_PERFORMANCE:
1276 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1284 c->req.sg[0].size = io->sg[0].size;
1285 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1286 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1287 c->req.hdr.sg_cnt = 1;
1290 case IDA_WRITE_MEDIA:
1291 case DIAG_PASS_THRU:
1292 case COLLECT_BUFFER:
1293 case WRITE_FLASH_ROM:
1294 p = memdup_user(io->sg[0].addr, io->sg[0].size);
1300 c->req.sg[0].size = io->sg[0].size;
1301 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1302 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1303 c->req.hdr.sg_cnt = 1;
1306 c->req.sg[0].size = sizeof(io->c);
1307 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1308 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1309 c->req.hdr.sg_cnt = 1;
1312 /* Put the request on the tail of the request queue */
1313 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1317 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1319 /* Wait for completion */
1320 while(c->type != CMD_IOCTL_DONE)
1324 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1325 PCI_DMA_BIDIRECTIONAL);
1326 /* Post submit processing */
1329 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1330 sizeof(ida_ioctl_t),
1331 PCI_DMA_BIDIRECTIONAL);
1333 case DIAG_PASS_THRU:
1334 case SENSE_CONTROLLER_PERFORMANCE:
1335 case READ_FLASH_ROM:
1336 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1340 /* fall through and free p */
1342 case IDA_WRITE_MEDIA:
1343 case COLLECT_BUFFER:
1344 case WRITE_FLASH_ROM:
1351 io->rcode = c->req.hdr.rcode;
1357 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1358 * scheme to suballocte them to the driver. Operations that are not time
1359 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1360 * as the first argument to get a new command.
1362 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1366 dma_addr_t cmd_dhandle;
1368 if (!get_from_pool) {
1369 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1370 sizeof(cmdlist_t), &cmd_dhandle);
1375 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1378 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1379 c = h->cmd_pool + i;
1380 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1384 memset(c, 0, sizeof(cmdlist_t));
1385 c->busaddr = cmd_dhandle;
1389 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1393 if (!got_from_pool) {
1394 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1397 i = c - h->cmd_pool;
1398 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1403 /***********************************************************************
1405 Send a command to an IDA using the memory mapped FIFO interface
1406 and wait for it to complete.
1407 This routine should only be called at init time.
1408 ***********************************************************************/
1415 unsigned int blkcnt,
1416 unsigned int log_unit )
1422 ctlr_info_t *info_p = hba[ctlr];
1424 c = cmd_alloc(info_p, 1);
1428 c->hdr.unit = log_unit;
1430 c->hdr.size = sizeof(rblk_t) >> 2;
1431 c->size += sizeof(rblk_t);
1433 /* The request information. */
1434 c->req.hdr.next = 0;
1435 c->req.hdr.rcode = 0;
1437 c->req.hdr.sg_cnt = 1;
1438 c->req.hdr.reserved = 0;
1441 c->req.sg[0].size = 512;
1443 c->req.sg[0].size = size;
1445 c->req.hdr.blk = blk;
1446 c->req.hdr.blk_cnt = blkcnt;
1447 c->req.hdr.cmd = (unsigned char) cmd;
1448 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1449 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1453 info_p->access.set_intr_mask(info_p, 0);
1454 /* Make sure there is room in the command FIFO */
1455 /* Actually it should be completely empty at this time. */
1456 for (i = 200000; i > 0; i--) {
1457 temp = info_p->access.fifo_full(info_p);
1463 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1464 " waiting!\n", ctlr);
1470 info_p->access.submit_command(info_p, c);
1471 complete = pollcomplete(ctlr);
1473 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1474 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1475 if (complete != 1) {
1476 if (complete != c->busaddr) {
1477 printk( KERN_WARNING
1478 "cpqarray ida%d: idaSendPciCmd "
1479 "Invalid command list address returned! (%08lx)\n",
1480 ctlr, (unsigned long)complete);
1481 cmd_free(info_p, c, 1);
1485 printk( KERN_WARNING
1486 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1487 "No command list address returned!\n",
1489 cmd_free(info_p, c, 1);
1493 if (c->req.hdr.rcode & 0x00FE) {
1494 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1495 printk( KERN_WARNING
1496 "cpqarray ida%d: idaSendPciCmd, error: "
1497 "Controller failed at init time "
1498 "cmd: 0x%x, return code = 0x%x\n",
1499 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1501 cmd_free(info_p, c, 1);
1505 cmd_free(info_p, c, 1);
1510 * revalidate_allvol is for online array config utilities. After a
1511 * utility reconfigures the drives in the array, it can use this function
1512 * (through an ioctl) to make the driver zap any previous disk structs for
1513 * that controller and get new ones.
1515 * Right now I'm using the getgeometry() function to do this, but this
1516 * function should probably be finer grained and allow you to revalidate one
1517 * particualar logical volume (instead of all of them on a particular
1520 static int revalidate_allvol(ctlr_info_t *host)
1522 int ctlr = host->ctlr;
1524 unsigned long flags;
1526 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1527 if (host->usage_count > 1) {
1528 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1529 printk(KERN_WARNING "cpqarray: Device busy for volume"
1530 " revalidation (usage=%d)\n", host->usage_count);
1533 host->usage_count++;
1534 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1537 * Set the partition and block size structures for all volumes
1538 * on this controller to zero. We will reread all of this data
1540 set_capacity(ida_gendisk[ctlr][0], 0);
1541 for (i = 1; i < NWD; i++) {
1542 struct gendisk *disk = ida_gendisk[ctlr][i];
1543 if (disk->flags & GENHD_FL_UP)
1546 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1549 * Tell the array controller not to give us any interrupts while
1550 * we check the new geometry. Then turn interrupts back on when
1553 host->access.set_intr_mask(host, 0);
1555 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1557 for(i=0; i<NWD; i++) {
1558 struct gendisk *disk = ida_gendisk[ctlr][i];
1559 drv_info_t *drv = &host->drv[i];
1560 if (i && !drv->nr_blks)
1562 blk_queue_logical_block_size(host->queue, drv->blk_size);
1563 set_capacity(disk, drv->nr_blks);
1564 disk->queue = host->queue;
1565 disk->private_data = drv;
1570 host->usage_count--;
1574 static int ida_revalidate(struct gendisk *disk)
1576 drv_info_t *drv = disk->private_data;
1577 set_capacity(disk, drv->nr_blks);
1581 /********************************************************************
1583 Wait polling for a command to complete.
1584 The memory mapped FIFO is polled for the completion.
1585 Used only at init time, interrupts disabled.
1586 ********************************************************************/
1587 static int pollcomplete(int ctlr)
1592 /* Wait (up to 2 seconds) for a command to complete */
1594 for (i = 200000; i > 0; i--) {
1595 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1597 udelay(10); /* a short fixed delay */
1601 /* Invalid address to tell caller we ran out of time */
1604 /*****************************************************************
1606 Starts controller firmwares background processing.
1607 Currently only the Integrated Raid controller needs this done.
1608 If the PCI mem address registers are written to after this,
1609 data corruption may occur
1610 *****************************************************************/
1611 static void start_fwbk(int ctlr)
1613 id_ctlr_t *id_ctlr_buf;
1616 if( (hba[ctlr]->board_id != 0x40400E11)
1617 && (hba[ctlr]->board_id != 0x40480E11) )
1619 /* Not a Integrated Raid, so there is nothing for us to do */
1621 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1623 /* Command does not return anything, but idasend command needs a
1625 id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1626 if(id_ctlr_buf==NULL)
1628 printk(KERN_WARNING "cpqarray: Out of memory. "
1629 "Unable to start background processing.\n");
1632 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1633 id_ctlr_buf, 0, 0, 0, 0);
1634 if(ret_code != IO_OK)
1635 printk(KERN_WARNING "cpqarray: Unable to start"
1636 " background processing\n");
1640 /*****************************************************************
1642 Get ida logical volume geometry from the controller
1643 This is a large bit of code which once existed in two flavors,
1644 It is used only at init time.
1645 *****************************************************************/
1646 static void getgeometry(int ctlr)
1648 id_log_drv_t *id_ldrive;
1649 id_ctlr_t *id_ctlr_buf;
1650 sense_log_drv_stat_t *id_lstatus_buf;
1651 config_t *sense_config_buf;
1652 unsigned int log_unit, log_index;
1655 ctlr_info_t *info_p = hba[ctlr];
1658 info_p->log_drv_map = 0;
1660 id_ldrive = kzalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1662 printk( KERN_ERR "cpqarray: out of memory.\n");
1666 id_ctlr_buf = kzalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1668 printk( KERN_ERR "cpqarray: out of memory.\n");
1672 id_lstatus_buf = kzalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1673 if (!id_lstatus_buf) {
1674 printk( KERN_ERR "cpqarray: out of memory.\n");
1678 sense_config_buf = kzalloc(sizeof(config_t), GFP_KERNEL);
1679 if (!sense_config_buf) {
1680 printk( KERN_ERR "cpqarray: out of memory.\n");
1684 info_p->phys_drives = 0;
1685 info_p->log_drv_map = 0;
1686 info_p->drv_assign_map = 0;
1687 info_p->drv_spare_map = 0;
1688 info_p->mp_failed_drv_map = 0; /* only initialized here */
1689 /* Get controllers info for this logical drive */
1690 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1691 if (ret_code == IO_ERROR) {
1693 * If can't get controller info, set the logical drive map to 0,
1694 * so the idastubopen will fail on all logical drives
1695 * on the controller.
1697 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1701 info_p->log_drives = id_ctlr_buf->nr_drvs;
1703 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1704 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1706 printk(" (%s)\n", info_p->product_name);
1708 * Initialize logical drive map to zero
1712 * Get drive geometry for all logical drives
1714 if (id_ctlr_buf->nr_drvs > 16)
1715 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1716 "16 logical drives per controller.\n. "
1717 " Additional drives will not be "
1718 "detected\n", ctlr);
1721 (log_index < id_ctlr_buf->nr_drvs)
1722 && (log_unit < NWD);
1724 size = sizeof(sense_log_drv_stat_t);
1727 Send "Identify logical drive status" cmd
1729 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1730 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1731 if (ret_code == IO_ERROR) {
1733 If can't get logical drive status, set
1734 the logical drive map to 0, so the
1735 idastubopen will fail for all logical drives
1738 info_p->log_drv_map = 0;
1739 printk( KERN_WARNING
1740 "cpqarray ida%d: idaGetGeometry - Controller"
1741 " failed to report status of logical drive %d\n"
1742 "Access to this controller has been disabled\n",
1747 Make sure the logical drive is configured
1749 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1750 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1751 sizeof(id_log_drv_t), 0, 0, log_unit);
1753 If error, the bit for this
1754 logical drive won't be set and
1755 idastubopen will return error.
1757 if (ret_code != IO_ERROR) {
1758 drv = &info_p->drv[log_unit];
1759 drv->blk_size = id_ldrive->blk_size;
1760 drv->nr_blks = id_ldrive->nr_blks;
1761 drv->cylinders = id_ldrive->drv.cyl;
1762 drv->heads = id_ldrive->drv.heads;
1763 drv->sectors = id_ldrive->drv.sect_per_track;
1764 info_p->log_drv_map |= (1 << log_unit);
1766 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1767 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1768 ret_code = sendcmd(SENSE_CONFIG,
1769 ctlr, sense_config_buf,
1770 sizeof(config_t), 0, 0, log_unit);
1771 if (ret_code == IO_ERROR) {
1772 info_p->log_drv_map = 0;
1773 printk(KERN_ERR "cpqarray: error sending sense config\n");
1777 info_p->phys_drives =
1778 sense_config_buf->ctlr_phys_drv;
1779 info_p->drv_assign_map
1780 |= sense_config_buf->drv_asgn_map;
1781 info_p->drv_assign_map
1782 |= sense_config_buf->spare_asgn_map;
1783 info_p->drv_spare_map
1784 |= sense_config_buf->spare_asgn_map;
1785 } /* end of if no error on id_ldrive */
1786 log_index = log_index + 1;
1787 } /* end of if logical drive configured */
1788 } /* end of for log_unit */
1790 /* Free all the buffers and return */
1792 kfree(sense_config_buf);
1794 kfree(id_lstatus_buf);
1803 static void __exit cpqarray_exit(void)
1807 pci_unregister_driver(&cpqarray_pci_driver);
1809 /* Double check that all controller entries have been removed */
1810 for(i=0; i<MAX_CTLR; i++) {
1811 if (hba[i] != NULL) {
1812 printk(KERN_WARNING "cpqarray: Removing EISA "
1813 "controller %d\n", i);
1814 cpqarray_remove_one_eisa(i);
1818 remove_proc_entry("driver/cpqarray", NULL);
1821 module_init(cpqarray_init)
1822 module_exit(cpqarray_exit)