Merge master.kernel.org:/pub/scm/linux/kernel/git/sfrench/cifs-2.6
[pandora-kernel.git] / arch / x86_64 / kernel / mce_amd.c
1 /*
2  *  (c) 2005, 2006 Advanced Micro Devices, Inc.
3  *  Your use of this code is subject to the terms and conditions of the
4  *  GNU general public license version 2. See "COPYING" or
5  *  http://www.gnu.org/licenses/gpl.html
6  *
7  *  Written by Jacob Shin - AMD, Inc.
8  *
9  *  Support : jacob.shin@amd.com
10  *
11  *  April 2006
12  *     - added support for AMD Family 0x10 processors
13  *
14  *  All MC4_MISCi registers are shared between multi-cores
15  */
16
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
27 #include <asm/apic.h>
28 #include <asm/mce.h>
29 #include <asm/msr.h>
30 #include <asm/percpu.h>
31 #include <asm/idle.h>
32
33 #define PFX               "mce_threshold: "
34 #define VERSION           "version 1.1.1"
35 #define NR_BANKS          6
36 #define NR_BLOCKS         9
37 #define THRESHOLD_MAX     0xFFF
38 #define INT_TYPE_APIC     0x00020000
39 #define MASK_VALID_HI     0x80000000
40 #define MASK_CNTP_HI      0x40000000
41 #define MASK_LOCKED_HI    0x20000000
42 #define MASK_LVTOFF_HI    0x00F00000
43 #define MASK_COUNT_EN_HI  0x00080000
44 #define MASK_INT_TYPE_HI  0x00060000
45 #define MASK_OVERFLOW_HI  0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO    0xFF000000
48 #define MCG_XBLK_ADDR     0xC0000400
49
50 struct threshold_block {
51         unsigned int block;
52         unsigned int bank;
53         unsigned int cpu;
54         u32 address;
55         u16 interrupt_enable;
56         u16 threshold_limit;
57         struct kobject kobj;
58         struct list_head miscj;
59 };
60
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults = {
63         .interrupt_enable = 0,
64         .threshold_limit = THRESHOLD_MAX,
65 };
66
67 struct threshold_bank {
68         struct kobject kobj;
69         struct threshold_block *blocks;
70         cpumask_t cpus;
71 };
72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
73
74 #ifdef CONFIG_SMP
75 static unsigned char shared_bank[NR_BANKS] = {
76         0, 0, 0, 0, 1
77 };
78 #endif
79
80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
81
82 /*
83  * CPU Initialization
84  */
85
86 /* must be called with correct cpu affinity */
87 static void threshold_restart_bank(struct threshold_block *b,
88                                    int reset, u16 old_limit)
89 {
90         u32 mci_misc_hi, mci_misc_lo;
91
92         rdmsr(b->address, mci_misc_lo, mci_misc_hi);
93
94         if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
95                 reset = 1;      /* limit cannot be lower than err count */
96
97         if (reset) {            /* reset err count and overflow bit */
98                 mci_misc_hi =
99                     (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
100                     (THRESHOLD_MAX - b->threshold_limit);
101         } else if (old_limit) { /* change limit w/o reset */
102                 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
103                     (old_limit - b->threshold_limit);
104                 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
105                     (new_count & THRESHOLD_MAX);
106         }
107
108         b->interrupt_enable ?
109             (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
110             (mci_misc_hi &= ~MASK_INT_TYPE_HI);
111
112         mci_misc_hi |= MASK_COUNT_EN_HI;
113         wrmsr(b->address, mci_misc_lo, mci_misc_hi);
114 }
115
116 /* cpu init entry point, called from mce.c with preempt off */
117 void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
118 {
119         unsigned int bank, block;
120         unsigned int cpu = smp_processor_id();
121         u32 low = 0, high = 0, address = 0;
122
123         for (bank = 0; bank < NR_BANKS; ++bank) {
124                 for (block = 0; block < NR_BLOCKS; ++block) {
125                         if (block == 0)
126                                 address = MSR_IA32_MC0_MISC + bank * 4;
127                         else if (block == 1) {
128                                 address = (low & MASK_BLKPTR_LO) >> 21;
129                                 if (!address)
130                                         break;
131                                 address += MCG_XBLK_ADDR;
132                         }
133                         else
134                                 ++address;
135
136                         if (rdmsr_safe(address, &low, &high))
137                                 break;
138
139                         if (!(high & MASK_VALID_HI)) {
140                                 if (block)
141                                         continue;
142                                 else
143                                         break;
144                         }
145
146                         if (!(high & MASK_CNTP_HI)  ||
147                              (high & MASK_LOCKED_HI))
148                                 continue;
149
150                         if (!block)
151                                 per_cpu(bank_map, cpu) |= (1 << bank);
152 #ifdef CONFIG_SMP
153                         if (shared_bank[bank] && c->cpu_core_id)
154                                 break;
155 #endif
156                         high &= ~MASK_LVTOFF_HI;
157                         high |= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
158                         wrmsr(address, low, high);
159
160                         setup_APIC_extened_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
161                                                THRESHOLD_APIC_VECTOR,
162                                                K8_APIC_EXT_INT_MSG_FIX, 0);
163
164                         threshold_defaults.address = address;
165                         threshold_restart_bank(&threshold_defaults, 0, 0);
166                 }
167         }
168 }
169
170 /*
171  * APIC Interrupt Handler
172  */
173
174 /*
175  * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
176  * the interrupt goes off when error_count reaches threshold_limit.
177  * the handler will simply log mcelog w/ software defined bank number.
178  */
179 asmlinkage void mce_threshold_interrupt(void)
180 {
181         unsigned int bank, block;
182         struct mce m;
183         u32 low = 0, high = 0, address = 0;
184
185         ack_APIC_irq();
186         exit_idle();
187         irq_enter();
188
189         memset(&m, 0, sizeof(m));
190         rdtscll(m.tsc);
191         m.cpu = smp_processor_id();
192
193         /* assume first bank caused it */
194         for (bank = 0; bank < NR_BANKS; ++bank) {
195                 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
196                         continue;
197                 for (block = 0; block < NR_BLOCKS; ++block) {
198                         if (block == 0)
199                                 address = MSR_IA32_MC0_MISC + bank * 4;
200                         else if (block == 1) {
201                                 address = (low & MASK_BLKPTR_LO) >> 21;
202                                 if (!address)
203                                         break;
204                                 address += MCG_XBLK_ADDR;
205                         }
206                         else
207                                 ++address;
208
209                         if (rdmsr_safe(address, &low, &high))
210                                 break;
211
212                         if (!(high & MASK_VALID_HI)) {
213                                 if (block)
214                                         continue;
215                                 else
216                                         break;
217                         }
218
219                         if (!(high & MASK_CNTP_HI)  ||
220                              (high & MASK_LOCKED_HI))
221                                 continue;
222
223                         /* Log the machine check that caused the threshold
224                            event. */
225                         do_machine_check(NULL, 0);
226
227                         if (high & MASK_OVERFLOW_HI) {
228                                 rdmsrl(address, m.misc);
229                                 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
230                                        m.status);
231                                 m.bank = K8_MCE_THRESHOLD_BASE
232                                        + bank * NR_BLOCKS
233                                        + block;
234                                 mce_log(&m);
235                                 goto out;
236                         }
237                 }
238         }
239 out:
240         irq_exit();
241 }
242
243 /*
244  * Sysfs Interface
245  */
246
247 struct threshold_attr {
248         struct attribute attr;
249         ssize_t(*show) (struct threshold_block *, char *);
250         ssize_t(*store) (struct threshold_block *, const char *, size_t count);
251 };
252
253 static cpumask_t affinity_set(unsigned int cpu)
254 {
255         cpumask_t oldmask = current->cpus_allowed;
256         cpumask_t newmask = CPU_MASK_NONE;
257         cpu_set(cpu, newmask);
258         set_cpus_allowed(current, newmask);
259         return oldmask;
260 }
261
262 static void affinity_restore(cpumask_t oldmask)
263 {
264         set_cpus_allowed(current, oldmask);
265 }
266
267 #define SHOW_FIELDS(name)                                           \
268 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
269 {                                                                   \
270         return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
271 }
272 SHOW_FIELDS(interrupt_enable)
273 SHOW_FIELDS(threshold_limit)
274
275 static ssize_t store_interrupt_enable(struct threshold_block *b,
276                                       const char *buf, size_t count)
277 {
278         char *end;
279         cpumask_t oldmask;
280         unsigned long new = simple_strtoul(buf, &end, 0);
281         if (end == buf)
282                 return -EINVAL;
283         b->interrupt_enable = !!new;
284
285         oldmask = affinity_set(b->cpu);
286         threshold_restart_bank(b, 0, 0);
287         affinity_restore(oldmask);
288
289         return end - buf;
290 }
291
292 static ssize_t store_threshold_limit(struct threshold_block *b,
293                                      const char *buf, size_t count)
294 {
295         char *end;
296         cpumask_t oldmask;
297         u16 old;
298         unsigned long new = simple_strtoul(buf, &end, 0);
299         if (end == buf)
300                 return -EINVAL;
301         if (new > THRESHOLD_MAX)
302                 new = THRESHOLD_MAX;
303         if (new < 1)
304                 new = 1;
305         old = b->threshold_limit;
306         b->threshold_limit = new;
307
308         oldmask = affinity_set(b->cpu);
309         threshold_restart_bank(b, 0, old);
310         affinity_restore(oldmask);
311
312         return end - buf;
313 }
314
315 static ssize_t show_error_count(struct threshold_block *b, char *buf)
316 {
317         u32 high, low;
318         cpumask_t oldmask;
319         oldmask = affinity_set(b->cpu);
320         rdmsr(b->address, low, high);
321         affinity_restore(oldmask);
322         return sprintf(buf, "%x\n",
323                        (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
324 }
325
326 static ssize_t store_error_count(struct threshold_block *b,
327                                  const char *buf, size_t count)
328 {
329         cpumask_t oldmask;
330         oldmask = affinity_set(b->cpu);
331         threshold_restart_bank(b, 1, 0);
332         affinity_restore(oldmask);
333         return 1;
334 }
335
336 #define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
337         .attr = {.name = __stringify(_name), .mode = _mode }, \
338         .show = _show,                                        \
339         .store = _store,                                      \
340 };
341
342 #define RW_ATTR(name)                                           \
343 static struct threshold_attr name =                             \
344         THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
345
346 RW_ATTR(interrupt_enable);
347 RW_ATTR(threshold_limit);
348 RW_ATTR(error_count);
349
350 static struct attribute *default_attrs[] = {
351         &interrupt_enable.attr,
352         &threshold_limit.attr,
353         &error_count.attr,
354         NULL
355 };
356
357 #define to_block(k) container_of(k, struct threshold_block, kobj)
358 #define to_attr(a) container_of(a, struct threshold_attr, attr)
359
360 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
361 {
362         struct threshold_block *b = to_block(kobj);
363         struct threshold_attr *a = to_attr(attr);
364         ssize_t ret;
365         ret = a->show ? a->show(b, buf) : -EIO;
366         return ret;
367 }
368
369 static ssize_t store(struct kobject *kobj, struct attribute *attr,
370                      const char *buf, size_t count)
371 {
372         struct threshold_block *b = to_block(kobj);
373         struct threshold_attr *a = to_attr(attr);
374         ssize_t ret;
375         ret = a->store ? a->store(b, buf, count) : -EIO;
376         return ret;
377 }
378
379 static struct sysfs_ops threshold_ops = {
380         .show = show,
381         .store = store,
382 };
383
384 static struct kobj_type threshold_ktype = {
385         .sysfs_ops = &threshold_ops,
386         .default_attrs = default_attrs,
387 };
388
389 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
390                                                unsigned int bank,
391                                                unsigned int block,
392                                                u32 address)
393 {
394         int err;
395         u32 low, high;
396         struct threshold_block *b = NULL;
397
398         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
399                 return 0;
400
401         if (rdmsr_safe(address, &low, &high))
402                 return 0;
403
404         if (!(high & MASK_VALID_HI)) {
405                 if (block)
406                         goto recurse;
407                 else
408                         return 0;
409         }
410
411         if (!(high & MASK_CNTP_HI)  ||
412              (high & MASK_LOCKED_HI))
413                 goto recurse;
414
415         b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
416         if (!b)
417                 return -ENOMEM;
418
419         b->block = block;
420         b->bank = bank;
421         b->cpu = cpu;
422         b->address = address;
423         b->interrupt_enable = 0;
424         b->threshold_limit = THRESHOLD_MAX;
425
426         INIT_LIST_HEAD(&b->miscj);
427
428         if (per_cpu(threshold_banks, cpu)[bank]->blocks)
429                 list_add(&b->miscj,
430                          &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
431         else
432                 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
433
434         kobject_set_name(&b->kobj, "misc%i", block);
435         b->kobj.parent = &per_cpu(threshold_banks, cpu)[bank]->kobj;
436         b->kobj.ktype = &threshold_ktype;
437         err = kobject_register(&b->kobj);
438         if (err)
439                 goto out_free;
440 recurse:
441         if (!block) {
442                 address = (low & MASK_BLKPTR_LO) >> 21;
443                 if (!address)
444                         return 0;
445                 address += MCG_XBLK_ADDR;
446         } else
447                 ++address;
448
449         err = allocate_threshold_blocks(cpu, bank, ++block, address);
450         if (err)
451                 goto out_free;
452
453         return err;
454
455 out_free:
456         if (b) {
457                 kobject_unregister(&b->kobj);
458                 kfree(b);
459         }
460         return err;
461 }
462
463 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
464 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
465 {
466         int i, err = 0;
467         struct threshold_bank *b = NULL;
468         cpumask_t oldmask = CPU_MASK_NONE;
469         char name[32];
470
471         sprintf(name, "threshold_bank%i", bank);
472
473 #ifdef CONFIG_SMP
474         if (cpu_data[cpu].cpu_core_id && shared_bank[bank]) {   /* symlink */
475                 i = first_cpu(cpu_core_map[cpu]);
476
477                 /* first core not up yet */
478                 if (cpu_data[i].cpu_core_id)
479                         goto out;
480
481                 /* already linked */
482                 if (per_cpu(threshold_banks, cpu)[bank])
483                         goto out;
484
485                 b = per_cpu(threshold_banks, i)[bank];
486
487                 if (!b)
488                         goto out;
489
490                 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
491                                         &b->kobj, name);
492                 if (err)
493                         goto out;
494
495                 b->cpus = cpu_core_map[cpu];
496                 per_cpu(threshold_banks, cpu)[bank] = b;
497                 goto out;
498         }
499 #endif
500
501         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
502         if (!b) {
503                 err = -ENOMEM;
504                 goto out;
505         }
506
507         kobject_set_name(&b->kobj, "threshold_bank%i", bank);
508         b->kobj.parent = &per_cpu(device_mce, cpu).kobj;
509 #ifndef CONFIG_SMP
510         b->cpus = CPU_MASK_ALL;
511 #else
512         b->cpus = cpu_core_map[cpu];
513 #endif
514         err = kobject_register(&b->kobj);
515         if (err)
516                 goto out_free;
517
518         per_cpu(threshold_banks, cpu)[bank] = b;
519
520         oldmask = affinity_set(cpu);
521         err = allocate_threshold_blocks(cpu, bank, 0,
522                                         MSR_IA32_MC0_MISC + bank * 4);
523         affinity_restore(oldmask);
524
525         if (err)
526                 goto out_free;
527
528         for_each_cpu_mask(i, b->cpus) {
529                 if (i == cpu)
530                         continue;
531
532                 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
533                                         &b->kobj, name);
534                 if (err)
535                         goto out;
536
537                 per_cpu(threshold_banks, i)[bank] = b;
538         }
539
540         goto out;
541
542 out_free:
543         per_cpu(threshold_banks, cpu)[bank] = NULL;
544         kfree(b);
545 out:
546         return err;
547 }
548
549 /* create dir/files for all valid threshold banks */
550 static __cpuinit int threshold_create_device(unsigned int cpu)
551 {
552         unsigned int bank;
553         int err = 0;
554
555         for (bank = 0; bank < NR_BANKS; ++bank) {
556                 if (!(per_cpu(bank_map, cpu) & 1 << bank))
557                         continue;
558                 err = threshold_create_bank(cpu, bank);
559                 if (err)
560                         goto out;
561         }
562 out:
563         return err;
564 }
565
566 /*
567  * let's be hotplug friendly.
568  * in case of multiple core processors, the first core always takes ownership
569  *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
570  */
571
572 static void deallocate_threshold_block(unsigned int cpu,
573                                                  unsigned int bank)
574 {
575         struct threshold_block *pos = NULL;
576         struct threshold_block *tmp = NULL;
577         struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
578
579         if (!head)
580                 return;
581
582         list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
583                 kobject_unregister(&pos->kobj);
584                 list_del(&pos->miscj);
585                 kfree(pos);
586         }
587
588         kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
589         per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
590 }
591
592 static void threshold_remove_bank(unsigned int cpu, int bank)
593 {
594         int i = 0;
595         struct threshold_bank *b;
596         char name[32];
597
598         b = per_cpu(threshold_banks, cpu)[bank];
599
600         if (!b)
601                 return;
602
603         if (!b->blocks)
604                 goto free_out;
605
606         sprintf(name, "threshold_bank%i", bank);
607
608 #ifdef CONFIG_SMP
609         /* sibling symlink */
610         if (shared_bank[bank] && b->blocks->cpu != cpu) {
611                 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
612                 per_cpu(threshold_banks, cpu)[bank] = NULL;
613                 return;
614         }
615 #endif
616
617         /* remove all sibling symlinks before unregistering */
618         for_each_cpu_mask(i, b->cpus) {
619                 if (i == cpu)
620                         continue;
621
622                 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
623                 per_cpu(threshold_banks, i)[bank] = NULL;
624         }
625
626         deallocate_threshold_block(cpu, bank);
627
628 free_out:
629         kobject_unregister(&b->kobj);
630         kfree(b);
631         per_cpu(threshold_banks, cpu)[bank] = NULL;
632 }
633
634 static void threshold_remove_device(unsigned int cpu)
635 {
636         unsigned int bank;
637
638         for (bank = 0; bank < NR_BANKS; ++bank) {
639                 if (!(per_cpu(bank_map, cpu) & 1 << bank))
640                         continue;
641                 threshold_remove_bank(cpu, bank);
642         }
643 }
644
645 /* get notified when a cpu comes on/off */
646 static int threshold_cpu_callback(struct notifier_block *nfb,
647                                             unsigned long action, void *hcpu)
648 {
649         /* cpu was unsigned int to begin with */
650         unsigned int cpu = (unsigned long)hcpu;
651
652         if (cpu >= NR_CPUS)
653                 goto out;
654
655         switch (action) {
656         case CPU_ONLINE:
657                 threshold_create_device(cpu);
658                 break;
659         case CPU_DEAD:
660                 threshold_remove_device(cpu);
661                 break;
662         default:
663                 break;
664         }
665       out:
666         return NOTIFY_OK;
667 }
668
669 static struct notifier_block threshold_cpu_notifier = {
670         .notifier_call = threshold_cpu_callback,
671 };
672
673 static __init int threshold_init_device(void)
674 {
675         unsigned lcpu = 0;
676
677         /* to hit CPUs online before the notifier is up */
678         for_each_online_cpu(lcpu) {
679                 int err = threshold_create_device(lcpu);
680                 if (err)
681                         return err;
682         }
683         register_hotcpu_notifier(&threshold_cpu_notifier);
684         return 0;
685 }
686
687 device_initcall(threshold_init_device);