2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
5 * Flat APIC subarch code. Maximum 8 CPUs, logical delivery.
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
11 #include <linux/config.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/init.h>
21 static cpumask_t flat_target_cpus(void)
23 return cpu_online_map;
27 * Set up the logical destination ID.
29 * Intel recommends to set DFR, LDR and TPR before enabling
30 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
31 * document number 292116). So here it goes...
33 static void flat_init_apic_ldr(void)
36 unsigned long num, id;
38 num = smp_processor_id();
40 x86_cpu_to_log_apicid[num] = id;
41 apic_write_around(APIC_DFR, APIC_DFR_FLAT);
42 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
43 val |= SET_APIC_LOGICAL_ID(id);
44 apic_write_around(APIC_LDR, val);
47 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
49 unsigned long mask = cpus_addr(cpumask)[0];
53 local_save_flags(flags);
62 * prepare target chip field
64 cfg = __prepare_ICR2(mask);
65 apic_write_around(APIC_ICR2, cfg);
70 cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);
73 * Send the IPI. The write to APIC_ICR fires this off.
75 apic_write_around(APIC_ICR, cfg);
76 local_irq_restore(flags);
79 static void flat_send_IPI_allbutself(int vector)
81 if (((num_online_cpus()) - 1) >= 1)
82 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
85 static void flat_send_IPI_all(int vector)
87 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
90 static int flat_apic_id_registered(void)
92 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
95 static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
97 return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
100 static unsigned int phys_pkg_id(int index_msb)
105 return ((ebx >> 24) & 0xFF) >> index_msb;
108 struct genapic apic_flat = {
110 .int_delivery_mode = dest_LowestPrio,
111 .int_dest_mode = (APIC_DEST_LOGICAL != 0),
112 .int_delivery_dest = APIC_DEST_LOGICAL | APIC_DM_LOWEST,
113 .target_cpus = flat_target_cpus,
114 .apic_id_registered = flat_apic_id_registered,
115 .init_apic_ldr = flat_init_apic_ldr,
116 .send_IPI_all = flat_send_IPI_all,
117 .send_IPI_allbutself = flat_send_IPI_allbutself,
118 .send_IPI_mask = flat_send_IPI_mask,
119 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
120 .phys_pkg_id = phys_pkg_id,