arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58 #include <asm/pvclock.h>
  59 #include <asm/div64.h>
  60
  61 #define MAX_IO_MSRS 256
  62 #define CR0_RESERVED_BITS                                               \
  63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  66 #define CR4_RESERVED_BITS                                               \
  67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  70                           | X86_CR4_OSXSAVE \
  71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  72
  73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  74
  75 #define KVM_MAX_MCE_BANKS 32
  76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  84 #else
  85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  86 #endif
  87
  88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  90
  91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  93                                     struct kvm_cpuid_entry2 __user *entries);
  94
  95 struct kvm_x86_ops *kvm_x86_ops;
  96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  97
  98 int ignore_msrs = 0;
  99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 100
 101 #define KVM_NR_SHARED_MSRS 16
 102
 103 struct kvm_shared_msrs_global {
 104         int nr;
 105         u32 msrs[KVM_NR_SHARED_MSRS];
 106 };
 107
 108 struct kvm_shared_msrs {
 109         struct user_return_notifier urn;
 110         bool registered;
 111         struct kvm_shared_msr_values {
 112                 u64 host;
 113                 u64 curr;
 114         } values[KVM_NR_SHARED_MSRS];
 115 };
 116
 117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 119
 120 struct kvm_stats_debugfs_item debugfs_entries[] = {
 121         { "pf_fixed", VCPU_STAT(pf_fixed) },
 122         { "pf_guest", VCPU_STAT(pf_guest) },
 123         { "tlb_flush", VCPU_STAT(tlb_flush) },
 124         { "invlpg", VCPU_STAT(invlpg) },
 125         { "exits", VCPU_STAT(exits) },
 126         { "io_exits", VCPU_STAT(io_exits) },
 127         { "mmio_exits", VCPU_STAT(mmio_exits) },
 128         { "signal_exits", VCPU_STAT(signal_exits) },
 129         { "irq_window", VCPU_STAT(irq_window_exits) },
 130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 131         { "halt_exits", VCPU_STAT(halt_exits) },
 132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 133         { "hypercalls", VCPU_STAT(hypercalls) },
 134         { "request_irq", VCPU_STAT(request_irq_exits) },
 135         { "irq_exits", VCPU_STAT(irq_exits) },
 136         { "host_state_reload", VCPU_STAT(host_state_reload) },
 137         { "efer_reload", VCPU_STAT(efer_reload) },
 138         { "fpu_reload", VCPU_STAT(fpu_reload) },
 139         { "insn_emulation", VCPU_STAT(insn_emulation) },
 140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 141         { "irq_injections", VCPU_STAT(irq_injections) },
 142         { "nmi_injections", VCPU_STAT(nmi_injections) },
 143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 147         { "mmu_flooded", VM_STAT(mmu_flooded) },
 148         { "mmu_recycled", VM_STAT(mmu_recycled) },
 149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 150         { "mmu_unsync", VM_STAT(mmu_unsync) },
 151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 152         { "largepages", VM_STAT(lpages) },
 153         { NULL }
 154 };
 155
 156 u64 __read_mostly host_xcr0;
 157
 158 static inline u32 bit(int bitno)
 159 {
 160         return 1 << (bitno & 31);
 161 }
 162
 163 static void kvm_on_user_return(struct user_return_notifier *urn)
 164 {
 165         unsigned slot;
 166         struct kvm_shared_msrs *locals
 167                 = container_of(urn, struct kvm_shared_msrs, urn);
 168         struct kvm_shared_msr_values *values;
 169
 170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 171                 values = &locals->values[slot];
 172                 if (values->host != values->curr) {
 173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 174                         values->curr = values->host;
 175                 }
 176         }
 177         locals->registered = false;
 178         user_return_notifier_unregister(urn);
 179 }
 180
 181 static void shared_msr_update(unsigned slot, u32 msr)
 182 {
 183         struct kvm_shared_msrs *smsr;
 184         u64 value;
 185
 186         smsr = &__get_cpu_var(shared_msrs);
 187         /* only read, and nobody should modify it at this time,
 188          * so don't need lock */
 189         if (slot >= shared_msrs_global.nr) {
 190                 printk(KERN_ERR "kvm: invalid MSR slot!");
 191                 return;
 192         }
 193         rdmsrl_safe(msr, &value);
 194         smsr->values[slot].host = value;
 195         smsr->values[slot].curr = value;
 196 }
 197
 198 void kvm_define_shared_msr(unsigned slot, u32 msr)
 199 {
 200         if (slot >= shared_msrs_global.nr)
 201                 shared_msrs_global.nr = slot + 1;
 202         shared_msrs_global.msrs[slot] = msr;
 203         /* we need ensured the shared_msr_global have been updated */
 204         smp_wmb();
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 207
 208 static void kvm_shared_msr_cpu_online(void)
 209 {
 210         unsigned i;
 211
 212         for (i = 0; i < shared_msrs_global.nr; ++i)
 213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 214 }
 215
 216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 217 {
 218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 219
 220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 221                 return;
 222         smsr->values[slot].curr = value;
 223         wrmsrl(shared_msrs_global.msrs[slot], value);
 224         if (!smsr->registered) {
 225                 smsr->urn.on_user_return = kvm_on_user_return;
 226                 user_return_notifier_register(&smsr->urn);
 227                 smsr->registered = true;
 228         }
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 231
 232 static void drop_user_return_notifiers(void *ignore)
 233 {
 234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 235
 236         if (smsr->registered)
 237                 kvm_on_user_return(&smsr->urn);
 238 }
 239
 240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 241 {
 242         if (irqchip_in_kernel(vcpu->kvm))
 243                 return vcpu->arch.apic_base;
 244         else
 245                 return vcpu->arch.apic_base;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 248
 249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 250 {
 251         /* TODO: reserve bits check */
 252         if (irqchip_in_kernel(vcpu->kvm))
 253                 kvm_lapic_set_base(vcpu, data);
 254         else
 255                 vcpu->arch.apic_base = data;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 258
 259 #define EXCPT_BENIGN            0
 260 #define EXCPT_CONTRIBUTORY      1
 261 #define EXCPT_PF                2
 262
 263 static int exception_class(int vector)
 264 {
 265         switch (vector) {
 266         case PF_VECTOR:
 267                 return EXCPT_PF;
 268         case DE_VECTOR:
 269         case TS_VECTOR:
 270         case NP_VECTOR:
 271         case SS_VECTOR:
 272         case GP_VECTOR:
 273                 return EXCPT_CONTRIBUTORY;
 274         default:
 275                 break;
 276         }
 277         return EXCPT_BENIGN;
 278 }
 279
 280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 281                 unsigned nr, bool has_error, u32 error_code,
 282                 bool reinject)
 283 {
 284         u32 prev_nr;
 285         int class1, class2;
 286
 287         if (!vcpu->arch.exception.pending) {
 288         queue:
 289                 vcpu->arch.exception.pending = true;
 290                 vcpu->arch.exception.has_error_code = has_error;
 291                 vcpu->arch.exception.nr = nr;
 292                 vcpu->arch.exception.error_code = error_code;
 293                 vcpu->arch.exception.reinject = reinject;
 294                 return;
 295         }
 296
 297         /* to check exception */
 298         prev_nr = vcpu->arch.exception.nr;
 299         if (prev_nr == DF_VECTOR) {
 300                 /* triple fault -> shutdown */
 301                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 302                 return;
 303         }
 304         class1 = exception_class(prev_nr);
 305         class2 = exception_class(nr);
 306         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 307                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 308                 /* generate double fault per SDM Table 5-5 */
 309                 vcpu->arch.exception.pending = true;
 310                 vcpu->arch.exception.has_error_code = true;
 311                 vcpu->arch.exception.nr = DF_VECTOR;
 312                 vcpu->arch.exception.error_code = 0;
 313         } else
 314                 /* replace previous exception with a new one in a hope
 315                    that instruction re-execution will regenerate lost
 316                    exception */
 317                 goto queue;
 318 }
 319
 320 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 321 {
 322         kvm_multiple_exception(vcpu, nr, false, 0, false);
 323 }
 324 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 325
 326 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 327 {
 328         kvm_multiple_exception(vcpu, nr, false, 0, true);
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 331
 332 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 333 {
 334         unsigned error_code = vcpu->arch.fault.error_code;
 335
 336         ++vcpu->stat.pf_guest;
 337         vcpu->arch.cr2 = vcpu->arch.fault.address;
 338         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 339 }
 340
 341 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 342 {
 343         u32 nested, error;
 344
 345         error   = vcpu->arch.fault.error_code;
 346         nested  = error &  PFERR_NESTED_MASK;
 347         error   = error & ~PFERR_NESTED_MASK;
 348
 349         vcpu->arch.fault.error_code = error;
 350
 351         if (mmu_is_nested(vcpu) && !nested)
 352                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 353         else
 354                 vcpu->arch.mmu.inject_page_fault(vcpu);
 355 }
 356
 357 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 358 {
 359         vcpu->arch.nmi_pending = 1;
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 362
 363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 364 {
 365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 368
 369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 374
 375 /*
 376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 377  * a #GP and return false.
 378  */
 379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 380 {
 381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 382                 return true;
 383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 384         return false;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 387
 388 /*
 389  * This function will be used to read from the physical memory of the currently
 390  * running guest. The difference to kvm_read_guest_page is that this function
 391  * can read from guest physical or from the guest's guest physical memory.
 392  */
 393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 394                             gfn_t ngfn, void *data, int offset, int len,
 395                             u32 access)
 396 {
 397         gfn_t real_gfn;
 398         gpa_t ngpa;
 399
 400         ngpa     = gfn_to_gpa(ngfn);
 401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 402         if (real_gfn == UNMAPPED_GVA)
 403                 return -EFAULT;
 404
 405         real_gfn = gpa_to_gfn(real_gfn);
 406
 407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 410
 411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 412                                void *data, int offset, int len, u32 access)
 413 {
 414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 415                                        data, offset, len, access);
 416 }
 417
 418 /*
 419  * Load the pae pdptrs.  Return true is they are all valid.
 420  */
 421 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 422 {
 423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 425         int i;
 426         int ret;
 427         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 428
 429         ret = kvm_read_nested_guest_page(vcpu, pdpt_gfn, pdpte,
 430                                          offset * sizeof(u64), sizeof(pdpte),
 431                                          PFERR_USER_MASK|PFERR_WRITE_MASK);
 432         if (ret < 0) {
 433                 ret = 0;
 434                 goto out;
 435         }
 436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 437                 if (is_present_gpte(pdpte[i]) &&
 438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 439                         ret = 0;
 440                         goto out;
 441                 }
 442         }
 443         ret = 1;
 444
 445         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 446         __set_bit(VCPU_EXREG_PDPTR,
 447                   (unsigned long *)&vcpu->arch.regs_avail);
 448         __set_bit(VCPU_EXREG_PDPTR,
 449                   (unsigned long *)&vcpu->arch.regs_dirty);
 450 out:
 451
 452         return ret;
 453 }
 454 EXPORT_SYMBOL_GPL(load_pdptrs);
 455
 456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 457 {
 458         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 459         bool changed = true;
 460         int offset;
 461         gfn_t gfn;
 462         int r;
 463
 464         if (is_long_mode(vcpu) || !is_pae(vcpu))
 465                 return false;
 466
 467         if (!test_bit(VCPU_EXREG_PDPTR,
 468                       (unsigned long *)&vcpu->arch.regs_avail))
 469                 return true;
 470
 471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 475         if (r < 0)
 476                 goto out;
 477         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 478 out:
 479
 480         return changed;
 481 }
 482
 483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 484 {
 485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 487                                     X86_CR0_CD | X86_CR0_NW;
 488
 489         cr0 |= X86_CR0_ET;
 490
 491 #ifdef CONFIG_X86_64
 492         if (cr0 & 0xffffffff00000000UL)
 493                 return 1;
 494 #endif
 495
 496         cr0 &= ~CR0_RESERVED_BITS;
 497
 498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 499                 return 1;
 500
 501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 502                 return 1;
 503
 504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 505 #ifdef CONFIG_X86_64
 506                 if ((vcpu->arch.efer & EFER_LME)) {
 507                         int cs_db, cs_l;
 508
 509                         if (!is_pae(vcpu))
 510                                 return 1;
 511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 512                         if (cs_l)
 513                                 return 1;
 514                 } else
 515 #endif
 516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
 517                         return 1;
 518         }
 519
 520         kvm_x86_ops->set_cr0(vcpu, cr0);
 521
 522         if ((cr0 ^ old_cr0) & update_bits)
 523                 kvm_mmu_reset_context(vcpu);
 524         return 0;
 525 }
 526 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 527
 528 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 529 {
 530         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_lmsw);
 533
 534 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 535 {
 536         u64 xcr0;
 537
 538         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 539         if (index != XCR_XFEATURE_ENABLED_MASK)
 540                 return 1;
 541         xcr0 = xcr;
 542         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 543                 return 1;
 544         if (!(xcr0 & XSTATE_FP))
 545                 return 1;
 546         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 547                 return 1;
 548         if (xcr0 & ~host_xcr0)
 549                 return 1;
 550         vcpu->arch.xcr0 = xcr0;
 551         vcpu->guest_xcr0_loaded = 0;
 552         return 0;
 553 }
 554
 555 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 556 {
 557         if (__kvm_set_xcr(vcpu, index, xcr)) {
 558                 kvm_inject_gp(vcpu, 0);
 559                 return 1;
 560         }
 561         return 0;
 562 }
 563 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 564
 565 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 566 {
 567         struct kvm_cpuid_entry2 *best;
 568
 569         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 570         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 571 }
 572
 573 static void update_cpuid(struct kvm_vcpu *vcpu)
 574 {
 575         struct kvm_cpuid_entry2 *best;
 576
 577         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 578         if (!best)
 579                 return;
 580
 581         /* Update OSXSAVE bit */
 582         if (cpu_has_xsave && best->function == 0x1) {
 583                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 584                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 585                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 586         }
 587 }
 588
 589 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 590 {
 591         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 592         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 593
 594         if (cr4 & CR4_RESERVED_BITS)
 595                 return 1;
 596
 597         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 598                 return 1;
 599
 600         if (is_long_mode(vcpu)) {
 601                 if (!(cr4 & X86_CR4_PAE))
 602                         return 1;
 603         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 604                    && ((cr4 ^ old_cr4) & pdptr_bits)
 605                    && !load_pdptrs(vcpu, vcpu->arch.cr3))
 606                 return 1;
 607
 608         if (cr4 & X86_CR4_VMXE)
 609                 return 1;
 610
 611         kvm_x86_ops->set_cr4(vcpu, cr4);
 612
 613         if ((cr4 ^ old_cr4) & pdptr_bits)
 614                 kvm_mmu_reset_context(vcpu);
 615
 616         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 617                 update_cpuid(vcpu);
 618
 619         return 0;
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 622
 623 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 624 {
 625         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 626                 kvm_mmu_sync_roots(vcpu);
 627                 kvm_mmu_flush_tlb(vcpu);
 628                 return 0;
 629         }
 630
 631         if (is_long_mode(vcpu)) {
 632                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 633                         return 1;
 634         } else {
 635                 if (is_pae(vcpu)) {
 636                         if (cr3 & CR3_PAE_RESERVED_BITS)
 637                                 return 1;
 638                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
 639                                 return 1;
 640                 }
 641                 /*
 642                  * We don't check reserved bits in nonpae mode, because
 643                  * this isn't enforced, and VMware depends on this.
 644                  */
 645         }
 646
 647         /*
 648          * Does the new cr3 value map to physical memory? (Note, we
 649          * catch an invalid cr3 even in real-mode, because it would
 650          * cause trouble later on when we turn on paging anyway.)
 651          *
 652          * A real CPU would silently accept an invalid cr3 and would
 653          * attempt to use it - with largely undefined (and often hard
 654          * to debug) behavior on the guest side.
 655          */
 656         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 657                 return 1;
 658         vcpu->arch.cr3 = cr3;
 659         vcpu->arch.mmu.new_cr3(vcpu);
 660         return 0;
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 663
 664 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 665 {
 666         if (cr8 & CR8_RESERVED_BITS)
 667                 return 1;
 668         if (irqchip_in_kernel(vcpu->kvm))
 669                 kvm_lapic_set_tpr(vcpu, cr8);
 670         else
 671                 vcpu->arch.cr8 = cr8;
 672         return 0;
 673 }
 674
 675 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 676 {
 677         if (__kvm_set_cr8(vcpu, cr8))
 678                 kvm_inject_gp(vcpu, 0);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 681
 682 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 683 {
 684         if (irqchip_in_kernel(vcpu->kvm))
 685                 return kvm_lapic_get_cr8(vcpu);
 686         else
 687                 return vcpu->arch.cr8;
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 690
 691 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 692 {
 693         switch (dr) {
 694         case 0 ... 3:
 695                 vcpu->arch.db[dr] = val;
 696                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 697                         vcpu->arch.eff_db[dr] = val;
 698                 break;
 699         case 4:
 700                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 701                         return 1; /* #UD */
 702                 /* fall through */
 703         case 6:
 704                 if (val & 0xffffffff00000000ULL)
 705                         return -1; /* #GP */
 706                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 707                 break;
 708         case 5:
 709                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 710                         return 1; /* #UD */
 711                 /* fall through */
 712         default: /* 7 */
 713                 if (val & 0xffffffff00000000ULL)
 714                         return -1; /* #GP */
 715                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 716                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 717                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 718                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 719                 }
 720                 break;
 721         }
 722
 723         return 0;
 724 }
 725
 726 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 727 {
 728         int res;
 729
 730         res = __kvm_set_dr(vcpu, dr, val);
 731         if (res > 0)
 732                 kvm_queue_exception(vcpu, UD_VECTOR);
 733         else if (res < 0)
 734                 kvm_inject_gp(vcpu, 0);
 735
 736         return res;
 737 }
 738 EXPORT_SYMBOL_GPL(kvm_set_dr);
 739
 740 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 741 {
 742         switch (dr) {
 743         case 0 ... 3:
 744                 *val = vcpu->arch.db[dr];
 745                 break;
 746         case 4:
 747                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 748                         return 1;
 749                 /* fall through */
 750         case 6:
 751                 *val = vcpu->arch.dr6;
 752                 break;
 753         case 5:
 754                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 755                         return 1;
 756                 /* fall through */
 757         default: /* 7 */
 758                 *val = vcpu->arch.dr7;
 759                 break;
 760         }
 761
 762         return 0;
 763 }
 764
 765 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 766 {
 767         if (_kvm_get_dr(vcpu, dr, val)) {
 768                 kvm_queue_exception(vcpu, UD_VECTOR);
 769                 return 1;
 770         }
 771         return 0;
 772 }
 773 EXPORT_SYMBOL_GPL(kvm_get_dr);
 774
 775 /*
 776  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 777  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 778  *
 779  * This list is modified at module load time to reflect the
 780  * capabilities of the host cpu. This capabilities test skips MSRs that are
 781  * kvm-specific. Those are put in the beginning of the list.
 782  */
 783
 784 #define KVM_SAVE_MSRS_BEGIN     7
 785 static u32 msrs_to_save[] = {
 786         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 787         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 788         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 789         HV_X64_MSR_APIC_ASSIST_PAGE,
 790         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 791         MSR_STAR,
 792 #ifdef CONFIG_X86_64
 793         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 794 #endif
 795         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 796 };
 797
 798 static unsigned num_msrs_to_save;
 799
 800 static u32 emulated_msrs[] = {
 801         MSR_IA32_MISC_ENABLE,
 802         MSR_IA32_MCG_STATUS,
 803         MSR_IA32_MCG_CTL,
 804 };
 805
 806 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 807 {
 808         u64 old_efer = vcpu->arch.efer;
 809
 810         if (efer & efer_reserved_bits)
 811                 return 1;
 812
 813         if (is_paging(vcpu)
 814             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 815                 return 1;
 816
 817         if (efer & EFER_FFXSR) {
 818                 struct kvm_cpuid_entry2 *feat;
 819
 820                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 821                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 822                         return 1;
 823         }
 824
 825         if (efer & EFER_SVME) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 830                         return 1;
 831         }
 832
 833         efer &= ~EFER_LMA;
 834         efer |= vcpu->arch.efer & EFER_LMA;
 835
 836         kvm_x86_ops->set_efer(vcpu, efer);
 837
 838         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 839         kvm_mmu_reset_context(vcpu);
 840
 841         /* Update reserved bits */
 842         if ((efer ^ old_efer) & EFER_NX)
 843                 kvm_mmu_reset_context(vcpu);
 844
 845         return 0;
 846 }
 847
 848 void kvm_enable_efer_bits(u64 mask)
 849 {
 850        efer_reserved_bits &= ~mask;
 851 }
 852 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 853
 854
 855 /*
 856  * Writes msr value into into the appropriate "register".
 857  * Returns 0 on success, non-0 otherwise.
 858  * Assumes vcpu_load() was already called.
 859  */
 860 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 861 {
 862         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 863 }
 864
 865 /*
 866  * Adapt set_msr() to msr_io()'s calling convention
 867  */
 868 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 869 {
 870         return kvm_set_msr(vcpu, index, *data);
 871 }
 872
 873 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 874 {
 875         int version;
 876         int r;
 877         struct pvclock_wall_clock wc;
 878         struct timespec boot;
 879
 880         if (!wall_clock)
 881                 return;
 882
 883         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 884         if (r)
 885                 return;
 886
 887         if (version & 1)
 888                 ++version;  /* first time write, random junk */
 889
 890         ++version;
 891
 892         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 893
 894         /*
 895          * The guest calculates current wall clock time by adding
 896          * system time (updated by kvm_write_guest_time below) to the
 897          * wall clock specified here.  guest system time equals host
 898          * system time for us, thus we must fill in host boot time here.
 899          */
 900         getboottime(&boot);
 901
 902         wc.sec = boot.tv_sec;
 903         wc.nsec = boot.tv_nsec;
 904         wc.version = version;
 905
 906         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 907
 908         version++;
 909         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 910 }
 911
 912 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 913 {
 914         uint32_t quotient, remainder;
 915
 916         /* Don't try to replace with do_div(), this one calculates
 917          * "(dividend << 32) / divisor" */
 918         __asm__ ( "divl %4"
 919                   : "=a" (quotient), "=d" (remainder)
 920                   : "0" (0), "1" (dividend), "r" (divisor) );
 921         return quotient;
 922 }
 923
 924 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 925 {
 926         uint64_t nsecs = 1000000000LL;
 927         int32_t  shift = 0;
 928         uint64_t tps64;
 929         uint32_t tps32;
 930
 931         tps64 = tsc_khz * 1000LL;
 932         while (tps64 > nsecs*2) {
 933                 tps64 >>= 1;
 934                 shift--;
 935         }
 936
 937         tps32 = (uint32_t)tps64;
 938         while (tps32 <= (uint32_t)nsecs) {
 939                 tps32 <<= 1;
 940                 shift++;
 941         }
 942
 943         hv_clock->tsc_shift = shift;
 944         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 945
 946         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 947                  __func__, tsc_khz, hv_clock->tsc_shift,
 948                  hv_clock->tsc_to_system_mul);
 949 }
 950
 951 static inline u64 get_kernel_ns(void)
 952 {
 953         struct timespec ts;
 954
 955         WARN_ON(preemptible());
 956         ktime_get_ts(&ts);
 957         monotonic_to_bootbased(&ts);
 958         return timespec_to_ns(&ts);
 959 }
 960
 961 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 962
 963 static inline int kvm_tsc_changes_freq(void)
 964 {
 965         int cpu = get_cpu();
 966         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 967                   cpufreq_quick_get(cpu) != 0;
 968         put_cpu();
 969         return ret;
 970 }
 971
 972 static inline u64 nsec_to_cycles(u64 nsec)
 973 {
 974         u64 ret;
 975
 976         WARN_ON(preemptible());
 977         if (kvm_tsc_changes_freq())
 978                 printk_once(KERN_WARNING
 979                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 980         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 981         do_div(ret, USEC_PER_SEC);
 982         return ret;
 983 }
 984
 985 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
 986 {
 987         struct kvm *kvm = vcpu->kvm;
 988         u64 offset, ns, elapsed;
 989         unsigned long flags;
 990         s64 sdiff;
 991
 992         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
 993         offset = data - native_read_tsc();
 994         ns = get_kernel_ns();
 995         elapsed = ns - kvm->arch.last_tsc_nsec;
 996         sdiff = data - kvm->arch.last_tsc_write;
 997         if (sdiff < 0)
 998                 sdiff = -sdiff;
 999
1000         /*
1001          * Special case: close write to TSC within 5 seconds of
1002          * another CPU is interpreted as an attempt to synchronize
1003          * The 5 seconds is to accomodate host load / swapping as
1004          * well as any reset of TSC during the boot process.
1005          *
1006          * In that case, for a reliable TSC, we can match TSC offsets,
1007          * or make a best guest using elapsed value.
1008          */
1009         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1010             elapsed < 5ULL * NSEC_PER_SEC) {
1011                 if (!check_tsc_unstable()) {
1012                         offset = kvm->arch.last_tsc_offset;
1013                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1014                 } else {
1015                         u64 delta = nsec_to_cycles(elapsed);
1016                         offset += delta;
1017                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1018                 }
1019                 ns = kvm->arch.last_tsc_nsec;
1020         }
1021         kvm->arch.last_tsc_nsec = ns;
1022         kvm->arch.last_tsc_write = data;
1023         kvm->arch.last_tsc_offset = offset;
1024         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1025         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1026
1027         /* Reset of TSC must disable overshoot protection below */
1028         vcpu->arch.hv_clock.tsc_timestamp = 0;
1029 }
1030 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1031
1032 static int kvm_write_guest_time(struct kvm_vcpu *v)
1033 {
1034         unsigned long flags;
1035         struct kvm_vcpu_arch *vcpu = &v->arch;
1036         void *shared_kaddr;
1037         unsigned long this_tsc_khz;
1038         s64 kernel_ns, max_kernel_ns;
1039         u64 tsc_timestamp;
1040
1041         if ((!vcpu->time_page))
1042                 return 0;
1043
1044         /* Keep irq disabled to prevent changes to the clock */
1045         local_irq_save(flags);
1046         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1047         kernel_ns = get_kernel_ns();
1048         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1049         local_irq_restore(flags);
1050
1051         if (unlikely(this_tsc_khz == 0)) {
1052                 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1053                 return 1;
1054         }
1055
1056         /*
1057          * Time as measured by the TSC may go backwards when resetting the base
1058          * tsc_timestamp.  The reason for this is that the TSC resolution is
1059          * higher than the resolution of the other clock scales.  Thus, many
1060          * possible measurments of the TSC correspond to one measurement of any
1061          * other clock, and so a spread of values is possible.  This is not a
1062          * problem for the computation of the nanosecond clock; with TSC rates
1063          * around 1GHZ, there can only be a few cycles which correspond to one
1064          * nanosecond value, and any path through this code will inevitably
1065          * take longer than that.  However, with the kernel_ns value itself,
1066          * the precision may be much lower, down to HZ granularity.  If the
1067          * first sampling of TSC against kernel_ns ends in the low part of the
1068          * range, and the second in the high end of the range, we can get:
1069          *
1070          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1071          *
1072          * As the sampling errors potentially range in the thousands of cycles,
1073          * it is possible such a time value has already been observed by the
1074          * guest.  To protect against this, we must compute the system time as
1075          * observed by the guest and ensure the new system time is greater.
1076          */
1077         max_kernel_ns = 0;
1078         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1079                 max_kernel_ns = vcpu->last_guest_tsc -
1080                                 vcpu->hv_clock.tsc_timestamp;
1081                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1082                                     vcpu->hv_clock.tsc_to_system_mul,
1083                                     vcpu->hv_clock.tsc_shift);
1084                 max_kernel_ns += vcpu->last_kernel_ns;
1085         }
1086
1087         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1088                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1089                 vcpu->hw_tsc_khz = this_tsc_khz;
1090         }
1091
1092         if (max_kernel_ns > kernel_ns)
1093                 kernel_ns = max_kernel_ns;
1094
1095         /* With all the info we got, fill in the values */
1096         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1097         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1098         vcpu->last_kernel_ns = kernel_ns;
1099         vcpu->hv_clock.flags = 0;
1100
1101         /*
1102          * The interface expects us to write an even number signaling that the
1103          * update is finished. Since the guest won't see the intermediate
1104          * state, we just increase by 2 at the end.
1105          */
1106         vcpu->hv_clock.version += 2;
1107
1108         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1109
1110         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1111                sizeof(vcpu->hv_clock));
1112
1113         kunmap_atomic(shared_kaddr, KM_USER0);
1114
1115         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1116         return 0;
1117 }
1118
1119 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1120 {
1121         struct kvm_vcpu_arch *vcpu = &v->arch;
1122
1123         if (!vcpu->time_page)
1124                 return 0;
1125         kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1126         return 1;
1127 }
1128
1129 static bool msr_mtrr_valid(unsigned msr)
1130 {
1131         switch (msr) {
1132         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1133         case MSR_MTRRfix64K_00000:
1134         case MSR_MTRRfix16K_80000:
1135         case MSR_MTRRfix16K_A0000:
1136         case MSR_MTRRfix4K_C0000:
1137         case MSR_MTRRfix4K_C8000:
1138         case MSR_MTRRfix4K_D0000:
1139         case MSR_MTRRfix4K_D8000:
1140         case MSR_MTRRfix4K_E0000:
1141         case MSR_MTRRfix4K_E8000:
1142         case MSR_MTRRfix4K_F0000:
1143         case MSR_MTRRfix4K_F8000:
1144         case MSR_MTRRdefType:
1145         case MSR_IA32_CR_PAT:
1146                 return true;
1147         case 0x2f8:
1148                 return true;
1149         }
1150         return false;
1151 }
1152
1153 static bool valid_pat_type(unsigned t)
1154 {
1155         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1156 }
1157
1158 static bool valid_mtrr_type(unsigned t)
1159 {
1160         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1161 }
1162
1163 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1164 {
1165         int i;
1166
1167         if (!msr_mtrr_valid(msr))
1168                 return false;
1169
1170         if (msr == MSR_IA32_CR_PAT) {
1171                 for (i = 0; i < 8; i++)
1172                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1173                                 return false;
1174                 return true;
1175         } else if (msr == MSR_MTRRdefType) {
1176                 if (data & ~0xcff)
1177                         return false;
1178                 return valid_mtrr_type(data & 0xff);
1179         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1180                 for (i = 0; i < 8 ; i++)
1181                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1182                                 return false;
1183                 return true;
1184         }
1185
1186         /* variable MTRRs */
1187         return valid_mtrr_type(data & 0xff);
1188 }
1189
1190 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1191 {
1192         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1193
1194         if (!mtrr_valid(vcpu, msr, data))
1195                 return 1;
1196
1197         if (msr == MSR_MTRRdefType) {
1198                 vcpu->arch.mtrr_state.def_type = data;
1199                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1200         } else if (msr == MSR_MTRRfix64K_00000)
1201                 p[0] = data;
1202         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1203                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1204         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1205                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1206         else if (msr == MSR_IA32_CR_PAT)
1207                 vcpu->arch.pat = data;
1208         else {  /* Variable MTRRs */
1209                 int idx, is_mtrr_mask;
1210                 u64 *pt;
1211
1212                 idx = (msr - 0x200) / 2;
1213                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1214                 if (!is_mtrr_mask)
1215                         pt =
1216                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1217                 else
1218                         pt =
1219                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1220                 *pt = data;
1221         }
1222
1223         kvm_mmu_reset_context(vcpu);
1224         return 0;
1225 }
1226
1227 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1228 {
1229         u64 mcg_cap = vcpu->arch.mcg_cap;
1230         unsigned bank_num = mcg_cap & 0xff;
1231
1232         switch (msr) {
1233         case MSR_IA32_MCG_STATUS:
1234                 vcpu->arch.mcg_status = data;
1235                 break;
1236         case MSR_IA32_MCG_CTL:
1237                 if (!(mcg_cap & MCG_CTL_P))
1238                         return 1;
1239                 if (data != 0 && data != ~(u64)0)
1240                         return -1;
1241                 vcpu->arch.mcg_ctl = data;
1242                 break;
1243         default:
1244                 if (msr >= MSR_IA32_MC0_CTL &&
1245                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1246                         u32 offset = msr - MSR_IA32_MC0_CTL;
1247                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1248                          * some Linux kernels though clear bit 10 in bank 4 to
1249                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1250                          * this to avoid an uncatched #GP in the guest
1251                          */
1252                         if ((offset & 0x3) == 0 &&
1253                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1254                                 return -1;
1255                         vcpu->arch.mce_banks[offset] = data;
1256                         break;
1257                 }
1258                 return 1;
1259         }
1260         return 0;
1261 }
1262
1263 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1264 {
1265         struct kvm *kvm = vcpu->kvm;
1266         int lm = is_long_mode(vcpu);
1267         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1268                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1269         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1270                 : kvm->arch.xen_hvm_config.blob_size_32;
1271         u32 page_num = data & ~PAGE_MASK;
1272         u64 page_addr = data & PAGE_MASK;
1273         u8 *page;
1274         int r;
1275
1276         r = -E2BIG;
1277         if (page_num >= blob_size)
1278                 goto out;
1279         r = -ENOMEM;
1280         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1281         if (!page)
1282                 goto out;
1283         r = -EFAULT;
1284         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1285                 goto out_free;
1286         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1287                 goto out_free;
1288         r = 0;
1289 out_free:
1290         kfree(page);
1291 out:
1292         return r;
1293 }
1294
1295 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1296 {
1297         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1298 }
1299
1300 static bool kvm_hv_msr_partition_wide(u32 msr)
1301 {
1302         bool r = false;
1303         switch (msr) {
1304         case HV_X64_MSR_GUEST_OS_ID:
1305         case HV_X64_MSR_HYPERCALL:
1306                 r = true;
1307                 break;
1308         }
1309
1310         return r;
1311 }
1312
1313 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1314 {
1315         struct kvm *kvm = vcpu->kvm;
1316
1317         switch (msr) {
1318         case HV_X64_MSR_GUEST_OS_ID:
1319                 kvm->arch.hv_guest_os_id = data;
1320                 /* setting guest os id to zero disables hypercall page */
1321                 if (!kvm->arch.hv_guest_os_id)
1322                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1323                 break;
1324         case HV_X64_MSR_HYPERCALL: {
1325                 u64 gfn;
1326                 unsigned long addr;
1327                 u8 instructions[4];
1328
1329                 /* if guest os id is not set hypercall should remain disabled */
1330                 if (!kvm->arch.hv_guest_os_id)
1331                         break;
1332                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1333                         kvm->arch.hv_hypercall = data;
1334                         break;
1335                 }
1336                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1337                 addr = gfn_to_hva(kvm, gfn);
1338                 if (kvm_is_error_hva(addr))
1339                         return 1;
1340                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1341                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1342                 if (copy_to_user((void __user *)addr, instructions, 4))
1343                         return 1;
1344                 kvm->arch.hv_hypercall = data;
1345                 break;
1346         }
1347         default:
1348                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1349                           "data 0x%llx\n", msr, data);
1350                 return 1;
1351         }
1352         return 0;
1353 }
1354
1355 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1356 {
1357         switch (msr) {
1358         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1359                 unsigned long addr;
1360
1361                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1362                         vcpu->arch.hv_vapic = data;
1363                         break;
1364                 }
1365                 addr = gfn_to_hva(vcpu->kvm, data >>
1366                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1367                 if (kvm_is_error_hva(addr))
1368                         return 1;
1369                 if (clear_user((void __user *)addr, PAGE_SIZE))
1370                         return 1;
1371                 vcpu->arch.hv_vapic = data;
1372                 break;
1373         }
1374         case HV_X64_MSR_EOI:
1375                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1376         case HV_X64_MSR_ICR:
1377                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1378         case HV_X64_MSR_TPR:
1379                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1380         default:
1381                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1382                           "data 0x%llx\n", msr, data);
1383                 return 1;
1384         }
1385
1386         return 0;
1387 }
1388
1389 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1390 {
1391         switch (msr) {
1392         case MSR_EFER:
1393                 return set_efer(vcpu, data);
1394         case MSR_K7_HWCR:
1395                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1396                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1397                 if (data != 0) {
1398                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1399                                 data);
1400                         return 1;
1401                 }
1402                 break;
1403         case MSR_FAM10H_MMIO_CONF_BASE:
1404                 if (data != 0) {
1405                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1406                                 "0x%llx\n", data);
1407                         return 1;
1408                 }
1409                 break;
1410         case MSR_AMD64_NB_CFG:
1411                 break;
1412         case MSR_IA32_DEBUGCTLMSR:
1413                 if (!data) {
1414                         /* We support the non-activated case already */
1415                         break;
1416                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1417                         /* Values other than LBR and BTF are vendor-specific,
1418                            thus reserved and should throw a #GP */
1419                         return 1;
1420                 }
1421                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1422                         __func__, data);
1423                 break;
1424         case MSR_IA32_UCODE_REV:
1425         case MSR_IA32_UCODE_WRITE:
1426         case MSR_VM_HSAVE_PA:
1427         case MSR_AMD64_PATCH_LOADER:
1428                 break;
1429         case 0x200 ... 0x2ff:
1430                 return set_msr_mtrr(vcpu, msr, data);
1431         case MSR_IA32_APICBASE:
1432                 kvm_set_apic_base(vcpu, data);
1433                 break;
1434         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1435                 return kvm_x2apic_msr_write(vcpu, msr, data);
1436         case MSR_IA32_MISC_ENABLE:
1437                 vcpu->arch.ia32_misc_enable_msr = data;
1438                 break;
1439         case MSR_KVM_WALL_CLOCK_NEW:
1440         case MSR_KVM_WALL_CLOCK:
1441                 vcpu->kvm->arch.wall_clock = data;
1442                 kvm_write_wall_clock(vcpu->kvm, data);
1443                 break;
1444         case MSR_KVM_SYSTEM_TIME_NEW:
1445         case MSR_KVM_SYSTEM_TIME: {
1446                 if (vcpu->arch.time_page) {
1447                         kvm_release_page_dirty(vcpu->arch.time_page);
1448                         vcpu->arch.time_page = NULL;
1449                 }
1450
1451                 vcpu->arch.time = data;
1452
1453                 /* we verify if the enable bit is set... */
1454                 if (!(data & 1))
1455                         break;
1456
1457                 /* ...but clean it before doing the actual write */
1458                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1459
1460                 vcpu->arch.time_page =
1461                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1462
1463                 if (is_error_page(vcpu->arch.time_page)) {
1464                         kvm_release_page_clean(vcpu->arch.time_page);
1465                         vcpu->arch.time_page = NULL;
1466                 }
1467
1468                 kvm_request_guest_time_update(vcpu);
1469                 break;
1470         }
1471         case MSR_IA32_MCG_CTL:
1472         case MSR_IA32_MCG_STATUS:
1473         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1474                 return set_msr_mce(vcpu, msr, data);
1475
1476         /* Performance counters are not protected by a CPUID bit,
1477          * so we should check all of them in the generic path for the sake of
1478          * cross vendor migration.
1479          * Writing a zero into the event select MSRs disables them,
1480          * which we perfectly emulate ;-). Any other value should be at least
1481          * reported, some guests depend on them.
1482          */
1483         case MSR_P6_EVNTSEL0:
1484         case MSR_P6_EVNTSEL1:
1485         case MSR_K7_EVNTSEL0:
1486         case MSR_K7_EVNTSEL1:
1487         case MSR_K7_EVNTSEL2:
1488         case MSR_K7_EVNTSEL3:
1489                 if (data != 0)
1490                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1491                                 "0x%x data 0x%llx\n", msr, data);
1492                 break;
1493         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1494          * so we ignore writes to make it happy.
1495          */
1496         case MSR_P6_PERFCTR0:
1497         case MSR_P6_PERFCTR1:
1498         case MSR_K7_PERFCTR0:
1499         case MSR_K7_PERFCTR1:
1500         case MSR_K7_PERFCTR2:
1501         case MSR_K7_PERFCTR3:
1502                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1503                         "0x%x data 0x%llx\n", msr, data);
1504                 break;
1505         case MSR_K7_CLK_CTL:
1506                 /*
1507                  * Ignore all writes to this no longer documented MSR.
1508                  * Writes are only relevant for old K7 processors,
1509                  * all pre-dating SVM, but a recommended workaround from
1510                  * AMD for these chips. It is possible to speicify the
1511                  * affected processor models on the command line, hence
1512                  * the need to ignore the workaround.
1513                  */
1514                 break;
1515         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1516                 if (kvm_hv_msr_partition_wide(msr)) {
1517                         int r;
1518                         mutex_lock(&vcpu->kvm->lock);
1519                         r = set_msr_hyperv_pw(vcpu, msr, data);
1520                         mutex_unlock(&vcpu->kvm->lock);
1521                         return r;
1522                 } else
1523                         return set_msr_hyperv(vcpu, msr, data);
1524                 break;
1525         default:
1526                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1527                         return xen_hvm_config(vcpu, data);
1528                 if (!ignore_msrs) {
1529                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1530                                 msr, data);
1531                         return 1;
1532                 } else {
1533                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1534                                 msr, data);
1535                         break;
1536                 }
1537         }
1538         return 0;
1539 }
1540 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1541
1542
1543 /*
1544  * Reads an msr value (of 'msr_index') into 'pdata'.
1545  * Returns 0 on success, non-0 otherwise.
1546  * Assumes vcpu_load() was already called.
1547  */
1548 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1549 {
1550         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1551 }
1552
1553 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1554 {
1555         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1556
1557         if (!msr_mtrr_valid(msr))
1558                 return 1;
1559
1560         if (msr == MSR_MTRRdefType)
1561                 *pdata = vcpu->arch.mtrr_state.def_type +
1562                          (vcpu->arch.mtrr_state.enabled << 10);
1563         else if (msr == MSR_MTRRfix64K_00000)
1564                 *pdata = p[0];
1565         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1566                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1567         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1568                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1569         else if (msr == MSR_IA32_CR_PAT)
1570                 *pdata = vcpu->arch.pat;
1571         else {  /* Variable MTRRs */
1572                 int idx, is_mtrr_mask;
1573                 u64 *pt;
1574
1575                 idx = (msr - 0x200) / 2;
1576                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1577                 if (!is_mtrr_mask)
1578                         pt =
1579                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1580                 else
1581                         pt =
1582                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1583                 *pdata = *pt;
1584         }
1585
1586         return 0;
1587 }
1588
1589 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1590 {
1591         u64 data;
1592         u64 mcg_cap = vcpu->arch.mcg_cap;
1593         unsigned bank_num = mcg_cap & 0xff;
1594
1595         switch (msr) {
1596         case MSR_IA32_P5_MC_ADDR:
1597         case MSR_IA32_P5_MC_TYPE:
1598                 data = 0;
1599                 break;
1600         case MSR_IA32_MCG_CAP:
1601                 data = vcpu->arch.mcg_cap;
1602                 break;
1603         case MSR_IA32_MCG_CTL:
1604                 if (!(mcg_cap & MCG_CTL_P))
1605                         return 1;
1606                 data = vcpu->arch.mcg_ctl;
1607                 break;
1608         case MSR_IA32_MCG_STATUS:
1609                 data = vcpu->arch.mcg_status;
1610                 break;
1611         default:
1612                 if (msr >= MSR_IA32_MC0_CTL &&
1613                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1614                         u32 offset = msr - MSR_IA32_MC0_CTL;
1615                         data = vcpu->arch.mce_banks[offset];
1616                         break;
1617                 }
1618                 return 1;
1619         }
1620         *pdata = data;
1621         return 0;
1622 }
1623
1624 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1625 {
1626         u64 data = 0;
1627         struct kvm *kvm = vcpu->kvm;
1628
1629         switch (msr) {
1630         case HV_X64_MSR_GUEST_OS_ID:
1631                 data = kvm->arch.hv_guest_os_id;
1632                 break;
1633         case HV_X64_MSR_HYPERCALL:
1634                 data = kvm->arch.hv_hypercall;
1635                 break;
1636         default:
1637                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1638                 return 1;
1639         }
1640
1641         *pdata = data;
1642         return 0;
1643 }
1644
1645 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1646 {
1647         u64 data = 0;
1648
1649         switch (msr) {
1650         case HV_X64_MSR_VP_INDEX: {
1651                 int r;
1652                 struct kvm_vcpu *v;
1653                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1654                         if (v == vcpu)
1655                                 data = r;
1656                 break;
1657         }
1658         case HV_X64_MSR_EOI:
1659                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1660         case HV_X64_MSR_ICR:
1661                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1662         case HV_X64_MSR_TPR:
1663                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1664         default:
1665                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1666                 return 1;
1667         }
1668         *pdata = data;
1669         return 0;
1670 }
1671
1672 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1673 {
1674         u64 data;
1675
1676         switch (msr) {
1677         case MSR_IA32_PLATFORM_ID:
1678         case MSR_IA32_UCODE_REV:
1679         case MSR_IA32_EBL_CR_POWERON:
1680         case MSR_IA32_DEBUGCTLMSR:
1681         case MSR_IA32_LASTBRANCHFROMIP:
1682         case MSR_IA32_LASTBRANCHTOIP:
1683         case MSR_IA32_LASTINTFROMIP:
1684         case MSR_IA32_LASTINTTOIP:
1685         case MSR_K8_SYSCFG:
1686         case MSR_K7_HWCR:
1687         case MSR_VM_HSAVE_PA:
1688         case MSR_P6_PERFCTR0:
1689         case MSR_P6_PERFCTR1:
1690         case MSR_P6_EVNTSEL0:
1691         case MSR_P6_EVNTSEL1:
1692         case MSR_K7_EVNTSEL0:
1693         case MSR_K7_PERFCTR0:
1694         case MSR_K8_INT_PENDING_MSG:
1695         case MSR_AMD64_NB_CFG:
1696         case MSR_FAM10H_MMIO_CONF_BASE:
1697                 data = 0;
1698                 break;
1699         case MSR_MTRRcap:
1700                 data = 0x500 | KVM_NR_VAR_MTRR;
1701                 break;
1702         case 0x200 ... 0x2ff:
1703                 return get_msr_mtrr(vcpu, msr, pdata);
1704         case 0xcd: /* fsb frequency */
1705                 data = 3;
1706                 break;
1707                 /*
1708                  * MSR_EBC_FREQUENCY_ID
1709                  * Conservative value valid for even the basic CPU models.
1710                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1711                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1712                  * and 266MHz for model 3, or 4. Set Core Clock
1713                  * Frequency to System Bus Frequency Ratio to 1 (bits
1714                  * 31:24) even though these are only valid for CPU
1715                  * models > 2, however guests may end up dividing or
1716                  * multiplying by zero otherwise.
1717                  */
1718         case MSR_EBC_FREQUENCY_ID:
1719                 data = 1 << 24;
1720                 break;
1721         case MSR_IA32_APICBASE:
1722                 data = kvm_get_apic_base(vcpu);
1723                 break;
1724         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1725                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1726                 break;
1727         case MSR_IA32_MISC_ENABLE:
1728                 data = vcpu->arch.ia32_misc_enable_msr;
1729                 break;
1730         case MSR_IA32_PERF_STATUS:
1731                 /* TSC increment by tick */
1732                 data = 1000ULL;
1733                 /* CPU multiplier */
1734                 data |= (((uint64_t)4ULL) << 40);
1735                 break;
1736         case MSR_EFER:
1737                 data = vcpu->arch.efer;
1738                 break;
1739         case MSR_KVM_WALL_CLOCK:
1740         case MSR_KVM_WALL_CLOCK_NEW:
1741                 data = vcpu->kvm->arch.wall_clock;
1742                 break;
1743         case MSR_KVM_SYSTEM_TIME:
1744         case MSR_KVM_SYSTEM_TIME_NEW:
1745                 data = vcpu->arch.time;
1746                 break;
1747         case MSR_IA32_P5_MC_ADDR:
1748         case MSR_IA32_P5_MC_TYPE:
1749         case MSR_IA32_MCG_CAP:
1750         case MSR_IA32_MCG_CTL:
1751         case MSR_IA32_MCG_STATUS:
1752         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1753                 return get_msr_mce(vcpu, msr, pdata);
1754         case MSR_K7_CLK_CTL:
1755                 /*
1756                  * Provide expected ramp-up count for K7. All other
1757                  * are set to zero, indicating minimum divisors for
1758                  * every field.
1759                  *
1760                  * This prevents guest kernels on AMD host with CPU
1761                  * type 6, model 8 and higher from exploding due to
1762                  * the rdmsr failing.
1763                  */
1764                 data = 0x20000000;
1765                 break;
1766         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1767                 if (kvm_hv_msr_partition_wide(msr)) {
1768                         int r;
1769                         mutex_lock(&vcpu->kvm->lock);
1770                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1771                         mutex_unlock(&vcpu->kvm->lock);
1772                         return r;
1773                 } else
1774                         return get_msr_hyperv(vcpu, msr, pdata);
1775                 break;
1776         default:
1777                 if (!ignore_msrs) {
1778                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1779                         return 1;
1780                 } else {
1781                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1782                         data = 0;
1783                 }
1784                 break;
1785         }
1786         *pdata = data;
1787         return 0;
1788 }
1789 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1790
1791 /*
1792  * Read or write a bunch of msrs. All parameters are kernel addresses.
1793  *
1794  * @return number of msrs set successfully.
1795  */
1796 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1797                     struct kvm_msr_entry *entries,
1798                     int (*do_msr)(struct kvm_vcpu *vcpu,
1799                                   unsigned index, u64 *data))
1800 {
1801         int i, idx;
1802
1803         idx = srcu_read_lock(&vcpu->kvm->srcu);
1804         for (i = 0; i < msrs->nmsrs; ++i)
1805                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1806                         break;
1807         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1808
1809         return i;
1810 }
1811
1812 /*
1813  * Read or write a bunch of msrs. Parameters are user addresses.
1814  *
1815  * @return number of msrs set successfully.
1816  */
1817 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1818                   int (*do_msr)(struct kvm_vcpu *vcpu,
1819                                 unsigned index, u64 *data),
1820                   int writeback)
1821 {
1822         struct kvm_msrs msrs;
1823         struct kvm_msr_entry *entries;
1824         int r, n;
1825         unsigned size;
1826
1827         r = -EFAULT;
1828         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1829                 goto out;
1830
1831         r = -E2BIG;
1832         if (msrs.nmsrs >= MAX_IO_MSRS)
1833                 goto out;
1834
1835         r = -ENOMEM;
1836         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1837         entries = kmalloc(size, GFP_KERNEL);
1838         if (!entries)
1839                 goto out;
1840
1841         r = -EFAULT;
1842         if (copy_from_user(entries, user_msrs->entries, size))
1843                 goto out_free;
1844
1845         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1846         if (r < 0)
1847                 goto out_free;
1848
1849         r = -EFAULT;
1850         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1851                 goto out_free;
1852
1853         r = n;
1854
1855 out_free:
1856         kfree(entries);
1857 out:
1858         return r;
1859 }
1860
1861 int kvm_dev_ioctl_check_extension(long ext)
1862 {
1863         int r;
1864
1865         switch (ext) {
1866         case KVM_CAP_IRQCHIP:
1867         case KVM_CAP_HLT:
1868         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1869         case KVM_CAP_SET_TSS_ADDR:
1870         case KVM_CAP_EXT_CPUID:
1871         case KVM_CAP_CLOCKSOURCE:
1872         case KVM_CAP_PIT:
1873         case KVM_CAP_NOP_IO_DELAY:
1874         case KVM_CAP_MP_STATE:
1875         case KVM_CAP_SYNC_MMU:
1876         case KVM_CAP_REINJECT_CONTROL:
1877         case KVM_CAP_IRQ_INJECT_STATUS:
1878         case KVM_CAP_ASSIGN_DEV_IRQ:
1879         case KVM_CAP_IRQFD:
1880         case KVM_CAP_IOEVENTFD:
1881         case KVM_CAP_PIT2:
1882         case KVM_CAP_PIT_STATE2:
1883         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1884         case KVM_CAP_XEN_HVM:
1885         case KVM_CAP_ADJUST_CLOCK:
1886         case KVM_CAP_VCPU_EVENTS:
1887         case KVM_CAP_HYPERV:
1888         case KVM_CAP_HYPERV_VAPIC:
1889         case KVM_CAP_HYPERV_SPIN:
1890         case KVM_CAP_PCI_SEGMENT:
1891         case KVM_CAP_DEBUGREGS:
1892         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1893         case KVM_CAP_XSAVE:
1894                 r = 1;
1895                 break;
1896         case KVM_CAP_COALESCED_MMIO:
1897                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1898                 break;
1899         case KVM_CAP_VAPIC:
1900                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1901                 break;
1902         case KVM_CAP_NR_VCPUS:
1903                 r = KVM_MAX_VCPUS;
1904                 break;
1905         case KVM_CAP_NR_MEMSLOTS:
1906                 r = KVM_MEMORY_SLOTS;
1907                 break;
1908         case KVM_CAP_PV_MMU:    /* obsolete */
1909                 r = 0;
1910                 break;
1911         case KVM_CAP_IOMMU:
1912                 r = iommu_found();
1913                 break;
1914         case KVM_CAP_MCE:
1915                 r = KVM_MAX_MCE_BANKS;
1916                 break;
1917         case KVM_CAP_XCRS:
1918                 r = cpu_has_xsave;
1919                 break;
1920         default:
1921                 r = 0;
1922                 break;
1923         }
1924         return r;
1925
1926 }
1927
1928 long kvm_arch_dev_ioctl(struct file *filp,
1929                         unsigned int ioctl, unsigned long arg)
1930 {
1931         void __user *argp = (void __user *)arg;
1932         long r;
1933
1934         switch (ioctl) {
1935         case KVM_GET_MSR_INDEX_LIST: {
1936                 struct kvm_msr_list __user *user_msr_list = argp;
1937                 struct kvm_msr_list msr_list;
1938                 unsigned n;
1939
1940                 r = -EFAULT;
1941                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1942                         goto out;
1943                 n = msr_list.nmsrs;
1944                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1945                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1946                         goto out;
1947                 r = -E2BIG;
1948                 if (n < msr_list.nmsrs)
1949                         goto out;
1950                 r = -EFAULT;
1951                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1952                                  num_msrs_to_save * sizeof(u32)))
1953                         goto out;
1954                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1955                                  &emulated_msrs,
1956                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1957                         goto out;
1958                 r = 0;
1959                 break;
1960         }
1961         case KVM_GET_SUPPORTED_CPUID: {
1962                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1963                 struct kvm_cpuid2 cpuid;
1964
1965                 r = -EFAULT;
1966                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1967                         goto out;
1968                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1969                                                       cpuid_arg->entries);
1970                 if (r)
1971                         goto out;
1972
1973                 r = -EFAULT;
1974                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1975                         goto out;
1976                 r = 0;
1977                 break;
1978         }
1979         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1980                 u64 mce_cap;
1981
1982                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1983                 r = -EFAULT;
1984                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1985                         goto out;
1986                 r = 0;
1987                 break;
1988         }
1989         default:
1990                 r = -EINVAL;
1991         }
1992 out:
1993         return r;
1994 }
1995
1996 static void wbinvd_ipi(void *garbage)
1997 {
1998         wbinvd();
1999 }
2000
2001 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2002 {
2003         return vcpu->kvm->arch.iommu_domain &&
2004                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2005 }
2006
2007 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2008 {
2009         /* Address WBINVD may be executed by guest */
2010         if (need_emulate_wbinvd(vcpu)) {
2011                 if (kvm_x86_ops->has_wbinvd_exit())
2012                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2013                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2014                         smp_call_function_single(vcpu->cpu,
2015                                         wbinvd_ipi, NULL, 1);
2016         }
2017
2018         kvm_x86_ops->vcpu_load(vcpu, cpu);
2019         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2020                 /* Make sure TSC doesn't go backwards */
2021                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2022                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2023                 if (tsc_delta < 0)
2024                         mark_tsc_unstable("KVM discovered backwards TSC");
2025                 if (check_tsc_unstable())
2026                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2027                 kvm_migrate_timers(vcpu);
2028                 vcpu->cpu = cpu;
2029         }
2030 }
2031
2032 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2033 {
2034         kvm_x86_ops->vcpu_put(vcpu);
2035         kvm_put_guest_fpu(vcpu);
2036         vcpu->arch.last_host_tsc = native_read_tsc();
2037 }
2038
2039 static int is_efer_nx(void)
2040 {
2041         unsigned long long efer = 0;
2042
2043         rdmsrl_safe(MSR_EFER, &efer);
2044         return efer & EFER_NX;
2045 }
2046
2047 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2048 {
2049         int i;
2050         struct kvm_cpuid_entry2 *e, *entry;
2051
2052         entry = NULL;
2053         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2054                 e = &vcpu->arch.cpuid_entries[i];
2055                 if (e->function == 0x80000001) {
2056                         entry = e;
2057                         break;
2058                 }
2059         }
2060         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2061                 entry->edx &= ~(1 << 20);
2062                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2063         }
2064 }
2065
2066 /* when an old userspace process fills a new kernel module */
2067 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2068                                     struct kvm_cpuid *cpuid,
2069                                     struct kvm_cpuid_entry __user *entries)
2070 {
2071         int r, i;
2072         struct kvm_cpuid_entry *cpuid_entries;
2073
2074         r = -E2BIG;
2075         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2076                 goto out;
2077         r = -ENOMEM;
2078         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2079         if (!cpuid_entries)
2080                 goto out;
2081         r = -EFAULT;
2082         if (copy_from_user(cpuid_entries, entries,
2083                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2084                 goto out_free;
2085         for (i = 0; i < cpuid->nent; i++) {
2086                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2087                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2088                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2089                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2090                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2091                 vcpu->arch.cpuid_entries[i].index = 0;
2092                 vcpu->arch.cpuid_entries[i].flags = 0;
2093                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2094                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2095                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2096         }
2097         vcpu->arch.cpuid_nent = cpuid->nent;
2098         cpuid_fix_nx_cap(vcpu);
2099         r = 0;
2100         kvm_apic_set_version(vcpu);
2101         kvm_x86_ops->cpuid_update(vcpu);
2102         update_cpuid(vcpu);
2103
2104 out_free:
2105         vfree(cpuid_entries);
2106 out:
2107         return r;
2108 }
2109
2110 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2111                                      struct kvm_cpuid2 *cpuid,
2112                                      struct kvm_cpuid_entry2 __user *entries)
2113 {
2114         int r;
2115
2116         r = -E2BIG;
2117         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2118                 goto out;
2119         r = -EFAULT;
2120         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2121                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2122                 goto out;
2123         vcpu->arch.cpuid_nent = cpuid->nent;
2124         kvm_apic_set_version(vcpu);
2125         kvm_x86_ops->cpuid_update(vcpu);
2126         update_cpuid(vcpu);
2127         return 0;
2128
2129 out:
2130         return r;
2131 }
2132
2133 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2134                                      struct kvm_cpuid2 *cpuid,
2135                                      struct kvm_cpuid_entry2 __user *entries)
2136 {
2137         int r;
2138
2139         r = -E2BIG;
2140         if (cpuid->nent < vcpu->arch.cpuid_nent)
2141                 goto out;
2142         r = -EFAULT;
2143         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2144                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2145                 goto out;
2146         return 0;
2147
2148 out:
2149         cpuid->nent = vcpu->arch.cpuid_nent;
2150         return r;
2151 }
2152
2153 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2154                            u32 index)
2155 {
2156         entry->function = function;
2157         entry->index = index;
2158         cpuid_count(entry->function, entry->index,
2159                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2160         entry->flags = 0;
2161 }
2162
2163 #define F(x) bit(X86_FEATURE_##x)
2164
2165 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2166                          u32 index, int *nent, int maxnent)
2167 {
2168         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2169 #ifdef CONFIG_X86_64
2170         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2171                                 ? F(GBPAGES) : 0;
2172         unsigned f_lm = F(LM);
2173 #else
2174         unsigned f_gbpages = 0;
2175         unsigned f_lm = 0;
2176 #endif
2177         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2178
2179         /* cpuid 1.edx */
2180         const u32 kvm_supported_word0_x86_features =
2181                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2182                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2183                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2184                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2185                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2186                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2187                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2188                 0 /* HTT, TM, Reserved, PBE */;
2189         /* cpuid 0x80000001.edx */
2190         const u32 kvm_supported_word1_x86_features =
2191                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2192                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2193                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2194                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2195                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2196                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2197                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2198                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2199         /* cpuid 1.ecx */
2200         const u32 kvm_supported_word4_x86_features =
2201                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2202                 0 /* DS-CPL, VMX, SMX, EST */ |
2203                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2204                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2205                 0 /* Reserved, DCA */ | F(XMM4_1) |
2206                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2207                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2208         /* cpuid 0x80000001.ecx */
2209         const u32 kvm_supported_word6_x86_features =
2210                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2211                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2212                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2213                 0 /* SKINIT */ | 0 /* WDT */;
2214
2215         /* all calls to cpuid_count() should be made on the same cpu */
2216         get_cpu();
2217         do_cpuid_1_ent(entry, function, index);
2218         ++*nent;
2219
2220         switch (function) {
2221         case 0:
2222                 entry->eax = min(entry->eax, (u32)0xd);
2223                 break;
2224         case 1:
2225                 entry->edx &= kvm_supported_word0_x86_features;
2226                 entry->ecx &= kvm_supported_word4_x86_features;
2227                 /* we support x2apic emulation even if host does not support
2228                  * it since we emulate x2apic in software */
2229                 entry->ecx |= F(X2APIC);
2230                 break;
2231         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2232          * may return different values. This forces us to get_cpu() before
2233          * issuing the first command, and also to emulate this annoying behavior
2234          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2235         case 2: {
2236                 int t, times = entry->eax & 0xff;
2237
2238                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2239                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2240                 for (t = 1; t < times && *nent < maxnent; ++t) {
2241                         do_cpuid_1_ent(&entry[t], function, 0);
2242                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2243                         ++*nent;
2244                 }
2245                 break;
2246         }
2247         /* function 4 and 0xb have additional index. */
2248         case 4: {
2249                 int i, cache_type;
2250
2251                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2252                 /* read more entries until cache_type is zero */
2253                 for (i = 1; *nent < maxnent; ++i) {
2254                         cache_type = entry[i - 1].eax & 0x1f;
2255                         if (!cache_type)
2256                                 break;
2257                         do_cpuid_1_ent(&entry[i], function, i);
2258                         entry[i].flags |=
2259                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2260                         ++*nent;
2261                 }
2262                 break;
2263         }
2264         case 0xb: {
2265                 int i, level_type;
2266
2267                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2268                 /* read more entries until level_type is zero */
2269                 for (i = 1; *nent < maxnent; ++i) {
2270                         level_type = entry[i - 1].ecx & 0xff00;
2271                         if (!level_type)
2272                                 break;
2273                         do_cpuid_1_ent(&entry[i], function, i);
2274                         entry[i].flags |=
2275                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2276                         ++*nent;
2277                 }
2278                 break;
2279         }
2280         case 0xd: {
2281                 int i;
2282
2283                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2284                 for (i = 1; *nent < maxnent; ++i) {
2285                         if (entry[i - 1].eax == 0 && i != 2)
2286                                 break;
2287                         do_cpuid_1_ent(&entry[i], function, i);
2288                         entry[i].flags |=
2289                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2290                         ++*nent;
2291                 }
2292                 break;
2293         }
2294         case KVM_CPUID_SIGNATURE: {
2295                 char signature[12] = "KVMKVMKVM\0\0";
2296                 u32 *sigptr = (u32 *)signature;
2297                 entry->eax = 0;
2298                 entry->ebx = sigptr[0];
2299                 entry->ecx = sigptr[1];
2300                 entry->edx = sigptr[2];
2301                 break;
2302         }
2303         case KVM_CPUID_FEATURES:
2304                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2305                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2306                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2307                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2308                 entry->ebx = 0;
2309                 entry->ecx = 0;
2310                 entry->edx = 0;
2311                 break;
2312         case 0x80000000:
2313                 entry->eax = min(entry->eax, 0x8000001a);
2314                 break;
2315         case 0x80000001:
2316                 entry->edx &= kvm_supported_word1_x86_features;
2317                 entry->ecx &= kvm_supported_word6_x86_features;
2318                 break;
2319         }
2320
2321         kvm_x86_ops->set_supported_cpuid(function, entry);
2322
2323         put_cpu();
2324 }
2325
2326 #undef F
2327
2328 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2329                                      struct kvm_cpuid_entry2 __user *entries)
2330 {
2331         struct kvm_cpuid_entry2 *cpuid_entries;
2332         int limit, nent = 0, r = -E2BIG;
2333         u32 func;
2334
2335         if (cpuid->nent < 1)
2336                 goto out;
2337         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2338                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2339         r = -ENOMEM;
2340         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2341         if (!cpuid_entries)
2342                 goto out;
2343
2344         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2345         limit = cpuid_entries[0].eax;
2346         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2347                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2348                              &nent, cpuid->nent);
2349         r = -E2BIG;
2350         if (nent >= cpuid->nent)
2351                 goto out_free;
2352
2353         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2354         limit = cpuid_entries[nent - 1].eax;
2355         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2356                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2357                              &nent, cpuid->nent);
2358
2359
2360
2361         r = -E2BIG;
2362         if (nent >= cpuid->nent)
2363                 goto out_free;
2364
2365         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2366                      cpuid->nent);
2367
2368         r = -E2BIG;
2369         if (nent >= cpuid->nent)
2370                 goto out_free;
2371
2372         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2373                      cpuid->nent);
2374
2375         r = -E2BIG;
2376         if (nent >= cpuid->nent)
2377                 goto out_free;
2378
2379         r = -EFAULT;
2380         if (copy_to_user(entries, cpuid_entries,
2381                          nent * sizeof(struct kvm_cpuid_entry2)))
2382                 goto out_free;
2383         cpuid->nent = nent;
2384         r = 0;
2385
2386 out_free:
2387         vfree(cpuid_entries);
2388 out:
2389         return r;
2390 }
2391
2392 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2393                                     struct kvm_lapic_state *s)
2394 {
2395         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2396
2397         return 0;
2398 }
2399
2400 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2401                                     struct kvm_lapic_state *s)
2402 {
2403         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2404         kvm_apic_post_state_restore(vcpu);
2405         update_cr8_intercept(vcpu);
2406
2407         return 0;
2408 }
2409
2410 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2411                                     struct kvm_interrupt *irq)
2412 {
2413         if (irq->irq < 0 || irq->irq >= 256)
2414                 return -EINVAL;
2415         if (irqchip_in_kernel(vcpu->kvm))
2416                 return -ENXIO;
2417
2418         kvm_queue_interrupt(vcpu, irq->irq, false);
2419
2420         return 0;
2421 }
2422
2423 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2424 {
2425         kvm_inject_nmi(vcpu);
2426
2427         return 0;
2428 }
2429
2430 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2431                                            struct kvm_tpr_access_ctl *tac)
2432 {
2433         if (tac->flags)
2434                 return -EINVAL;
2435         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2436         return 0;
2437 }
2438
2439 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2440                                         u64 mcg_cap)
2441 {
2442         int r;
2443         unsigned bank_num = mcg_cap & 0xff, bank;
2444
2445         r = -EINVAL;
2446         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2447                 goto out;
2448         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2449                 goto out;
2450         r = 0;
2451         vcpu->arch.mcg_cap = mcg_cap;
2452         /* Init IA32_MCG_CTL to all 1s */
2453         if (mcg_cap & MCG_CTL_P)
2454                 vcpu->arch.mcg_ctl = ~(u64)0;
2455         /* Init IA32_MCi_CTL to all 1s */
2456         for (bank = 0; bank < bank_num; bank++)
2457                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2458 out:
2459         return r;
2460 }
2461
2462 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2463                                       struct kvm_x86_mce *mce)
2464 {
2465         u64 mcg_cap = vcpu->arch.mcg_cap;
2466         unsigned bank_num = mcg_cap & 0xff;
2467         u64 *banks = vcpu->arch.mce_banks;
2468
2469         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2470                 return -EINVAL;
2471         /*
2472          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2473          * reporting is disabled
2474          */
2475         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2476             vcpu->arch.mcg_ctl != ~(u64)0)
2477                 return 0;
2478         banks += 4 * mce->bank;
2479         /*
2480          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2481          * reporting is disabled for the bank
2482          */
2483         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2484                 return 0;
2485         if (mce->status & MCI_STATUS_UC) {
2486                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2487                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2488                         printk(KERN_DEBUG "kvm: set_mce: "
2489                                "injects mce exception while "
2490                                "previous one is in progress!\n");
2491                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2492                         return 0;
2493                 }
2494                 if (banks[1] & MCI_STATUS_VAL)
2495                         mce->status |= MCI_STATUS_OVER;
2496                 banks[2] = mce->addr;
2497                 banks[3] = mce->misc;
2498                 vcpu->arch.mcg_status = mce->mcg_status;
2499                 banks[1] = mce->status;
2500                 kvm_queue_exception(vcpu, MC_VECTOR);
2501         } else if (!(banks[1] & MCI_STATUS_VAL)
2502                    || !(banks[1] & MCI_STATUS_UC)) {
2503                 if (banks[1] & MCI_STATUS_VAL)
2504                         mce->status |= MCI_STATUS_OVER;
2505                 banks[2] = mce->addr;
2506                 banks[3] = mce->misc;
2507                 banks[1] = mce->status;
2508         } else
2509                 banks[1] |= MCI_STATUS_OVER;
2510         return 0;
2511 }
2512
2513 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2514                                                struct kvm_vcpu_events *events)
2515 {
2516         events->exception.injected =
2517                 vcpu->arch.exception.pending &&
2518                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2519         events->exception.nr = vcpu->arch.exception.nr;
2520         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2521         events->exception.error_code = vcpu->arch.exception.error_code;
2522
2523         events->interrupt.injected =
2524                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2525         events->interrupt.nr = vcpu->arch.interrupt.nr;
2526         events->interrupt.soft = 0;
2527         events->interrupt.shadow =
2528                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2529                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2530
2531         events->nmi.injected = vcpu->arch.nmi_injected;
2532         events->nmi.pending = vcpu->arch.nmi_pending;
2533         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2534
2535         events->sipi_vector = vcpu->arch.sipi_vector;
2536
2537         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2538                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2539                          | KVM_VCPUEVENT_VALID_SHADOW);
2540 }
2541
2542 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2543                                               struct kvm_vcpu_events *events)
2544 {
2545         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2546                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2547                               | KVM_VCPUEVENT_VALID_SHADOW))
2548                 return -EINVAL;
2549
2550         vcpu->arch.exception.pending = events->exception.injected;
2551         vcpu->arch.exception.nr = events->exception.nr;
2552         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2553         vcpu->arch.exception.error_code = events->exception.error_code;
2554
2555         vcpu->arch.interrupt.pending = events->interrupt.injected;
2556         vcpu->arch.interrupt.nr = events->interrupt.nr;
2557         vcpu->arch.interrupt.soft = events->interrupt.soft;
2558         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2559                 kvm_pic_clear_isr_ack(vcpu->kvm);
2560         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2561                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2562                                                   events->interrupt.shadow);
2563
2564         vcpu->arch.nmi_injected = events->nmi.injected;
2565         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2566                 vcpu->arch.nmi_pending = events->nmi.pending;
2567         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2568
2569         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2570                 vcpu->arch.sipi_vector = events->sipi_vector;
2571
2572         return 0;
2573 }
2574
2575 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2576                                              struct kvm_debugregs *dbgregs)
2577 {
2578         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2579         dbgregs->dr6 = vcpu->arch.dr6;
2580         dbgregs->dr7 = vcpu->arch.dr7;
2581         dbgregs->flags = 0;
2582 }
2583
2584 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2585                                             struct kvm_debugregs *dbgregs)
2586 {
2587         if (dbgregs->flags)
2588                 return -EINVAL;
2589
2590         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2591         vcpu->arch.dr6 = dbgregs->dr6;
2592         vcpu->arch.dr7 = dbgregs->dr7;
2593
2594         return 0;
2595 }
2596
2597 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2598                                          struct kvm_xsave *guest_xsave)
2599 {
2600         if (cpu_has_xsave)
2601                 memcpy(guest_xsave->region,
2602                         &vcpu->arch.guest_fpu.state->xsave,
2603                         xstate_size);
2604         else {
2605                 memcpy(guest_xsave->region,
2606                         &vcpu->arch.guest_fpu.state->fxsave,
2607                         sizeof(struct i387_fxsave_struct));
2608                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2609                         XSTATE_FPSSE;
2610         }
2611 }
2612
2613 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2614                                         struct kvm_xsave *guest_xsave)
2615 {
2616         u64 xstate_bv =
2617                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2618
2619         if (cpu_has_xsave)
2620                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2621                         guest_xsave->region, xstate_size);
2622         else {
2623                 if (xstate_bv & ~XSTATE_FPSSE)
2624                         return -EINVAL;
2625                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2626                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2627         }
2628         return 0;
2629 }
2630
2631 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2632                                         struct kvm_xcrs *guest_xcrs)
2633 {
2634         if (!cpu_has_xsave) {
2635                 guest_xcrs->nr_xcrs = 0;
2636                 return;
2637         }
2638
2639         guest_xcrs->nr_xcrs = 1;
2640         guest_xcrs->flags = 0;
2641         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2642         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2643 }
2644
2645 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2646                                        struct kvm_xcrs *guest_xcrs)
2647 {
2648         int i, r = 0;
2649
2650         if (!cpu_has_xsave)
2651                 return -EINVAL;
2652
2653         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2654                 return -EINVAL;
2655
2656         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2657                 /* Only support XCR0 currently */
2658                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2659                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2660                                 guest_xcrs->xcrs[0].value);
2661                         break;
2662                 }
2663         if (r)
2664                 r = -EINVAL;
2665         return r;
2666 }
2667
2668 long kvm_arch_vcpu_ioctl(struct file *filp,
2669                          unsigned int ioctl, unsigned long arg)
2670 {
2671         struct kvm_vcpu *vcpu = filp->private_data;
2672         void __user *argp = (void __user *)arg;
2673         int r;
2674         union {
2675                 struct kvm_lapic_state *lapic;
2676                 struct kvm_xsave *xsave;
2677                 struct kvm_xcrs *xcrs;
2678                 void *buffer;
2679         } u;
2680
2681         u.buffer = NULL;
2682         switch (ioctl) {
2683         case KVM_GET_LAPIC: {
2684                 r = -EINVAL;
2685                 if (!vcpu->arch.apic)
2686                         goto out;
2687                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2688
2689                 r = -ENOMEM;
2690                 if (!u.lapic)
2691                         goto out;
2692                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2693                 if (r)
2694                         goto out;
2695                 r = -EFAULT;
2696                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2697                         goto out;
2698                 r = 0;
2699                 break;
2700         }
2701         case KVM_SET_LAPIC: {
2702                 r = -EINVAL;
2703                 if (!vcpu->arch.apic)
2704                         goto out;
2705                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2706                 r = -ENOMEM;
2707                 if (!u.lapic)
2708                         goto out;
2709                 r = -EFAULT;
2710                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2711                         goto out;
2712                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2713                 if (r)
2714                         goto out;
2715                 r = 0;
2716                 break;
2717         }
2718         case KVM_INTERRUPT: {
2719                 struct kvm_interrupt irq;
2720
2721                 r = -EFAULT;
2722                 if (copy_from_user(&irq, argp, sizeof irq))
2723                         goto out;
2724                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2725                 if (r)
2726                         goto out;
2727                 r = 0;
2728                 break;
2729         }
2730         case KVM_NMI: {
2731                 r = kvm_vcpu_ioctl_nmi(vcpu);
2732                 if (r)
2733                         goto out;
2734                 r = 0;
2735                 break;
2736         }
2737         case KVM_SET_CPUID: {
2738                 struct kvm_cpuid __user *cpuid_arg = argp;
2739                 struct kvm_cpuid cpuid;
2740
2741                 r = -EFAULT;
2742                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2743                         goto out;
2744                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2745                 if (r)
2746                         goto out;
2747                 break;
2748         }
2749         case KVM_SET_CPUID2: {
2750                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2751                 struct kvm_cpuid2 cpuid;
2752
2753                 r = -EFAULT;
2754                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2755                         goto out;
2756                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2757                                               cpuid_arg->entries);
2758                 if (r)
2759                         goto out;
2760                 break;
2761         }
2762         case KVM_GET_CPUID2: {
2763                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2764                 struct kvm_cpuid2 cpuid;
2765
2766                 r = -EFAULT;
2767                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2768                         goto out;
2769                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2770                                               cpuid_arg->entries);
2771                 if (r)
2772                         goto out;
2773                 r = -EFAULT;
2774                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2775                         goto out;
2776                 r = 0;
2777                 break;
2778         }
2779         case KVM_GET_MSRS:
2780                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2781                 break;
2782         case KVM_SET_MSRS:
2783                 r = msr_io(vcpu, argp, do_set_msr, 0);
2784                 break;
2785         case KVM_TPR_ACCESS_REPORTING: {
2786                 struct kvm_tpr_access_ctl tac;
2787
2788                 r = -EFAULT;
2789                 if (copy_from_user(&tac, argp, sizeof tac))
2790                         goto out;
2791                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2792                 if (r)
2793                         goto out;
2794                 r = -EFAULT;
2795                 if (copy_to_user(argp, &tac, sizeof tac))
2796                         goto out;
2797                 r = 0;
2798                 break;
2799         };
2800         case KVM_SET_VAPIC_ADDR: {
2801                 struct kvm_vapic_addr va;
2802
2803                 r = -EINVAL;
2804                 if (!irqchip_in_kernel(vcpu->kvm))
2805                         goto out;
2806                 r = -EFAULT;
2807                 if (copy_from_user(&va, argp, sizeof va))
2808                         goto out;
2809                 r = 0;
2810                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2811                 break;
2812         }
2813         case KVM_X86_SETUP_MCE: {
2814                 u64 mcg_cap;
2815
2816                 r = -EFAULT;
2817                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2818                         goto out;
2819                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2820                 break;
2821         }
2822         case KVM_X86_SET_MCE: {
2823                 struct kvm_x86_mce mce;
2824
2825                 r = -EFAULT;
2826                 if (copy_from_user(&mce, argp, sizeof mce))
2827                         goto out;
2828                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2829                 break;
2830         }
2831         case KVM_GET_VCPU_EVENTS: {
2832                 struct kvm_vcpu_events events;
2833
2834                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2835
2836                 r = -EFAULT;
2837                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2838                         break;
2839                 r = 0;
2840                 break;
2841         }
2842         case KVM_SET_VCPU_EVENTS: {
2843                 struct kvm_vcpu_events events;
2844
2845                 r = -EFAULT;
2846                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2847                         break;
2848
2849                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2850                 break;
2851         }
2852         case KVM_GET_DEBUGREGS: {
2853                 struct kvm_debugregs dbgregs;
2854
2855                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2856
2857                 r = -EFAULT;
2858                 if (copy_to_user(argp, &dbgregs,
2859                                  sizeof(struct kvm_debugregs)))
2860                         break;
2861                 r = 0;
2862                 break;
2863         }
2864         case KVM_SET_DEBUGREGS: {
2865                 struct kvm_debugregs dbgregs;
2866
2867                 r = -EFAULT;
2868                 if (copy_from_user(&dbgregs, argp,
2869                                    sizeof(struct kvm_debugregs)))
2870                         break;
2871
2872                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2873                 break;
2874         }
2875         case KVM_GET_XSAVE: {
2876                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2877                 r = -ENOMEM;
2878                 if (!u.xsave)
2879                         break;
2880
2881                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2882
2883                 r = -EFAULT;
2884                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2885                         break;
2886                 r = 0;
2887                 break;
2888         }
2889         case KVM_SET_XSAVE: {
2890                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2891                 r = -ENOMEM;
2892                 if (!u.xsave)
2893                         break;
2894
2895                 r = -EFAULT;
2896                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2897                         break;
2898
2899                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2900                 break;
2901         }
2902         case KVM_GET_XCRS: {
2903                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2904                 r = -ENOMEM;
2905                 if (!u.xcrs)
2906                         break;
2907
2908                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2909
2910                 r = -EFAULT;
2911                 if (copy_to_user(argp, u.xcrs,
2912                                  sizeof(struct kvm_xcrs)))
2913                         break;
2914                 r = 0;
2915                 break;
2916         }
2917         case KVM_SET_XCRS: {
2918                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2919                 r = -ENOMEM;
2920                 if (!u.xcrs)
2921                         break;
2922
2923                 r = -EFAULT;
2924                 if (copy_from_user(u.xcrs, argp,
2925                                    sizeof(struct kvm_xcrs)))
2926                         break;
2927
2928                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2929                 break;
2930         }
2931         default:
2932                 r = -EINVAL;
2933         }
2934 out:
2935         kfree(u.buffer);
2936         return r;
2937 }
2938
2939 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2940 {
2941         int ret;
2942
2943         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2944                 return -1;
2945         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2946         return ret;
2947 }
2948
2949 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2950                                               u64 ident_addr)
2951 {
2952         kvm->arch.ept_identity_map_addr = ident_addr;
2953         return 0;
2954 }
2955
2956 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2957                                           u32 kvm_nr_mmu_pages)
2958 {
2959         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2960                 return -EINVAL;
2961
2962         mutex_lock(&kvm->slots_lock);
2963         spin_lock(&kvm->mmu_lock);
2964
2965         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2966         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2967
2968         spin_unlock(&kvm->mmu_lock);
2969         mutex_unlock(&kvm->slots_lock);
2970         return 0;
2971 }
2972
2973 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2974 {
2975         return kvm->arch.n_max_mmu_pages;
2976 }
2977
2978 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2979 {
2980         int r;
2981
2982         r = 0;
2983         switch (chip->chip_id) {
2984         case KVM_IRQCHIP_PIC_MASTER:
2985                 memcpy(&chip->chip.pic,
2986                         &pic_irqchip(kvm)->pics[0],
2987                         sizeof(struct kvm_pic_state));
2988                 break;
2989         case KVM_IRQCHIP_PIC_SLAVE:
2990                 memcpy(&chip->chip.pic,
2991                         &pic_irqchip(kvm)->pics[1],
2992                         sizeof(struct kvm_pic_state));
2993                 break;
2994         case KVM_IRQCHIP_IOAPIC:
2995                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2996                 break;
2997         default:
2998                 r = -EINVAL;
2999                 break;
3000         }
3001         return r;
3002 }
3003
3004 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3005 {
3006         int r;
3007
3008         r = 0;
3009         switch (chip->chip_id) {
3010         case KVM_IRQCHIP_PIC_MASTER:
3011                 raw_spin_lock(&pic_irqchip(kvm)->lock);
3012                 memcpy(&pic_irqchip(kvm)->pics[0],
3013                         &chip->chip.pic,
3014                         sizeof(struct kvm_pic_state));
3015                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3016                 break;
3017         case KVM_IRQCHIP_PIC_SLAVE:
3018                 raw_spin_lock(&pic_irqchip(kvm)->lock);
3019                 memcpy(&pic_irqchip(kvm)->pics[1],
3020                         &chip->chip.pic,
3021                         sizeof(struct kvm_pic_state));
3022                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3023                 break;
3024         case KVM_IRQCHIP_IOAPIC:
3025                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3026                 break;
3027         default:
3028                 r = -EINVAL;
3029                 break;
3030         }
3031         kvm_pic_update_irq(pic_irqchip(kvm));
3032         return r;
3033 }
3034
3035 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3036 {
3037         int r = 0;
3038
3039         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3040         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3041         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3042         return r;
3043 }
3044
3045 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3046 {
3047         int r = 0;
3048
3049         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3050         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3051         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3052         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3053         return r;
3054 }
3055
3056 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3057 {
3058         int r = 0;
3059
3060         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3061         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3062                 sizeof(ps->channels));
3063         ps->flags = kvm->arch.vpit->pit_state.flags;
3064         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3065         return r;
3066 }
3067
3068 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3069 {
3070         int r = 0, start = 0;
3071         u32 prev_legacy, cur_legacy;
3072         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3073         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3074         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3075         if (!prev_legacy && cur_legacy)
3076                 start = 1;
3077         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3078                sizeof(kvm->arch.vpit->pit_state.channels));
3079         kvm->arch.vpit->pit_state.flags = ps->flags;
3080         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3081         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3082         return r;
3083 }
3084
3085 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3086                                  struct kvm_reinject_control *control)
3087 {
3088         if (!kvm->arch.vpit)
3089                 return -ENXIO;
3090         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3091         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3092         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3093         return 0;
3094 }
3095
3096 /*
3097  * Get (and clear) the dirty memory log for a memory slot.
3098  */
3099 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3100                                       struct kvm_dirty_log *log)
3101 {
3102         int r, i;
3103         struct kvm_memory_slot *memslot;
3104         unsigned long n;
3105         unsigned long is_dirty = 0;
3106
3107         mutex_lock(&kvm->slots_lock);
3108
3109         r = -EINVAL;
3110         if (log->slot >= KVM_MEMORY_SLOTS)
3111                 goto out;
3112
3113         memslot = &kvm->memslots->memslots[log->slot];
3114         r = -ENOENT;
3115         if (!memslot->dirty_bitmap)
3116                 goto out;
3117
3118         n = kvm_dirty_bitmap_bytes(memslot);
3119
3120         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3121                 is_dirty = memslot->dirty_bitmap[i];
3122
3123         /* If nothing is dirty, don't bother messing with page tables. */
3124         if (is_dirty) {
3125                 struct kvm_memslots *slots, *old_slots;
3126                 unsigned long *dirty_bitmap;
3127
3128                 spin_lock(&kvm->mmu_lock);
3129                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3130                 spin_unlock(&kvm->mmu_lock);
3131
3132                 r = -ENOMEM;
3133                 dirty_bitmap = vmalloc(n);
3134                 if (!dirty_bitmap)
3135                         goto out;
3136                 memset(dirty_bitmap, 0, n);
3137
3138                 r = -ENOMEM;
3139                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3140                 if (!slots) {
3141                         vfree(dirty_bitmap);
3142                         goto out;
3143                 }
3144                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3145                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3146
3147                 old_slots = kvm->memslots;
3148                 rcu_assign_pointer(kvm->memslots, slots);
3149                 synchronize_srcu_expedited(&kvm->srcu);
3150                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3151                 kfree(old_slots);
3152
3153                 r = -EFAULT;
3154                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3155                         vfree(dirty_bitmap);
3156                         goto out;
3157                 }
3158                 vfree(dirty_bitmap);
3159         } else {
3160                 r = -EFAULT;
3161                 if (clear_user(log->dirty_bitmap, n))
3162                         goto out;
3163         }
3164
3165         r = 0;
3166 out:
3167         mutex_unlock(&kvm->slots_lock);
3168         return r;
3169 }
3170
3171 long kvm_arch_vm_ioctl(struct file *filp,
3172                        unsigned int ioctl, unsigned long arg)
3173 {
3174         struct kvm *kvm = filp->private_data;
3175         void __user *argp = (void __user *)arg;
3176         int r = -ENOTTY;
3177         /*
3178          * This union makes it completely explicit to gcc-3.x
3179          * that these two variables' stack usage should be
3180          * combined, not added together.
3181          */
3182         union {
3183                 struct kvm_pit_state ps;
3184                 struct kvm_pit_state2 ps2;
3185                 struct kvm_pit_config pit_config;
3186         } u;
3187
3188         switch (ioctl) {
3189         case KVM_SET_TSS_ADDR:
3190                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3191                 if (r < 0)
3192                         goto out;
3193                 break;
3194         case KVM_SET_IDENTITY_MAP_ADDR: {
3195                 u64 ident_addr;
3196
3197                 r = -EFAULT;
3198                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3199                         goto out;
3200                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3201                 if (r < 0)
3202                         goto out;
3203                 break;
3204         }
3205         case KVM_SET_NR_MMU_PAGES:
3206                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3207                 if (r)
3208                         goto out;
3209                 break;
3210         case KVM_GET_NR_MMU_PAGES:
3211                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3212                 break;
3213         case KVM_CREATE_IRQCHIP: {
3214                 struct kvm_pic *vpic;
3215
3216                 mutex_lock(&kvm->lock);
3217                 r = -EEXIST;
3218                 if (kvm->arch.vpic)
3219                         goto create_irqchip_unlock;
3220                 r = -ENOMEM;
3221                 vpic = kvm_create_pic(kvm);
3222                 if (vpic) {
3223                         r = kvm_ioapic_init(kvm);
3224                         if (r) {
3225                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3226                                                           &vpic->dev);
3227                                 kfree(vpic);
3228                                 goto create_irqchip_unlock;
3229                         }
3230                 } else
3231                         goto create_irqchip_unlock;
3232                 smp_wmb();
3233                 kvm->arch.vpic = vpic;
3234                 smp_wmb();
3235                 r = kvm_setup_default_irq_routing(kvm);
3236                 if (r) {
3237                         mutex_lock(&kvm->irq_lock);
3238                         kvm_ioapic_destroy(kvm);
3239                         kvm_destroy_pic(kvm);
3240                         mutex_unlock(&kvm->irq_lock);
3241                 }
3242         create_irqchip_unlock:
3243                 mutex_unlock(&kvm->lock);
3244                 break;
3245         }
3246         case KVM_CREATE_PIT:
3247                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3248                 goto create_pit;
3249         case KVM_CREATE_PIT2:
3250                 r = -EFAULT;
3251                 if (copy_from_user(&u.pit_config, argp,
3252                                    sizeof(struct kvm_pit_config)))
3253                         goto out;
3254         create_pit:
3255                 mutex_lock(&kvm->slots_lock);
3256                 r = -EEXIST;
3257                 if (kvm->arch.vpit)
3258                         goto create_pit_unlock;
3259                 r = -ENOMEM;
3260                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3261                 if (kvm->arch.vpit)
3262                         r = 0;
3263         create_pit_unlock:
3264                 mutex_unlock(&kvm->slots_lock);
3265                 break;
3266         case KVM_IRQ_LINE_STATUS:
3267         case KVM_IRQ_LINE: {
3268                 struct kvm_irq_level irq_event;
3269
3270                 r = -EFAULT;
3271                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3272                         goto out;
3273                 r = -ENXIO;
3274                 if (irqchip_in_kernel(kvm)) {
3275                         __s32 status;
3276                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3277                                         irq_event.irq, irq_event.level);
3278                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3279                                 r = -EFAULT;
3280                                 irq_event.status = status;
3281                                 if (copy_to_user(argp, &irq_event,
3282                                                         sizeof irq_event))
3283                                         goto out;
3284                         }
3285                         r = 0;
3286                 }
3287                 break;
3288         }
3289         case KVM_GET_IRQCHIP: {
3290                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3291                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3292
3293                 r = -ENOMEM;
3294                 if (!chip)
3295                         goto out;
3296                 r = -EFAULT;
3297                 if (copy_from_user(chip, argp, sizeof *chip))
3298                         goto get_irqchip_out;
3299                 r = -ENXIO;
3300                 if (!irqchip_in_kernel(kvm))
3301                         goto get_irqchip_out;
3302                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3303                 if (r)
3304                         goto get_irqchip_out;
3305                 r = -EFAULT;
3306                 if (copy_to_user(argp, chip, sizeof *chip))
3307                         goto get_irqchip_out;
3308                 r = 0;
3309         get_irqchip_out:
3310                 kfree(chip);
3311                 if (r)
3312                         goto out;
3313                 break;
3314         }
3315         case KVM_SET_IRQCHIP: {
3316                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3317                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3318
3319                 r = -ENOMEM;
3320                 if (!chip)
3321                         goto out;
3322                 r = -EFAULT;
3323                 if (copy_from_user(chip, argp, sizeof *chip))
3324                         goto set_irqchip_out;
3325                 r = -ENXIO;
3326                 if (!irqchip_in_kernel(kvm))
3327                         goto set_irqchip_out;
3328                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3329                 if (r)
3330                         goto set_irqchip_out;
3331                 r = 0;
3332         set_irqchip_out:
3333                 kfree(chip);
3334                 if (r)
3335                         goto out;
3336                 break;
3337         }
3338         case KVM_GET_PIT: {
3339                 r = -EFAULT;
3340                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3341                         goto out;
3342                 r = -ENXIO;
3343                 if (!kvm->arch.vpit)
3344                         goto out;
3345                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3346                 if (r)
3347                         goto out;
3348                 r = -EFAULT;
3349                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3350                         goto out;
3351                 r = 0;
3352                 break;
3353         }
3354         case KVM_SET_PIT: {
3355                 r = -EFAULT;
3356                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3357                         goto out;
3358                 r = -ENXIO;
3359                 if (!kvm->arch.vpit)
3360                         goto out;
3361                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3362                 if (r)
3363                         goto out;
3364                 r = 0;
3365                 break;
3366         }
3367         case KVM_GET_PIT2: {
3368                 r = -ENXIO;
3369                 if (!kvm->arch.vpit)
3370                         goto out;
3371                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3372                 if (r)
3373                         goto out;
3374                 r = -EFAULT;
3375                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3376                         goto out;
3377                 r = 0;
3378                 break;
3379         }
3380         case KVM_SET_PIT2: {
3381                 r = -EFAULT;
3382                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3383                         goto out;
3384                 r = -ENXIO;
3385                 if (!kvm->arch.vpit)
3386                         goto out;
3387                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3388                 if (r)
3389                         goto out;
3390                 r = 0;
3391                 break;
3392         }
3393         case KVM_REINJECT_CONTROL: {
3394                 struct kvm_reinject_control control;
3395                 r =  -EFAULT;
3396                 if (copy_from_user(&control, argp, sizeof(control)))
3397                         goto out;
3398                 r = kvm_vm_ioctl_reinject(kvm, &control);
3399                 if (r)
3400                         goto out;
3401                 r = 0;
3402                 break;
3403         }
3404         case KVM_XEN_HVM_CONFIG: {
3405                 r = -EFAULT;
3406                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3407                                    sizeof(struct kvm_xen_hvm_config)))
3408                         goto out;
3409                 r = -EINVAL;
3410                 if (kvm->arch.xen_hvm_config.flags)
3411                         goto out;
3412                 r = 0;
3413                 break;
3414         }
3415         case KVM_SET_CLOCK: {
3416                 struct kvm_clock_data user_ns;
3417                 u64 now_ns;
3418                 s64 delta;
3419
3420                 r = -EFAULT;
3421                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3422                         goto out;
3423
3424                 r = -EINVAL;
3425                 if (user_ns.flags)
3426                         goto out;
3427
3428                 r = 0;
3429                 now_ns = get_kernel_ns();
3430                 delta = user_ns.clock - now_ns;
3431                 kvm->arch.kvmclock_offset = delta;
3432                 break;
3433         }
3434         case KVM_GET_CLOCK: {
3435                 struct kvm_clock_data user_ns;
3436                 u64 now_ns;
3437
3438                 now_ns = get_kernel_ns();
3439                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3440                 user_ns.flags = 0;
3441
3442                 r = -EFAULT;
3443                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3444                         goto out;
3445                 r = 0;
3446                 break;
3447         }
3448
3449         default:
3450                 ;
3451         }
3452 out:
3453         return r;
3454 }
3455
3456 static void kvm_init_msr_list(void)
3457 {
3458         u32 dummy[2];
3459         unsigned i, j;
3460
3461         /* skip the first msrs in the list. KVM-specific */
3462         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3463                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3464                         continue;
3465                 if (j < i)
3466                         msrs_to_save[j] = msrs_to_save[i];
3467                 j++;
3468         }
3469         num_msrs_to_save = j;
3470 }
3471
3472 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3473                            const void *v)
3474 {
3475         if (vcpu->arch.apic &&
3476             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3477                 return 0;
3478
3479         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3480 }
3481
3482 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3483 {
3484         if (vcpu->arch.apic &&
3485             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3486                 return 0;
3487
3488         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3489 }
3490
3491 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3492                         struct kvm_segment *var, int seg)
3493 {
3494         kvm_x86_ops->set_segment(vcpu, var, seg);
3495 }
3496
3497 void kvm_get_segment(struct kvm_vcpu *vcpu,
3498                      struct kvm_segment *var, int seg)
3499 {
3500         kvm_x86_ops->get_segment(vcpu, var, seg);
3501 }
3502
3503 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3504 {
3505         return gpa;
3506 }
3507
3508 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3509 {
3510         gpa_t t_gpa;
3511         u32 error;
3512
3513         BUG_ON(!mmu_is_nested(vcpu));
3514
3515         /* NPT walks are always user-walks */
3516         access |= PFERR_USER_MASK;
3517         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3518         if (t_gpa == UNMAPPED_GVA)
3519                 vcpu->arch.fault.error_code |= PFERR_NESTED_MASK;
3520
3521         return t_gpa;
3522 }
3523
3524 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3525 {
3526         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3527         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3528 }
3529
3530  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3531 {
3532         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3533         access |= PFERR_FETCH_MASK;
3534         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3535 }
3536
3537 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3538 {
3539         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3540         access |= PFERR_WRITE_MASK;
3541         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3542 }
3543
3544 /* uses this to access any guest's mapped memory without checking CPL */
3545 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3546 {
3547         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3548 }
3549
3550 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3551                                       struct kvm_vcpu *vcpu, u32 access,
3552                                       u32 *error)
3553 {
3554         void *data = val;
3555         int r = X86EMUL_CONTINUE;
3556
3557         while (bytes) {
3558                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3559                                                             error);
3560                 unsigned offset = addr & (PAGE_SIZE-1);
3561                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3562                 int ret;
3563
3564                 if (gpa == UNMAPPED_GVA) {
3565                         r = X86EMUL_PROPAGATE_FAULT;
3566                         goto out;
3567                 }
3568                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3569                 if (ret < 0) {
3570                         r = X86EMUL_IO_NEEDED;
3571                         goto out;
3572                 }
3573
3574                 bytes -= toread;
3575                 data += toread;
3576                 addr += toread;
3577         }
3578 out:
3579         return r;
3580 }
3581
3582 /* used for instruction fetching */
3583 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3584                                 struct kvm_vcpu *vcpu, u32 *error)
3585 {
3586         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3587         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3588                                           access | PFERR_FETCH_MASK, error);
3589 }
3590
3591 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3592                                struct kvm_vcpu *vcpu, u32 *error)
3593 {
3594         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3595         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3596                                           error);
3597 }
3598
3599 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3600                                struct kvm_vcpu *vcpu, u32 *error)
3601 {
3602         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3603 }
3604
3605 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3606                                        unsigned int bytes,
3607                                        struct kvm_vcpu *vcpu,
3608                                        u32 *error)
3609 {
3610         void *data = val;
3611         int r = X86EMUL_CONTINUE;
3612
3613         while (bytes) {
3614                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3615                                                              PFERR_WRITE_MASK,
3616                                                              error);
3617                 unsigned offset = addr & (PAGE_SIZE-1);
3618                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3619                 int ret;
3620
3621                 if (gpa == UNMAPPED_GVA) {
3622                         r = X86EMUL_PROPAGATE_FAULT;
3623                         goto out;
3624                 }
3625                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3626                 if (ret < 0) {
3627                         r = X86EMUL_IO_NEEDED;
3628                         goto out;
3629                 }
3630
3631                 bytes -= towrite;
3632                 data += towrite;
3633                 addr += towrite;
3634         }
3635 out:
3636         return r;
3637 }
3638
3639 static int emulator_read_emulated(unsigned long addr,
3640                                   void *val,
3641                                   unsigned int bytes,
3642                                   unsigned int *error_code,
3643                                   struct kvm_vcpu *vcpu)
3644 {
3645         gpa_t                 gpa;
3646
3647         if (vcpu->mmio_read_completed) {
3648                 memcpy(val, vcpu->mmio_data, bytes);
3649                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3650                                vcpu->mmio_phys_addr, *(u64 *)val);
3651                 vcpu->mmio_read_completed = 0;
3652                 return X86EMUL_CONTINUE;
3653         }
3654
3655         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3656
3657         if (gpa == UNMAPPED_GVA)
3658                 return X86EMUL_PROPAGATE_FAULT;
3659
3660         /* For APIC access vmexit */
3661         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3662                 goto mmio;
3663
3664         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3665                                 == X86EMUL_CONTINUE)
3666                 return X86EMUL_CONTINUE;
3667
3668 mmio:
3669         /*
3670          * Is this MMIO handled locally?
3671          */
3672         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3673                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3674                 return X86EMUL_CONTINUE;
3675         }
3676
3677         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3678
3679         vcpu->mmio_needed = 1;
3680         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3681         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3682         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3683         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3684
3685         return X86EMUL_IO_NEEDED;
3686 }
3687
3688 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3689                           const void *val, int bytes)
3690 {
3691         int ret;
3692
3693         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3694         if (ret < 0)
3695                 return 0;
3696         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3697         return 1;
3698 }
3699
3700 static int emulator_write_emulated_onepage(unsigned long addr,
3701                                            const void *val,
3702                                            unsigned int bytes,
3703                                            unsigned int *error_code,
3704                                            struct kvm_vcpu *vcpu)
3705 {
3706         gpa_t                 gpa;
3707
3708         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3709
3710         if (gpa == UNMAPPED_GVA)
3711                 return X86EMUL_PROPAGATE_FAULT;
3712
3713         /* For APIC access vmexit */
3714         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3715                 goto mmio;
3716
3717         if (emulator_write_phys(vcpu, gpa, val, bytes))
3718                 return X86EMUL_CONTINUE;
3719
3720 mmio:
3721         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3722         /*
3723          * Is this MMIO handled locally?
3724          */
3725         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3726                 return X86EMUL_CONTINUE;
3727
3728         vcpu->mmio_needed = 1;
3729         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3730         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3731         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3732         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3733         memcpy(vcpu->run->mmio.data, val, bytes);
3734
3735         return X86EMUL_CONTINUE;
3736 }
3737
3738 int emulator_write_emulated(unsigned long addr,
3739                             const void *val,
3740                             unsigned int bytes,
3741                             unsigned int *error_code,
3742                             struct kvm_vcpu *vcpu)
3743 {
3744         /* Crossing a page boundary? */
3745         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3746                 int rc, now;
3747
3748                 now = -addr & ~PAGE_MASK;
3749                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3750                                                      vcpu);
3751                 if (rc != X86EMUL_CONTINUE)
3752                         return rc;
3753                 addr += now;
3754                 val += now;
3755                 bytes -= now;
3756         }
3757         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3758                                                vcpu);
3759 }
3760
3761 #define CMPXCHG_TYPE(t, ptr, old, new) \
3762         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3763
3764 #ifdef CONFIG_X86_64
3765 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3766 #else
3767 #  define CMPXCHG64(ptr, old, new) \
3768         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3769 #endif
3770
3771 static int emulator_cmpxchg_emulated(unsigned long addr,
3772                                      const void *old,
3773                                      const void *new,
3774                                      unsigned int bytes,
3775                                      unsigned int *error_code,
3776                                      struct kvm_vcpu *vcpu)
3777 {
3778         gpa_t gpa;
3779         struct page *page;
3780         char *kaddr;
3781         bool exchanged;
3782
3783         /* guests cmpxchg8b have to be emulated atomically */
3784         if (bytes > 8 || (bytes & (bytes - 1)))
3785                 goto emul_write;
3786
3787         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3788
3789         if (gpa == UNMAPPED_GVA ||
3790             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3791                 goto emul_write;
3792
3793         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3794                 goto emul_write;
3795
3796         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3797         if (is_error_page(page)) {
3798                 kvm_release_page_clean(page);
3799                 goto emul_write;
3800         }
3801
3802         kaddr = kmap_atomic(page, KM_USER0);
3803         kaddr += offset_in_page(gpa);
3804         switch (bytes) {
3805         case 1:
3806                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3807                 break;
3808         case 2:
3809                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3810                 break;
3811         case 4:
3812                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3813                 break;
3814         case 8:
3815                 exchanged = CMPXCHG64(kaddr, old, new);
3816                 break;
3817         default:
3818                 BUG();
3819         }
3820         kunmap_atomic(kaddr, KM_USER0);
3821         kvm_release_page_dirty(page);
3822
3823         if (!exchanged)
3824                 return X86EMUL_CMPXCHG_FAILED;
3825
3826         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3827
3828         return X86EMUL_CONTINUE;
3829
3830 emul_write:
3831         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3832
3833         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3834 }
3835
3836 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3837 {
3838         /* TODO: String I/O for in kernel device */
3839         int r;
3840
3841         if (vcpu->arch.pio.in)
3842                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3843                                     vcpu->arch.pio.size, pd);
3844         else
3845                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3846                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3847                                      pd);
3848         return r;
3849 }
3850
3851
3852 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3853                              unsigned int count, struct kvm_vcpu *vcpu)
3854 {
3855         if (vcpu->arch.pio.count)
3856                 goto data_avail;
3857
3858         trace_kvm_pio(0, port, size, 1);
3859
3860         vcpu->arch.pio.port = port;
3861         vcpu->arch.pio.in = 1;
3862         vcpu->arch.pio.count  = count;
3863         vcpu->arch.pio.size = size;
3864
3865         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3866         data_avail:
3867                 memcpy(val, vcpu->arch.pio_data, size * count);
3868                 vcpu->arch.pio.count = 0;
3869                 return 1;
3870         }
3871
3872         vcpu->run->exit_reason = KVM_EXIT_IO;
3873         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3874         vcpu->run->io.size = size;
3875         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3876         vcpu->run->io.count = count;
3877         vcpu->run->io.port = port;
3878
3879         return 0;
3880 }
3881
3882 static int emulator_pio_out_emulated(int size, unsigned short port,
3883                               const void *val, unsigned int count,
3884                               struct kvm_vcpu *vcpu)
3885 {
3886         trace_kvm_pio(1, port, size, 1);
3887
3888         vcpu->arch.pio.port = port;
3889         vcpu->arch.pio.in = 0;
3890         vcpu->arch.pio.count = count;
3891         vcpu->arch.pio.size = size;
3892
3893         memcpy(vcpu->arch.pio_data, val, size * count);
3894
3895         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3896                 vcpu->arch.pio.count = 0;
3897                 return 1;
3898         }
3899
3900         vcpu->run->exit_reason = KVM_EXIT_IO;
3901         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3902         vcpu->run->io.size = size;
3903         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3904         vcpu->run->io.count = count;
3905         vcpu->run->io.port = port;
3906
3907         return 0;
3908 }
3909
3910 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3911 {
3912         return kvm_x86_ops->get_segment_base(vcpu, seg);
3913 }
3914
3915 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3916 {
3917         kvm_mmu_invlpg(vcpu, address);
3918         return X86EMUL_CONTINUE;
3919 }
3920
3921 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3922 {
3923         if (!need_emulate_wbinvd(vcpu))
3924                 return X86EMUL_CONTINUE;
3925
3926         if (kvm_x86_ops->has_wbinvd_exit()) {
3927                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3928                                 wbinvd_ipi, NULL, 1);
3929                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3930         }
3931         wbinvd();
3932         return X86EMUL_CONTINUE;
3933 }
3934 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3935
3936 int emulate_clts(struct kvm_vcpu *vcpu)
3937 {
3938         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3939         kvm_x86_ops->fpu_activate(vcpu);
3940         return X86EMUL_CONTINUE;
3941 }
3942
3943 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3944 {
3945         return _kvm_get_dr(vcpu, dr, dest);
3946 }
3947
3948 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3949 {
3950
3951         return __kvm_set_dr(vcpu, dr, value);
3952 }
3953
3954 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3955 {
3956         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3957 }
3958
3959 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3960 {
3961         unsigned long value;
3962
3963         switch (cr) {
3964         case 0:
3965                 value = kvm_read_cr0(vcpu);
3966                 break;
3967         case 2:
3968                 value = vcpu->arch.cr2;
3969                 break;
3970         case 3:
3971                 value = vcpu->arch.cr3;
3972                 break;
3973         case 4:
3974                 value = kvm_read_cr4(vcpu);
3975                 break;
3976         case 8:
3977                 value = kvm_get_cr8(vcpu);
3978                 break;
3979         default:
3980                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3981                 return 0;
3982         }
3983
3984         return value;
3985 }
3986
3987 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3988 {
3989         int res = 0;
3990
3991         switch (cr) {
3992         case 0:
3993                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3994                 break;
3995         case 2:
3996                 vcpu->arch.cr2 = val;
3997                 break;
3998         case 3:
3999                 res = kvm_set_cr3(vcpu, val);
4000                 break;
4001         case 4:
4002                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4003                 break;
4004         case 8:
4005                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4006                 break;
4007         default:
4008                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4009                 res = -1;
4010         }
4011
4012         return res;
4013 }
4014
4015 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4016 {
4017         return kvm_x86_ops->get_cpl(vcpu);
4018 }
4019
4020 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4021 {
4022         kvm_x86_ops->get_gdt(vcpu, dt);
4023 }
4024
4025 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4026 {
4027         kvm_x86_ops->get_idt(vcpu, dt);
4028 }
4029
4030 static unsigned long emulator_get_cached_segment_base(int seg,
4031                                                       struct kvm_vcpu *vcpu)
4032 {
4033         return get_segment_base(vcpu, seg);
4034 }
4035
4036 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4037                                            struct kvm_vcpu *vcpu)
4038 {
4039         struct kvm_segment var;
4040
4041         kvm_get_segment(vcpu, &var, seg);
4042
4043         if (var.unusable)
4044                 return false;
4045
4046         if (var.g)
4047                 var.limit >>= 12;
4048         set_desc_limit(desc, var.limit);
4049         set_desc_base(desc, (unsigned long)var.base);
4050         desc->type = var.type;
4051         desc->s = var.s;
4052         desc->dpl = var.dpl;
4053         desc->p = var.present;
4054         desc->avl = var.avl;
4055         desc->l = var.l;
4056         desc->d = var.db;
4057         desc->g = var.g;
4058
4059         return true;
4060 }
4061
4062 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4063                                            struct kvm_vcpu *vcpu)
4064 {
4065         struct kvm_segment var;
4066
4067         /* needed to preserve selector */
4068         kvm_get_segment(vcpu, &var, seg);
4069
4070         var.base = get_desc_base(desc);
4071         var.limit = get_desc_limit(desc);
4072         if (desc->g)
4073                 var.limit = (var.limit << 12) | 0xfff;
4074         var.type = desc->type;
4075         var.present = desc->p;
4076         var.dpl = desc->dpl;
4077         var.db = desc->d;
4078         var.s = desc->s;
4079         var.l = desc->l;
4080         var.g = desc->g;
4081         var.avl = desc->avl;
4082         var.present = desc->p;
4083         var.unusable = !var.present;
4084         var.padding = 0;
4085
4086         kvm_set_segment(vcpu, &var, seg);
4087         return;
4088 }
4089
4090 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4091 {
4092         struct kvm_segment kvm_seg;
4093
4094         kvm_get_segment(vcpu, &kvm_seg, seg);
4095         return kvm_seg.selector;
4096 }
4097
4098 static void emulator_set_segment_selector(u16 sel, int seg,
4099                                           struct kvm_vcpu *vcpu)
4100 {
4101         struct kvm_segment kvm_seg;
4102
4103         kvm_get_segment(vcpu, &kvm_seg, seg);
4104         kvm_seg.selector = sel;
4105         kvm_set_segment(vcpu, &kvm_seg, seg);
4106 }
4107
4108 static struct x86_emulate_ops emulate_ops = {
4109         .read_std            = kvm_read_guest_virt_system,
4110         .write_std           = kvm_write_guest_virt_system,
4111         .fetch               = kvm_fetch_guest_virt,
4112         .read_emulated       = emulator_read_emulated,
4113         .write_emulated      = emulator_write_emulated,
4114         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4115         .pio_in_emulated     = emulator_pio_in_emulated,
4116         .pio_out_emulated    = emulator_pio_out_emulated,
4117         .get_cached_descriptor = emulator_get_cached_descriptor,
4118         .set_cached_descriptor = emulator_set_cached_descriptor,
4119         .get_segment_selector = emulator_get_segment_selector,
4120         .set_segment_selector = emulator_set_segment_selector,
4121         .get_cached_segment_base = emulator_get_cached_segment_base,
4122         .get_gdt             = emulator_get_gdt,
4123         .get_idt             = emulator_get_idt,
4124         .get_cr              = emulator_get_cr,
4125         .set_cr              = emulator_set_cr,
4126         .cpl                 = emulator_get_cpl,
4127         .get_dr              = emulator_get_dr,
4128         .set_dr              = emulator_set_dr,
4129         .set_msr             = kvm_set_msr,
4130         .get_msr             = kvm_get_msr,
4131 };
4132
4133 static void cache_all_regs(struct kvm_vcpu *vcpu)
4134 {
4135         kvm_register_read(vcpu, VCPU_REGS_RAX);
4136         kvm_register_read(vcpu, VCPU_REGS_RSP);
4137         kvm_register_read(vcpu, VCPU_REGS_RIP);
4138         vcpu->arch.regs_dirty = ~0;
4139 }
4140
4141 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4142 {
4143         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4144         /*
4145          * an sti; sti; sequence only disable interrupts for the first
4146          * instruction. So, if the last instruction, be it emulated or
4147          * not, left the system with the INT_STI flag enabled, it
4148          * means that the last instruction is an sti. We should not
4149          * leave the flag on in this case. The same goes for mov ss
4150          */
4151         if (!(int_shadow & mask))
4152                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4153 }
4154
4155 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4156 {
4157         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4158         if (ctxt->exception == PF_VECTOR)
4159                 kvm_propagate_fault(vcpu);
4160         else if (ctxt->error_code_valid)
4161                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4162         else
4163                 kvm_queue_exception(vcpu, ctxt->exception);
4164 }
4165
4166 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4167 {
4168         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4169         int cs_db, cs_l;
4170
4171         cache_all_regs(vcpu);
4172
4173         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4174
4175         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4176         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4177         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4178         vcpu->arch.emulate_ctxt.mode =
4179                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4180                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4181                 ? X86EMUL_MODE_VM86 : cs_l
4182                 ? X86EMUL_MODE_PROT64 : cs_db
4183                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4184         memset(c, 0, sizeof(struct decode_cache));
4185         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4186 }
4187
4188 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4189 {
4190         ++vcpu->stat.insn_emulation_fail;
4191         trace_kvm_emulate_insn_failed(vcpu);
4192         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4193         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4194         vcpu->run->internal.ndata = 0;
4195         kvm_queue_exception(vcpu, UD_VECTOR);
4196         return EMULATE_FAIL;
4197 }
4198
4199 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4200 {
4201         gpa_t gpa;
4202
4203         if (tdp_enabled)
4204                 return false;
4205
4206         /*
4207          * if emulation was due to access to shadowed page table
4208          * and it failed try to unshadow page and re-entetr the
4209          * guest to let CPU execute the instruction.
4210          */
4211         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4212                 return true;
4213
4214         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4215
4216         if (gpa == UNMAPPED_GVA)
4217                 return true; /* let cpu generate fault */
4218
4219         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4220                 return true;
4221
4222         return false;
4223 }
4224
4225 int emulate_instruction(struct kvm_vcpu *vcpu,
4226                         unsigned long cr2,
4227                         u16 error_code,
4228                         int emulation_type)
4229 {
4230         int r;
4231         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4232
4233         kvm_clear_exception_queue(vcpu);
4234         vcpu->arch.mmio_fault_cr2 = cr2;
4235         /*
4236          * TODO: fix emulate.c to use guest_read/write_register
4237          * instead of direct ->regs accesses, can save hundred cycles
4238          * on Intel for instructions that don't read/change RSP, for
4239          * for example.
4240          */
4241         cache_all_regs(vcpu);
4242
4243         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4244                 init_emulate_ctxt(vcpu);
4245                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4246                 vcpu->arch.emulate_ctxt.exception = -1;
4247                 vcpu->arch.emulate_ctxt.perm_ok = false;
4248
4249                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4250                 trace_kvm_emulate_insn_start(vcpu);
4251
4252                 /* Only allow emulation of specific instructions on #UD
4253                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4254                 if (emulation_type & EMULTYPE_TRAP_UD) {
4255                         if (!c->twobyte)
4256                                 return EMULATE_FAIL;
4257                         switch (c->b) {
4258                         case 0x01: /* VMMCALL */
4259                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4260                                         return EMULATE_FAIL;
4261                                 break;
4262                         case 0x34: /* sysenter */
4263                         case 0x35: /* sysexit */
4264                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4265                                         return EMULATE_FAIL;
4266                                 break;
4267                         case 0x05: /* syscall */
4268                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4269                                         return EMULATE_FAIL;
4270                                 break;
4271                         default:
4272                                 return EMULATE_FAIL;
4273                         }
4274
4275                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4276                                 return EMULATE_FAIL;
4277                 }
4278
4279                 ++vcpu->stat.insn_emulation;
4280                 if (r)  {
4281                         if (reexecute_instruction(vcpu, cr2))
4282                                 return EMULATE_DONE;
4283                         if (emulation_type & EMULTYPE_SKIP)
4284                                 return EMULATE_FAIL;
4285                         return handle_emulation_failure(vcpu);
4286                 }
4287         }
4288
4289         if (emulation_type & EMULTYPE_SKIP) {
4290                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4291                 return EMULATE_DONE;
4292         }
4293
4294         /* this is needed for vmware backdor interface to work since it
4295            changes registers values  during IO operation */
4296         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4297
4298 restart:
4299         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4300
4301         if (r == EMULATION_FAILED) {
4302                 if (reexecute_instruction(vcpu, cr2))
4303                         return EMULATE_DONE;
4304
4305                 return handle_emulation_failure(vcpu);
4306         }
4307
4308         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4309                 inject_emulated_exception(vcpu);
4310                 r = EMULATE_DONE;
4311         } else if (vcpu->arch.pio.count) {
4312                 if (!vcpu->arch.pio.in)
4313                         vcpu->arch.pio.count = 0;
4314                 r = EMULATE_DO_MMIO;
4315         } else if (vcpu->mmio_needed) {
4316                 if (vcpu->mmio_is_write)
4317                         vcpu->mmio_needed = 0;
4318                 r = EMULATE_DO_MMIO;
4319         } else if (r == EMULATION_RESTART)
4320                 goto restart;
4321         else
4322                 r = EMULATE_DONE;
4323
4324         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4325         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4326         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4327         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4328
4329         return r;
4330 }
4331 EXPORT_SYMBOL_GPL(emulate_instruction);
4332
4333 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4334 {
4335         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4336         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4337         /* do not return to emulator after return from userspace */
4338         vcpu->arch.pio.count = 0;
4339         return ret;
4340 }
4341 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4342
4343 static void tsc_bad(void *info)
4344 {
4345         __get_cpu_var(cpu_tsc_khz) = 0;
4346 }
4347
4348 static void tsc_khz_changed(void *data)
4349 {
4350         struct cpufreq_freqs *freq = data;
4351         unsigned long khz = 0;
4352
4353         if (data)
4354                 khz = freq->new;
4355         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4356                 khz = cpufreq_quick_get(raw_smp_processor_id());
4357         if (!khz)
4358                 khz = tsc_khz;
4359         __get_cpu_var(cpu_tsc_khz) = khz;
4360 }
4361
4362 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4363                                      void *data)
4364 {
4365         struct cpufreq_freqs *freq = data;
4366         struct kvm *kvm;
4367         struct kvm_vcpu *vcpu;
4368         int i, send_ipi = 0;
4369
4370         /*
4371          * We allow guests to temporarily run on slowing clocks,
4372          * provided we notify them after, or to run on accelerating
4373          * clocks, provided we notify them before.  Thus time never
4374          * goes backwards.
4375          *
4376          * However, we have a problem.  We can't atomically update
4377          * the frequency of a given CPU from this function; it is
4378          * merely a notifier, which can be called from any CPU.
4379          * Changing the TSC frequency at arbitrary points in time
4380          * requires a recomputation of local variables related to
4381          * the TSC for each VCPU.  We must flag these local variables
4382          * to be updated and be sure the update takes place with the
4383          * new frequency before any guests proceed.
4384          *
4385          * Unfortunately, the combination of hotplug CPU and frequency
4386          * change creates an intractable locking scenario; the order
4387          * of when these callouts happen is undefined with respect to
4388          * CPU hotplug, and they can race with each other.  As such,
4389          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4390          * undefined; you can actually have a CPU frequency change take
4391          * place in between the computation of X and the setting of the
4392          * variable.  To protect against this problem, all updates of
4393          * the per_cpu tsc_khz variable are done in an interrupt
4394          * protected IPI, and all callers wishing to update the value
4395          * must wait for a synchronous IPI to complete (which is trivial
4396          * if the caller is on the CPU already).  This establishes the
4397          * necessary total order on variable updates.
4398          *
4399          * Note that because a guest time update may take place
4400          * anytime after the setting of the VCPU's request bit, the
4401          * correct TSC value must be set before the request.  However,
4402          * to ensure the update actually makes it to any guest which
4403          * starts running in hardware virtualization between the set
4404          * and the acquisition of the spinlock, we must also ping the
4405          * CPU after setting the request bit.
4406          *
4407          */
4408
4409         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4410                 return 0;
4411         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4412                 return 0;
4413
4414         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4415
4416         spin_lock(&kvm_lock);
4417         list_for_each_entry(kvm, &vm_list, vm_list) {
4418                 kvm_for_each_vcpu(i, vcpu, kvm) {
4419                         if (vcpu->cpu != freq->cpu)
4420                                 continue;
4421                         if (!kvm_request_guest_time_update(vcpu))
4422                                 continue;
4423                         if (vcpu->cpu != smp_processor_id())
4424                                 send_ipi = 1;
4425                 }
4426         }
4427         spin_unlock(&kvm_lock);
4428
4429         if (freq->old < freq->new && send_ipi) {
4430                 /*
4431                  * We upscale the frequency.  Must make the guest
4432                  * doesn't see old kvmclock values while running with
4433                  * the new frequency, otherwise we risk the guest sees
4434                  * time go backwards.
4435                  *
4436                  * In case we update the frequency for another cpu
4437                  * (which might be in guest context) send an interrupt
4438                  * to kick the cpu out of guest context.  Next time
4439                  * guest context is entered kvmclock will be updated,
4440                  * so the guest will not see stale values.
4441                  */
4442                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4443         }
4444         return 0;
4445 }
4446
4447 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4448         .notifier_call  = kvmclock_cpufreq_notifier
4449 };
4450
4451 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4452                                         unsigned long action, void *hcpu)
4453 {
4454         unsigned int cpu = (unsigned long)hcpu;
4455
4456         switch (action) {
4457                 case CPU_ONLINE:
4458                 case CPU_DOWN_FAILED:
4459                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4460                         break;
4461                 case CPU_DOWN_PREPARE:
4462                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4463                         break;
4464         }
4465         return NOTIFY_OK;
4466 }
4467
4468 static struct notifier_block kvmclock_cpu_notifier_block = {
4469         .notifier_call  = kvmclock_cpu_notifier,
4470         .priority = -INT_MAX
4471 };
4472
4473 static void kvm_timer_init(void)
4474 {
4475         int cpu;
4476
4477         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4478         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4479                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4480                                           CPUFREQ_TRANSITION_NOTIFIER);
4481         }
4482         for_each_online_cpu(cpu)
4483                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4484 }
4485
4486 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4487
4488 static int kvm_is_in_guest(void)
4489 {
4490         return percpu_read(current_vcpu) != NULL;
4491 }
4492
4493 static int kvm_is_user_mode(void)
4494 {
4495         int user_mode = 3;
4496
4497         if (percpu_read(current_vcpu))
4498                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4499
4500         return user_mode != 0;
4501 }
4502
4503 static unsigned long kvm_get_guest_ip(void)
4504 {
4505         unsigned long ip = 0;
4506
4507         if (percpu_read(current_vcpu))
4508                 ip = kvm_rip_read(percpu_read(current_vcpu));
4509
4510         return ip;
4511 }
4512
4513 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4514         .is_in_guest            = kvm_is_in_guest,
4515         .is_user_mode           = kvm_is_user_mode,
4516         .get_guest_ip           = kvm_get_guest_ip,
4517 };
4518
4519 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4520 {
4521         percpu_write(current_vcpu, vcpu);
4522 }
4523 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4524
4525 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4526 {
4527         percpu_write(current_vcpu, NULL);
4528 }
4529 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4530
4531 int kvm_arch_init(void *opaque)
4532 {
4533         int r;
4534         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4535
4536         if (kvm_x86_ops) {
4537                 printk(KERN_ERR "kvm: already loaded the other module\n");
4538                 r = -EEXIST;
4539                 goto out;
4540         }
4541
4542         if (!ops->cpu_has_kvm_support()) {
4543                 printk(KERN_ERR "kvm: no hardware support\n");
4544                 r = -EOPNOTSUPP;
4545                 goto out;
4546         }
4547         if (ops->disabled_by_bios()) {
4548                 printk(KERN_ERR "kvm: disabled by bios\n");
4549                 r = -EOPNOTSUPP;
4550                 goto out;
4551         }
4552
4553         r = kvm_mmu_module_init();
4554         if (r)
4555                 goto out;
4556
4557         kvm_init_msr_list();
4558
4559         kvm_x86_ops = ops;
4560         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4561         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4562         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4563                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4564
4565         kvm_timer_init();
4566
4567         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4568
4569         if (cpu_has_xsave)
4570                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4571
4572         return 0;
4573
4574 out:
4575         return r;
4576 }
4577
4578 void kvm_arch_exit(void)
4579 {
4580         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4581
4582         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4583                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4584                                             CPUFREQ_TRANSITION_NOTIFIER);
4585         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4586         kvm_x86_ops = NULL;
4587         kvm_mmu_module_exit();
4588 }
4589
4590 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4591 {
4592         ++vcpu->stat.halt_exits;
4593         if (irqchip_in_kernel(vcpu->kvm)) {
4594                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4595                 return 1;
4596         } else {
4597                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4598                 return 0;
4599         }
4600 }
4601 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4602
4603 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4604                            unsigned long a1)
4605 {
4606         if (is_long_mode(vcpu))
4607                 return a0;
4608         else
4609                 return a0 | ((gpa_t)a1 << 32);
4610 }
4611
4612 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4613 {
4614         u64 param, ingpa, outgpa, ret;
4615         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4616         bool fast, longmode;
4617         int cs_db, cs_l;
4618
4619         /*
4620          * hypercall generates UD from non zero cpl and real mode
4621          * per HYPER-V spec
4622          */
4623         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4624                 kvm_queue_exception(vcpu, UD_VECTOR);
4625                 return 0;
4626         }
4627
4628         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4629         longmode = is_long_mode(vcpu) && cs_l == 1;
4630
4631         if (!longmode) {
4632                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4633                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4634                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4635                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4636                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4637                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4638         }
4639 #ifdef CONFIG_X86_64
4640         else {
4641                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4642                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4643                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4644         }
4645 #endif
4646
4647         code = param & 0xffff;
4648         fast = (param >> 16) & 0x1;
4649         rep_cnt = (param >> 32) & 0xfff;
4650         rep_idx = (param >> 48) & 0xfff;
4651
4652         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4653
4654         switch (code) {
4655         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4656                 kvm_vcpu_on_spin(vcpu);
4657                 break;
4658         default:
4659                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4660                 break;
4661         }
4662
4663         ret = res | (((u64)rep_done & 0xfff) << 32);
4664         if (longmode) {
4665                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4666         } else {
4667                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4668                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4669         }
4670
4671         return 1;
4672 }
4673
4674 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4675 {
4676         unsigned long nr, a0, a1, a2, a3, ret;
4677         int r = 1;
4678
4679         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4680                 return kvm_hv_hypercall(vcpu);
4681
4682         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4683         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4684         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4685         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4686         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4687
4688         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4689
4690         if (!is_long_mode(vcpu)) {
4691                 nr &= 0xFFFFFFFF;
4692                 a0 &= 0xFFFFFFFF;
4693                 a1 &= 0xFFFFFFFF;
4694                 a2 &= 0xFFFFFFFF;
4695                 a3 &= 0xFFFFFFFF;
4696         }
4697
4698         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4699                 ret = -KVM_EPERM;
4700                 goto out;
4701         }
4702
4703         switch (nr) {
4704         case KVM_HC_VAPIC_POLL_IRQ:
4705                 ret = 0;
4706                 break;
4707         case KVM_HC_MMU_OP:
4708                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4709                 break;
4710         default:
4711                 ret = -KVM_ENOSYS;
4712                 break;
4713         }
4714 out:
4715         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4716         ++vcpu->stat.hypercalls;
4717         return r;
4718 }
4719 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4720
4721 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4722 {
4723         char instruction[3];
4724         unsigned long rip = kvm_rip_read(vcpu);
4725
4726         /*
4727          * Blow out the MMU to ensure that no other VCPU has an active mapping
4728          * to ensure that the updated hypercall appears atomically across all
4729          * VCPUs.
4730          */
4731         kvm_mmu_zap_all(vcpu->kvm);
4732
4733         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4734
4735         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4736 }
4737
4738 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4739 {
4740         struct desc_ptr dt = { limit, base };
4741
4742         kvm_x86_ops->set_gdt(vcpu, &dt);
4743 }
4744
4745 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4746 {
4747         struct desc_ptr dt = { limit, base };
4748
4749         kvm_x86_ops->set_idt(vcpu, &dt);
4750 }
4751
4752 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4753 {
4754         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4755         int j, nent = vcpu->arch.cpuid_nent;
4756
4757         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4758         /* when no next entry is found, the current entry[i] is reselected */
4759         for (j = i + 1; ; j = (j + 1) % nent) {
4760                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4761                 if (ej->function == e->function) {
4762                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4763                         return j;
4764                 }
4765         }
4766         return 0; /* silence gcc, even though control never reaches here */
4767 }
4768
4769 /* find an entry with matching function, matching index (if needed), and that
4770  * should be read next (if it's stateful) */
4771 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4772         u32 function, u32 index)
4773 {
4774         if (e->function != function)
4775                 return 0;
4776         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4777                 return 0;
4778         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4779             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4780                 return 0;
4781         return 1;
4782 }
4783
4784 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4785                                               u32 function, u32 index)
4786 {
4787         int i;
4788         struct kvm_cpuid_entry2 *best = NULL;
4789
4790         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4791                 struct kvm_cpuid_entry2 *e;
4792
4793                 e = &vcpu->arch.cpuid_entries[i];
4794                 if (is_matching_cpuid_entry(e, function, index)) {
4795                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4796                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4797                         best = e;
4798                         break;
4799                 }
4800                 /*
4801                  * Both basic or both extended?
4802                  */
4803                 if (((e->function ^ function) & 0x80000000) == 0)
4804                         if (!best || e->function > best->function)
4805                                 best = e;
4806         }
4807         return best;
4808 }
4809 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4810
4811 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4812 {
4813         struct kvm_cpuid_entry2 *best;
4814
4815         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4816         if (!best || best->eax < 0x80000008)
4817                 goto not_found;
4818         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4819         if (best)
4820                 return best->eax & 0xff;
4821 not_found:
4822         return 36;
4823 }
4824
4825 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4826 {
4827         u32 function, index;
4828         struct kvm_cpuid_entry2 *best;
4829
4830         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4831         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4832         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4833         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4834         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4835         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4836         best = kvm_find_cpuid_entry(vcpu, function, index);
4837         if (best) {
4838                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4839                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4840                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4841                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4842         }
4843         kvm_x86_ops->skip_emulated_instruction(vcpu);
4844         trace_kvm_cpuid(function,
4845                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4846                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4847                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4848                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4849 }
4850 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4851
4852 /*
4853  * Check if userspace requested an interrupt window, and that the
4854  * interrupt window is open.
4855  *
4856  * No need to exit to userspace if we already have an interrupt queued.
4857  */
4858 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4859 {
4860         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4861                 vcpu->run->request_interrupt_window &&
4862                 kvm_arch_interrupt_allowed(vcpu));
4863 }
4864
4865 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4866 {
4867         struct kvm_run *kvm_run = vcpu->run;
4868
4869         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4870         kvm_run->cr8 = kvm_get_cr8(vcpu);
4871         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4872         if (irqchip_in_kernel(vcpu->kvm))
4873                 kvm_run->ready_for_interrupt_injection = 1;
4874         else
4875                 kvm_run->ready_for_interrupt_injection =
4876                         kvm_arch_interrupt_allowed(vcpu) &&
4877                         !kvm_cpu_has_interrupt(vcpu) &&
4878                         !kvm_event_needs_reinjection(vcpu);
4879 }
4880
4881 static void vapic_enter(struct kvm_vcpu *vcpu)
4882 {
4883         struct kvm_lapic *apic = vcpu->arch.apic;
4884         struct page *page;
4885
4886         if (!apic || !apic->vapic_addr)
4887                 return;
4888
4889         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4890
4891         vcpu->arch.apic->vapic_page = page;
4892 }
4893
4894 static void vapic_exit(struct kvm_vcpu *vcpu)
4895 {
4896         struct kvm_lapic *apic = vcpu->arch.apic;
4897         int idx;
4898
4899         if (!apic || !apic->vapic_addr)
4900                 return;
4901
4902         idx = srcu_read_lock(&vcpu->kvm->srcu);
4903         kvm_release_page_dirty(apic->vapic_page);
4904         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4905         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4906 }
4907
4908 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4909 {
4910         int max_irr, tpr;
4911
4912         if (!kvm_x86_ops->update_cr8_intercept)
4913                 return;
4914
4915         if (!vcpu->arch.apic)
4916                 return;
4917
4918         if (!vcpu->arch.apic->vapic_addr)
4919                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4920         else
4921                 max_irr = -1;
4922
4923         if (max_irr != -1)
4924                 max_irr >>= 4;
4925
4926         tpr = kvm_lapic_get_cr8(vcpu);
4927
4928         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4929 }
4930
4931 static void inject_pending_event(struct kvm_vcpu *vcpu)
4932 {
4933         /* try to reinject previous events if any */
4934         if (vcpu->arch.exception.pending) {
4935                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4936                                         vcpu->arch.exception.has_error_code,
4937                                         vcpu->arch.exception.error_code);
4938                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4939                                           vcpu->arch.exception.has_error_code,
4940                                           vcpu->arch.exception.error_code,
4941                                           vcpu->arch.exception.reinject);
4942                 return;
4943         }
4944
4945         if (vcpu->arch.nmi_injected) {
4946                 kvm_x86_ops->set_nmi(vcpu);
4947                 return;
4948         }
4949
4950         if (vcpu->arch.interrupt.pending) {
4951                 kvm_x86_ops->set_irq(vcpu);
4952                 return;
4953         }
4954
4955         /* try to inject new event if pending */
4956         if (vcpu->arch.nmi_pending) {
4957                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4958                         vcpu->arch.nmi_pending = false;
4959                         vcpu->arch.nmi_injected = true;
4960                         kvm_x86_ops->set_nmi(vcpu);
4961                 }
4962         } else if (kvm_cpu_has_interrupt(vcpu)) {
4963                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4964                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4965                                             false);
4966                         kvm_x86_ops->set_irq(vcpu);
4967                 }
4968         }
4969 }
4970
4971 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4972 {
4973         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4974                         !vcpu->guest_xcr0_loaded) {
4975                 /* kvm_set_xcr() also depends on this */
4976                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4977                 vcpu->guest_xcr0_loaded = 1;
4978         }
4979 }
4980
4981 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4982 {
4983         if (vcpu->guest_xcr0_loaded) {
4984                 if (vcpu->arch.xcr0 != host_xcr0)
4985                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4986                 vcpu->guest_xcr0_loaded = 0;
4987         }
4988 }
4989
4990 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4991 {
4992         int r;
4993         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4994                 vcpu->run->request_interrupt_window;
4995
4996         if (vcpu->requests) {
4997                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4998                         kvm_mmu_unload(vcpu);
4999                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5000                         __kvm_migrate_timers(vcpu);
5001                 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
5002                         r = kvm_write_guest_time(vcpu);
5003                         if (unlikely(r))
5004                                 goto out;
5005                 }
5006                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5007                         kvm_mmu_sync_roots(vcpu);
5008                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5009                         kvm_x86_ops->tlb_flush(vcpu);
5010                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5011                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5012                         r = 0;
5013                         goto out;
5014                 }
5015                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5016                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5017                         r = 0;
5018                         goto out;
5019                 }
5020                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5021                         vcpu->fpu_active = 0;
5022                         kvm_x86_ops->fpu_deactivate(vcpu);
5023                 }
5024         }
5025
5026         r = kvm_mmu_reload(vcpu);
5027         if (unlikely(r))
5028                 goto out;
5029
5030         preempt_disable();
5031
5032         kvm_x86_ops->prepare_guest_switch(vcpu);
5033         if (vcpu->fpu_active)
5034                 kvm_load_guest_fpu(vcpu);
5035         kvm_load_guest_xcr0(vcpu);
5036
5037         atomic_set(&vcpu->guest_mode, 1);
5038         smp_wmb();
5039
5040         local_irq_disable();
5041
5042         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5043             || need_resched() || signal_pending(current)) {
5044                 atomic_set(&vcpu->guest_mode, 0);
5045                 smp_wmb();
5046                 local_irq_enable();
5047                 preempt_enable();
5048                 r = 1;
5049                 goto out;
5050         }
5051
5052         inject_pending_event(vcpu);
5053
5054         /* enable NMI/IRQ window open exits if needed */
5055         if (vcpu->arch.nmi_pending)
5056                 kvm_x86_ops->enable_nmi_window(vcpu);
5057         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5058                 kvm_x86_ops->enable_irq_window(vcpu);
5059
5060         if (kvm_lapic_enabled(vcpu)) {
5061                 update_cr8_intercept(vcpu);
5062                 kvm_lapic_sync_to_vapic(vcpu);
5063         }
5064
5065         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5066
5067         kvm_guest_enter();
5068
5069         if (unlikely(vcpu->arch.switch_db_regs)) {
5070                 set_debugreg(0, 7);
5071                 set_debugreg(vcpu->arch.eff_db[0], 0);
5072                 set_debugreg(vcpu->arch.eff_db[1], 1);
5073                 set_debugreg(vcpu->arch.eff_db[2], 2);
5074                 set_debugreg(vcpu->arch.eff_db[3], 3);
5075         }
5076
5077         trace_kvm_entry(vcpu->vcpu_id);
5078         kvm_x86_ops->run(vcpu);
5079
5080         /*
5081          * If the guest has used debug registers, at least dr7
5082          * will be disabled while returning to the host.
5083          * If we don't have active breakpoints in the host, we don't
5084          * care about the messed up debug address registers. But if
5085          * we have some of them active, restore the old state.
5086          */
5087         if (hw_breakpoint_active())
5088                 hw_breakpoint_restore();
5089
5090         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5091
5092         atomic_set(&vcpu->guest_mode, 0);
5093         smp_wmb();
5094         local_irq_enable();
5095
5096         ++vcpu->stat.exits;
5097
5098         /*
5099          * We must have an instruction between local_irq_enable() and
5100          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5101          * the interrupt shadow.  The stat.exits increment will do nicely.
5102          * But we need to prevent reordering, hence this barrier():
5103          */
5104         barrier();
5105
5106         kvm_guest_exit();
5107
5108         preempt_enable();
5109
5110         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5111
5112         /*
5113          * Profile KVM exit RIPs:
5114          */
5115         if (unlikely(prof_on == KVM_PROFILING)) {
5116                 unsigned long rip = kvm_rip_read(vcpu);
5117                 profile_hit(KVM_PROFILING, (void *)rip);
5118         }
5119
5120
5121         kvm_lapic_sync_from_vapic(vcpu);
5122
5123         r = kvm_x86_ops->handle_exit(vcpu);
5124 out:
5125         return r;
5126 }
5127
5128
5129 static int __vcpu_run(struct kvm_vcpu *vcpu)
5130 {
5131         int r;
5132         struct kvm *kvm = vcpu->kvm;
5133
5134         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5135                 pr_debug("vcpu %d received sipi with vector # %x\n",
5136                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5137                 kvm_lapic_reset(vcpu);
5138                 r = kvm_arch_vcpu_reset(vcpu);
5139                 if (r)
5140                         return r;
5141                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5142         }
5143
5144         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5145         vapic_enter(vcpu);
5146
5147         r = 1;
5148         while (r > 0) {
5149                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5150                         r = vcpu_enter_guest(vcpu);
5151                 else {
5152                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5153                         kvm_vcpu_block(vcpu);
5154                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5155                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5156                         {
5157                                 switch(vcpu->arch.mp_state) {
5158                                 case KVM_MP_STATE_HALTED:
5159                                         vcpu->arch.mp_state =
5160                                                 KVM_MP_STATE_RUNNABLE;
5161                                 case KVM_MP_STATE_RUNNABLE:
5162                                         break;
5163                                 case KVM_MP_STATE_SIPI_RECEIVED:
5164                                 default:
5165                                         r = -EINTR;
5166                                         break;
5167                                 }
5168                         }
5169                 }
5170
5171                 if (r <= 0)
5172                         break;
5173
5174                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5175                 if (kvm_cpu_has_pending_timer(vcpu))
5176                         kvm_inject_pending_timer_irqs(vcpu);
5177
5178                 if (dm_request_for_irq_injection(vcpu)) {
5179                         r = -EINTR;
5180                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5181                         ++vcpu->stat.request_irq_exits;
5182                 }
5183                 if (signal_pending(current)) {
5184                         r = -EINTR;
5185                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5186                         ++vcpu->stat.signal_exits;
5187                 }
5188                 if (need_resched()) {
5189                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5190                         kvm_resched(vcpu);
5191                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5192                 }
5193         }
5194
5195         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5196
5197         vapic_exit(vcpu);
5198
5199         return r;
5200 }
5201
5202 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5203 {
5204         int r;
5205         sigset_t sigsaved;
5206
5207         if (vcpu->sigset_active)
5208                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5209
5210         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5211                 kvm_vcpu_block(vcpu);
5212                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5213                 r = -EAGAIN;
5214                 goto out;
5215         }
5216
5217         /* re-sync apic's tpr */
5218         if (!irqchip_in_kernel(vcpu->kvm))
5219                 kvm_set_cr8(vcpu, kvm_run->cr8);
5220
5221         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5222                 if (vcpu->mmio_needed) {
5223                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5224                         vcpu->mmio_read_completed = 1;
5225                         vcpu->mmio_needed = 0;
5226                 }
5227                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5228                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5229                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5230                 if (r != EMULATE_DONE) {
5231                         r = 0;
5232                         goto out;
5233                 }
5234         }
5235         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5236                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5237                                      kvm_run->hypercall.ret);
5238
5239         r = __vcpu_run(vcpu);
5240
5241 out:
5242         post_kvm_run_save(vcpu);
5243         if (vcpu->sigset_active)
5244                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5245
5246         return r;
5247 }
5248
5249 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5250 {
5251         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5252         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5253         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5254         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5255         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5256         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5257         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5258         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5259 #ifdef CONFIG_X86_64
5260         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5261         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5262         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5263         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5264         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5265         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5266         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5267         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5268 #endif
5269
5270         regs->rip = kvm_rip_read(vcpu);
5271         regs->rflags = kvm_get_rflags(vcpu);
5272
5273         return 0;
5274 }
5275
5276 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5277 {
5278         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5279         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5280         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5281         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5282         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5283         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5284         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5285         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5286 #ifdef CONFIG_X86_64
5287         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5288         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5289         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5290         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5291         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5292         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5293         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5294         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5295 #endif
5296
5297         kvm_rip_write(vcpu, regs->rip);
5298         kvm_set_rflags(vcpu, regs->rflags);
5299
5300         vcpu->arch.exception.pending = false;
5301
5302         return 0;
5303 }
5304
5305 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5306 {
5307         struct kvm_segment cs;
5308
5309         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5310         *db = cs.db;
5311         *l = cs.l;
5312 }
5313 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5314
5315 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5316                                   struct kvm_sregs *sregs)
5317 {
5318         struct desc_ptr dt;
5319
5320         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5321         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5322         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5323         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5324         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5325         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5326
5327         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5328         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5329
5330         kvm_x86_ops->get_idt(vcpu, &dt);
5331         sregs->idt.limit = dt.size;
5332         sregs->idt.base = dt.address;
5333         kvm_x86_ops->get_gdt(vcpu, &dt);
5334         sregs->gdt.limit = dt.size;
5335         sregs->gdt.base = dt.address;
5336
5337         sregs->cr0 = kvm_read_cr0(vcpu);
5338         sregs->cr2 = vcpu->arch.cr2;
5339         sregs->cr3 = vcpu->arch.cr3;
5340         sregs->cr4 = kvm_read_cr4(vcpu);
5341         sregs->cr8 = kvm_get_cr8(vcpu);
5342         sregs->efer = vcpu->arch.efer;
5343         sregs->apic_base = kvm_get_apic_base(vcpu);
5344
5345         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5346
5347         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5348                 set_bit(vcpu->arch.interrupt.nr,
5349                         (unsigned long *)sregs->interrupt_bitmap);
5350
5351         return 0;
5352 }
5353
5354 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5355                                     struct kvm_mp_state *mp_state)
5356 {
5357         mp_state->mp_state = vcpu->arch.mp_state;
5358         return 0;
5359 }
5360
5361 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5362                                     struct kvm_mp_state *mp_state)
5363 {
5364         vcpu->arch.mp_state = mp_state->mp_state;
5365         return 0;
5366 }
5367
5368 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5369                     bool has_error_code, u32 error_code)
5370 {
5371         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5372         int ret;
5373
5374         init_emulate_ctxt(vcpu);
5375
5376         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5377                                    tss_selector, reason, has_error_code,
5378                                    error_code);
5379
5380         if (ret)
5381                 return EMULATE_FAIL;
5382
5383         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5384         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5385         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5386         return EMULATE_DONE;
5387 }
5388 EXPORT_SYMBOL_GPL(kvm_task_switch);
5389
5390 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5391                                   struct kvm_sregs *sregs)
5392 {
5393         int mmu_reset_needed = 0;
5394         int pending_vec, max_bits;
5395         struct desc_ptr dt;
5396
5397         dt.size = sregs->idt.limit;
5398         dt.address = sregs->idt.base;
5399         kvm_x86_ops->set_idt(vcpu, &dt);
5400         dt.size = sregs->gdt.limit;
5401         dt.address = sregs->gdt.base;
5402         kvm_x86_ops->set_gdt(vcpu, &dt);
5403
5404         vcpu->arch.cr2 = sregs->cr2;
5405         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5406         vcpu->arch.cr3 = sregs->cr3;
5407
5408         kvm_set_cr8(vcpu, sregs->cr8);
5409
5410         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5411         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5412         kvm_set_apic_base(vcpu, sregs->apic_base);
5413
5414         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5415         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5416         vcpu->arch.cr0 = sregs->cr0;
5417
5418         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5419         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5420         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5421                 load_pdptrs(vcpu, vcpu->arch.cr3);
5422                 mmu_reset_needed = 1;
5423         }
5424
5425         if (mmu_reset_needed)
5426                 kvm_mmu_reset_context(vcpu);
5427
5428         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5429         pending_vec = find_first_bit(
5430                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5431         if (pending_vec < max_bits) {
5432                 kvm_queue_interrupt(vcpu, pending_vec, false);
5433                 pr_debug("Set back pending irq %d\n", pending_vec);
5434                 if (irqchip_in_kernel(vcpu->kvm))
5435                         kvm_pic_clear_isr_ack(vcpu->kvm);
5436         }
5437
5438         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5439         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5440         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5441         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5442         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5443         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5444
5445         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5446         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5447
5448         update_cr8_intercept(vcpu);
5449
5450         /* Older userspace won't unhalt the vcpu on reset. */
5451         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5452             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5453             !is_protmode(vcpu))
5454                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5455
5456         return 0;
5457 }
5458
5459 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5460                                         struct kvm_guest_debug *dbg)
5461 {
5462         unsigned long rflags;
5463         int i, r;
5464
5465         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5466                 r = -EBUSY;
5467                 if (vcpu->arch.exception.pending)
5468                         goto out;
5469                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5470                         kvm_queue_exception(vcpu, DB_VECTOR);
5471                 else
5472                         kvm_queue_exception(vcpu, BP_VECTOR);
5473         }
5474
5475         /*
5476          * Read rflags as long as potentially injected trace flags are still
5477          * filtered out.
5478          */
5479         rflags = kvm_get_rflags(vcpu);
5480
5481         vcpu->guest_debug = dbg->control;
5482         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5483                 vcpu->guest_debug = 0;
5484
5485         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5486                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5487                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5488                 vcpu->arch.switch_db_regs =
5489                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5490         } else {
5491                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5492                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5493                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5494         }
5495
5496         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5497                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5498                         get_segment_base(vcpu, VCPU_SREG_CS);
5499
5500         /*
5501          * Trigger an rflags update that will inject or remove the trace
5502          * flags.
5503          */
5504         kvm_set_rflags(vcpu, rflags);
5505
5506         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5507
5508         r = 0;
5509
5510 out:
5511
5512         return r;
5513 }
5514
5515 /*
5516  * Translate a guest virtual address to a guest physical address.
5517  */
5518 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5519                                     struct kvm_translation *tr)
5520 {
5521         unsigned long vaddr = tr->linear_address;
5522         gpa_t gpa;
5523         int idx;
5524
5525         idx = srcu_read_lock(&vcpu->kvm->srcu);
5526         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5527         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5528         tr->physical_address = gpa;
5529         tr->valid = gpa != UNMAPPED_GVA;
5530         tr->writeable = 1;
5531         tr->usermode = 0;
5532
5533         return 0;
5534 }
5535
5536 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5537 {
5538         struct i387_fxsave_struct *fxsave =
5539                         &vcpu->arch.guest_fpu.state->fxsave;
5540
5541         memcpy(fpu->fpr, fxsave->st_space, 128);
5542         fpu->fcw = fxsave->cwd;
5543         fpu->fsw = fxsave->swd;
5544         fpu->ftwx = fxsave->twd;
5545         fpu->last_opcode = fxsave->fop;
5546         fpu->last_ip = fxsave->rip;
5547         fpu->last_dp = fxsave->rdp;
5548         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5549
5550         return 0;
5551 }
5552
5553 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5554 {
5555         struct i387_fxsave_struct *fxsave =
5556                         &vcpu->arch.guest_fpu.state->fxsave;
5557
5558         memcpy(fxsave->st_space, fpu->fpr, 128);
5559         fxsave->cwd = fpu->fcw;
5560         fxsave->swd = fpu->fsw;
5561         fxsave->twd = fpu->ftwx;
5562         fxsave->fop = fpu->last_opcode;
5563         fxsave->rip = fpu->last_ip;
5564         fxsave->rdp = fpu->last_dp;
5565         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5566
5567         return 0;
5568 }
5569
5570 int fx_init(struct kvm_vcpu *vcpu)
5571 {
5572         int err;
5573
5574         err = fpu_alloc(&vcpu->arch.guest_fpu);
5575         if (err)
5576                 return err;
5577
5578         fpu_finit(&vcpu->arch.guest_fpu);
5579
5580         /*
5581          * Ensure guest xcr0 is valid for loading
5582          */
5583         vcpu->arch.xcr0 = XSTATE_FP;
5584
5585         vcpu->arch.cr0 |= X86_CR0_ET;
5586
5587         return 0;
5588 }
5589 EXPORT_SYMBOL_GPL(fx_init);
5590
5591 static void fx_free(struct kvm_vcpu *vcpu)
5592 {
5593         fpu_free(&vcpu->arch.guest_fpu);
5594 }
5595
5596 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5597 {
5598         if (vcpu->guest_fpu_loaded)
5599                 return;
5600
5601         /*
5602          * Restore all possible states in the guest,
5603          * and assume host would use all available bits.
5604          * Guest xcr0 would be loaded later.
5605          */
5606         kvm_put_guest_xcr0(vcpu);
5607         vcpu->guest_fpu_loaded = 1;
5608         unlazy_fpu(current);
5609         fpu_restore_checking(&vcpu->arch.guest_fpu);
5610         trace_kvm_fpu(1);
5611 }
5612
5613 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5614 {
5615         kvm_put_guest_xcr0(vcpu);
5616
5617         if (!vcpu->guest_fpu_loaded)
5618                 return;
5619
5620         vcpu->guest_fpu_loaded = 0;
5621         fpu_save_init(&vcpu->arch.guest_fpu);
5622         ++vcpu->stat.fpu_reload;
5623         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5624         trace_kvm_fpu(0);
5625 }
5626
5627 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5628 {
5629         if (vcpu->arch.time_page) {
5630                 kvm_release_page_dirty(vcpu->arch.time_page);
5631                 vcpu->arch.time_page = NULL;
5632         }
5633
5634         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5635         fx_free(vcpu);
5636         kvm_x86_ops->vcpu_free(vcpu);
5637 }
5638
5639 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5640                                                 unsigned int id)
5641 {
5642         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5643                 printk_once(KERN_WARNING
5644                 "kvm: SMP vm created on host with unstable TSC; "
5645                 "guest TSC will not be reliable\n");
5646         return kvm_x86_ops->vcpu_create(kvm, id);
5647 }
5648
5649 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5650 {
5651         int r;
5652
5653         vcpu->arch.mtrr_state.have_fixed = 1;
5654         vcpu_load(vcpu);
5655         r = kvm_arch_vcpu_reset(vcpu);
5656         if (r == 0)
5657                 r = kvm_mmu_setup(vcpu);
5658         vcpu_put(vcpu);
5659         if (r < 0)
5660                 goto free_vcpu;
5661
5662         return 0;
5663 free_vcpu:
5664         kvm_x86_ops->vcpu_free(vcpu);
5665         return r;
5666 }
5667
5668 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5669 {
5670         vcpu_load(vcpu);
5671         kvm_mmu_unload(vcpu);
5672         vcpu_put(vcpu);
5673
5674         fx_free(vcpu);
5675         kvm_x86_ops->vcpu_free(vcpu);
5676 }
5677
5678 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5679 {
5680         vcpu->arch.nmi_pending = false;
5681         vcpu->arch.nmi_injected = false;
5682
5683         vcpu->arch.switch_db_regs = 0;
5684         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5685         vcpu->arch.dr6 = DR6_FIXED_1;
5686         vcpu->arch.dr7 = DR7_FIXED_1;
5687
5688         return kvm_x86_ops->vcpu_reset(vcpu);
5689 }
5690
5691 int kvm_arch_hardware_enable(void *garbage)
5692 {
5693         struct kvm *kvm;
5694         struct kvm_vcpu *vcpu;
5695         int i;
5696
5697         kvm_shared_msr_cpu_online();
5698         list_for_each_entry(kvm, &vm_list, vm_list)
5699                 kvm_for_each_vcpu(i, vcpu, kvm)
5700                         if (vcpu->cpu == smp_processor_id())
5701                                 kvm_request_guest_time_update(vcpu);
5702         return kvm_x86_ops->hardware_enable(garbage);
5703 }
5704
5705 void kvm_arch_hardware_disable(void *garbage)
5706 {
5707         kvm_x86_ops->hardware_disable(garbage);
5708         drop_user_return_notifiers(garbage);
5709 }
5710
5711 int kvm_arch_hardware_setup(void)
5712 {
5713         return kvm_x86_ops->hardware_setup();
5714 }
5715
5716 void kvm_arch_hardware_unsetup(void)
5717 {
5718         kvm_x86_ops->hardware_unsetup();
5719 }
5720
5721 void kvm_arch_check_processor_compat(void *rtn)
5722 {
5723         kvm_x86_ops->check_processor_compatibility(rtn);
5724 }
5725
5726 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5727 {
5728         struct page *page;
5729         struct kvm *kvm;
5730         int r;
5731
5732         BUG_ON(vcpu->kvm == NULL);
5733         kvm = vcpu->kvm;
5734
5735         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5736         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5737         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5738         vcpu->arch.mmu.translate_gpa = translate_gpa;
5739         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5740         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5741                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5742         else
5743                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5744
5745         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5746         if (!page) {
5747                 r = -ENOMEM;
5748                 goto fail;
5749         }
5750         vcpu->arch.pio_data = page_address(page);
5751
5752         r = kvm_mmu_create(vcpu);
5753         if (r < 0)
5754                 goto fail_free_pio_data;
5755
5756         if (irqchip_in_kernel(kvm)) {
5757                 r = kvm_create_lapic(vcpu);
5758                 if (r < 0)
5759                         goto fail_mmu_destroy;
5760         }
5761
5762         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5763                                        GFP_KERNEL);
5764         if (!vcpu->arch.mce_banks) {
5765                 r = -ENOMEM;
5766                 goto fail_free_lapic;
5767         }
5768         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5769
5770         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5771                 goto fail_free_mce_banks;
5772
5773         return 0;
5774 fail_free_mce_banks:
5775         kfree(vcpu->arch.mce_banks);
5776 fail_free_lapic:
5777         kvm_free_lapic(vcpu);
5778 fail_mmu_destroy:
5779         kvm_mmu_destroy(vcpu);
5780 fail_free_pio_data:
5781         free_page((unsigned long)vcpu->arch.pio_data);
5782 fail:
5783         return r;
5784 }
5785
5786 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5787 {
5788         int idx;
5789
5790         kfree(vcpu->arch.mce_banks);
5791         kvm_free_lapic(vcpu);
5792         idx = srcu_read_lock(&vcpu->kvm->srcu);
5793         kvm_mmu_destroy(vcpu);
5794         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5795         free_page((unsigned long)vcpu->arch.pio_data);
5796 }
5797
5798 struct  kvm *kvm_arch_create_vm(void)
5799 {
5800         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5801
5802         if (!kvm)
5803                 return ERR_PTR(-ENOMEM);
5804
5805         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5806         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5807
5808         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5809         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5810
5811         spin_lock_init(&kvm->arch.tsc_write_lock);
5812
5813         return kvm;
5814 }
5815
5816 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5817 {
5818         vcpu_load(vcpu);
5819         kvm_mmu_unload(vcpu);
5820         vcpu_put(vcpu);
5821 }
5822
5823 static void kvm_free_vcpus(struct kvm *kvm)
5824 {
5825         unsigned int i;
5826         struct kvm_vcpu *vcpu;
5827
5828         /*
5829          * Unpin any mmu pages first.
5830          */
5831         kvm_for_each_vcpu(i, vcpu, kvm)
5832                 kvm_unload_vcpu_mmu(vcpu);
5833         kvm_for_each_vcpu(i, vcpu, kvm)
5834                 kvm_arch_vcpu_free(vcpu);
5835
5836         mutex_lock(&kvm->lock);
5837         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5838                 kvm->vcpus[i] = NULL;
5839
5840         atomic_set(&kvm->online_vcpus, 0);
5841         mutex_unlock(&kvm->lock);
5842 }
5843
5844 void kvm_arch_sync_events(struct kvm *kvm)
5845 {
5846         kvm_free_all_assigned_devices(kvm);
5847         kvm_free_pit(kvm);
5848 }
5849
5850 void kvm_arch_destroy_vm(struct kvm *kvm)
5851 {
5852         kvm_iommu_unmap_guest(kvm);
5853         kfree(kvm->arch.vpic);
5854         kfree(kvm->arch.vioapic);
5855         kvm_free_vcpus(kvm);
5856         kvm_free_physmem(kvm);
5857         if (kvm->arch.apic_access_page)
5858                 put_page(kvm->arch.apic_access_page);
5859         if (kvm->arch.ept_identity_pagetable)
5860                 put_page(kvm->arch.ept_identity_pagetable);
5861         cleanup_srcu_struct(&kvm->srcu);
5862         kfree(kvm);
5863 }
5864
5865 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5866                                 struct kvm_memory_slot *memslot,
5867                                 struct kvm_memory_slot old,
5868                                 struct kvm_userspace_memory_region *mem,
5869                                 int user_alloc)
5870 {
5871         int npages = memslot->npages;
5872         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5873
5874         /* Prevent internal slot pages from being moved by fork()/COW. */
5875         if (memslot->id >= KVM_MEMORY_SLOTS)
5876                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5877
5878         /*To keep backward compatibility with older userspace,
5879          *x86 needs to hanlde !user_alloc case.
5880          */
5881         if (!user_alloc) {
5882                 if (npages && !old.rmap) {
5883                         unsigned long userspace_addr;
5884
5885                         down_write(&current->mm->mmap_sem);
5886                         userspace_addr = do_mmap(NULL, 0,
5887                                                  npages * PAGE_SIZE,
5888                                                  PROT_READ | PROT_WRITE,
5889                                                  map_flags,
5890                                                  0);
5891                         up_write(&current->mm->mmap_sem);
5892
5893                         if (IS_ERR((void *)userspace_addr))
5894                                 return PTR_ERR((void *)userspace_addr);
5895
5896                         memslot->userspace_addr = userspace_addr;
5897                 }
5898         }
5899
5900
5901         return 0;
5902 }
5903
5904 void kvm_arch_commit_memory_region(struct kvm *kvm,
5905                                 struct kvm_userspace_memory_region *mem,
5906                                 struct kvm_memory_slot old,
5907                                 int user_alloc)
5908 {
5909
5910         int npages = mem->memory_size >> PAGE_SHIFT;
5911
5912         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5913                 int ret;
5914
5915                 down_write(&current->mm->mmap_sem);
5916                 ret = do_munmap(current->mm, old.userspace_addr,
5917                                 old.npages * PAGE_SIZE);
5918                 up_write(&current->mm->mmap_sem);
5919                 if (ret < 0)
5920                         printk(KERN_WARNING
5921                                "kvm_vm_ioctl_set_memory_region: "
5922                                "failed to munmap memory\n");
5923         }
5924
5925         spin_lock(&kvm->mmu_lock);
5926         if (!kvm->arch.n_requested_mmu_pages) {
5927                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5928                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5929         }
5930
5931         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5932         spin_unlock(&kvm->mmu_lock);
5933 }
5934
5935 void kvm_arch_flush_shadow(struct kvm *kvm)
5936 {
5937         kvm_mmu_zap_all(kvm);
5938         kvm_reload_remote_mmus(kvm);
5939 }
5940
5941 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5942 {
5943         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5944                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5945                 || vcpu->arch.nmi_pending ||
5946                 (kvm_arch_interrupt_allowed(vcpu) &&
5947                  kvm_cpu_has_interrupt(vcpu));
5948 }
5949
5950 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5951 {
5952         int me;
5953         int cpu = vcpu->cpu;
5954
5955         if (waitqueue_active(&vcpu->wq)) {
5956                 wake_up_interruptible(&vcpu->wq);
5957                 ++vcpu->stat.halt_wakeup;
5958         }
5959
5960         me = get_cpu();
5961         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5962                 if (atomic_xchg(&vcpu->guest_mode, 0))
5963                         smp_send_reschedule(cpu);
5964         put_cpu();
5965 }
5966
5967 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5968 {
5969         return kvm_x86_ops->interrupt_allowed(vcpu);
5970 }
5971
5972 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5973 {
5974         unsigned long current_rip = kvm_rip_read(vcpu) +
5975                 get_segment_base(vcpu, VCPU_SREG_CS);
5976
5977         return current_rip == linear_rip;
5978 }
5979 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5980
5981 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5982 {
5983         unsigned long rflags;
5984
5985         rflags = kvm_x86_ops->get_rflags(vcpu);
5986         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5987                 rflags &= ~X86_EFLAGS_TF;
5988         return rflags;
5989 }
5990 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5991
5992 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5993 {
5994         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5995             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5996                 rflags |= X86_EFLAGS_TF;
5997         kvm_x86_ops->set_rflags(vcpu, rflags);
5998 }
5999 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6000
6001 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6002 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6003 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);