arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 unsigned int min_timer_period_us = 500;
  96 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  97
  98 bool kvm_has_tsc_control;
  99 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 100 u32  kvm_max_guest_tsc_khz;
 101 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (!(xcr0 & XSTATE_FP))
 558                 return 1;
 559         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 560                 return 1;
 561         if (xcr0 & ~host_xcr0)
 562                 return 1;
 563         vcpu->arch.xcr0 = xcr0;
 564         vcpu->guest_xcr0_loaded = 0;
 565         return 0;
 566 }
 567
 568 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 569 {
 570         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 571             __kvm_set_xcr(vcpu, index, xcr)) {
 572                 kvm_inject_gp(vcpu, 0);
 573                 return 1;
 574         }
 575         return 0;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 578
 579 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 580 {
 581         struct kvm_cpuid_entry2 *best;
 582
 583         if (!static_cpu_has(X86_FEATURE_XSAVE))
 584                 return 0;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 588 }
 589
 590 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 591 {
 592         struct kvm_cpuid_entry2 *best;
 593
 594         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 595         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 596 }
 597
 598 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 599 {
 600         struct kvm_cpuid_entry2 *best;
 601
 602         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 603         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 604 }
 605
 606 static void update_cpuid(struct kvm_vcpu *vcpu)
 607 {
 608         struct kvm_cpuid_entry2 *best;
 609         struct kvm_lapic *apic = vcpu->arch.apic;
 610
 611         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 612         if (!best)
 613                 return;
 614
 615         /* Update OSXSAVE bit */
 616         if (cpu_has_xsave && best->function == 0x1) {
 617                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 618                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 619                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 620         }
 621
 622         if (apic) {
 623                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 624                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 625                 else
 626                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 627         }
 628 }
 629
 630 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 631 {
 632         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 633         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 634                                    X86_CR4_PAE | X86_CR4_SMEP;
 635         if (cr4 & CR4_RESERVED_BITS)
 636                 return 1;
 637
 638         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 639                 return 1;
 640
 641         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 642                 return 1;
 643
 644         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 645                 return 1;
 646
 647         if (is_long_mode(vcpu)) {
 648                 if (!(cr4 & X86_CR4_PAE))
 649                         return 1;
 650         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 651                    && ((cr4 ^ old_cr4) & pdptr_bits)
 652                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 653                                    kvm_read_cr3(vcpu)))
 654                 return 1;
 655
 656         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 657                 return 1;
 658
 659         if ((cr4 ^ old_cr4) & pdptr_bits)
 660                 kvm_mmu_reset_context(vcpu);
 661
 662         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 663                 update_cpuid(vcpu);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 668
 669 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 670 {
 671         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 672                 kvm_mmu_sync_roots(vcpu);
 673                 kvm_mmu_flush_tlb(vcpu);
 674                 return 0;
 675         }
 676
 677         if (is_long_mode(vcpu)) {
 678                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 679                         return 1;
 680         } else {
 681                 if (is_pae(vcpu)) {
 682                         if (cr3 & CR3_PAE_RESERVED_BITS)
 683                                 return 1;
 684                         if (is_paging(vcpu) &&
 685                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 686                                 return 1;
 687                 }
 688                 /*
 689                  * We don't check reserved bits in nonpae mode, because
 690                  * this isn't enforced, and VMware depends on this.
 691                  */
 692         }
 693
 694         /*
 695          * Does the new cr3 value map to physical memory? (Note, we
 696          * catch an invalid cr3 even in real-mode, because it would
 697          * cause trouble later on when we turn on paging anyway.)
 698          *
 699          * A real CPU would silently accept an invalid cr3 and would
 700          * attempt to use it - with largely undefined (and often hard
 701          * to debug) behavior on the guest side.
 702          */
 703         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 704                 return 1;
 705         vcpu->arch.cr3 = cr3;
 706         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 707         vcpu->arch.mmu.new_cr3(vcpu);
 708         return 0;
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 711
 712 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 713 {
 714         if (cr8 & CR8_RESERVED_BITS)
 715                 return 1;
 716         if (irqchip_in_kernel(vcpu->kvm))
 717                 kvm_lapic_set_tpr(vcpu, cr8);
 718         else
 719                 vcpu->arch.cr8 = cr8;
 720         return 0;
 721 }
 722 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 723
 724 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 725 {
 726         if (irqchip_in_kernel(vcpu->kvm))
 727                 return kvm_lapic_get_cr8(vcpu);
 728         else
 729                 return vcpu->arch.cr8;
 730 }
 731 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 732
 733 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 734 {
 735         switch (dr) {
 736         case 0 ... 3:
 737                 vcpu->arch.db[dr] = val;
 738                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 739                         vcpu->arch.eff_db[dr] = val;
 740                 break;
 741         case 4:
 742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 743                         return 1; /* #UD */
 744                 /* fall through */
 745         case 6:
 746                 if (val & 0xffffffff00000000ULL)
 747                         return -1; /* #GP */
 748                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 749                 break;
 750         case 5:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1; /* #UD */
 753                 /* fall through */
 754         default: /* 7 */
 755                 if (val & 0xffffffff00000000ULL)
 756                         return -1; /* #GP */
 757                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 758                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 759                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 760                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 761                 }
 762                 break;
 763         }
 764
 765         return 0;
 766 }
 767
 768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 769 {
 770         int res;
 771
 772         res = __kvm_set_dr(vcpu, dr, val);
 773         if (res > 0)
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775         else if (res < 0)
 776                 kvm_inject_gp(vcpu, 0);
 777
 778         return res;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_set_dr);
 781
 782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         switch (dr) {
 785         case 0 ... 3:
 786                 *val = vcpu->arch.db[dr];
 787                 break;
 788         case 4:
 789                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 790                         return 1;
 791                 /* fall through */
 792         case 6:
 793                 *val = vcpu->arch.dr6;
 794                 break;
 795         case 5:
 796                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 797                         return 1;
 798                 /* fall through */
 799         default: /* 7 */
 800                 *val = vcpu->arch.dr7;
 801                 break;
 802         }
 803
 804         return 0;
 805 }
 806
 807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 808 {
 809         if (_kvm_get_dr(vcpu, dr, val)) {
 810                 kvm_queue_exception(vcpu, UD_VECTOR);
 811                 return 1;
 812         }
 813         return 0;
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_get_dr);
 816
 817 /*
 818  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 819  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 820  *
 821  * This list is modified at module load time to reflect the
 822  * capabilities of the host cpu. This capabilities test skips MSRs that are
 823  * kvm-specific. Those are put in the beginning of the list.
 824  */
 825
 826 #define KVM_SAVE_MSRS_BEGIN     9
 827 static u32 msrs_to_save[] = {
 828         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 829         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 830         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 831         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 832         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 833         MSR_STAR,
 834 #ifdef CONFIG_X86_64
 835         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 836 #endif
 837         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 838         MSR_TSC_AUX,
 839 };
 840
 841 static unsigned num_msrs_to_save;
 842
 843 static u32 emulated_msrs[] = {
 844         MSR_IA32_TSCDEADLINE,
 845         MSR_IA32_MISC_ENABLE,
 846         MSR_IA32_MCG_STATUS,
 847         MSR_IA32_MCG_CTL,
 848 };
 849
 850 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 851 {
 852         u64 old_efer = vcpu->arch.efer;
 853
 854         if (efer & efer_reserved_bits)
 855                 return 1;
 856
 857         if (is_paging(vcpu)
 858             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 859                 return 1;
 860
 861         if (efer & EFER_FFXSR) {
 862                 struct kvm_cpuid_entry2 *feat;
 863
 864                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 865                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 866                         return 1;
 867         }
 868
 869         if (efer & EFER_SVME) {
 870                 struct kvm_cpuid_entry2 *feat;
 871
 872                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 873                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 874                         return 1;
 875         }
 876
 877         efer &= ~EFER_LMA;
 878         efer |= vcpu->arch.efer & EFER_LMA;
 879
 880         kvm_x86_ops->set_efer(vcpu, efer);
 881
 882         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 883
 884         /* Update reserved bits */
 885         if ((efer ^ old_efer) & EFER_NX)
 886                 kvm_mmu_reset_context(vcpu);
 887
 888         return 0;
 889 }
 890
 891 void kvm_enable_efer_bits(u64 mask)
 892 {
 893        efer_reserved_bits &= ~mask;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 896
 897 /*
 898  * Writes msr value into into the appropriate "register".
 899  * Returns 0 on success, non-0 otherwise.
 900  * Assumes vcpu_load() was already called.
 901  */
 902 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 903 {
 904         switch (msr_index) {
 905         case MSR_FS_BASE:
 906         case MSR_GS_BASE:
 907         case MSR_KERNEL_GS_BASE:
 908         case MSR_CSTAR:
 909         case MSR_LSTAR:
 910                 if (is_noncanonical_address(data))
 911                         return 1;
 912                 break;
 913         case MSR_IA32_SYSENTER_EIP:
 914         case MSR_IA32_SYSENTER_ESP:
 915                 /*
 916                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
 917                  * non-canonical address is written on Intel but not on
 918                  * AMD (which ignores the top 32-bits, because it does
 919                  * not implement 64-bit SYSENTER).
 920                  *
 921                  * 64-bit code should hence be able to write a non-canonical
 922                  * value on AMD.  Making the address canonical ensures that
 923                  * vmentry does not fail on Intel after writing a non-canonical
 924                  * value, and that something deterministic happens if the guest
 925                  * invokes 64-bit SYSENTER.
 926                  */
 927                 data = get_canonical(data);
 928         }
 929         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_set_msr);
 932
 933 /*
 934  * Adapt set_msr() to msr_io()'s calling convention
 935  */
 936 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 937 {
 938         return kvm_set_msr(vcpu, index, *data);
 939 }
 940
 941 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 942 {
 943         int version;
 944         int r;
 945         struct pvclock_wall_clock wc;
 946         struct timespec boot;
 947
 948         if (!wall_clock)
 949                 return;
 950
 951         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 952         if (r)
 953                 return;
 954
 955         if (version & 1)
 956                 ++version;  /* first time write, random junk */
 957
 958         ++version;
 959
 960         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 961
 962         /*
 963          * The guest calculates current wall clock time by adding
 964          * system time (updated by kvm_guest_time_update below) to the
 965          * wall clock specified here.  guest system time equals host
 966          * system time for us, thus we must fill in host boot time here.
 967          */
 968         getboottime(&boot);
 969
 970         wc.sec = boot.tv_sec;
 971         wc.nsec = boot.tv_nsec;
 972         wc.version = version;
 973
 974         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 975
 976         version++;
 977         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 978 }
 979
 980 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 981 {
 982         uint32_t quotient, remainder;
 983
 984         /* Don't try to replace with do_div(), this one calculates
 985          * "(dividend << 32) / divisor" */
 986         __asm__ ( "divl %4"
 987                   : "=a" (quotient), "=d" (remainder)
 988                   : "0" (0), "1" (dividend), "r" (divisor) );
 989         return quotient;
 990 }
 991
 992 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 993                                s8 *pshift, u32 *pmultiplier)
 994 {
 995         uint64_t scaled64;
 996         int32_t  shift = 0;
 997         uint64_t tps64;
 998         uint32_t tps32;
 999
1000         tps64 = base_khz * 1000LL;
1001         scaled64 = scaled_khz * 1000LL;
1002         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1003                 tps64 >>= 1;
1004                 shift--;
1005         }
1006
1007         tps32 = (uint32_t)tps64;
1008         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1009                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1010                         scaled64 >>= 1;
1011                 else
1012                         tps32 <<= 1;
1013                 shift++;
1014         }
1015
1016         *pshift = shift;
1017         *pmultiplier = div_frac(scaled64, tps32);
1018
1019         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1020                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1021 }
1022
1023 static inline u64 get_kernel_ns(void)
1024 {
1025         struct timespec ts;
1026
1027         WARN_ON(preemptible());
1028         ktime_get_ts(&ts);
1029         monotonic_to_bootbased(&ts);
1030         return timespec_to_ns(&ts);
1031 }
1032
1033 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1034 unsigned long max_tsc_khz;
1035
1036 static inline int kvm_tsc_changes_freq(void)
1037 {
1038         int cpu = get_cpu();
1039         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1040                   cpufreq_quick_get(cpu) != 0;
1041         put_cpu();
1042         return ret;
1043 }
1044
1045 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1046 {
1047         if (vcpu->arch.virtual_tsc_khz)
1048                 return vcpu->arch.virtual_tsc_khz;
1049         else
1050                 return __this_cpu_read(cpu_tsc_khz);
1051 }
1052
1053 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1054 {
1055         u64 ret;
1056
1057         WARN_ON(preemptible());
1058         if (kvm_tsc_changes_freq())
1059                 printk_once(KERN_WARNING
1060                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1061         ret = nsec * vcpu_tsc_khz(vcpu);
1062         do_div(ret, USEC_PER_SEC);
1063         return ret;
1064 }
1065
1066 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1067 {
1068         /* Compute a scale to convert nanoseconds in TSC cycles */
1069         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1070                            &vcpu->arch.tsc_catchup_shift,
1071                            &vcpu->arch.tsc_catchup_mult);
1072 }
1073
1074 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1075 {
1076         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1077                                       vcpu->arch.tsc_catchup_mult,
1078                                       vcpu->arch.tsc_catchup_shift);
1079         tsc += vcpu->arch.last_tsc_write;
1080         return tsc;
1081 }
1082
1083 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1084 {
1085         struct kvm *kvm = vcpu->kvm;
1086         u64 offset, ns, elapsed;
1087         unsigned long flags;
1088         s64 sdiff;
1089
1090         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1091         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1092         ns = get_kernel_ns();
1093         elapsed = ns - kvm->arch.last_tsc_nsec;
1094         sdiff = data - kvm->arch.last_tsc_write;
1095         if (sdiff < 0)
1096                 sdiff = -sdiff;
1097
1098         /*
1099          * Special case: close write to TSC within 5 seconds of
1100          * another CPU is interpreted as an attempt to synchronize
1101          * The 5 seconds is to accommodate host load / swapping as
1102          * well as any reset of TSC during the boot process.
1103          *
1104          * In that case, for a reliable TSC, we can match TSC offsets,
1105          * or make a best guest using elapsed value.
1106          */
1107         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1108             elapsed < 5ULL * NSEC_PER_SEC) {
1109                 if (!check_tsc_unstable()) {
1110                         offset = kvm->arch.last_tsc_offset;
1111                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1112                 } else {
1113                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1114                         offset += delta;
1115                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1116                 }
1117                 ns = kvm->arch.last_tsc_nsec;
1118         }
1119         kvm->arch.last_tsc_nsec = ns;
1120         kvm->arch.last_tsc_write = data;
1121         kvm->arch.last_tsc_offset = offset;
1122         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1123         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1124
1125         /* Reset of TSC must disable overshoot protection below */
1126         vcpu->arch.hv_clock.tsc_timestamp = 0;
1127         vcpu->arch.last_tsc_write = data;
1128         vcpu->arch.last_tsc_nsec = ns;
1129 }
1130 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1131
1132 static int kvm_guest_time_update(struct kvm_vcpu *v)
1133 {
1134         unsigned long flags;
1135         struct kvm_vcpu_arch *vcpu = &v->arch;
1136         unsigned long this_tsc_khz;
1137         s64 kernel_ns, max_kernel_ns;
1138         u64 tsc_timestamp;
1139
1140         /* Keep irq disabled to prevent changes to the clock */
1141         local_irq_save(flags);
1142         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1143         kernel_ns = get_kernel_ns();
1144         this_tsc_khz = vcpu_tsc_khz(v);
1145         if (unlikely(this_tsc_khz == 0)) {
1146                 local_irq_restore(flags);
1147                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1148                 return 1;
1149         }
1150
1151         /*
1152          * We may have to catch up the TSC to match elapsed wall clock
1153          * time for two reasons, even if kvmclock is used.
1154          *   1) CPU could have been running below the maximum TSC rate
1155          *   2) Broken TSC compensation resets the base at each VCPU
1156          *      entry to avoid unknown leaps of TSC even when running
1157          *      again on the same CPU.  This may cause apparent elapsed
1158          *      time to disappear, and the guest to stand still or run
1159          *      very slowly.
1160          */
1161         if (vcpu->tsc_catchup) {
1162                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1163                 if (tsc > tsc_timestamp) {
1164                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1165                         tsc_timestamp = tsc;
1166                 }
1167         }
1168
1169         local_irq_restore(flags);
1170
1171         if (!vcpu->pv_time_enabled)
1172                 return 0;
1173
1174         /*
1175          * Time as measured by the TSC may go backwards when resetting the base
1176          * tsc_timestamp.  The reason for this is that the TSC resolution is
1177          * higher than the resolution of the other clock scales.  Thus, many
1178          * possible measurments of the TSC correspond to one measurement of any
1179          * other clock, and so a spread of values is possible.  This is not a
1180          * problem for the computation of the nanosecond clock; with TSC rates
1181          * around 1GHZ, there can only be a few cycles which correspond to one
1182          * nanosecond value, and any path through this code will inevitably
1183          * take longer than that.  However, with the kernel_ns value itself,
1184          * the precision may be much lower, down to HZ granularity.  If the
1185          * first sampling of TSC against kernel_ns ends in the low part of the
1186          * range, and the second in the high end of the range, we can get:
1187          *
1188          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1189          *
1190          * As the sampling errors potentially range in the thousands of cycles,
1191          * it is possible such a time value has already been observed by the
1192          * guest.  To protect against this, we must compute the system time as
1193          * observed by the guest and ensure the new system time is greater.
1194          */
1195         max_kernel_ns = 0;
1196         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1197                 max_kernel_ns = vcpu->last_guest_tsc -
1198                                 vcpu->hv_clock.tsc_timestamp;
1199                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1200                                     vcpu->hv_clock.tsc_to_system_mul,
1201                                     vcpu->hv_clock.tsc_shift);
1202                 max_kernel_ns += vcpu->last_kernel_ns;
1203         }
1204
1205         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1206                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1207                                    &vcpu->hv_clock.tsc_shift,
1208                                    &vcpu->hv_clock.tsc_to_system_mul);
1209                 vcpu->hw_tsc_khz = this_tsc_khz;
1210         }
1211
1212         if (max_kernel_ns > kernel_ns)
1213                 kernel_ns = max_kernel_ns;
1214
1215         /* With all the info we got, fill in the values */
1216         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1217         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1218         vcpu->last_kernel_ns = kernel_ns;
1219         vcpu->last_guest_tsc = tsc_timestamp;
1220         vcpu->hv_clock.flags = 0;
1221
1222         /*
1223          * The interface expects us to write an even number signaling that the
1224          * update is finished. Since the guest won't see the intermediate
1225          * state, we just increase by 2 at the end.
1226          */
1227         vcpu->hv_clock.version += 2;
1228
1229         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1230                                 &vcpu->hv_clock,
1231                                 sizeof(vcpu->hv_clock));
1232         return 0;
1233 }
1234
1235 static bool msr_mtrr_valid(unsigned msr)
1236 {
1237         switch (msr) {
1238         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1239         case MSR_MTRRfix64K_00000:
1240         case MSR_MTRRfix16K_80000:
1241         case MSR_MTRRfix16K_A0000:
1242         case MSR_MTRRfix4K_C0000:
1243         case MSR_MTRRfix4K_C8000:
1244         case MSR_MTRRfix4K_D0000:
1245         case MSR_MTRRfix4K_D8000:
1246         case MSR_MTRRfix4K_E0000:
1247         case MSR_MTRRfix4K_E8000:
1248         case MSR_MTRRfix4K_F0000:
1249         case MSR_MTRRfix4K_F8000:
1250         case MSR_MTRRdefType:
1251         case MSR_IA32_CR_PAT:
1252                 return true;
1253         case 0x2f8:
1254                 return true;
1255         }
1256         return false;
1257 }
1258
1259 static bool valid_pat_type(unsigned t)
1260 {
1261         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1262 }
1263
1264 static bool valid_mtrr_type(unsigned t)
1265 {
1266         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1267 }
1268
1269 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1270 {
1271         int i;
1272
1273         if (!msr_mtrr_valid(msr))
1274                 return false;
1275
1276         if (msr == MSR_IA32_CR_PAT) {
1277                 for (i = 0; i < 8; i++)
1278                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1279                                 return false;
1280                 return true;
1281         } else if (msr == MSR_MTRRdefType) {
1282                 if (data & ~0xcff)
1283                         return false;
1284                 return valid_mtrr_type(data & 0xff);
1285         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1286                 for (i = 0; i < 8 ; i++)
1287                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1288                                 return false;
1289                 return true;
1290         }
1291
1292         /* variable MTRRs */
1293         return valid_mtrr_type(data & 0xff);
1294 }
1295
1296 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1297 {
1298         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1299
1300         if (!mtrr_valid(vcpu, msr, data))
1301                 return 1;
1302
1303         if (msr == MSR_MTRRdefType) {
1304                 vcpu->arch.mtrr_state.def_type = data;
1305                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1306         } else if (msr == MSR_MTRRfix64K_00000)
1307                 p[0] = data;
1308         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1309                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1310         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1311                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1312         else if (msr == MSR_IA32_CR_PAT)
1313                 vcpu->arch.pat = data;
1314         else {  /* Variable MTRRs */
1315                 int idx, is_mtrr_mask;
1316                 u64 *pt;
1317
1318                 idx = (msr - 0x200) / 2;
1319                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1320                 if (!is_mtrr_mask)
1321                         pt =
1322                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1323                 else
1324                         pt =
1325                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1326                 *pt = data;
1327         }
1328
1329         kvm_mmu_reset_context(vcpu);
1330         return 0;
1331 }
1332
1333 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1334 {
1335         u64 mcg_cap = vcpu->arch.mcg_cap;
1336         unsigned bank_num = mcg_cap & 0xff;
1337
1338         switch (msr) {
1339         case MSR_IA32_MCG_STATUS:
1340                 vcpu->arch.mcg_status = data;
1341                 break;
1342         case MSR_IA32_MCG_CTL:
1343                 if (!(mcg_cap & MCG_CTL_P))
1344                         return 1;
1345                 if (data != 0 && data != ~(u64)0)
1346                         return -1;
1347                 vcpu->arch.mcg_ctl = data;
1348                 break;
1349         default:
1350                 if (msr >= MSR_IA32_MC0_CTL &&
1351                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1352                         u32 offset = msr - MSR_IA32_MC0_CTL;
1353                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1354                          * some Linux kernels though clear bit 10 in bank 4 to
1355                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1356                          * this to avoid an uncatched #GP in the guest
1357                          */
1358                         if ((offset & 0x3) == 0 &&
1359                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1360                                 return -1;
1361                         vcpu->arch.mce_banks[offset] = data;
1362                         break;
1363                 }
1364                 return 1;
1365         }
1366         return 0;
1367 }
1368
1369 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1370 {
1371         struct kvm *kvm = vcpu->kvm;
1372         int lm = is_long_mode(vcpu);
1373         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1374                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1375         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1376                 : kvm->arch.xen_hvm_config.blob_size_32;
1377         u32 page_num = data & ~PAGE_MASK;
1378         u64 page_addr = data & PAGE_MASK;
1379         u8 *page;
1380         int r;
1381
1382         r = -E2BIG;
1383         if (page_num >= blob_size)
1384                 goto out;
1385         r = -ENOMEM;
1386         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1387         if (!page)
1388                 goto out;
1389         r = -EFAULT;
1390         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1391                 goto out_free;
1392         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1393                 goto out_free;
1394         r = 0;
1395 out_free:
1396         kfree(page);
1397 out:
1398         return r;
1399 }
1400
1401 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1402 {
1403         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1404 }
1405
1406 static bool kvm_hv_msr_partition_wide(u32 msr)
1407 {
1408         bool r = false;
1409         switch (msr) {
1410         case HV_X64_MSR_GUEST_OS_ID:
1411         case HV_X64_MSR_HYPERCALL:
1412                 r = true;
1413                 break;
1414         }
1415
1416         return r;
1417 }
1418
1419 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1420 {
1421         struct kvm *kvm = vcpu->kvm;
1422
1423         switch (msr) {
1424         case HV_X64_MSR_GUEST_OS_ID:
1425                 kvm->arch.hv_guest_os_id = data;
1426                 /* setting guest os id to zero disables hypercall page */
1427                 if (!kvm->arch.hv_guest_os_id)
1428                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1429                 break;
1430         case HV_X64_MSR_HYPERCALL: {
1431                 u64 gfn;
1432                 unsigned long addr;
1433                 u8 instructions[4];
1434
1435                 /* if guest os id is not set hypercall should remain disabled */
1436                 if (!kvm->arch.hv_guest_os_id)
1437                         break;
1438                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1439                         kvm->arch.hv_hypercall = data;
1440                         break;
1441                 }
1442                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1443                 addr = gfn_to_hva(kvm, gfn);
1444                 if (kvm_is_error_hva(addr))
1445                         return 1;
1446                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1447                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1448                 if (__copy_to_user((void __user *)addr, instructions, 4))
1449                         return 1;
1450                 kvm->arch.hv_hypercall = data;
1451                 break;
1452         }
1453         default:
1454                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1455                           "data 0x%llx\n", msr, data);
1456                 return 1;
1457         }
1458         return 0;
1459 }
1460
1461 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1462 {
1463         switch (msr) {
1464         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1465                 unsigned long addr;
1466
1467                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1468                         vcpu->arch.hv_vapic = data;
1469                         break;
1470                 }
1471                 addr = gfn_to_hva(vcpu->kvm, data >>
1472                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1473                 if (kvm_is_error_hva(addr))
1474                         return 1;
1475                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1476                         return 1;
1477                 vcpu->arch.hv_vapic = data;
1478                 break;
1479         }
1480         case HV_X64_MSR_EOI:
1481                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1482         case HV_X64_MSR_ICR:
1483                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1484         case HV_X64_MSR_TPR:
1485                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1486         default:
1487                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1488                           "data 0x%llx\n", msr, data);
1489                 return 1;
1490         }
1491
1492         return 0;
1493 }
1494
1495 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1496 {
1497         gpa_t gpa = data & ~0x3f;
1498
1499         /* Bits 2:5 are resrved, Should be zero */
1500         if (data & 0x3c)
1501                 return 1;
1502
1503         vcpu->arch.apf.msr_val = data;
1504
1505         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1506                 kvm_clear_async_pf_completion_queue(vcpu);
1507                 kvm_async_pf_hash_reset(vcpu);
1508                 return 0;
1509         }
1510
1511         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1512                                         sizeof(u32)))
1513                 return 1;
1514
1515         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1516         kvm_async_pf_wakeup_all(vcpu);
1517         return 0;
1518 }
1519
1520 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1521 {
1522         vcpu->arch.pv_time_enabled = false;
1523 }
1524
1525 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1526 {
1527         u64 delta;
1528
1529         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1530                 return;
1531
1532         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1533         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1534         vcpu->arch.st.accum_steal = delta;
1535 }
1536
1537 static void record_steal_time(struct kvm_vcpu *vcpu)
1538 {
1539         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1540                 return;
1541
1542         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1543                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1544                 return;
1545
1546         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1547         vcpu->arch.st.steal.version += 2;
1548         vcpu->arch.st.accum_steal = 0;
1549
1550         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1551                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1552 }
1553
1554 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1555 {
1556         switch (msr) {
1557         case MSR_EFER:
1558                 return set_efer(vcpu, data);
1559         case MSR_K7_HWCR:
1560                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1561                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1562                 if (data != 0) {
1563                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1564                                 data);
1565                         return 1;
1566                 }
1567                 break;
1568         case MSR_FAM10H_MMIO_CONF_BASE:
1569                 if (data != 0) {
1570                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1571                                 "0x%llx\n", data);
1572                         return 1;
1573                 }
1574                 break;
1575         case MSR_AMD64_NB_CFG:
1576                 break;
1577         case MSR_IA32_DEBUGCTLMSR:
1578                 if (!data) {
1579                         /* We support the non-activated case already */
1580                         break;
1581                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1582                         /* Values other than LBR and BTF are vendor-specific,
1583                            thus reserved and should throw a #GP */
1584                         return 1;
1585                 }
1586                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1587                         __func__, data);
1588                 break;
1589         case MSR_IA32_UCODE_REV:
1590         case MSR_IA32_UCODE_WRITE:
1591         case MSR_VM_HSAVE_PA:
1592         case MSR_AMD64_PATCH_LOADER:
1593                 break;
1594         case 0x200 ... 0x2ff:
1595                 return set_msr_mtrr(vcpu, msr, data);
1596         case MSR_IA32_APICBASE:
1597                 kvm_set_apic_base(vcpu, data);
1598                 break;
1599         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1600                 return kvm_x2apic_msr_write(vcpu, msr, data);
1601         case MSR_IA32_TSCDEADLINE:
1602                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1603                 break;
1604         case MSR_IA32_MISC_ENABLE:
1605                 vcpu->arch.ia32_misc_enable_msr = data;
1606                 break;
1607         case MSR_KVM_WALL_CLOCK_NEW:
1608         case MSR_KVM_WALL_CLOCK:
1609                 vcpu->kvm->arch.wall_clock = data;
1610                 kvm_write_wall_clock(vcpu->kvm, data);
1611                 break;
1612         case MSR_KVM_SYSTEM_TIME_NEW:
1613         case MSR_KVM_SYSTEM_TIME: {
1614                 u64 gpa_offset;
1615                 kvmclock_reset(vcpu);
1616
1617                 vcpu->arch.time = data;
1618                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1619
1620                 /* we verify if the enable bit is set... */
1621                 if (!(data & 1))
1622                         break;
1623
1624                 gpa_offset = data & ~(PAGE_MASK | 1);
1625
1626                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1627                      &vcpu->arch.pv_time, data & ~1ULL,
1628                      sizeof(struct pvclock_vcpu_time_info)))
1629                         vcpu->arch.pv_time_enabled = false;
1630                 else
1631                         vcpu->arch.pv_time_enabled = true;
1632                 break;
1633         }
1634         case MSR_KVM_ASYNC_PF_EN:
1635                 if (kvm_pv_enable_async_pf(vcpu, data))
1636                         return 1;
1637                 break;
1638         case MSR_KVM_STEAL_TIME:
1639
1640                 if (unlikely(!sched_info_on()))
1641                         return 1;
1642
1643                 if (data & KVM_STEAL_RESERVED_MASK)
1644                         return 1;
1645
1646                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1647                                                 data & KVM_STEAL_VALID_BITS,
1648                                                 sizeof(struct kvm_steal_time)))
1649                         return 1;
1650
1651                 vcpu->arch.st.msr_val = data;
1652
1653                 if (!(data & KVM_MSR_ENABLED))
1654                         break;
1655
1656                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1657
1658                 preempt_disable();
1659                 accumulate_steal_time(vcpu);
1660                 preempt_enable();
1661
1662                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1663
1664                 break;
1665
1666         case MSR_IA32_MCG_CTL:
1667         case MSR_IA32_MCG_STATUS:
1668         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1669                 return set_msr_mce(vcpu, msr, data);
1670
1671         /* Performance counters are not protected by a CPUID bit,
1672          * so we should check all of them in the generic path for the sake of
1673          * cross vendor migration.
1674          * Writing a zero into the event select MSRs disables them,
1675          * which we perfectly emulate ;-). Any other value should be at least
1676          * reported, some guests depend on them.
1677          */
1678         case MSR_P6_EVNTSEL0:
1679         case MSR_P6_EVNTSEL1:
1680         case MSR_K7_EVNTSEL0:
1681         case MSR_K7_EVNTSEL1:
1682         case MSR_K7_EVNTSEL2:
1683         case MSR_K7_EVNTSEL3:
1684                 if (data != 0)
1685                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1686                                 "0x%x data 0x%llx\n", msr, data);
1687                 break;
1688         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1689          * so we ignore writes to make it happy.
1690          */
1691         case MSR_P6_PERFCTR0:
1692         case MSR_P6_PERFCTR1:
1693         case MSR_K7_PERFCTR0:
1694         case MSR_K7_PERFCTR1:
1695         case MSR_K7_PERFCTR2:
1696         case MSR_K7_PERFCTR3:
1697                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1698                         "0x%x data 0x%llx\n", msr, data);
1699                 break;
1700         case MSR_K7_CLK_CTL:
1701                 /*
1702                  * Ignore all writes to this no longer documented MSR.
1703                  * Writes are only relevant for old K7 processors,
1704                  * all pre-dating SVM, but a recommended workaround from
1705                  * AMD for these chips. It is possible to speicify the
1706                  * affected processor models on the command line, hence
1707                  * the need to ignore the workaround.
1708                  */
1709                 break;
1710         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1711                 if (kvm_hv_msr_partition_wide(msr)) {
1712                         int r;
1713                         mutex_lock(&vcpu->kvm->lock);
1714                         r = set_msr_hyperv_pw(vcpu, msr, data);
1715                         mutex_unlock(&vcpu->kvm->lock);
1716                         return r;
1717                 } else
1718                         return set_msr_hyperv(vcpu, msr, data);
1719                 break;
1720         case MSR_IA32_BBL_CR_CTL3:
1721                 /* Drop writes to this legacy MSR -- see rdmsr
1722                  * counterpart for further detail.
1723                  */
1724                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1725                 break;
1726         default:
1727                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1728                         return xen_hvm_config(vcpu, data);
1729                 if (!ignore_msrs) {
1730                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1731                                 msr, data);
1732                         return 1;
1733                 } else {
1734                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1735                                 msr, data);
1736                         break;
1737                 }
1738         }
1739         return 0;
1740 }
1741 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1742
1743
1744 /*
1745  * Reads an msr value (of 'msr_index') into 'pdata'.
1746  * Returns 0 on success, non-0 otherwise.
1747  * Assumes vcpu_load() was already called.
1748  */
1749 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1750 {
1751         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1752 }
1753
1754 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1755 {
1756         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1757
1758         if (!msr_mtrr_valid(msr))
1759                 return 1;
1760
1761         if (msr == MSR_MTRRdefType)
1762                 *pdata = vcpu->arch.mtrr_state.def_type +
1763                          (vcpu->arch.mtrr_state.enabled << 10);
1764         else if (msr == MSR_MTRRfix64K_00000)
1765                 *pdata = p[0];
1766         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1767                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1768         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1769                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1770         else if (msr == MSR_IA32_CR_PAT)
1771                 *pdata = vcpu->arch.pat;
1772         else {  /* Variable MTRRs */
1773                 int idx, is_mtrr_mask;
1774                 u64 *pt;
1775
1776                 idx = (msr - 0x200) / 2;
1777                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1778                 if (!is_mtrr_mask)
1779                         pt =
1780                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1781                 else
1782                         pt =
1783                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1784                 *pdata = *pt;
1785         }
1786
1787         return 0;
1788 }
1789
1790 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1791 {
1792         u64 data;
1793         u64 mcg_cap = vcpu->arch.mcg_cap;
1794         unsigned bank_num = mcg_cap & 0xff;
1795
1796         switch (msr) {
1797         case MSR_IA32_P5_MC_ADDR:
1798         case MSR_IA32_P5_MC_TYPE:
1799                 data = 0;
1800                 break;
1801         case MSR_IA32_MCG_CAP:
1802                 data = vcpu->arch.mcg_cap;
1803                 break;
1804         case MSR_IA32_MCG_CTL:
1805                 if (!(mcg_cap & MCG_CTL_P))
1806                         return 1;
1807                 data = vcpu->arch.mcg_ctl;
1808                 break;
1809         case MSR_IA32_MCG_STATUS:
1810                 data = vcpu->arch.mcg_status;
1811                 break;
1812         default:
1813                 if (msr >= MSR_IA32_MC0_CTL &&
1814                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1815                         u32 offset = msr - MSR_IA32_MC0_CTL;
1816                         data = vcpu->arch.mce_banks[offset];
1817                         break;
1818                 }
1819                 return 1;
1820         }
1821         *pdata = data;
1822         return 0;
1823 }
1824
1825 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1826 {
1827         u64 data = 0;
1828         struct kvm *kvm = vcpu->kvm;
1829
1830         switch (msr) {
1831         case HV_X64_MSR_GUEST_OS_ID:
1832                 data = kvm->arch.hv_guest_os_id;
1833                 break;
1834         case HV_X64_MSR_HYPERCALL:
1835                 data = kvm->arch.hv_hypercall;
1836                 break;
1837         default:
1838                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1839                 return 1;
1840         }
1841
1842         *pdata = data;
1843         return 0;
1844 }
1845
1846 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1847 {
1848         u64 data = 0;
1849
1850         switch (msr) {
1851         case HV_X64_MSR_VP_INDEX: {
1852                 int r;
1853                 struct kvm_vcpu *v;
1854                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1855                         if (v == vcpu)
1856                                 data = r;
1857                 break;
1858         }
1859         case HV_X64_MSR_EOI:
1860                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1861         case HV_X64_MSR_ICR:
1862                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1863         case HV_X64_MSR_TPR:
1864                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1865         case HV_X64_MSR_APIC_ASSIST_PAGE:
1866                 data = vcpu->arch.hv_vapic;
1867                 break;
1868         default:
1869                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1870                 return 1;
1871         }
1872         *pdata = data;
1873         return 0;
1874 }
1875
1876 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1877 {
1878         u64 data;
1879
1880         switch (msr) {
1881         case MSR_IA32_PLATFORM_ID:
1882         case MSR_IA32_EBL_CR_POWERON:
1883         case MSR_IA32_DEBUGCTLMSR:
1884         case MSR_IA32_LASTBRANCHFROMIP:
1885         case MSR_IA32_LASTBRANCHTOIP:
1886         case MSR_IA32_LASTINTFROMIP:
1887         case MSR_IA32_LASTINTTOIP:
1888         case MSR_K8_SYSCFG:
1889         case MSR_K8_TSEG_ADDR:
1890         case MSR_K8_TSEG_MASK:
1891         case MSR_K7_HWCR:
1892         case MSR_VM_HSAVE_PA:
1893         case MSR_P6_PERFCTR0:
1894         case MSR_P6_PERFCTR1:
1895         case MSR_P6_EVNTSEL0:
1896         case MSR_P6_EVNTSEL1:
1897         case MSR_K7_EVNTSEL0:
1898         case MSR_K7_PERFCTR0:
1899         case MSR_K8_INT_PENDING_MSG:
1900         case MSR_AMD64_NB_CFG:
1901         case MSR_FAM10H_MMIO_CONF_BASE:
1902                 data = 0;
1903                 break;
1904         case MSR_IA32_UCODE_REV:
1905                 data = 0x100000000ULL;
1906                 break;
1907         case MSR_MTRRcap:
1908                 data = 0x500 | KVM_NR_VAR_MTRR;
1909                 break;
1910         case 0x200 ... 0x2ff:
1911                 return get_msr_mtrr(vcpu, msr, pdata);
1912         case 0xcd: /* fsb frequency */
1913                 data = 3;
1914                 break;
1915                 /*
1916                  * MSR_EBC_FREQUENCY_ID
1917                  * Conservative value valid for even the basic CPU models.
1918                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1919                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1920                  * and 266MHz for model 3, or 4. Set Core Clock
1921                  * Frequency to System Bus Frequency Ratio to 1 (bits
1922                  * 31:24) even though these are only valid for CPU
1923                  * models > 2, however guests may end up dividing or
1924                  * multiplying by zero otherwise.
1925                  */
1926         case MSR_EBC_FREQUENCY_ID:
1927                 data = 1 << 24;
1928                 break;
1929         case MSR_IA32_APICBASE:
1930                 data = kvm_get_apic_base(vcpu);
1931                 break;
1932         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1933                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1934                 break;
1935         case MSR_IA32_TSCDEADLINE:
1936                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1937                 break;
1938         case MSR_IA32_MISC_ENABLE:
1939                 data = vcpu->arch.ia32_misc_enable_msr;
1940                 break;
1941         case MSR_IA32_PERF_STATUS:
1942                 /* TSC increment by tick */
1943                 data = 1000ULL;
1944                 /* CPU multiplier */
1945                 data |= (((uint64_t)4ULL) << 40);
1946                 break;
1947         case MSR_EFER:
1948                 data = vcpu->arch.efer;
1949                 break;
1950         case MSR_KVM_WALL_CLOCK:
1951         case MSR_KVM_WALL_CLOCK_NEW:
1952                 data = vcpu->kvm->arch.wall_clock;
1953                 break;
1954         case MSR_KVM_SYSTEM_TIME:
1955         case MSR_KVM_SYSTEM_TIME_NEW:
1956                 data = vcpu->arch.time;
1957                 break;
1958         case MSR_KVM_ASYNC_PF_EN:
1959                 data = vcpu->arch.apf.msr_val;
1960                 break;
1961         case MSR_KVM_STEAL_TIME:
1962                 data = vcpu->arch.st.msr_val;
1963                 break;
1964         case MSR_IA32_P5_MC_ADDR:
1965         case MSR_IA32_P5_MC_TYPE:
1966         case MSR_IA32_MCG_CAP:
1967         case MSR_IA32_MCG_CTL:
1968         case MSR_IA32_MCG_STATUS:
1969         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1970                 return get_msr_mce(vcpu, msr, pdata);
1971         case MSR_K7_CLK_CTL:
1972                 /*
1973                  * Provide expected ramp-up count for K7. All other
1974                  * are set to zero, indicating minimum divisors for
1975                  * every field.
1976                  *
1977                  * This prevents guest kernels on AMD host with CPU
1978                  * type 6, model 8 and higher from exploding due to
1979                  * the rdmsr failing.
1980                  */
1981                 data = 0x20000000;
1982                 break;
1983         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1984                 if (kvm_hv_msr_partition_wide(msr)) {
1985                         int r;
1986                         mutex_lock(&vcpu->kvm->lock);
1987                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1988                         mutex_unlock(&vcpu->kvm->lock);
1989                         return r;
1990                 } else
1991                         return get_msr_hyperv(vcpu, msr, pdata);
1992                 break;
1993         case MSR_IA32_BBL_CR_CTL3:
1994                 /* This legacy MSR exists but isn't fully documented in current
1995                  * silicon.  It is however accessed by winxp in very narrow
1996                  * scenarios where it sets bit #19, itself documented as
1997                  * a "reserved" bit.  Best effort attempt to source coherent
1998                  * read data here should the balance of the register be
1999                  * interpreted by the guest:
2000                  *
2001                  * L2 cache control register 3: 64GB range, 256KB size,
2002                  * enabled, latency 0x1, configured
2003                  */
2004                 data = 0xbe702111;
2005                 break;
2006         default:
2007                 if (!ignore_msrs) {
2008                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2009                         return 1;
2010                 } else {
2011                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2012                         data = 0;
2013                 }
2014                 break;
2015         }
2016         *pdata = data;
2017         return 0;
2018 }
2019 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2020
2021 /*
2022  * Read or write a bunch of msrs. All parameters are kernel addresses.
2023  *
2024  * @return number of msrs set successfully.
2025  */
2026 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2027                     struct kvm_msr_entry *entries,
2028                     int (*do_msr)(struct kvm_vcpu *vcpu,
2029                                   unsigned index, u64 *data))
2030 {
2031         int i, idx;
2032
2033         idx = srcu_read_lock(&vcpu->kvm->srcu);
2034         for (i = 0; i < msrs->nmsrs; ++i)
2035                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2036                         break;
2037         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2038
2039         return i;
2040 }
2041
2042 /*
2043  * Read or write a bunch of msrs. Parameters are user addresses.
2044  *
2045  * @return number of msrs set successfully.
2046  */
2047 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2048                   int (*do_msr)(struct kvm_vcpu *vcpu,
2049                                 unsigned index, u64 *data),
2050                   int writeback)
2051 {
2052         struct kvm_msrs msrs;
2053         struct kvm_msr_entry *entries;
2054         int r, n;
2055         unsigned size;
2056
2057         r = -EFAULT;
2058         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2059                 goto out;
2060
2061         r = -E2BIG;
2062         if (msrs.nmsrs >= MAX_IO_MSRS)
2063                 goto out;
2064
2065         r = -ENOMEM;
2066         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2067         entries = kmalloc(size, GFP_KERNEL);
2068         if (!entries)
2069                 goto out;
2070
2071         r = -EFAULT;
2072         if (copy_from_user(entries, user_msrs->entries, size))
2073                 goto out_free;
2074
2075         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2076         if (r < 0)
2077                 goto out_free;
2078
2079         r = -EFAULT;
2080         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2081                 goto out_free;
2082
2083         r = n;
2084
2085 out_free:
2086         kfree(entries);
2087 out:
2088         return r;
2089 }
2090
2091 int kvm_dev_ioctl_check_extension(long ext)
2092 {
2093         int r;
2094
2095         switch (ext) {
2096         case KVM_CAP_IRQCHIP:
2097         case KVM_CAP_HLT:
2098         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2099         case KVM_CAP_SET_TSS_ADDR:
2100         case KVM_CAP_EXT_CPUID:
2101         case KVM_CAP_CLOCKSOURCE:
2102         case KVM_CAP_PIT:
2103         case KVM_CAP_NOP_IO_DELAY:
2104         case KVM_CAP_MP_STATE:
2105         case KVM_CAP_SYNC_MMU:
2106         case KVM_CAP_USER_NMI:
2107         case KVM_CAP_REINJECT_CONTROL:
2108         case KVM_CAP_IRQ_INJECT_STATUS:
2109         case KVM_CAP_ASSIGN_DEV_IRQ:
2110         case KVM_CAP_IRQFD:
2111         case KVM_CAP_IOEVENTFD:
2112         case KVM_CAP_PIT2:
2113         case KVM_CAP_PIT_STATE2:
2114         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2115         case KVM_CAP_XEN_HVM:
2116         case KVM_CAP_ADJUST_CLOCK:
2117         case KVM_CAP_VCPU_EVENTS:
2118         case KVM_CAP_HYPERV:
2119         case KVM_CAP_HYPERV_VAPIC:
2120         case KVM_CAP_HYPERV_SPIN:
2121         case KVM_CAP_PCI_SEGMENT:
2122         case KVM_CAP_DEBUGREGS:
2123         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2124         case KVM_CAP_XSAVE:
2125         case KVM_CAP_ASYNC_PF:
2126         case KVM_CAP_GET_TSC_KHZ:
2127                 r = 1;
2128                 break;
2129         case KVM_CAP_COALESCED_MMIO:
2130                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2131                 break;
2132         case KVM_CAP_VAPIC:
2133                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2134                 break;
2135         case KVM_CAP_NR_VCPUS:
2136                 r = KVM_SOFT_MAX_VCPUS;
2137                 break;
2138         case KVM_CAP_MAX_VCPUS:
2139                 r = KVM_MAX_VCPUS;
2140                 break;
2141         case KVM_CAP_NR_MEMSLOTS:
2142                 r = KVM_MEMORY_SLOTS;
2143                 break;
2144         case KVM_CAP_PV_MMU:    /* obsolete */
2145                 r = 0;
2146                 break;
2147         case KVM_CAP_IOMMU:
2148                 r = iommu_present(&pci_bus_type);
2149                 break;
2150         case KVM_CAP_MCE:
2151                 r = KVM_MAX_MCE_BANKS;
2152                 break;
2153         case KVM_CAP_XCRS:
2154                 r = cpu_has_xsave;
2155                 break;
2156         case KVM_CAP_TSC_CONTROL:
2157                 r = kvm_has_tsc_control;
2158                 break;
2159         case KVM_CAP_TSC_DEADLINE_TIMER:
2160                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2161                 break;
2162         default:
2163                 r = 0;
2164                 break;
2165         }
2166         return r;
2167
2168 }
2169
2170 long kvm_arch_dev_ioctl(struct file *filp,
2171                         unsigned int ioctl, unsigned long arg)
2172 {
2173         void __user *argp = (void __user *)arg;
2174         long r;
2175
2176         switch (ioctl) {
2177         case KVM_GET_MSR_INDEX_LIST: {
2178                 struct kvm_msr_list __user *user_msr_list = argp;
2179                 struct kvm_msr_list msr_list;
2180                 unsigned n;
2181
2182                 r = -EFAULT;
2183                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2184                         goto out;
2185                 n = msr_list.nmsrs;
2186                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2187                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2188                         goto out;
2189                 r = -E2BIG;
2190                 if (n < msr_list.nmsrs)
2191                         goto out;
2192                 r = -EFAULT;
2193                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2194                                  num_msrs_to_save * sizeof(u32)))
2195                         goto out;
2196                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2197                                  &emulated_msrs,
2198                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2199                         goto out;
2200                 r = 0;
2201                 break;
2202         }
2203         case KVM_GET_SUPPORTED_CPUID: {
2204                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2205                 struct kvm_cpuid2 cpuid;
2206
2207                 r = -EFAULT;
2208                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2209                         goto out;
2210                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2211                                                       cpuid_arg->entries);
2212                 if (r)
2213                         goto out;
2214
2215                 r = -EFAULT;
2216                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2217                         goto out;
2218                 r = 0;
2219                 break;
2220         }
2221         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2222                 u64 mce_cap;
2223
2224                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2225                 r = -EFAULT;
2226                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2227                         goto out;
2228                 r = 0;
2229                 break;
2230         }
2231         default:
2232                 r = -EINVAL;
2233         }
2234 out:
2235         return r;
2236 }
2237
2238 static void wbinvd_ipi(void *garbage)
2239 {
2240         wbinvd();
2241 }
2242
2243 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2244 {
2245         return vcpu->kvm->arch.iommu_domain &&
2246                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2247 }
2248
2249 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2250 {
2251         /* Address WBINVD may be executed by guest */
2252         if (need_emulate_wbinvd(vcpu)) {
2253                 if (kvm_x86_ops->has_wbinvd_exit())
2254                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2255                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2256                         smp_call_function_single(vcpu->cpu,
2257                                         wbinvd_ipi, NULL, 1);
2258         }
2259
2260         kvm_x86_ops->vcpu_load(vcpu, cpu);
2261         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2262                 /* Make sure TSC doesn't go backwards */
2263                 s64 tsc_delta;
2264                 u64 tsc;
2265
2266                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2267                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2268                              tsc - vcpu->arch.last_guest_tsc;
2269
2270                 if (tsc_delta < 0)
2271                         mark_tsc_unstable("KVM discovered backwards TSC");
2272                 if (check_tsc_unstable()) {
2273                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2274                         vcpu->arch.tsc_catchup = 1;
2275                 }
2276                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2277                 if (vcpu->cpu != cpu)
2278                         kvm_migrate_timers(vcpu);
2279                 vcpu->cpu = cpu;
2280         }
2281
2282         accumulate_steal_time(vcpu);
2283         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2284 }
2285
2286 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2287 {
2288         kvm_x86_ops->vcpu_put(vcpu);
2289         kvm_put_guest_fpu(vcpu);
2290         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2291 }
2292
2293 static int is_efer_nx(void)
2294 {
2295         unsigned long long efer = 0;
2296
2297         rdmsrl_safe(MSR_EFER, &efer);
2298         return efer & EFER_NX;
2299 }
2300
2301 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2302 {
2303         int i;
2304         struct kvm_cpuid_entry2 *e, *entry;
2305
2306         entry = NULL;
2307         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2308                 e = &vcpu->arch.cpuid_entries[i];
2309                 if (e->function == 0x80000001) {
2310                         entry = e;
2311                         break;
2312                 }
2313         }
2314         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2315                 entry->edx &= ~(1 << 20);
2316                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2317         }
2318 }
2319
2320 /* when an old userspace process fills a new kernel module */
2321 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2322                                     struct kvm_cpuid *cpuid,
2323                                     struct kvm_cpuid_entry __user *entries)
2324 {
2325         int r, i;
2326         struct kvm_cpuid_entry *cpuid_entries;
2327
2328         r = -E2BIG;
2329         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2330                 goto out;
2331         r = -ENOMEM;
2332         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2333         if (!cpuid_entries)
2334                 goto out;
2335         r = -EFAULT;
2336         if (copy_from_user(cpuid_entries, entries,
2337                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2338                 goto out_free;
2339         for (i = 0; i < cpuid->nent; i++) {
2340                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2341                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2342                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2343                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2344                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2345                 vcpu->arch.cpuid_entries[i].index = 0;
2346                 vcpu->arch.cpuid_entries[i].flags = 0;
2347                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2348                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2349                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2350         }
2351         vcpu->arch.cpuid_nent = cpuid->nent;
2352         cpuid_fix_nx_cap(vcpu);
2353         r = 0;
2354         kvm_apic_set_version(vcpu);
2355         kvm_x86_ops->cpuid_update(vcpu);
2356         update_cpuid(vcpu);
2357
2358 out_free:
2359         vfree(cpuid_entries);
2360 out:
2361         return r;
2362 }
2363
2364 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2365                                      struct kvm_cpuid2 *cpuid,
2366                                      struct kvm_cpuid_entry2 __user *entries)
2367 {
2368         int r;
2369
2370         r = -E2BIG;
2371         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2372                 goto out;
2373         r = -EFAULT;
2374         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2375                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2376                 goto out;
2377         vcpu->arch.cpuid_nent = cpuid->nent;
2378         kvm_apic_set_version(vcpu);
2379         kvm_x86_ops->cpuid_update(vcpu);
2380         update_cpuid(vcpu);
2381         return 0;
2382
2383 out:
2384         return r;
2385 }
2386
2387 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2388                                      struct kvm_cpuid2 *cpuid,
2389                                      struct kvm_cpuid_entry2 __user *entries)
2390 {
2391         int r;
2392
2393         r = -E2BIG;
2394         if (cpuid->nent < vcpu->arch.cpuid_nent)
2395                 goto out;
2396         r = -EFAULT;
2397         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2398                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2399                 goto out;
2400         return 0;
2401
2402 out:
2403         cpuid->nent = vcpu->arch.cpuid_nent;
2404         return r;
2405 }
2406
2407 static void cpuid_mask(u32 *word, int wordnum)
2408 {
2409         *word &= boot_cpu_data.x86_capability[wordnum];
2410 }
2411
2412 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2413                            u32 index)
2414 {
2415         entry->function = function;
2416         entry->index = index;
2417         cpuid_count(entry->function, entry->index,
2418                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2419         entry->flags = 0;
2420 }
2421
2422 static bool supported_xcr0_bit(unsigned bit)
2423 {
2424         u64 mask = ((u64)1 << bit);
2425
2426         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2427 }
2428
2429 #define F(x) bit(X86_FEATURE_##x)
2430
2431 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2432                          u32 index, int *nent, int maxnent)
2433 {
2434         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2435 #ifdef CONFIG_X86_64
2436         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2437                                 ? F(GBPAGES) : 0;
2438         unsigned f_lm = F(LM);
2439 #else
2440         unsigned f_gbpages = 0;
2441         unsigned f_lm = 0;
2442 #endif
2443         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2444
2445         /* cpuid 1.edx */
2446         const u32 kvm_supported_word0_x86_features =
2447                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2448                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2449                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2450                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2451                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2452                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2453                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2454                 0 /* HTT, TM, Reserved, PBE */;
2455         /* cpuid 0x80000001.edx */
2456         const u32 kvm_supported_word1_x86_features =
2457                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2458                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2459                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2460                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2461                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2462                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2463                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2464                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2465         /* cpuid 1.ecx */
2466         const u32 kvm_supported_word4_x86_features =
2467                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2468                 0 /* DS-CPL, VMX, SMX, EST */ |
2469                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2470                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2471                 0 /* Reserved, DCA */ | F(XMM4_1) |
2472                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2473                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2474                 F(F16C) | F(RDRAND);
2475         /* cpuid 0x80000001.ecx */
2476         const u32 kvm_supported_word6_x86_features =
2477                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2478                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2479                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2480                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2481
2482         /* cpuid 0xC0000001.edx */
2483         const u32 kvm_supported_word5_x86_features =
2484                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2485                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2486                 F(PMM) | F(PMM_EN);
2487
2488         /* cpuid 7.0.ebx */
2489         const u32 kvm_supported_word9_x86_features =
2490                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2491
2492         /* all calls to cpuid_count() should be made on the same cpu */
2493         get_cpu();
2494         do_cpuid_1_ent(entry, function, index);
2495         ++*nent;
2496
2497         switch (function) {
2498         case 0:
2499                 entry->eax = min(entry->eax, (u32)0xd);
2500                 break;
2501         case 1:
2502                 entry->edx &= kvm_supported_word0_x86_features;
2503                 cpuid_mask(&entry->edx, 0);
2504                 entry->ecx &= kvm_supported_word4_x86_features;
2505                 cpuid_mask(&entry->ecx, 4);
2506                 /* we support x2apic emulation even if host does not support
2507                  * it since we emulate x2apic in software */
2508                 entry->ecx |= F(X2APIC);
2509                 break;
2510         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2511          * may return different values. This forces us to get_cpu() before
2512          * issuing the first command, and also to emulate this annoying behavior
2513          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2514         case 2: {
2515                 int t, times = entry->eax & 0xff;
2516
2517                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2518                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2519                 for (t = 1; t < times && *nent < maxnent; ++t) {
2520                         do_cpuid_1_ent(&entry[t], function, 0);
2521                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2522                         ++*nent;
2523                 }
2524                 break;
2525         }
2526         /* function 4 has additional index. */
2527         case 4: {
2528                 int i, cache_type;
2529
2530                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2531                 /* read more entries until cache_type is zero */
2532                 for (i = 1; *nent < maxnent; ++i) {
2533                         cache_type = entry[i - 1].eax & 0x1f;
2534                         if (!cache_type)
2535                                 break;
2536                         do_cpuid_1_ent(&entry[i], function, i);
2537                         entry[i].flags |=
2538                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2539                         ++*nent;
2540                 }
2541                 break;
2542         }
2543         case 7: {
2544                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2545                 /* Mask ebx against host capbability word 9 */
2546                 if (index == 0) {
2547                         entry->ebx &= kvm_supported_word9_x86_features;
2548                         cpuid_mask(&entry->ebx, 9);
2549                 } else
2550                         entry->ebx = 0;
2551                 entry->eax = 0;
2552                 entry->ecx = 0;
2553                 entry->edx = 0;
2554                 break;
2555         }
2556         case 9:
2557                 break;
2558         /* function 0xb has additional index. */
2559         case 0xb: {
2560                 int i, level_type;
2561
2562                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2563                 /* read more entries until level_type is zero */
2564                 for (i = 1; *nent < maxnent; ++i) {
2565                         level_type = entry[i - 1].ecx & 0xff00;
2566                         if (!level_type)
2567                                 break;
2568                         do_cpuid_1_ent(&entry[i], function, i);
2569                         entry[i].flags |=
2570                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2571                         ++*nent;
2572                 }
2573                 break;
2574         }
2575         case 0xd: {
2576                 int idx, i;
2577
2578                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2579                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2580                         do_cpuid_1_ent(&entry[i], function, idx);
2581                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2582                                 continue;
2583                         entry[i].flags |=
2584                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2585                         ++*nent;
2586                         ++i;
2587                 }
2588                 break;
2589         }
2590         case KVM_CPUID_SIGNATURE: {
2591                 char signature[12] = "KVMKVMKVM\0\0";
2592                 u32 *sigptr = (u32 *)signature;
2593                 entry->eax = 0;
2594                 entry->ebx = sigptr[0];
2595                 entry->ecx = sigptr[1];
2596                 entry->edx = sigptr[2];
2597                 break;
2598         }
2599         case KVM_CPUID_FEATURES:
2600                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2601                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2602                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2603                              (1 << KVM_FEATURE_ASYNC_PF) |
2604                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2605
2606                 if (sched_info_on())
2607                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2608
2609                 entry->ebx = 0;
2610                 entry->ecx = 0;
2611                 entry->edx = 0;
2612                 break;
2613         case 0x80000000:
2614                 entry->eax = min(entry->eax, 0x8000001a);
2615                 break;
2616         case 0x80000001:
2617                 entry->edx &= kvm_supported_word1_x86_features;
2618                 cpuid_mask(&entry->edx, 1);
2619                 entry->ecx &= kvm_supported_word6_x86_features;
2620                 cpuid_mask(&entry->ecx, 6);
2621                 break;
2622         case 0x80000008: {
2623                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2624                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2625                 unsigned phys_as = entry->eax & 0xff;
2626
2627                 if (!g_phys_as)
2628                         g_phys_as = phys_as;
2629                 entry->eax = g_phys_as | (virt_as << 8);
2630                 entry->ebx = entry->edx = 0;
2631                 break;
2632         }
2633         case 0x80000019:
2634                 entry->ecx = entry->edx = 0;
2635                 break;
2636         case 0x8000001a:
2637                 break;
2638         case 0x8000001d:
2639                 break;
2640         /*Add support for Centaur's CPUID instruction*/
2641         case 0xC0000000:
2642                 /*Just support up to 0xC0000004 now*/
2643                 entry->eax = min(entry->eax, 0xC0000004);
2644                 break;
2645         case 0xC0000001:
2646                 entry->edx &= kvm_supported_word5_x86_features;
2647                 cpuid_mask(&entry->edx, 5);
2648                 break;
2649         case 3: /* Processor serial number */
2650         case 5: /* MONITOR/MWAIT */
2651         case 6: /* Thermal management */
2652         case 0xA: /* Architectural Performance Monitoring */
2653         case 0x80000007: /* Advanced power management */
2654         case 0xC0000002:
2655         case 0xC0000003:
2656         case 0xC0000004:
2657         default:
2658                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2659                 break;
2660         }
2661
2662         kvm_x86_ops->set_supported_cpuid(function, entry);
2663
2664         put_cpu();
2665 }
2666
2667 #undef F
2668
2669 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2670                                      struct kvm_cpuid_entry2 __user *entries)
2671 {
2672         struct kvm_cpuid_entry2 *cpuid_entries;
2673         int limit, nent = 0, r = -E2BIG;
2674         u32 func;
2675
2676         if (cpuid->nent < 1)
2677                 goto out;
2678         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2679                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2680         r = -ENOMEM;
2681         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2682         if (!cpuid_entries)
2683                 goto out;
2684
2685         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2686         limit = cpuid_entries[0].eax;
2687         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2688                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2689                              &nent, cpuid->nent);
2690         r = -E2BIG;
2691         if (nent >= cpuid->nent)
2692                 goto out_free;
2693
2694         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2695         limit = cpuid_entries[nent - 1].eax;
2696         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2697                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2698                              &nent, cpuid->nent);
2699
2700
2701
2702         r = -E2BIG;
2703         if (nent >= cpuid->nent)
2704                 goto out_free;
2705
2706         /* Add support for Centaur's CPUID instruction. */
2707         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2708                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2709                                 &nent, cpuid->nent);
2710
2711                 r = -E2BIG;
2712                 if (nent >= cpuid->nent)
2713                         goto out_free;
2714
2715                 limit = cpuid_entries[nent - 1].eax;
2716                 for (func = 0xC0000001;
2717                         func <= limit && nent < cpuid->nent; ++func)
2718                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2719                                         &nent, cpuid->nent);
2720
2721                 r = -E2BIG;
2722                 if (nent >= cpuid->nent)
2723                         goto out_free;
2724         }
2725
2726         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2727                      cpuid->nent);
2728
2729         r = -E2BIG;
2730         if (nent >= cpuid->nent)
2731                 goto out_free;
2732
2733         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2734                      cpuid->nent);
2735
2736         r = -E2BIG;
2737         if (nent >= cpuid->nent)
2738                 goto out_free;
2739
2740         r = -EFAULT;
2741         if (copy_to_user(entries, cpuid_entries,
2742                          nent * sizeof(struct kvm_cpuid_entry2)))
2743                 goto out_free;
2744         cpuid->nent = nent;
2745         r = 0;
2746
2747 out_free:
2748         vfree(cpuid_entries);
2749 out:
2750         return r;
2751 }
2752
2753 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2754                                     struct kvm_lapic_state *s)
2755 {
2756         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2757
2758         return 0;
2759 }
2760
2761 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2762                                     struct kvm_lapic_state *s)
2763 {
2764         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2765         kvm_apic_post_state_restore(vcpu);
2766         update_cr8_intercept(vcpu);
2767
2768         return 0;
2769 }
2770
2771 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2772                                     struct kvm_interrupt *irq)
2773 {
2774         if (irq->irq < 0 || irq->irq >= 256)
2775                 return -EINVAL;
2776         if (irqchip_in_kernel(vcpu->kvm))
2777                 return -ENXIO;
2778
2779         kvm_queue_interrupt(vcpu, irq->irq, false);
2780         kvm_make_request(KVM_REQ_EVENT, vcpu);
2781
2782         return 0;
2783 }
2784
2785 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2786 {
2787         kvm_inject_nmi(vcpu);
2788
2789         return 0;
2790 }
2791
2792 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2793                                            struct kvm_tpr_access_ctl *tac)
2794 {
2795         if (tac->flags)
2796                 return -EINVAL;
2797         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2798         return 0;
2799 }
2800
2801 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2802                                         u64 mcg_cap)
2803 {
2804         int r;
2805         unsigned bank_num = mcg_cap & 0xff, bank;
2806
2807         r = -EINVAL;
2808         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2809                 goto out;
2810         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2811                 goto out;
2812         r = 0;
2813         vcpu->arch.mcg_cap = mcg_cap;
2814         /* Init IA32_MCG_CTL to all 1s */
2815         if (mcg_cap & MCG_CTL_P)
2816                 vcpu->arch.mcg_ctl = ~(u64)0;
2817         /* Init IA32_MCi_CTL to all 1s */
2818         for (bank = 0; bank < bank_num; bank++)
2819                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2820 out:
2821         return r;
2822 }
2823
2824 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2825                                       struct kvm_x86_mce *mce)
2826 {
2827         u64 mcg_cap = vcpu->arch.mcg_cap;
2828         unsigned bank_num = mcg_cap & 0xff;
2829         u64 *banks = vcpu->arch.mce_banks;
2830
2831         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2832                 return -EINVAL;
2833         /*
2834          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2835          * reporting is disabled
2836          */
2837         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2838             vcpu->arch.mcg_ctl != ~(u64)0)
2839                 return 0;
2840         banks += 4 * mce->bank;
2841         /*
2842          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2843          * reporting is disabled for the bank
2844          */
2845         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2846                 return 0;
2847         if (mce->status & MCI_STATUS_UC) {
2848                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2849                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2850                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2851                         return 0;
2852                 }
2853                 if (banks[1] & MCI_STATUS_VAL)
2854                         mce->status |= MCI_STATUS_OVER;
2855                 banks[2] = mce->addr;
2856                 banks[3] = mce->misc;
2857                 vcpu->arch.mcg_status = mce->mcg_status;
2858                 banks[1] = mce->status;
2859                 kvm_queue_exception(vcpu, MC_VECTOR);
2860         } else if (!(banks[1] & MCI_STATUS_VAL)
2861                    || !(banks[1] & MCI_STATUS_UC)) {
2862                 if (banks[1] & MCI_STATUS_VAL)
2863                         mce->status |= MCI_STATUS_OVER;
2864                 banks[2] = mce->addr;
2865                 banks[3] = mce->misc;
2866                 banks[1] = mce->status;
2867         } else
2868                 banks[1] |= MCI_STATUS_OVER;
2869         return 0;
2870 }
2871
2872 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2873                                                struct kvm_vcpu_events *events)
2874 {
2875         process_nmi(vcpu);
2876         events->exception.injected =
2877                 vcpu->arch.exception.pending &&
2878                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2879         events->exception.nr = vcpu->arch.exception.nr;
2880         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2881         events->exception.pad = 0;
2882         events->exception.error_code = vcpu->arch.exception.error_code;
2883
2884         events->interrupt.injected =
2885                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2886         events->interrupt.nr = vcpu->arch.interrupt.nr;
2887         events->interrupt.soft = 0;
2888         events->interrupt.shadow =
2889                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2890                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2891
2892         events->nmi.injected = vcpu->arch.nmi_injected;
2893         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2894         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2895         events->nmi.pad = 0;
2896
2897         events->sipi_vector = vcpu->arch.sipi_vector;
2898
2899         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2900                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2901                          | KVM_VCPUEVENT_VALID_SHADOW);
2902         memset(&events->reserved, 0, sizeof(events->reserved));
2903 }
2904
2905 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2906                                               struct kvm_vcpu_events *events)
2907 {
2908         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2909                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2910                               | KVM_VCPUEVENT_VALID_SHADOW))
2911                 return -EINVAL;
2912
2913         process_nmi(vcpu);
2914         vcpu->arch.exception.pending = events->exception.injected;
2915         vcpu->arch.exception.nr = events->exception.nr;
2916         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2917         vcpu->arch.exception.error_code = events->exception.error_code;
2918
2919         vcpu->arch.interrupt.pending = events->interrupt.injected;
2920         vcpu->arch.interrupt.nr = events->interrupt.nr;
2921         vcpu->arch.interrupt.soft = events->interrupt.soft;
2922         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2923                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2924                                                   events->interrupt.shadow);
2925
2926         vcpu->arch.nmi_injected = events->nmi.injected;
2927         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2928                 vcpu->arch.nmi_pending = events->nmi.pending;
2929         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2930
2931         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2932                 vcpu->arch.sipi_vector = events->sipi_vector;
2933
2934         kvm_make_request(KVM_REQ_EVENT, vcpu);
2935
2936         return 0;
2937 }
2938
2939 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2940                                              struct kvm_debugregs *dbgregs)
2941 {
2942         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2943         dbgregs->dr6 = vcpu->arch.dr6;
2944         dbgregs->dr7 = vcpu->arch.dr7;
2945         dbgregs->flags = 0;
2946         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2947 }
2948
2949 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2950                                             struct kvm_debugregs *dbgregs)
2951 {
2952         if (dbgregs->flags)
2953                 return -EINVAL;
2954
2955         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2956         vcpu->arch.dr6 = dbgregs->dr6;
2957         vcpu->arch.dr7 = dbgregs->dr7;
2958
2959         return 0;
2960 }
2961
2962 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2963                                          struct kvm_xsave *guest_xsave)
2964 {
2965         if (cpu_has_xsave)
2966                 memcpy(guest_xsave->region,
2967                         &vcpu->arch.guest_fpu.state->xsave,
2968                         xstate_size);
2969         else {
2970                 memcpy(guest_xsave->region,
2971                         &vcpu->arch.guest_fpu.state->fxsave,
2972                         sizeof(struct i387_fxsave_struct));
2973                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2974                         XSTATE_FPSSE;
2975         }
2976 }
2977
2978 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2979                                         struct kvm_xsave *guest_xsave)
2980 {
2981         u64 xstate_bv =
2982                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2983
2984         if (cpu_has_xsave)
2985                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2986                         guest_xsave->region, xstate_size);
2987         else {
2988                 if (xstate_bv & ~XSTATE_FPSSE)
2989                         return -EINVAL;
2990                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2991                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2992         }
2993         return 0;
2994 }
2995
2996 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2997                                         struct kvm_xcrs *guest_xcrs)
2998 {
2999         if (!cpu_has_xsave) {
3000                 guest_xcrs->nr_xcrs = 0;
3001                 return;
3002         }
3003
3004         guest_xcrs->nr_xcrs = 1;
3005         guest_xcrs->flags = 0;
3006         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3007         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3008 }
3009
3010 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3011                                        struct kvm_xcrs *guest_xcrs)
3012 {
3013         int i, r = 0;
3014
3015         if (!cpu_has_xsave)
3016                 return -EINVAL;
3017
3018         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3019                 return -EINVAL;
3020
3021         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3022                 /* Only support XCR0 currently */
3023                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3024                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3025                                 guest_xcrs->xcrs[0].value);
3026                         break;
3027                 }
3028         if (r)
3029                 r = -EINVAL;
3030         return r;
3031 }
3032
3033 long kvm_arch_vcpu_ioctl(struct file *filp,
3034                          unsigned int ioctl, unsigned long arg)
3035 {
3036         struct kvm_vcpu *vcpu = filp->private_data;
3037         void __user *argp = (void __user *)arg;
3038         int r;
3039         union {
3040                 struct kvm_lapic_state *lapic;
3041                 struct kvm_xsave *xsave;
3042                 struct kvm_xcrs *xcrs;
3043                 void *buffer;
3044         } u;
3045
3046         u.buffer = NULL;
3047         switch (ioctl) {
3048         case KVM_GET_LAPIC: {
3049                 r = -EINVAL;
3050                 if (!vcpu->arch.apic)
3051                         goto out;
3052                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3053
3054                 r = -ENOMEM;
3055                 if (!u.lapic)
3056                         goto out;
3057                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3058                 if (r)
3059                         goto out;
3060                 r = -EFAULT;
3061                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3062                         goto out;
3063                 r = 0;
3064                 break;
3065         }
3066         case KVM_SET_LAPIC: {
3067                 r = -EINVAL;
3068                 if (!vcpu->arch.apic)
3069                         goto out;
3070                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3071                 r = -ENOMEM;
3072                 if (!u.lapic)
3073                         goto out;
3074                 r = -EFAULT;
3075                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3076                         goto out;
3077                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3078                 if (r)
3079                         goto out;
3080                 r = 0;
3081                 break;
3082         }
3083         case KVM_INTERRUPT: {
3084                 struct kvm_interrupt irq;
3085
3086                 r = -EFAULT;
3087                 if (copy_from_user(&irq, argp, sizeof irq))
3088                         goto out;
3089                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3090                 if (r)
3091                         goto out;
3092                 r = 0;
3093                 break;
3094         }
3095         case KVM_NMI: {
3096                 r = kvm_vcpu_ioctl_nmi(vcpu);
3097                 if (r)
3098                         goto out;
3099                 r = 0;
3100                 break;
3101         }
3102         case KVM_SET_CPUID: {
3103                 struct kvm_cpuid __user *cpuid_arg = argp;
3104                 struct kvm_cpuid cpuid;
3105
3106                 r = -EFAULT;
3107                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3108                         goto out;
3109                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3110                 if (r)
3111                         goto out;
3112                 break;
3113         }
3114         case KVM_SET_CPUID2: {
3115                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3116                 struct kvm_cpuid2 cpuid;
3117
3118                 r = -EFAULT;
3119                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3120                         goto out;
3121                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3122                                               cpuid_arg->entries);
3123                 if (r)
3124                         goto out;
3125                 break;
3126         }
3127         case KVM_GET_CPUID2: {
3128                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3129                 struct kvm_cpuid2 cpuid;
3130
3131                 r = -EFAULT;
3132                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3133                         goto out;
3134                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3135                                               cpuid_arg->entries);
3136                 if (r)
3137                         goto out;
3138                 r = -EFAULT;
3139                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3140                         goto out;
3141                 r = 0;
3142                 break;
3143         }
3144         case KVM_GET_MSRS:
3145                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3146                 break;
3147         case KVM_SET_MSRS:
3148                 r = msr_io(vcpu, argp, do_set_msr, 0);
3149                 break;
3150         case KVM_TPR_ACCESS_REPORTING: {
3151                 struct kvm_tpr_access_ctl tac;
3152
3153                 r = -EFAULT;
3154                 if (copy_from_user(&tac, argp, sizeof tac))
3155                         goto out;
3156                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3157                 if (r)
3158                         goto out;
3159                 r = -EFAULT;
3160                 if (copy_to_user(argp, &tac, sizeof tac))
3161                         goto out;
3162                 r = 0;
3163                 break;
3164         };
3165         case KVM_SET_VAPIC_ADDR: {
3166                 struct kvm_vapic_addr va;
3167
3168                 r = -EINVAL;
3169                 if (!irqchip_in_kernel(vcpu->kvm))
3170                         goto out;
3171                 r = -EFAULT;
3172                 if (copy_from_user(&va, argp, sizeof va))
3173                         goto out;
3174                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3175                 break;
3176         }
3177         case KVM_X86_SETUP_MCE: {
3178                 u64 mcg_cap;
3179
3180                 r = -EFAULT;
3181                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3182                         goto out;
3183                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3184                 break;
3185         }
3186         case KVM_X86_SET_MCE: {
3187                 struct kvm_x86_mce mce;
3188
3189                 r = -EFAULT;
3190                 if (copy_from_user(&mce, argp, sizeof mce))
3191                         goto out;
3192                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3193                 break;
3194         }
3195         case KVM_GET_VCPU_EVENTS: {
3196                 struct kvm_vcpu_events events;
3197
3198                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3199
3200                 r = -EFAULT;
3201                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3202                         break;
3203                 r = 0;
3204                 break;
3205         }
3206         case KVM_SET_VCPU_EVENTS: {
3207                 struct kvm_vcpu_events events;
3208
3209                 r = -EFAULT;
3210                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3211                         break;
3212
3213                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3214                 break;
3215         }
3216         case KVM_GET_DEBUGREGS: {
3217                 struct kvm_debugregs dbgregs;
3218
3219                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3220
3221                 r = -EFAULT;
3222                 if (copy_to_user(argp, &dbgregs,
3223                                  sizeof(struct kvm_debugregs)))
3224                         break;
3225                 r = 0;
3226                 break;
3227         }
3228         case KVM_SET_DEBUGREGS: {
3229                 struct kvm_debugregs dbgregs;
3230
3231                 r = -EFAULT;
3232                 if (copy_from_user(&dbgregs, argp,
3233                                    sizeof(struct kvm_debugregs)))
3234                         break;
3235
3236                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3237                 break;
3238         }
3239         case KVM_GET_XSAVE: {
3240                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3241                 r = -ENOMEM;
3242                 if (!u.xsave)
3243                         break;
3244
3245                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3246
3247                 r = -EFAULT;
3248                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3249                         break;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_SET_XSAVE: {
3254                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3255                 r = -ENOMEM;
3256                 if (!u.xsave)
3257                         break;
3258
3259                 r = -EFAULT;
3260                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3261                         break;
3262
3263                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3264                 break;
3265         }
3266         case KVM_GET_XCRS: {
3267                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3268                 r = -ENOMEM;
3269                 if (!u.xcrs)
3270                         break;
3271
3272                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3273
3274                 r = -EFAULT;
3275                 if (copy_to_user(argp, u.xcrs,
3276                                  sizeof(struct kvm_xcrs)))
3277                         break;
3278                 r = 0;
3279                 break;
3280         }
3281         case KVM_SET_XCRS: {
3282                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3283                 r = -ENOMEM;
3284                 if (!u.xcrs)
3285                         break;
3286
3287                 r = -EFAULT;
3288                 if (copy_from_user(u.xcrs, argp,
3289                                    sizeof(struct kvm_xcrs)))
3290                         break;
3291
3292                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3293                 break;
3294         }
3295         case KVM_SET_TSC_KHZ: {
3296                 u32 user_tsc_khz;
3297
3298                 r = -EINVAL;
3299                 if (!kvm_has_tsc_control)
3300                         break;
3301
3302                 user_tsc_khz = (u32)arg;
3303
3304                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3305                         goto out;
3306
3307                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3308
3309                 r = 0;
3310                 goto out;
3311         }
3312         case KVM_GET_TSC_KHZ: {
3313                 r = -EIO;
3314                 if (check_tsc_unstable())
3315                         goto out;
3316
3317                 r = vcpu_tsc_khz(vcpu);
3318
3319                 goto out;
3320         }
3321         default:
3322                 r = -EINVAL;
3323         }
3324 out:
3325         kfree(u.buffer);
3326         return r;
3327 }
3328
3329 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3330 {
3331         int ret;
3332
3333         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3334                 return -1;
3335         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3336         return ret;
3337 }
3338
3339 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3340                                               u64 ident_addr)
3341 {
3342         kvm->arch.ept_identity_map_addr = ident_addr;
3343         return 0;
3344 }
3345
3346 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3347                                           u32 kvm_nr_mmu_pages)
3348 {
3349         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3350                 return -EINVAL;
3351
3352         mutex_lock(&kvm->slots_lock);
3353         spin_lock(&kvm->mmu_lock);
3354
3355         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3356         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3357
3358         spin_unlock(&kvm->mmu_lock);
3359         mutex_unlock(&kvm->slots_lock);
3360         return 0;
3361 }
3362
3363 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3364 {
3365         return kvm->arch.n_max_mmu_pages;
3366 }
3367
3368 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3369 {
3370         int r;
3371
3372         r = 0;
3373         switch (chip->chip_id) {
3374         case KVM_IRQCHIP_PIC_MASTER:
3375                 memcpy(&chip->chip.pic,
3376                         &pic_irqchip(kvm)->pics[0],
3377                         sizeof(struct kvm_pic_state));
3378                 break;
3379         case KVM_IRQCHIP_PIC_SLAVE:
3380                 memcpy(&chip->chip.pic,
3381                         &pic_irqchip(kvm)->pics[1],
3382                         sizeof(struct kvm_pic_state));
3383                 break;
3384         case KVM_IRQCHIP_IOAPIC:
3385                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3386                 break;
3387         default:
3388                 r = -EINVAL;
3389                 break;
3390         }
3391         return r;
3392 }
3393
3394 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3395 {
3396         int r;
3397
3398         r = 0;
3399         switch (chip->chip_id) {
3400         case KVM_IRQCHIP_PIC_MASTER:
3401                 spin_lock(&pic_irqchip(kvm)->lock);
3402                 memcpy(&pic_irqchip(kvm)->pics[0],
3403                         &chip->chip.pic,
3404                         sizeof(struct kvm_pic_state));
3405                 spin_unlock(&pic_irqchip(kvm)->lock);
3406                 break;
3407         case KVM_IRQCHIP_PIC_SLAVE:
3408                 spin_lock(&pic_irqchip(kvm)->lock);
3409                 memcpy(&pic_irqchip(kvm)->pics[1],
3410                         &chip->chip.pic,
3411                         sizeof(struct kvm_pic_state));
3412                 spin_unlock(&pic_irqchip(kvm)->lock);
3413                 break;
3414         case KVM_IRQCHIP_IOAPIC:
3415                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3416                 break;
3417         default:
3418                 r = -EINVAL;
3419                 break;
3420         }
3421         kvm_pic_update_irq(pic_irqchip(kvm));
3422         return r;
3423 }
3424
3425 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3426 {
3427         int r = 0;
3428
3429         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3430         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3431         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3432         return r;
3433 }
3434
3435 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3436 {
3437         int r = 0;
3438         int i;
3439         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3440         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3441         for (i = 0; i < 3; i++)
3442                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3443         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3444         return r;
3445 }
3446
3447 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3448 {
3449         int r = 0;
3450
3451         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3452         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3453                 sizeof(ps->channels));
3454         ps->flags = kvm->arch.vpit->pit_state.flags;
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         memset(&ps->reserved, 0, sizeof(ps->reserved));
3457         return r;
3458 }
3459
3460 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3461 {
3462         int r = 0, start = 0;
3463         int i;
3464         u32 prev_legacy, cur_legacy;
3465         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3466         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3467         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3468         if (!prev_legacy && cur_legacy)
3469                 start = 1;
3470         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3471                sizeof(kvm->arch.vpit->pit_state.channels));
3472         kvm->arch.vpit->pit_state.flags = ps->flags;
3473         for (i = 0; i < 3; i++)
3474                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3475                                    start && i == 0);
3476         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3477         return r;
3478 }
3479
3480 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3481                                  struct kvm_reinject_control *control)
3482 {
3483         if (!kvm->arch.vpit)
3484                 return -ENXIO;
3485         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3486         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3487         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3488         return 0;
3489 }
3490
3491 /*
3492  * Get (and clear) the dirty memory log for a memory slot.
3493  */
3494 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3495                                       struct kvm_dirty_log *log)
3496 {
3497         int r, i;
3498         struct kvm_memory_slot *memslot;
3499         unsigned long n;
3500         unsigned long is_dirty = 0;
3501
3502         mutex_lock(&kvm->slots_lock);
3503
3504         r = -EINVAL;
3505         if (log->slot >= KVM_MEMORY_SLOTS)
3506                 goto out;
3507
3508         memslot = &kvm->memslots->memslots[log->slot];
3509         r = -ENOENT;
3510         if (!memslot->dirty_bitmap)
3511                 goto out;
3512
3513         n = kvm_dirty_bitmap_bytes(memslot);
3514
3515         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3516                 is_dirty = memslot->dirty_bitmap[i];
3517
3518         /* If nothing is dirty, don't bother messing with page tables. */
3519         if (is_dirty) {
3520                 struct kvm_memslots *slots, *old_slots;
3521                 unsigned long *dirty_bitmap;
3522
3523                 dirty_bitmap = memslot->dirty_bitmap_head;
3524                 if (memslot->dirty_bitmap == dirty_bitmap)
3525                         dirty_bitmap += n / sizeof(long);
3526                 memset(dirty_bitmap, 0, n);
3527
3528                 r = -ENOMEM;
3529                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3530                 if (!slots)
3531                         goto out;
3532                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3533                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3534                 slots->generation++;
3535
3536                 old_slots = kvm->memslots;
3537                 rcu_assign_pointer(kvm->memslots, slots);
3538                 synchronize_srcu_expedited(&kvm->srcu);
3539                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3540                 kfree(old_slots);
3541
3542                 spin_lock(&kvm->mmu_lock);
3543                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3544                 spin_unlock(&kvm->mmu_lock);
3545
3546                 r = -EFAULT;
3547                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3548                         goto out;
3549         } else {
3550                 r = -EFAULT;
3551                 if (clear_user(log->dirty_bitmap, n))
3552                         goto out;
3553         }
3554
3555         r = 0;
3556 out:
3557         mutex_unlock(&kvm->slots_lock);
3558         return r;
3559 }
3560
3561 long kvm_arch_vm_ioctl(struct file *filp,
3562                        unsigned int ioctl, unsigned long arg)
3563 {
3564         struct kvm *kvm = filp->private_data;
3565         void __user *argp = (void __user *)arg;
3566         int r = -ENOTTY;
3567         /*
3568          * This union makes it completely explicit to gcc-3.x
3569          * that these two variables' stack usage should be
3570          * combined, not added together.
3571          */
3572         union {
3573                 struct kvm_pit_state ps;
3574                 struct kvm_pit_state2 ps2;
3575                 struct kvm_pit_config pit_config;
3576         } u;
3577
3578         switch (ioctl) {
3579         case KVM_SET_TSS_ADDR:
3580                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3581                 if (r < 0)
3582                         goto out;
3583                 break;
3584         case KVM_SET_IDENTITY_MAP_ADDR: {
3585                 u64 ident_addr;
3586
3587                 r = -EFAULT;
3588                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3589                         goto out;
3590                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3591                 if (r < 0)
3592                         goto out;
3593                 break;
3594         }
3595         case KVM_SET_NR_MMU_PAGES:
3596                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3597                 if (r)
3598                         goto out;
3599                 break;
3600         case KVM_GET_NR_MMU_PAGES:
3601                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3602                 break;
3603         case KVM_CREATE_IRQCHIP: {
3604                 struct kvm_pic *vpic;
3605
3606                 mutex_lock(&kvm->lock);
3607                 r = -EEXIST;
3608                 if (kvm->arch.vpic)
3609                         goto create_irqchip_unlock;
3610                 r = -EINVAL;
3611                 if (atomic_read(&kvm->online_vcpus))
3612                         goto create_irqchip_unlock;
3613                 r = -ENOMEM;
3614                 vpic = kvm_create_pic(kvm);
3615                 if (vpic) {
3616                         r = kvm_ioapic_init(kvm);
3617                         if (r) {
3618                                 mutex_lock(&kvm->slots_lock);
3619                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3620                                                           &vpic->dev_master);
3621                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3622                                                           &vpic->dev_slave);
3623                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3624                                                           &vpic->dev_eclr);
3625                                 mutex_unlock(&kvm->slots_lock);
3626                                 kfree(vpic);
3627                                 goto create_irqchip_unlock;
3628                         }
3629                 } else
3630                         goto create_irqchip_unlock;
3631                 smp_wmb();
3632                 kvm->arch.vpic = vpic;
3633                 smp_wmb();
3634                 r = kvm_setup_default_irq_routing(kvm);
3635                 if (r) {
3636                         mutex_lock(&kvm->slots_lock);
3637                         mutex_lock(&kvm->irq_lock);
3638                         kvm_ioapic_destroy(kvm);
3639                         kvm_destroy_pic(kvm);
3640                         mutex_unlock(&kvm->irq_lock);
3641                         mutex_unlock(&kvm->slots_lock);
3642                 }
3643         create_irqchip_unlock:
3644                 mutex_unlock(&kvm->lock);
3645                 break;
3646         }
3647         case KVM_CREATE_PIT:
3648                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3649                 goto create_pit;
3650         case KVM_CREATE_PIT2:
3651                 r = -EFAULT;
3652                 if (copy_from_user(&u.pit_config, argp,
3653                                    sizeof(struct kvm_pit_config)))
3654                         goto out;
3655         create_pit:
3656                 mutex_lock(&kvm->slots_lock);
3657                 r = -EEXIST;
3658                 if (kvm->arch.vpit)
3659                         goto create_pit_unlock;
3660                 r = -ENOMEM;
3661                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3662                 if (kvm->arch.vpit)
3663                         r = 0;
3664         create_pit_unlock:
3665                 mutex_unlock(&kvm->slots_lock);
3666                 break;
3667         case KVM_IRQ_LINE_STATUS:
3668         case KVM_IRQ_LINE: {
3669                 struct kvm_irq_level irq_event;
3670
3671                 r = -EFAULT;
3672                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3673                         goto out;
3674                 r = -ENXIO;
3675                 if (irqchip_in_kernel(kvm)) {
3676                         __s32 status;
3677                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3678                                         irq_event.irq, irq_event.level);
3679                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3680                                 r = -EFAULT;
3681                                 irq_event.status = status;
3682                                 if (copy_to_user(argp, &irq_event,
3683                                                         sizeof irq_event))
3684                                         goto out;
3685                         }
3686                         r = 0;
3687                 }
3688                 break;
3689         }
3690         case KVM_GET_IRQCHIP: {
3691                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3692                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3693
3694                 r = -ENOMEM;
3695                 if (!chip)
3696                         goto out;
3697                 r = -EFAULT;
3698                 if (copy_from_user(chip, argp, sizeof *chip))
3699                         goto get_irqchip_out;
3700                 r = -ENXIO;
3701                 if (!irqchip_in_kernel(kvm))
3702                         goto get_irqchip_out;
3703                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3704                 if (r)
3705                         goto get_irqchip_out;
3706                 r = -EFAULT;
3707                 if (copy_to_user(argp, chip, sizeof *chip))
3708                         goto get_irqchip_out;
3709                 r = 0;
3710         get_irqchip_out:
3711                 kfree(chip);
3712                 if (r)
3713                         goto out;
3714                 break;
3715         }
3716         case KVM_SET_IRQCHIP: {
3717                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3718                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3719
3720                 r = -ENOMEM;
3721                 if (!chip)
3722                         goto out;
3723                 r = -EFAULT;
3724                 if (copy_from_user(chip, argp, sizeof *chip))
3725                         goto set_irqchip_out;
3726                 r = -ENXIO;
3727                 if (!irqchip_in_kernel(kvm))
3728                         goto set_irqchip_out;
3729                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3730                 if (r)
3731                         goto set_irqchip_out;
3732                 r = 0;
3733         set_irqchip_out:
3734                 kfree(chip);
3735                 if (r)
3736                         goto out;
3737                 break;
3738         }
3739         case KVM_GET_PIT: {
3740                 r = -EFAULT;
3741                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3742                         goto out;
3743                 r = -ENXIO;
3744                 if (!kvm->arch.vpit)
3745                         goto out;
3746                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3747                 if (r)
3748                         goto out;
3749                 r = -EFAULT;
3750                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3751                         goto out;
3752                 r = 0;
3753                 break;
3754         }
3755         case KVM_SET_PIT: {
3756                 r = -EFAULT;
3757                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3758                         goto out;
3759                 r = -ENXIO;
3760                 if (!kvm->arch.vpit)
3761                         goto out;
3762                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3763                 if (r)
3764                         goto out;
3765                 r = 0;
3766                 break;
3767         }
3768         case KVM_GET_PIT2: {
3769                 r = -ENXIO;
3770                 if (!kvm->arch.vpit)
3771                         goto out;
3772                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3773                 if (r)
3774                         goto out;
3775                 r = -EFAULT;
3776                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3777                         goto out;
3778                 r = 0;
3779                 break;
3780         }
3781         case KVM_SET_PIT2: {
3782                 r = -EFAULT;
3783                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3784                         goto out;
3785                 r = -ENXIO;
3786                 if (!kvm->arch.vpit)
3787                         goto out;
3788                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3789                 if (r)
3790                         goto out;
3791                 r = 0;
3792                 break;
3793         }
3794         case KVM_REINJECT_CONTROL: {
3795                 struct kvm_reinject_control control;
3796                 r =  -EFAULT;
3797                 if (copy_from_user(&control, argp, sizeof(control)))
3798                         goto out;
3799                 r = kvm_vm_ioctl_reinject(kvm, &control);
3800                 if (r)
3801                         goto out;
3802                 r = 0;
3803                 break;
3804         }
3805         case KVM_XEN_HVM_CONFIG: {
3806                 r = -EFAULT;
3807                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3808                                    sizeof(struct kvm_xen_hvm_config)))
3809                         goto out;
3810                 r = -EINVAL;
3811                 if (kvm->arch.xen_hvm_config.flags)
3812                         goto out;
3813                 r = 0;
3814                 break;
3815         }
3816         case KVM_SET_CLOCK: {
3817                 struct kvm_clock_data user_ns;
3818                 u64 now_ns;
3819                 s64 delta;
3820
3821                 r = -EFAULT;
3822                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3823                         goto out;
3824
3825                 r = -EINVAL;
3826                 if (user_ns.flags)
3827                         goto out;
3828
3829                 r = 0;
3830                 local_irq_disable();
3831                 now_ns = get_kernel_ns();
3832                 delta = user_ns.clock - now_ns;
3833                 local_irq_enable();
3834                 kvm->arch.kvmclock_offset = delta;
3835                 break;
3836         }
3837         case KVM_GET_CLOCK: {
3838                 struct kvm_clock_data user_ns;
3839                 u64 now_ns;
3840
3841                 local_irq_disable();
3842                 now_ns = get_kernel_ns();
3843                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3844                 local_irq_enable();
3845                 user_ns.flags = 0;
3846                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3847
3848                 r = -EFAULT;
3849                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3850                         goto out;
3851                 r = 0;
3852                 break;
3853         }
3854
3855         default:
3856                 ;
3857         }
3858 out:
3859         return r;
3860 }
3861
3862 static void kvm_init_msr_list(void)
3863 {
3864         u32 dummy[2];
3865         unsigned i, j;
3866
3867         /* skip the first msrs in the list. KVM-specific */
3868         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3869                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3870                         continue;
3871
3872                 /*
3873                  * Even MSRs that are valid in the host may not be exposed
3874                  * to the guests in some cases.
3875                  */
3876                 switch (msrs_to_save[i]) {
3877                 case MSR_TSC_AUX:
3878                         if (!kvm_x86_ops->rdtscp_supported())
3879                                 continue;
3880                         break;
3881                 default:
3882                         break;
3883                 }
3884
3885                 if (j < i)
3886                         msrs_to_save[j] = msrs_to_save[i];
3887                 j++;
3888         }
3889         num_msrs_to_save = j;
3890 }
3891
3892 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3893                            const void *v)
3894 {
3895         int handled = 0;
3896         int n;
3897
3898         do {
3899                 n = min(len, 8);
3900                 if (!(vcpu->arch.apic &&
3901                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3902                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3903                         break;
3904                 handled += n;
3905                 addr += n;
3906                 len -= n;
3907                 v += n;
3908         } while (len);
3909
3910         return handled;
3911 }
3912
3913 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3914 {
3915         int handled = 0;
3916         int n;
3917
3918         do {
3919                 n = min(len, 8);
3920                 if (!(vcpu->arch.apic &&
3921                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3922                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3923                         break;
3924                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3925                 handled += n;
3926                 addr += n;
3927                 len -= n;
3928                 v += n;
3929         } while (len);
3930
3931         return handled;
3932 }
3933
3934 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3935                         struct kvm_segment *var, int seg)
3936 {
3937         kvm_x86_ops->set_segment(vcpu, var, seg);
3938 }
3939
3940 void kvm_get_segment(struct kvm_vcpu *vcpu,
3941                      struct kvm_segment *var, int seg)
3942 {
3943         kvm_x86_ops->get_segment(vcpu, var, seg);
3944 }
3945
3946 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3947 {
3948         return gpa;
3949 }
3950
3951 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3952 {
3953         gpa_t t_gpa;
3954         struct x86_exception exception;
3955
3956         BUG_ON(!mmu_is_nested(vcpu));
3957
3958         /* NPT walks are always user-walks */
3959         access |= PFERR_USER_MASK;
3960         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3961
3962         return t_gpa;
3963 }
3964
3965 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3966                               struct x86_exception *exception)
3967 {
3968         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3969         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3970 }
3971
3972  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3973                                 struct x86_exception *exception)
3974 {
3975         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3976         access |= PFERR_FETCH_MASK;
3977         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3978 }
3979
3980 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3981                                struct x86_exception *exception)
3982 {
3983         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3984         access |= PFERR_WRITE_MASK;
3985         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3986 }
3987
3988 /* uses this to access any guest's mapped memory without checking CPL */
3989 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3990                                 struct x86_exception *exception)
3991 {
3992         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3993 }
3994
3995 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3996                                       struct kvm_vcpu *vcpu, u32 access,
3997                                       struct x86_exception *exception)
3998 {
3999         void *data = val;
4000         int r = X86EMUL_CONTINUE;
4001
4002         while (bytes) {
4003                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4004                                                             exception);
4005                 unsigned offset = addr & (PAGE_SIZE-1);
4006                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4007                 int ret;
4008
4009                 if (gpa == UNMAPPED_GVA)
4010                         return X86EMUL_PROPAGATE_FAULT;
4011                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4012                 if (ret < 0) {
4013                         r = X86EMUL_IO_NEEDED;
4014                         goto out;
4015                 }
4016
4017                 bytes -= toread;
4018                 data += toread;
4019                 addr += toread;
4020         }
4021 out:
4022         return r;
4023 }
4024
4025 /* used for instruction fetching */
4026 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4027                                 gva_t addr, void *val, unsigned int bytes,
4028                                 struct x86_exception *exception)
4029 {
4030         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4031         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4032
4033         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4034                                           access | PFERR_FETCH_MASK,
4035                                           exception);
4036 }
4037
4038 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4039                                gva_t addr, void *val, unsigned int bytes,
4040                                struct x86_exception *exception)
4041 {
4042         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4043         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4044
4045         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4046                                           exception);
4047 }
4048 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4049
4050 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4051                                       gva_t addr, void *val, unsigned int bytes,
4052                                       struct x86_exception *exception)
4053 {
4054         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4055         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4056 }
4057
4058 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4059                                        gva_t addr, void *val,
4060                                        unsigned int bytes,
4061                                        struct x86_exception *exception)
4062 {
4063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4064         void *data = val;
4065         int r = X86EMUL_CONTINUE;
4066
4067         while (bytes) {
4068                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4069                                                              PFERR_WRITE_MASK,
4070                                                              exception);
4071                 unsigned offset = addr & (PAGE_SIZE-1);
4072                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4073                 int ret;
4074
4075                 if (gpa == UNMAPPED_GVA)
4076                         return X86EMUL_PROPAGATE_FAULT;
4077                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4078                 if (ret < 0) {
4079                         r = X86EMUL_IO_NEEDED;
4080                         goto out;
4081                 }
4082
4083                 bytes -= towrite;
4084                 data += towrite;
4085                 addr += towrite;
4086         }
4087 out:
4088         return r;
4089 }
4090 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4091
4092 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4093                                 gpa_t *gpa, struct x86_exception *exception,
4094                                 bool write)
4095 {
4096         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4097
4098         if (vcpu_match_mmio_gva(vcpu, gva) &&
4099                   check_write_user_access(vcpu, write, access,
4100                   vcpu->arch.access)) {
4101                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4102                                         (gva & (PAGE_SIZE - 1));
4103                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4104                 return 1;
4105         }
4106
4107         if (write)
4108                 access |= PFERR_WRITE_MASK;
4109
4110         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4111
4112         if (*gpa == UNMAPPED_GVA)
4113                 return -1;
4114
4115         /* For APIC access vmexit */
4116         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4117                 return 1;
4118
4119         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4120                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4121                 return 1;
4122         }
4123
4124         return 0;
4125 }
4126
4127 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4128                         const void *val, int bytes)
4129 {
4130         int ret;
4131
4132         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4133         if (ret < 0)
4134                 return 0;
4135         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4136         return 1;
4137 }
4138
4139 struct read_write_emulator_ops {
4140         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4141                                   int bytes);
4142         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4143                                   void *val, int bytes);
4144         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4145                                int bytes, void *val);
4146         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4147                                     void *val, int bytes);
4148         bool write;
4149 };
4150
4151 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4152 {
4153         if (vcpu->mmio_read_completed) {
4154                 memcpy(val, vcpu->mmio_data, bytes);
4155                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4156                                vcpu->mmio_phys_addr, *(u64 *)val);
4157                 vcpu->mmio_read_completed = 0;
4158                 return 1;
4159         }
4160
4161         return 0;
4162 }
4163
4164 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4165                         void *val, int bytes)
4166 {
4167         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4168 }
4169
4170 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4171                          void *val, int bytes)
4172 {
4173         return emulator_write_phys(vcpu, gpa, val, bytes);
4174 }
4175
4176 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4177 {
4178         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4179         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4180 }
4181
4182 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4183                           void *val, int bytes)
4184 {
4185         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4186         return X86EMUL_IO_NEEDED;
4187 }
4188
4189 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4190                            void *val, int bytes)
4191 {
4192         memcpy(vcpu->mmio_data, val, bytes);
4193         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4194         return X86EMUL_CONTINUE;
4195 }
4196
4197 static struct read_write_emulator_ops read_emultor = {
4198         .read_write_prepare = read_prepare,
4199         .read_write_emulate = read_emulate,
4200         .read_write_mmio = vcpu_mmio_read,
4201         .read_write_exit_mmio = read_exit_mmio,
4202 };
4203
4204 static struct read_write_emulator_ops write_emultor = {
4205         .read_write_emulate = write_emulate,
4206         .read_write_mmio = write_mmio,
4207         .read_write_exit_mmio = write_exit_mmio,
4208         .write = true,
4209 };
4210
4211 static int emulator_read_write_onepage(unsigned long addr, void *val,
4212                                        unsigned int bytes,
4213                                        struct x86_exception *exception,
4214                                        struct kvm_vcpu *vcpu,
4215                                        struct read_write_emulator_ops *ops)
4216 {
4217         gpa_t gpa;
4218         int handled, ret;
4219         bool write = ops->write;
4220
4221         if (ops->read_write_prepare &&
4222                   ops->read_write_prepare(vcpu, val, bytes))
4223                 return X86EMUL_CONTINUE;
4224
4225         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4226
4227         if (ret < 0)
4228                 return X86EMUL_PROPAGATE_FAULT;
4229
4230         /* For APIC access vmexit */
4231         if (ret)
4232                 goto mmio;
4233
4234         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4235                 return X86EMUL_CONTINUE;
4236
4237 mmio:
4238         /*
4239          * Is this MMIO handled locally?
4240          */
4241         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4242         if (handled == bytes)
4243                 return X86EMUL_CONTINUE;
4244
4245         gpa += handled;
4246         bytes -= handled;
4247         val += handled;
4248
4249         vcpu->mmio_needed = 1;
4250         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4251         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4252         vcpu->mmio_size = bytes;
4253         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4254         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4255         vcpu->mmio_index = 0;
4256
4257         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4258 }
4259
4260 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4261                         void *val, unsigned int bytes,
4262                         struct x86_exception *exception,
4263                         struct read_write_emulator_ops *ops)
4264 {
4265         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4266
4267         /* Crossing a page boundary? */
4268         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4269                 int rc, now;
4270
4271                 now = -addr & ~PAGE_MASK;
4272                 rc = emulator_read_write_onepage(addr, val, now, exception,
4273                                                  vcpu, ops);
4274
4275                 if (rc != X86EMUL_CONTINUE)
4276                         return rc;
4277                 addr += now;
4278                 val += now;
4279                 bytes -= now;
4280         }
4281
4282         return emulator_read_write_onepage(addr, val, bytes, exception,
4283                                            vcpu, ops);
4284 }
4285
4286 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4287                                   unsigned long addr,
4288                                   void *val,
4289                                   unsigned int bytes,
4290                                   struct x86_exception *exception)
4291 {
4292         return emulator_read_write(ctxt, addr, val, bytes,
4293                                    exception, &read_emultor);
4294 }
4295
4296 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4297                             unsigned long addr,
4298                             const void *val,
4299                             unsigned int bytes,
4300                             struct x86_exception *exception)
4301 {
4302         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4303                                    exception, &write_emultor);
4304 }
4305
4306 #define CMPXCHG_TYPE(t, ptr, old, new) \
4307         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4308
4309 #ifdef CONFIG_X86_64
4310 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4311 #else
4312 #  define CMPXCHG64(ptr, old, new) \
4313         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4314 #endif
4315
4316 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4317                                      unsigned long addr,
4318                                      const void *old,
4319                                      const void *new,
4320                                      unsigned int bytes,
4321                                      struct x86_exception *exception)
4322 {
4323         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4324         gpa_t gpa;
4325         struct page *page;
4326         char *kaddr;
4327         bool exchanged;
4328
4329         /* guests cmpxchg8b have to be emulated atomically */
4330         if (bytes > 8 || (bytes & (bytes - 1)))
4331                 goto emul_write;
4332
4333         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4334
4335         if (gpa == UNMAPPED_GVA ||
4336             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4337                 goto emul_write;
4338
4339         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4340                 goto emul_write;
4341
4342         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4343         if (is_error_page(page)) {
4344                 kvm_release_page_clean(page);
4345                 goto emul_write;
4346         }
4347
4348         kaddr = kmap_atomic(page, KM_USER0);
4349         kaddr += offset_in_page(gpa);
4350         switch (bytes) {
4351         case 1:
4352                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4353                 break;
4354         case 2:
4355                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4356                 break;
4357         case 4:
4358                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4359                 break;
4360         case 8:
4361                 exchanged = CMPXCHG64(kaddr, old, new);
4362                 break;
4363         default:
4364                 BUG();
4365         }
4366         kunmap_atomic(kaddr, KM_USER0);
4367         kvm_release_page_dirty(page);
4368
4369         if (!exchanged)
4370                 return X86EMUL_CMPXCHG_FAILED;
4371
4372         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4373
4374         return X86EMUL_CONTINUE;
4375
4376 emul_write:
4377         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4378
4379         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4380 }
4381
4382 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4383 {
4384         /* TODO: String I/O for in kernel device */
4385         int r;
4386
4387         if (vcpu->arch.pio.in)
4388                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4389                                     vcpu->arch.pio.size, pd);
4390         else
4391                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4392                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4393                                      pd);
4394         return r;
4395 }
4396
4397
4398 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4399                                     int size, unsigned short port, void *val,
4400                                     unsigned int count)
4401 {
4402         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4403
4404         if (vcpu->arch.pio.count)
4405                 goto data_avail;
4406
4407         trace_kvm_pio(0, port, size, count);
4408
4409         vcpu->arch.pio.port = port;
4410         vcpu->arch.pio.in = 1;
4411         vcpu->arch.pio.count  = count;
4412         vcpu->arch.pio.size = size;
4413
4414         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4415         data_avail:
4416                 memcpy(val, vcpu->arch.pio_data, size * count);
4417                 vcpu->arch.pio.count = 0;
4418                 return 1;
4419         }
4420
4421         vcpu->run->exit_reason = KVM_EXIT_IO;
4422         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4423         vcpu->run->io.size = size;
4424         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4425         vcpu->run->io.count = count;
4426         vcpu->run->io.port = port;
4427
4428         return 0;
4429 }
4430
4431 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4432                                      int size, unsigned short port,
4433                                      const void *val, unsigned int count)
4434 {
4435         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4436
4437         trace_kvm_pio(1, port, size, count);
4438
4439         vcpu->arch.pio.port = port;
4440         vcpu->arch.pio.in = 0;
4441         vcpu->arch.pio.count = count;
4442         vcpu->arch.pio.size = size;
4443
4444         memcpy(vcpu->arch.pio_data, val, size * count);
4445
4446         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4447                 vcpu->arch.pio.count = 0;
4448                 return 1;
4449         }
4450
4451         vcpu->run->exit_reason = KVM_EXIT_IO;
4452         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4453         vcpu->run->io.size = size;
4454         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4455         vcpu->run->io.count = count;
4456         vcpu->run->io.port = port;
4457
4458         return 0;
4459 }
4460
4461 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4462 {
4463         return kvm_x86_ops->get_segment_base(vcpu, seg);
4464 }
4465
4466 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4467 {
4468         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4469 }
4470
4471 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4472 {
4473         if (!need_emulate_wbinvd(vcpu))
4474                 return X86EMUL_CONTINUE;
4475
4476         if (kvm_x86_ops->has_wbinvd_exit()) {
4477                 int cpu = get_cpu();
4478
4479                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4480                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4481                                 wbinvd_ipi, NULL, 1);
4482                 put_cpu();
4483                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4484         } else
4485                 wbinvd();
4486         return X86EMUL_CONTINUE;
4487 }
4488 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4489
4490 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4491 {
4492         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4493 }
4494
4495 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4496 {
4497         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4498 }
4499
4500 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4501 {
4502
4503         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4504 }
4505
4506 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4507 {
4508         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4509 }
4510
4511 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4512 {
4513         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4514         unsigned long value;
4515
4516         switch (cr) {
4517         case 0:
4518                 value = kvm_read_cr0(vcpu);
4519                 break;
4520         case 2:
4521                 value = vcpu->arch.cr2;
4522                 break;
4523         case 3:
4524                 value = kvm_read_cr3(vcpu);
4525                 break;
4526         case 4:
4527                 value = kvm_read_cr4(vcpu);
4528                 break;
4529         case 8:
4530                 value = kvm_get_cr8(vcpu);
4531                 break;
4532         default:
4533                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4534                 return 0;
4535         }
4536
4537         return value;
4538 }
4539
4540 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4541 {
4542         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4543         int res = 0;
4544
4545         switch (cr) {
4546         case 0:
4547                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4548                 break;
4549         case 2:
4550                 vcpu->arch.cr2 = val;
4551                 break;
4552         case 3:
4553                 res = kvm_set_cr3(vcpu, val);
4554                 break;
4555         case 4:
4556                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4557                 break;
4558         case 8:
4559                 res = kvm_set_cr8(vcpu, val);
4560                 break;
4561         default:
4562                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4563                 res = -1;
4564         }
4565
4566         return res;
4567 }
4568
4569 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4570 {
4571         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4572 }
4573
4574 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4575 {
4576         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4577 }
4578
4579 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4580 {
4581         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4582 }
4583
4584 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4585 {
4586         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4587 }
4588
4589 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4590 {
4591         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4592 }
4593
4594 static unsigned long emulator_get_cached_segment_base(
4595         struct x86_emulate_ctxt *ctxt, int seg)
4596 {
4597         return get_segment_base(emul_to_vcpu(ctxt), seg);
4598 }
4599
4600 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4601                                  struct desc_struct *desc, u32 *base3,
4602                                  int seg)
4603 {
4604         struct kvm_segment var;
4605
4606         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4607         *selector = var.selector;
4608
4609         if (var.unusable)
4610                 return false;
4611
4612         if (var.g)
4613                 var.limit >>= 12;
4614         set_desc_limit(desc, var.limit);
4615         set_desc_base(desc, (unsigned long)var.base);
4616 #ifdef CONFIG_X86_64
4617         if (base3)
4618                 *base3 = var.base >> 32;
4619 #endif
4620         desc->type = var.type;
4621         desc->s = var.s;
4622         desc->dpl = var.dpl;
4623         desc->p = var.present;
4624         desc->avl = var.avl;
4625         desc->l = var.l;
4626         desc->d = var.db;
4627         desc->g = var.g;
4628
4629         return true;
4630 }
4631
4632 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4633                                  struct desc_struct *desc, u32 base3,
4634                                  int seg)
4635 {
4636         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4637         struct kvm_segment var;
4638
4639         var.selector = selector;
4640         var.base = get_desc_base(desc);
4641 #ifdef CONFIG_X86_64
4642         var.base |= ((u64)base3) << 32;
4643 #endif
4644         var.limit = get_desc_limit(desc);
4645         if (desc->g)
4646                 var.limit = (var.limit << 12) | 0xfff;
4647         var.type = desc->type;
4648         var.present = desc->p;
4649         var.dpl = desc->dpl;
4650         var.db = desc->d;
4651         var.s = desc->s;
4652         var.l = desc->l;
4653         var.g = desc->g;
4654         var.avl = desc->avl;
4655         var.present = desc->p;
4656         var.unusable = !var.present;
4657         var.padding = 0;
4658
4659         kvm_set_segment(vcpu, &var, seg);
4660         return;
4661 }
4662
4663 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4664                             u32 msr_index, u64 *pdata)
4665 {
4666         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4667 }
4668
4669 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4670                             u32 msr_index, u64 data)
4671 {
4672         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4673 }
4674
4675 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4676 {
4677         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4678 }
4679
4680 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4681 {
4682         preempt_disable();
4683         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4684         /*
4685          * CR0.TS may reference the host fpu state, not the guest fpu state,
4686          * so it may be clear at this point.
4687          */
4688         clts();
4689 }
4690
4691 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4692 {
4693         preempt_enable();
4694 }
4695
4696 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4697                               struct x86_instruction_info *info,
4698                               enum x86_intercept_stage stage)
4699 {
4700         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4701 }
4702
4703 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4704                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4705 {
4706         struct kvm_cpuid_entry2 *cpuid = NULL;
4707
4708         if (eax && ecx)
4709                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4710                                             *eax, *ecx);
4711
4712         if (cpuid) {
4713                 *eax = cpuid->eax;
4714                 *ecx = cpuid->ecx;
4715                 if (ebx)
4716                         *ebx = cpuid->ebx;
4717                 if (edx)
4718                         *edx = cpuid->edx;
4719                 return true;
4720         }
4721
4722         return false;
4723 }
4724
4725 static struct x86_emulate_ops emulate_ops = {
4726         .read_std            = kvm_read_guest_virt_system,
4727         .write_std           = kvm_write_guest_virt_system,
4728         .fetch               = kvm_fetch_guest_virt,
4729         .read_emulated       = emulator_read_emulated,
4730         .write_emulated      = emulator_write_emulated,
4731         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4732         .invlpg              = emulator_invlpg,
4733         .pio_in_emulated     = emulator_pio_in_emulated,
4734         .pio_out_emulated    = emulator_pio_out_emulated,
4735         .get_segment         = emulator_get_segment,
4736         .set_segment         = emulator_set_segment,
4737         .get_cached_segment_base = emulator_get_cached_segment_base,
4738         .get_gdt             = emulator_get_gdt,
4739         .get_idt             = emulator_get_idt,
4740         .set_gdt             = emulator_set_gdt,
4741         .set_idt             = emulator_set_idt,
4742         .get_cr              = emulator_get_cr,
4743         .set_cr              = emulator_set_cr,
4744         .cpl                 = emulator_get_cpl,
4745         .get_dr              = emulator_get_dr,
4746         .set_dr              = emulator_set_dr,
4747         .set_msr             = emulator_set_msr,
4748         .get_msr             = emulator_get_msr,
4749         .halt                = emulator_halt,
4750         .wbinvd              = emulator_wbinvd,
4751         .fix_hypercall       = emulator_fix_hypercall,
4752         .get_fpu             = emulator_get_fpu,
4753         .put_fpu             = emulator_put_fpu,
4754         .intercept           = emulator_intercept,
4755         .get_cpuid           = emulator_get_cpuid,
4756 };
4757
4758 static void cache_all_regs(struct kvm_vcpu *vcpu)
4759 {
4760         kvm_register_read(vcpu, VCPU_REGS_RAX);
4761         kvm_register_read(vcpu, VCPU_REGS_RSP);
4762         kvm_register_read(vcpu, VCPU_REGS_RIP);
4763         vcpu->arch.regs_dirty = ~0;
4764 }
4765
4766 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4767 {
4768         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4769         /*
4770          * an sti; sti; sequence only disable interrupts for the first
4771          * instruction. So, if the last instruction, be it emulated or
4772          * not, left the system with the INT_STI flag enabled, it
4773          * means that the last instruction is an sti. We should not
4774          * leave the flag on in this case. The same goes for mov ss
4775          */
4776         if (!(int_shadow & mask))
4777                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4778 }
4779
4780 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4781 {
4782         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4783         if (ctxt->exception.vector == PF_VECTOR)
4784                 kvm_propagate_fault(vcpu, &ctxt->exception);
4785         else if (ctxt->exception.error_code_valid)
4786                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4787                                       ctxt->exception.error_code);
4788         else
4789                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4790 }
4791
4792 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4793                               const unsigned long *regs)
4794 {
4795         memset(&ctxt->twobyte, 0,
4796                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4797         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4798
4799         ctxt->fetch.start = 0;
4800         ctxt->fetch.end = 0;
4801         ctxt->io_read.pos = 0;
4802         ctxt->io_read.end = 0;
4803         ctxt->mem_read.pos = 0;
4804         ctxt->mem_read.end = 0;
4805 }
4806
4807 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4808 {
4809         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4810         int cs_db, cs_l;
4811
4812         /*
4813          * TODO: fix emulate.c to use guest_read/write_register
4814          * instead of direct ->regs accesses, can save hundred cycles
4815          * on Intel for instructions that don't read/change RSP, for
4816          * for example.
4817          */
4818         cache_all_regs(vcpu);
4819
4820         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4821
4822         ctxt->eflags = kvm_get_rflags(vcpu);
4823         ctxt->eip = kvm_rip_read(vcpu);
4824         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4825                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4826                      cs_l                               ? X86EMUL_MODE_PROT64 :
4827                      cs_db                              ? X86EMUL_MODE_PROT32 :
4828                                                           X86EMUL_MODE_PROT16;
4829         ctxt->guest_mode = is_guest_mode(vcpu);
4830
4831         init_decode_cache(ctxt, vcpu->arch.regs);
4832         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4833 }
4834
4835 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4836 {
4837         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4838         int ret;
4839
4840         init_emulate_ctxt(vcpu);
4841
4842         ctxt->op_bytes = 2;
4843         ctxt->ad_bytes = 2;
4844         ctxt->_eip = ctxt->eip + inc_eip;
4845         ret = emulate_int_real(ctxt, irq);
4846
4847         if (ret != X86EMUL_CONTINUE)
4848                 return EMULATE_FAIL;
4849
4850         ctxt->eip = ctxt->_eip;
4851         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4852         kvm_rip_write(vcpu, ctxt->eip);
4853         kvm_set_rflags(vcpu, ctxt->eflags);
4854
4855         if (irq == NMI_VECTOR)
4856                 vcpu->arch.nmi_pending = 0;
4857         else
4858                 vcpu->arch.interrupt.pending = false;
4859
4860         return EMULATE_DONE;
4861 }
4862 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4863
4864 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4865 {
4866         int r = EMULATE_DONE;
4867
4868         ++vcpu->stat.insn_emulation_fail;
4869         trace_kvm_emulate_insn_failed(vcpu);
4870         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4871                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4872                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4873                 vcpu->run->internal.ndata = 0;
4874                 r = EMULATE_FAIL;
4875         }
4876         kvm_queue_exception(vcpu, UD_VECTOR);
4877
4878         return r;
4879 }
4880
4881 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4882 {
4883         gpa_t gpa;
4884
4885         if (tdp_enabled)
4886                 return false;
4887
4888         /*
4889          * if emulation was due to access to shadowed page table
4890          * and it failed try to unshadow page and re-entetr the
4891          * guest to let CPU execute the instruction.
4892          */
4893         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4894                 return true;
4895
4896         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4897
4898         if (gpa == UNMAPPED_GVA)
4899                 return true; /* let cpu generate fault */
4900
4901         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4902                 return true;
4903
4904         return false;
4905 }
4906
4907 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4908                             unsigned long cr2,
4909                             int emulation_type,
4910                             void *insn,
4911                             int insn_len)
4912 {
4913         int r;
4914         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4915         bool writeback = true;
4916
4917         kvm_clear_exception_queue(vcpu);
4918
4919         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4920                 init_emulate_ctxt(vcpu);
4921                 ctxt->interruptibility = 0;
4922                 ctxt->have_exception = false;
4923                 ctxt->perm_ok = false;
4924
4925                 ctxt->only_vendor_specific_insn
4926                         = emulation_type & EMULTYPE_TRAP_UD;
4927
4928                 r = x86_decode_insn(ctxt, insn, insn_len);
4929
4930                 trace_kvm_emulate_insn_start(vcpu);
4931                 ++vcpu->stat.insn_emulation;
4932                 if (r != EMULATION_OK)  {
4933                         if (emulation_type & EMULTYPE_TRAP_UD)
4934                                 return EMULATE_FAIL;
4935                         if (reexecute_instruction(vcpu, cr2))
4936                                 return EMULATE_DONE;
4937                         if (emulation_type & EMULTYPE_SKIP)
4938                                 return EMULATE_FAIL;
4939                         return handle_emulation_failure(vcpu);
4940                 }
4941         }
4942
4943         if (emulation_type & EMULTYPE_SKIP) {
4944                 kvm_rip_write(vcpu, ctxt->_eip);
4945                 return EMULATE_DONE;
4946         }
4947
4948         /* this is needed for vmware backdoor interface to work since it
4949            changes registers values  during IO operation */
4950         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4951                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4952                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4953         }
4954
4955 restart:
4956         r = x86_emulate_insn(ctxt);
4957
4958         if (r == EMULATION_INTERCEPTED)
4959                 return EMULATE_DONE;
4960
4961         if (r == EMULATION_FAILED) {
4962                 if (reexecute_instruction(vcpu, cr2))
4963                         return EMULATE_DONE;
4964
4965                 return handle_emulation_failure(vcpu);
4966         }
4967
4968         if (ctxt->have_exception) {
4969                 inject_emulated_exception(vcpu);
4970                 r = EMULATE_DONE;
4971         } else if (vcpu->arch.pio.count) {
4972                 if (!vcpu->arch.pio.in)
4973                         vcpu->arch.pio.count = 0;
4974                 else
4975                         writeback = false;
4976                 r = EMULATE_DO_MMIO;
4977         } else if (vcpu->mmio_needed) {
4978                 if (!vcpu->mmio_is_write)
4979                         writeback = false;
4980                 r = EMULATE_DO_MMIO;
4981         } else if (r == EMULATION_RESTART)
4982                 goto restart;
4983         else
4984                 r = EMULATE_DONE;
4985
4986         if (writeback) {
4987                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4988                 kvm_set_rflags(vcpu, ctxt->eflags);
4989                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4990                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4991                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4992                 kvm_rip_write(vcpu, ctxt->eip);
4993         } else
4994                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4995
4996         return r;
4997 }
4998 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4999
5000 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5001 {
5002         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5003         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5004                                             size, port, &val, 1);
5005         /* do not return to emulator after return from userspace */
5006         vcpu->arch.pio.count = 0;
5007         return ret;
5008 }
5009 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5010
5011 static void tsc_bad(void *info)
5012 {
5013         __this_cpu_write(cpu_tsc_khz, 0);
5014 }
5015
5016 static void tsc_khz_changed(void *data)
5017 {
5018         struct cpufreq_freqs *freq = data;
5019         unsigned long khz = 0;
5020
5021         if (data)
5022                 khz = freq->new;
5023         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5024                 khz = cpufreq_quick_get(raw_smp_processor_id());
5025         if (!khz)
5026                 khz = tsc_khz;
5027         __this_cpu_write(cpu_tsc_khz, khz);
5028 }
5029
5030 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5031                                      void *data)
5032 {
5033         struct cpufreq_freqs *freq = data;
5034         struct kvm *kvm;
5035         struct kvm_vcpu *vcpu;
5036         int i, send_ipi = 0;
5037
5038         /*
5039          * We allow guests to temporarily run on slowing clocks,
5040          * provided we notify them after, or to run on accelerating
5041          * clocks, provided we notify them before.  Thus time never
5042          * goes backwards.
5043          *
5044          * However, we have a problem.  We can't atomically update
5045          * the frequency of a given CPU from this function; it is
5046          * merely a notifier, which can be called from any CPU.
5047          * Changing the TSC frequency at arbitrary points in time
5048          * requires a recomputation of local variables related to
5049          * the TSC for each VCPU.  We must flag these local variables
5050          * to be updated and be sure the update takes place with the
5051          * new frequency before any guests proceed.
5052          *
5053          * Unfortunately, the combination of hotplug CPU and frequency
5054          * change creates an intractable locking scenario; the order
5055          * of when these callouts happen is undefined with respect to
5056          * CPU hotplug, and they can race with each other.  As such,
5057          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5058          * undefined; you can actually have a CPU frequency change take
5059          * place in between the computation of X and the setting of the
5060          * variable.  To protect against this problem, all updates of
5061          * the per_cpu tsc_khz variable are done in an interrupt
5062          * protected IPI, and all callers wishing to update the value
5063          * must wait for a synchronous IPI to complete (which is trivial
5064          * if the caller is on the CPU already).  This establishes the
5065          * necessary total order on variable updates.
5066          *
5067          * Note that because a guest time update may take place
5068          * anytime after the setting of the VCPU's request bit, the
5069          * correct TSC value must be set before the request.  However,
5070          * to ensure the update actually makes it to any guest which
5071          * starts running in hardware virtualization between the set
5072          * and the acquisition of the spinlock, we must also ping the
5073          * CPU after setting the request bit.
5074          *
5075          */
5076
5077         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5078                 return 0;
5079         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5080                 return 0;
5081
5082         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5083
5084         raw_spin_lock(&kvm_lock);
5085         list_for_each_entry(kvm, &vm_list, vm_list) {
5086                 kvm_for_each_vcpu(i, vcpu, kvm) {
5087                         if (vcpu->cpu != freq->cpu)
5088                                 continue;
5089                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5090                         if (vcpu->cpu != smp_processor_id())
5091                                 send_ipi = 1;
5092                 }
5093         }
5094         raw_spin_unlock(&kvm_lock);
5095
5096         if (freq->old < freq->new && send_ipi) {
5097                 /*
5098                  * We upscale the frequency.  Must make the guest
5099                  * doesn't see old kvmclock values while running with
5100                  * the new frequency, otherwise we risk the guest sees
5101                  * time go backwards.
5102                  *
5103                  * In case we update the frequency for another cpu
5104                  * (which might be in guest context) send an interrupt
5105                  * to kick the cpu out of guest context.  Next time
5106                  * guest context is entered kvmclock will be updated,
5107                  * so the guest will not see stale values.
5108                  */
5109                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5110         }
5111         return 0;
5112 }
5113
5114 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5115         .notifier_call  = kvmclock_cpufreq_notifier
5116 };
5117
5118 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5119                                         unsigned long action, void *hcpu)
5120 {
5121         unsigned int cpu = (unsigned long)hcpu;
5122
5123         switch (action) {
5124                 case CPU_ONLINE:
5125                 case CPU_DOWN_FAILED:
5126                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5127                         break;
5128                 case CPU_DOWN_PREPARE:
5129                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5130                         break;
5131         }
5132         return NOTIFY_OK;
5133 }
5134
5135 static struct notifier_block kvmclock_cpu_notifier_block = {
5136         .notifier_call  = kvmclock_cpu_notifier,
5137         .priority = -INT_MAX
5138 };
5139
5140 static void kvm_timer_init(void)
5141 {
5142         int cpu;
5143
5144         max_tsc_khz = tsc_khz;
5145         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5146         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5147 #ifdef CONFIG_CPU_FREQ
5148                 struct cpufreq_policy policy;
5149                 memset(&policy, 0, sizeof(policy));
5150                 cpu = get_cpu();
5151                 cpufreq_get_policy(&policy, cpu);
5152                 if (policy.cpuinfo.max_freq)
5153                         max_tsc_khz = policy.cpuinfo.max_freq;
5154                 put_cpu();
5155 #endif
5156                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5157                                           CPUFREQ_TRANSITION_NOTIFIER);
5158         }
5159         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5160         for_each_online_cpu(cpu)
5161                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5162 }
5163
5164 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5165
5166 static int kvm_is_in_guest(void)
5167 {
5168         return percpu_read(current_vcpu) != NULL;
5169 }
5170
5171 static int kvm_is_user_mode(void)
5172 {
5173         int user_mode = 3;
5174
5175         if (percpu_read(current_vcpu))
5176                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5177
5178         return user_mode != 0;
5179 }
5180
5181 static unsigned long kvm_get_guest_ip(void)
5182 {
5183         unsigned long ip = 0;
5184
5185         if (percpu_read(current_vcpu))
5186                 ip = kvm_rip_read(percpu_read(current_vcpu));
5187
5188         return ip;
5189 }
5190
5191 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5192         .is_in_guest            = kvm_is_in_guest,
5193         .is_user_mode           = kvm_is_user_mode,
5194         .get_guest_ip           = kvm_get_guest_ip,
5195 };
5196
5197 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5198 {
5199         percpu_write(current_vcpu, vcpu);
5200 }
5201 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5202
5203 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5204 {
5205         percpu_write(current_vcpu, NULL);
5206 }
5207 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5208
5209 static void kvm_set_mmio_spte_mask(void)
5210 {
5211         u64 mask;
5212         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5213
5214         /*
5215          * Set the reserved bits and the present bit of an paging-structure
5216          * entry to generate page fault with PFER.RSV = 1.
5217          */
5218         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5219         mask |= 1ull;
5220
5221 #ifdef CONFIG_X86_64
5222         /*
5223          * If reserved bit is not supported, clear the present bit to disable
5224          * mmio page fault.
5225          */
5226         if (maxphyaddr == 52)
5227                 mask &= ~1ull;
5228 #endif
5229
5230         kvm_mmu_set_mmio_spte_mask(mask);
5231 }
5232
5233 int kvm_arch_init(void *opaque)
5234 {
5235         int r;
5236         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5237
5238         if (kvm_x86_ops) {
5239                 printk(KERN_ERR "kvm: already loaded the other module\n");
5240                 r = -EEXIST;
5241                 goto out;
5242         }
5243
5244         if (!ops->cpu_has_kvm_support()) {
5245                 printk(KERN_ERR "kvm: no hardware support\n");
5246                 r = -EOPNOTSUPP;
5247                 goto out;
5248         }
5249         if (ops->disabled_by_bios()) {
5250                 printk(KERN_ERR "kvm: disabled by bios\n");
5251                 r = -EOPNOTSUPP;
5252                 goto out;
5253         }
5254
5255         r = kvm_mmu_module_init();
5256         if (r)
5257                 goto out;
5258
5259         kvm_set_mmio_spte_mask();
5260
5261         kvm_x86_ops = ops;
5262         kvm_init_msr_list();
5263
5264         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5265                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5266
5267         kvm_timer_init();
5268
5269         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5270
5271         if (cpu_has_xsave)
5272                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5273
5274         return 0;
5275
5276 out:
5277         return r;
5278 }
5279
5280 void kvm_arch_exit(void)
5281 {
5282         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5283
5284         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5285                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5286                                             CPUFREQ_TRANSITION_NOTIFIER);
5287         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5288         kvm_x86_ops = NULL;
5289         kvm_mmu_module_exit();
5290 }
5291
5292 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5293 {
5294         ++vcpu->stat.halt_exits;
5295         if (irqchip_in_kernel(vcpu->kvm)) {
5296                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5297                 return 1;
5298         } else {
5299                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5300                 return 0;
5301         }
5302 }
5303 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5304
5305 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5306                            unsigned long a1)
5307 {
5308         if (is_long_mode(vcpu))
5309                 return a0;
5310         else
5311                 return a0 | ((gpa_t)a1 << 32);
5312 }
5313
5314 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5315 {
5316         u64 param, ingpa, outgpa, ret;
5317         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5318         bool fast, longmode;
5319         int cs_db, cs_l;
5320
5321         /*
5322          * hypercall generates UD from non zero cpl and real mode
5323          * per HYPER-V spec
5324          */
5325         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5326                 kvm_queue_exception(vcpu, UD_VECTOR);
5327                 return 0;
5328         }
5329
5330         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5331         longmode = is_long_mode(vcpu) && cs_l == 1;
5332
5333         if (!longmode) {
5334                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5335                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5336                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5337                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5338                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5339                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5340         }
5341 #ifdef CONFIG_X86_64
5342         else {
5343                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5344                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5345                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5346         }
5347 #endif
5348
5349         code = param & 0xffff;
5350         fast = (param >> 16) & 0x1;
5351         rep_cnt = (param >> 32) & 0xfff;
5352         rep_idx = (param >> 48) & 0xfff;
5353
5354         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5355
5356         switch (code) {
5357         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5358                 kvm_vcpu_on_spin(vcpu);
5359                 break;
5360         default:
5361                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5362                 break;
5363         }
5364
5365         ret = res | (((u64)rep_done & 0xfff) << 32);
5366         if (longmode) {
5367                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5368         } else {
5369                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5370                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5371         }
5372
5373         return 1;
5374 }
5375
5376 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5377 {
5378         unsigned long nr, a0, a1, a2, a3, ret;
5379         int r = 1;
5380
5381         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5382                 return kvm_hv_hypercall(vcpu);
5383
5384         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5385         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5386         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5387         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5388         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5389
5390         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5391
5392         if (!is_long_mode(vcpu)) {
5393                 nr &= 0xFFFFFFFF;
5394                 a0 &= 0xFFFFFFFF;
5395                 a1 &= 0xFFFFFFFF;
5396                 a2 &= 0xFFFFFFFF;
5397                 a3 &= 0xFFFFFFFF;
5398         }
5399
5400         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5401                 ret = -KVM_EPERM;
5402                 goto out;
5403         }
5404
5405         switch (nr) {
5406         case KVM_HC_VAPIC_POLL_IRQ:
5407                 ret = 0;
5408                 break;
5409         case KVM_HC_MMU_OP:
5410                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5411                 break;
5412         default:
5413                 ret = -KVM_ENOSYS;
5414                 break;
5415         }
5416 out:
5417         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5418         ++vcpu->stat.hypercalls;
5419         return r;
5420 }
5421 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5422
5423 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5424 {
5425         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5426         char instruction[3];
5427         unsigned long rip = kvm_rip_read(vcpu);
5428
5429         /*
5430          * Blow out the MMU to ensure that no other VCPU has an active mapping
5431          * to ensure that the updated hypercall appears atomically across all
5432          * VCPUs.
5433          */
5434         kvm_mmu_zap_all(vcpu->kvm);
5435
5436         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5437
5438         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5439 }
5440
5441 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5442 {
5443         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5444         int j, nent = vcpu->arch.cpuid_nent;
5445
5446         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5447         /* when no next entry is found, the current entry[i] is reselected */
5448         for (j = i + 1; ; j = (j + 1) % nent) {
5449                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5450                 if (ej->function == e->function) {
5451                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5452                         return j;
5453                 }
5454         }
5455         return 0; /* silence gcc, even though control never reaches here */
5456 }
5457
5458 /* find an entry with matching function, matching index (if needed), and that
5459  * should be read next (if it's stateful) */
5460 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5461         u32 function, u32 index)
5462 {
5463         if (e->function != function)
5464                 return 0;
5465         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5466                 return 0;
5467         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5468             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5469                 return 0;
5470         return 1;
5471 }
5472
5473 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5474                                               u32 function, u32 index)
5475 {
5476         int i;
5477         struct kvm_cpuid_entry2 *best = NULL;
5478
5479         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5480                 struct kvm_cpuid_entry2 *e;
5481
5482                 e = &vcpu->arch.cpuid_entries[i];
5483                 if (is_matching_cpuid_entry(e, function, index)) {
5484                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5485                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5486                         best = e;
5487                         break;
5488                 }
5489         }
5490         return best;
5491 }
5492 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5493
5494 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5495 {
5496         struct kvm_cpuid_entry2 *best;
5497
5498         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5499         if (!best || best->eax < 0x80000008)
5500                 goto not_found;
5501         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5502         if (best)
5503                 return best->eax & 0xff;
5504 not_found:
5505         return 36;
5506 }
5507
5508 /*
5509  * If no match is found, check whether we exceed the vCPU's limit
5510  * and return the content of the highest valid _standard_ leaf instead.
5511  * This is to satisfy the CPUID specification.
5512  */
5513 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5514                                                   u32 function, u32 index)
5515 {
5516         struct kvm_cpuid_entry2 *maxlevel;
5517
5518         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5519         if (!maxlevel || maxlevel->eax >= function)
5520                 return NULL;
5521         if (function & 0x80000000) {
5522                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5523                 if (!maxlevel)
5524                         return NULL;
5525         }
5526         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5527 }
5528
5529 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5530 {
5531         u32 function, index;
5532         struct kvm_cpuid_entry2 *best;
5533
5534         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5535         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5536         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5537         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5538         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5539         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5540         best = kvm_find_cpuid_entry(vcpu, function, index);
5541
5542         if (!best)
5543                 best = check_cpuid_limit(vcpu, function, index);
5544
5545         if (best) {
5546                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5547                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5548                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5549                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5550         }
5551         kvm_x86_ops->skip_emulated_instruction(vcpu);
5552         trace_kvm_cpuid(function,
5553                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5554                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5555                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5556                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5557 }
5558 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5559
5560 /*
5561  * Check if userspace requested an interrupt window, and that the
5562  * interrupt window is open.
5563  *
5564  * No need to exit to userspace if we already have an interrupt queued.
5565  */
5566 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5567 {
5568         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5569                 vcpu->run->request_interrupt_window &&
5570                 kvm_arch_interrupt_allowed(vcpu));
5571 }
5572
5573 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5574 {
5575         struct kvm_run *kvm_run = vcpu->run;
5576
5577         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5578         kvm_run->cr8 = kvm_get_cr8(vcpu);
5579         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5580         if (irqchip_in_kernel(vcpu->kvm))
5581                 kvm_run->ready_for_interrupt_injection = 1;
5582         else
5583                 kvm_run->ready_for_interrupt_injection =
5584                         kvm_arch_interrupt_allowed(vcpu) &&
5585                         !kvm_cpu_has_interrupt(vcpu) &&
5586                         !kvm_event_needs_reinjection(vcpu);
5587 }
5588
5589 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5590 {
5591         int max_irr, tpr;
5592
5593         if (!kvm_x86_ops->update_cr8_intercept)
5594                 return;
5595
5596         if (!vcpu->arch.apic)
5597                 return;
5598
5599         if (!vcpu->arch.apic->vapic_addr)
5600                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5601         else
5602                 max_irr = -1;
5603
5604         if (max_irr != -1)
5605                 max_irr >>= 4;
5606
5607         tpr = kvm_lapic_get_cr8(vcpu);
5608
5609         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5610 }
5611
5612 static void inject_pending_event(struct kvm_vcpu *vcpu)
5613 {
5614         /* try to reinject previous events if any */
5615         if (vcpu->arch.exception.pending) {
5616                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5617                                         vcpu->arch.exception.has_error_code,
5618                                         vcpu->arch.exception.error_code);
5619                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5620                                           vcpu->arch.exception.has_error_code,
5621                                           vcpu->arch.exception.error_code,
5622                                           vcpu->arch.exception.reinject);
5623                 return;
5624         }
5625
5626         if (vcpu->arch.nmi_injected) {
5627                 kvm_x86_ops->set_nmi(vcpu);
5628                 return;
5629         }
5630
5631         if (vcpu->arch.interrupt.pending) {
5632                 kvm_x86_ops->set_irq(vcpu);
5633                 return;
5634         }
5635
5636         /* try to inject new event if pending */
5637         if (vcpu->arch.nmi_pending) {
5638                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5639                         --vcpu->arch.nmi_pending;
5640                         vcpu->arch.nmi_injected = true;
5641                         kvm_x86_ops->set_nmi(vcpu);
5642                 }
5643         } else if (kvm_cpu_has_interrupt(vcpu)) {
5644                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5645                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5646                                             false);
5647                         kvm_x86_ops->set_irq(vcpu);
5648                 }
5649         }
5650 }
5651
5652 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5653 {
5654         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5655                         !vcpu->guest_xcr0_loaded) {
5656                 /* kvm_set_xcr() also depends on this */
5657                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5658                 vcpu->guest_xcr0_loaded = 1;
5659         }
5660 }
5661
5662 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5663 {
5664         if (vcpu->guest_xcr0_loaded) {
5665                 if (vcpu->arch.xcr0 != host_xcr0)
5666                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5667                 vcpu->guest_xcr0_loaded = 0;
5668         }
5669 }
5670
5671 static void process_nmi(struct kvm_vcpu *vcpu)
5672 {
5673         unsigned limit = 2;
5674
5675         /*
5676          * x86 is limited to one NMI running, and one NMI pending after it.
5677          * If an NMI is already in progress, limit further NMIs to just one.
5678          * Otherwise, allow two (and we'll inject the first one immediately).
5679          */
5680         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5681                 limit = 1;
5682
5683         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5684         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5685         kvm_make_request(KVM_REQ_EVENT, vcpu);
5686 }
5687
5688 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5689 {
5690         int r;
5691         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5692                 vcpu->run->request_interrupt_window;
5693
5694         if (vcpu->requests) {
5695                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5696                         kvm_mmu_unload(vcpu);
5697                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5698                         __kvm_migrate_timers(vcpu);
5699                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5700                         r = kvm_guest_time_update(vcpu);
5701                         if (unlikely(r))
5702                                 goto out;
5703                 }
5704                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5705                         kvm_mmu_sync_roots(vcpu);
5706                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5707                         kvm_x86_ops->tlb_flush(vcpu);
5708                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5709                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5710                         r = 0;
5711                         goto out;
5712                 }
5713                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5714                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5715                         r = 0;
5716                         goto out;
5717                 }
5718                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5719                         vcpu->fpu_active = 0;
5720                         kvm_x86_ops->fpu_deactivate(vcpu);
5721                 }
5722                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5723                         /* Page is swapped out. Do synthetic halt */
5724                         vcpu->arch.apf.halted = true;
5725                         r = 1;
5726                         goto out;
5727                 }
5728                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5729                         record_steal_time(vcpu);
5730                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5731                         process_nmi(vcpu);
5732
5733         }
5734
5735         r = kvm_mmu_reload(vcpu);
5736         if (unlikely(r))
5737                 goto out;
5738
5739         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5740                 inject_pending_event(vcpu);
5741
5742                 /* enable NMI/IRQ window open exits if needed */
5743                 if (vcpu->arch.nmi_pending)
5744                         kvm_x86_ops->enable_nmi_window(vcpu);
5745                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5746                         kvm_x86_ops->enable_irq_window(vcpu);
5747
5748                 if (kvm_lapic_enabled(vcpu)) {
5749                         update_cr8_intercept(vcpu);
5750                         kvm_lapic_sync_to_vapic(vcpu);
5751                 }
5752         }
5753
5754         preempt_disable();
5755
5756         kvm_x86_ops->prepare_guest_switch(vcpu);
5757         if (vcpu->fpu_active)
5758                 kvm_load_guest_fpu(vcpu);
5759         kvm_load_guest_xcr0(vcpu);
5760
5761         vcpu->mode = IN_GUEST_MODE;
5762
5763         /* We should set ->mode before check ->requests,
5764          * see the comment in make_all_cpus_request.
5765          */
5766         smp_mb();
5767
5768         local_irq_disable();
5769
5770         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5771             || need_resched() || signal_pending(current)) {
5772                 vcpu->mode = OUTSIDE_GUEST_MODE;
5773                 smp_wmb();
5774                 local_irq_enable();
5775                 preempt_enable();
5776                 kvm_x86_ops->cancel_injection(vcpu);
5777                 r = 1;
5778                 goto out;
5779         }
5780
5781         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5782
5783         kvm_guest_enter();
5784
5785         if (unlikely(vcpu->arch.switch_db_regs)) {
5786                 set_debugreg(0, 7);
5787                 set_debugreg(vcpu->arch.eff_db[0], 0);
5788                 set_debugreg(vcpu->arch.eff_db[1], 1);
5789                 set_debugreg(vcpu->arch.eff_db[2], 2);
5790                 set_debugreg(vcpu->arch.eff_db[3], 3);
5791         }
5792
5793         trace_kvm_entry(vcpu->vcpu_id);
5794         kvm_x86_ops->run(vcpu);
5795
5796         /*
5797          * If the guest has used debug registers, at least dr7
5798          * will be disabled while returning to the host.
5799          * If we don't have active breakpoints in the host, we don't
5800          * care about the messed up debug address registers. But if
5801          * we have some of them active, restore the old state.
5802          */
5803         if (hw_breakpoint_active())
5804                 hw_breakpoint_restore();
5805
5806         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5807
5808         vcpu->mode = OUTSIDE_GUEST_MODE;
5809         smp_wmb();
5810         local_irq_enable();
5811
5812         ++vcpu->stat.exits;
5813
5814         /*
5815          * We must have an instruction between local_irq_enable() and
5816          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5817          * the interrupt shadow.  The stat.exits increment will do nicely.
5818          * But we need to prevent reordering, hence this barrier():
5819          */
5820         barrier();
5821
5822         kvm_guest_exit();
5823
5824         preempt_enable();
5825
5826         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5827
5828         /*
5829          * Profile KVM exit RIPs:
5830          */
5831         if (unlikely(prof_on == KVM_PROFILING)) {
5832                 unsigned long rip = kvm_rip_read(vcpu);
5833                 profile_hit(KVM_PROFILING, (void *)rip);
5834         }
5835
5836
5837         kvm_lapic_sync_from_vapic(vcpu);
5838
5839         r = kvm_x86_ops->handle_exit(vcpu);
5840 out:
5841         return r;
5842 }
5843
5844
5845 static int __vcpu_run(struct kvm_vcpu *vcpu)
5846 {
5847         int r;
5848         struct kvm *kvm = vcpu->kvm;
5849
5850         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5851                 pr_debug("vcpu %d received sipi with vector # %x\n",
5852                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5853                 kvm_lapic_reset(vcpu);
5854                 r = kvm_arch_vcpu_reset(vcpu);
5855                 if (r)
5856                         return r;
5857                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5858         }
5859
5860         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5861
5862         r = 1;
5863         while (r > 0) {
5864                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5865                     !vcpu->arch.apf.halted)
5866                         r = vcpu_enter_guest(vcpu);
5867                 else {
5868                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5869                         kvm_vcpu_block(vcpu);
5870                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5871                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5872                         {
5873                                 switch(vcpu->arch.mp_state) {
5874                                 case KVM_MP_STATE_HALTED:
5875                                         vcpu->arch.mp_state =
5876                                                 KVM_MP_STATE_RUNNABLE;
5877                                 case KVM_MP_STATE_RUNNABLE:
5878                                         vcpu->arch.apf.halted = false;
5879                                         break;
5880                                 case KVM_MP_STATE_SIPI_RECEIVED:
5881                                 default:
5882                                         r = -EINTR;
5883                                         break;
5884                                 }
5885                         }
5886                 }
5887
5888                 if (r <= 0)
5889                         break;
5890
5891                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5892                 if (kvm_cpu_has_pending_timer(vcpu))
5893                         kvm_inject_pending_timer_irqs(vcpu);
5894
5895                 if (dm_request_for_irq_injection(vcpu)) {
5896                         r = -EINTR;
5897                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5898                         ++vcpu->stat.request_irq_exits;
5899                 }
5900
5901                 kvm_check_async_pf_completion(vcpu);
5902
5903                 if (signal_pending(current)) {
5904                         r = -EINTR;
5905                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5906                         ++vcpu->stat.signal_exits;
5907                 }
5908                 if (need_resched()) {
5909                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5910                         kvm_resched(vcpu);
5911                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5912                 }
5913         }
5914
5915         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5916
5917         return r;
5918 }
5919
5920 static int complete_mmio(struct kvm_vcpu *vcpu)
5921 {
5922         struct kvm_run *run = vcpu->run;
5923         int r;
5924
5925         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5926                 return 1;
5927
5928         if (vcpu->mmio_needed) {
5929                 vcpu->mmio_needed = 0;
5930                 if (!vcpu->mmio_is_write)
5931                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5932                                run->mmio.data, 8);
5933                 vcpu->mmio_index += 8;
5934                 if (vcpu->mmio_index < vcpu->mmio_size) {
5935                         run->exit_reason = KVM_EXIT_MMIO;
5936                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5937                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5938                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5939                         run->mmio.is_write = vcpu->mmio_is_write;
5940                         vcpu->mmio_needed = 1;
5941                         return 0;
5942                 }
5943                 if (vcpu->mmio_is_write)
5944                         return 1;
5945                 vcpu->mmio_read_completed = 1;
5946         }
5947         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5948         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5949         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5950         if (r != EMULATE_DONE)
5951                 return 0;
5952         return 1;
5953 }
5954
5955 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5956 {
5957         int r;
5958         sigset_t sigsaved;
5959
5960         if (!tsk_used_math(current) && init_fpu(current))
5961                 return -ENOMEM;
5962
5963         if (vcpu->sigset_active)
5964                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5965
5966         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5967                 kvm_vcpu_block(vcpu);
5968                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5969                 r = -EAGAIN;
5970                 goto out;
5971         }
5972
5973         /* re-sync apic's tpr */
5974         if (!irqchip_in_kernel(vcpu->kvm)) {
5975                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5976                         r = -EINVAL;
5977                         goto out;
5978                 }
5979         }
5980
5981         r = complete_mmio(vcpu);
5982         if (r <= 0)
5983                 goto out;
5984
5985         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5986                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5987                                      kvm_run->hypercall.ret);
5988
5989         r = __vcpu_run(vcpu);
5990
5991 out:
5992         post_kvm_run_save(vcpu);
5993         if (vcpu->sigset_active)
5994                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5995
5996         return r;
5997 }
5998
5999 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6000 {
6001         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6002                 /*
6003                  * We are here if userspace calls get_regs() in the middle of
6004                  * instruction emulation. Registers state needs to be copied
6005                  * back from emulation context to vcpu. Usrapace shouldn't do
6006                  * that usually, but some bad designed PV devices (vmware
6007                  * backdoor interface) need this to work
6008                  */
6009                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6010                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6011                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6012         }
6013         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6014         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6015         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6016         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6017         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6018         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6019         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6020         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6021 #ifdef CONFIG_X86_64
6022         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6023         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6024         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6025         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6026         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6027         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6028         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6029         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6030 #endif
6031
6032         regs->rip = kvm_rip_read(vcpu);
6033         regs->rflags = kvm_get_rflags(vcpu);
6034
6035         return 0;
6036 }
6037
6038 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6039 {
6040         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6041         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6042
6043         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6044         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6045         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6046         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6047         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6048         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6049         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6050         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6051 #ifdef CONFIG_X86_64
6052         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6053         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6054         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6055         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6056         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6057         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6058         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6059         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6060 #endif
6061
6062         kvm_rip_write(vcpu, regs->rip);
6063         kvm_set_rflags(vcpu, regs->rflags);
6064
6065         vcpu->arch.exception.pending = false;
6066
6067         kvm_make_request(KVM_REQ_EVENT, vcpu);
6068
6069         return 0;
6070 }
6071
6072 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6073 {
6074         struct kvm_segment cs;
6075
6076         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6077         *db = cs.db;
6078         *l = cs.l;
6079 }
6080 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6081
6082 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6083                                   struct kvm_sregs *sregs)
6084 {
6085         struct desc_ptr dt;
6086
6087         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6088         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6089         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6090         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6091         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6092         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6093
6094         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6095         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6096
6097         kvm_x86_ops->get_idt(vcpu, &dt);
6098         sregs->idt.limit = dt.size;
6099         sregs->idt.base = dt.address;
6100         kvm_x86_ops->get_gdt(vcpu, &dt);
6101         sregs->gdt.limit = dt.size;
6102         sregs->gdt.base = dt.address;
6103
6104         sregs->cr0 = kvm_read_cr0(vcpu);
6105         sregs->cr2 = vcpu->arch.cr2;
6106         sregs->cr3 = kvm_read_cr3(vcpu);
6107         sregs->cr4 = kvm_read_cr4(vcpu);
6108         sregs->cr8 = kvm_get_cr8(vcpu);
6109         sregs->efer = vcpu->arch.efer;
6110         sregs->apic_base = kvm_get_apic_base(vcpu);
6111
6112         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6113
6114         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6115                 set_bit(vcpu->arch.interrupt.nr,
6116                         (unsigned long *)sregs->interrupt_bitmap);
6117
6118         return 0;
6119 }
6120
6121 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6122                                     struct kvm_mp_state *mp_state)
6123 {
6124         mp_state->mp_state = vcpu->arch.mp_state;
6125         return 0;
6126 }
6127
6128 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6129                                     struct kvm_mp_state *mp_state)
6130 {
6131         vcpu->arch.mp_state = mp_state->mp_state;
6132         kvm_make_request(KVM_REQ_EVENT, vcpu);
6133         return 0;
6134 }
6135
6136 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6137                     bool has_error_code, u32 error_code)
6138 {
6139         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6140         int ret;
6141
6142         init_emulate_ctxt(vcpu);
6143
6144         ret = emulator_task_switch(ctxt, tss_selector, reason,
6145                                    has_error_code, error_code);
6146
6147         if (ret)
6148                 return EMULATE_FAIL;
6149
6150         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6151         kvm_rip_write(vcpu, ctxt->eip);
6152         kvm_set_rflags(vcpu, ctxt->eflags);
6153         kvm_make_request(KVM_REQ_EVENT, vcpu);
6154         return EMULATE_DONE;
6155 }
6156 EXPORT_SYMBOL_GPL(kvm_task_switch);
6157
6158 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6159                                   struct kvm_sregs *sregs)
6160 {
6161         int mmu_reset_needed = 0;
6162         int pending_vec, max_bits, idx;
6163         struct desc_ptr dt;
6164
6165         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6166                 return -EINVAL;
6167
6168         dt.size = sregs->idt.limit;
6169         dt.address = sregs->idt.base;
6170         kvm_x86_ops->set_idt(vcpu, &dt);
6171         dt.size = sregs->gdt.limit;
6172         dt.address = sregs->gdt.base;
6173         kvm_x86_ops->set_gdt(vcpu, &dt);
6174
6175         vcpu->arch.cr2 = sregs->cr2;
6176         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6177         vcpu->arch.cr3 = sregs->cr3;
6178         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6179
6180         kvm_set_cr8(vcpu, sregs->cr8);
6181
6182         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6183         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6184         kvm_set_apic_base(vcpu, sregs->apic_base);
6185
6186         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6187         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6188         vcpu->arch.cr0 = sregs->cr0;
6189
6190         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6191         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6192         if (sregs->cr4 & X86_CR4_OSXSAVE)
6193                 update_cpuid(vcpu);
6194
6195         idx = srcu_read_lock(&vcpu->kvm->srcu);
6196         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6197                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6198                 mmu_reset_needed = 1;
6199         }
6200         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6201
6202         if (mmu_reset_needed)
6203                 kvm_mmu_reset_context(vcpu);
6204
6205         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6206         pending_vec = find_first_bit(
6207                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6208         if (pending_vec < max_bits) {
6209                 kvm_queue_interrupt(vcpu, pending_vec, false);
6210                 pr_debug("Set back pending irq %d\n", pending_vec);
6211         }
6212
6213         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6214         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6215         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6216         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6217         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6218         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6219
6220         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6221         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6222
6223         update_cr8_intercept(vcpu);
6224
6225         /* Older userspace won't unhalt the vcpu on reset. */
6226         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6227             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6228             !is_protmode(vcpu))
6229                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6230
6231         kvm_make_request(KVM_REQ_EVENT, vcpu);
6232
6233         return 0;
6234 }
6235
6236 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6237                                         struct kvm_guest_debug *dbg)
6238 {
6239         unsigned long rflags;
6240         int i, r;
6241
6242         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6243                 r = -EBUSY;
6244                 if (vcpu->arch.exception.pending)
6245                         goto out;
6246                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6247                         kvm_queue_exception(vcpu, DB_VECTOR);
6248                 else
6249                         kvm_queue_exception(vcpu, BP_VECTOR);
6250         }
6251
6252         /*
6253          * Read rflags as long as potentially injected trace flags are still
6254          * filtered out.
6255          */
6256         rflags = kvm_get_rflags(vcpu);
6257
6258         vcpu->guest_debug = dbg->control;
6259         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6260                 vcpu->guest_debug = 0;
6261
6262         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6263                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6264                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6265                 vcpu->arch.switch_db_regs =
6266                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6267         } else {
6268                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6269                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6270                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6271         }
6272
6273         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6274                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6275                         get_segment_base(vcpu, VCPU_SREG_CS);
6276
6277         /*
6278          * Trigger an rflags update that will inject or remove the trace
6279          * flags.
6280          */
6281         kvm_set_rflags(vcpu, rflags);
6282
6283         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6284
6285         r = 0;
6286
6287 out:
6288
6289         return r;
6290 }
6291
6292 /*
6293  * Translate a guest virtual address to a guest physical address.
6294  */
6295 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6296                                     struct kvm_translation *tr)
6297 {
6298         unsigned long vaddr = tr->linear_address;
6299         gpa_t gpa;
6300         int idx;
6301
6302         idx = srcu_read_lock(&vcpu->kvm->srcu);
6303         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6304         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6305         tr->physical_address = gpa;
6306         tr->valid = gpa != UNMAPPED_GVA;
6307         tr->writeable = 1;
6308         tr->usermode = 0;
6309
6310         return 0;
6311 }
6312
6313 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6314 {
6315         struct i387_fxsave_struct *fxsave =
6316                         &vcpu->arch.guest_fpu.state->fxsave;
6317
6318         memcpy(fpu->fpr, fxsave->st_space, 128);
6319         fpu->fcw = fxsave->cwd;
6320         fpu->fsw = fxsave->swd;
6321         fpu->ftwx = fxsave->twd;
6322         fpu->last_opcode = fxsave->fop;
6323         fpu->last_ip = fxsave->rip;
6324         fpu->last_dp = fxsave->rdp;
6325         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6326
6327         return 0;
6328 }
6329
6330 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6331 {
6332         struct i387_fxsave_struct *fxsave =
6333                         &vcpu->arch.guest_fpu.state->fxsave;
6334
6335         memcpy(fxsave->st_space, fpu->fpr, 128);
6336         fxsave->cwd = fpu->fcw;
6337         fxsave->swd = fpu->fsw;
6338         fxsave->twd = fpu->ftwx;
6339         fxsave->fop = fpu->last_opcode;
6340         fxsave->rip = fpu->last_ip;
6341         fxsave->rdp = fpu->last_dp;
6342         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6343
6344         return 0;
6345 }
6346
6347 int fx_init(struct kvm_vcpu *vcpu)
6348 {
6349         int err;
6350
6351         err = fpu_alloc(&vcpu->arch.guest_fpu);
6352         if (err)
6353                 return err;
6354
6355         fpu_finit(&vcpu->arch.guest_fpu);
6356
6357         /*
6358          * Ensure guest xcr0 is valid for loading
6359          */
6360         vcpu->arch.xcr0 = XSTATE_FP;
6361
6362         vcpu->arch.cr0 |= X86_CR0_ET;
6363
6364         return 0;
6365 }
6366 EXPORT_SYMBOL_GPL(fx_init);
6367
6368 static void fx_free(struct kvm_vcpu *vcpu)
6369 {
6370         fpu_free(&vcpu->arch.guest_fpu);
6371 }
6372
6373 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6374 {
6375         if (vcpu->guest_fpu_loaded)
6376                 return;
6377
6378         /*
6379          * Restore all possible states in the guest,
6380          * and assume host would use all available bits.
6381          * Guest xcr0 would be loaded later.
6382          */
6383         kvm_put_guest_xcr0(vcpu);
6384         vcpu->guest_fpu_loaded = 1;
6385         unlazy_fpu(current);
6386         fpu_restore_checking(&vcpu->arch.guest_fpu);
6387         trace_kvm_fpu(1);
6388 }
6389
6390 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6391 {
6392         kvm_put_guest_xcr0(vcpu);
6393
6394         if (!vcpu->guest_fpu_loaded)
6395                 return;
6396
6397         vcpu->guest_fpu_loaded = 0;
6398         fpu_save_init(&vcpu->arch.guest_fpu);
6399         ++vcpu->stat.fpu_reload;
6400         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6401         trace_kvm_fpu(0);
6402 }
6403
6404 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6405 {
6406         kvmclock_reset(vcpu);
6407
6408         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6409         fx_free(vcpu);
6410         kvm_x86_ops->vcpu_free(vcpu);
6411 }
6412
6413 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6414                                                 unsigned int id)
6415 {
6416         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6417                 printk_once(KERN_WARNING
6418                 "kvm: SMP vm created on host with unstable TSC; "
6419                 "guest TSC will not be reliable\n");
6420         return kvm_x86_ops->vcpu_create(kvm, id);
6421 }
6422
6423 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6424 {
6425         int r;
6426
6427         vcpu->arch.mtrr_state.have_fixed = 1;
6428         vcpu_load(vcpu);
6429         r = kvm_arch_vcpu_reset(vcpu);
6430         if (r == 0)
6431                 r = kvm_mmu_setup(vcpu);
6432         vcpu_put(vcpu);
6433
6434         return r;
6435 }
6436
6437 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6438 {
6439         vcpu->arch.apf.msr_val = 0;
6440
6441         vcpu_load(vcpu);
6442         kvm_mmu_unload(vcpu);
6443         vcpu_put(vcpu);
6444
6445         fx_free(vcpu);
6446         kvm_x86_ops->vcpu_free(vcpu);
6447 }
6448
6449 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6450 {
6451         atomic_set(&vcpu->arch.nmi_queued, 0);
6452         vcpu->arch.nmi_pending = 0;
6453         vcpu->arch.nmi_injected = false;
6454
6455         vcpu->arch.switch_db_regs = 0;
6456         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6457         vcpu->arch.dr6 = DR6_FIXED_1;
6458         vcpu->arch.dr7 = DR7_FIXED_1;
6459
6460         kvm_make_request(KVM_REQ_EVENT, vcpu);
6461         vcpu->arch.apf.msr_val = 0;
6462         vcpu->arch.st.msr_val = 0;
6463
6464         kvmclock_reset(vcpu);
6465
6466         kvm_clear_async_pf_completion_queue(vcpu);
6467         kvm_async_pf_hash_reset(vcpu);
6468         vcpu->arch.apf.halted = false;
6469
6470         return kvm_x86_ops->vcpu_reset(vcpu);
6471 }
6472
6473 int kvm_arch_hardware_enable(void *garbage)
6474 {
6475         struct kvm *kvm;
6476         struct kvm_vcpu *vcpu;
6477         int i;
6478
6479         kvm_shared_msr_cpu_online();
6480         list_for_each_entry(kvm, &vm_list, vm_list)
6481                 kvm_for_each_vcpu(i, vcpu, kvm)
6482                         if (vcpu->cpu == smp_processor_id())
6483                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6484         return kvm_x86_ops->hardware_enable(garbage);
6485 }
6486
6487 void kvm_arch_hardware_disable(void *garbage)
6488 {
6489         kvm_x86_ops->hardware_disable(garbage);
6490         drop_user_return_notifiers(garbage);
6491 }
6492
6493 int kvm_arch_hardware_setup(void)
6494 {
6495         return kvm_x86_ops->hardware_setup();
6496 }
6497
6498 void kvm_arch_hardware_unsetup(void)
6499 {
6500         kvm_x86_ops->hardware_unsetup();
6501 }
6502
6503 void kvm_arch_check_processor_compat(void *rtn)
6504 {
6505         kvm_x86_ops->check_processor_compatibility(rtn);
6506 }
6507
6508 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6509 {
6510         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6511 }
6512
6513 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6514 {
6515         struct page *page;
6516         struct kvm *kvm;
6517         int r;
6518
6519         BUG_ON(vcpu->kvm == NULL);
6520         kvm = vcpu->kvm;
6521
6522         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6523         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6524         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6525         vcpu->arch.mmu.translate_gpa = translate_gpa;
6526         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6527         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6528                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6529         else
6530                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6531
6532         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6533         if (!page) {
6534                 r = -ENOMEM;
6535                 goto fail;
6536         }
6537         vcpu->arch.pio_data = page_address(page);
6538
6539         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6540
6541         r = kvm_mmu_create(vcpu);
6542         if (r < 0)
6543                 goto fail_free_pio_data;
6544
6545         if (irqchip_in_kernel(kvm)) {
6546                 r = kvm_create_lapic(vcpu);
6547                 if (r < 0)
6548                         goto fail_mmu_destroy;
6549         }
6550
6551         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6552                                        GFP_KERNEL);
6553         if (!vcpu->arch.mce_banks) {
6554                 r = -ENOMEM;
6555                 goto fail_free_lapic;
6556         }
6557         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6558
6559         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6560                 goto fail_free_mce_banks;
6561
6562         vcpu->arch.pv_time_enabled = false;
6563         kvm_async_pf_hash_reset(vcpu);
6564
6565         return 0;
6566 fail_free_mce_banks:
6567         kfree(vcpu->arch.mce_banks);
6568 fail_free_lapic:
6569         kvm_free_lapic(vcpu);
6570 fail_mmu_destroy:
6571         kvm_mmu_destroy(vcpu);
6572 fail_free_pio_data:
6573         free_page((unsigned long)vcpu->arch.pio_data);
6574 fail:
6575         return r;
6576 }
6577
6578 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6579 {
6580         int idx;
6581
6582         kfree(vcpu->arch.mce_banks);
6583         kvm_free_lapic(vcpu);
6584         idx = srcu_read_lock(&vcpu->kvm->srcu);
6585         kvm_mmu_destroy(vcpu);
6586         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6587         free_page((unsigned long)vcpu->arch.pio_data);
6588 }
6589
6590 int kvm_arch_init_vm(struct kvm *kvm)
6591 {
6592         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6593         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6594
6595         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6596         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6597
6598         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6599
6600         return 0;
6601 }
6602
6603 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6604 {
6605         vcpu_load(vcpu);
6606         kvm_mmu_unload(vcpu);
6607         vcpu_put(vcpu);
6608 }
6609
6610 static void kvm_free_vcpus(struct kvm *kvm)
6611 {
6612         unsigned int i;
6613         struct kvm_vcpu *vcpu;
6614
6615         /*
6616          * Unpin any mmu pages first.
6617          */
6618         kvm_for_each_vcpu(i, vcpu, kvm) {
6619                 kvm_clear_async_pf_completion_queue(vcpu);
6620                 kvm_unload_vcpu_mmu(vcpu);
6621         }
6622         kvm_for_each_vcpu(i, vcpu, kvm)
6623                 kvm_arch_vcpu_free(vcpu);
6624
6625         mutex_lock(&kvm->lock);
6626         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6627                 kvm->vcpus[i] = NULL;
6628
6629         atomic_set(&kvm->online_vcpus, 0);
6630         mutex_unlock(&kvm->lock);
6631 }
6632
6633 void kvm_arch_sync_events(struct kvm *kvm)
6634 {
6635         kvm_free_all_assigned_devices(kvm);
6636         kvm_free_pit(kvm);
6637 }
6638
6639 void kvm_arch_destroy_vm(struct kvm *kvm)
6640 {
6641         kvm_iommu_unmap_guest(kvm);
6642         kfree(kvm->arch.vpic);
6643         kfree(kvm->arch.vioapic);
6644         kvm_free_vcpus(kvm);
6645         if (kvm->arch.apic_access_page)
6646                 put_page(kvm->arch.apic_access_page);
6647         if (kvm->arch.ept_identity_pagetable)
6648                 put_page(kvm->arch.ept_identity_pagetable);
6649 }
6650
6651 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6652                                 struct kvm_memory_slot *memslot,
6653                                 struct kvm_memory_slot old,
6654                                 struct kvm_userspace_memory_region *mem,
6655                                 int user_alloc)
6656 {
6657         int npages = memslot->npages;
6658         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6659
6660         /* Prevent internal slot pages from being moved by fork()/COW. */
6661         if (memslot->id >= KVM_MEMORY_SLOTS)
6662                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6663
6664         /*To keep backward compatibility with older userspace,
6665          *x86 needs to hanlde !user_alloc case.
6666          */
6667         if (!user_alloc) {
6668                 if (npages && !old.rmap) {
6669                         unsigned long userspace_addr;
6670
6671                         down_write(&current->mm->mmap_sem);
6672                         userspace_addr = do_mmap(NULL, 0,
6673                                                  npages * PAGE_SIZE,
6674                                                  PROT_READ | PROT_WRITE,
6675                                                  map_flags,
6676                                                  0);
6677                         up_write(&current->mm->mmap_sem);
6678
6679                         if (IS_ERR((void *)userspace_addr))
6680                                 return PTR_ERR((void *)userspace_addr);
6681
6682                         memslot->userspace_addr = userspace_addr;
6683                 }
6684         }
6685
6686
6687         return 0;
6688 }
6689
6690 void kvm_arch_commit_memory_region(struct kvm *kvm,
6691                                 struct kvm_userspace_memory_region *mem,
6692                                 struct kvm_memory_slot old,
6693                                 int user_alloc)
6694 {
6695
6696         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6697
6698         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6699                 int ret;
6700
6701                 down_write(&current->mm->mmap_sem);
6702                 ret = do_munmap(current->mm, old.userspace_addr,
6703                                 old.npages * PAGE_SIZE);
6704                 up_write(&current->mm->mmap_sem);
6705                 if (ret < 0)
6706                         printk(KERN_WARNING
6707                                "kvm_vm_ioctl_set_memory_region: "
6708                                "failed to munmap memory\n");
6709         }
6710
6711         if (!kvm->arch.n_requested_mmu_pages)
6712                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6713
6714         spin_lock(&kvm->mmu_lock);
6715         if (nr_mmu_pages)
6716                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6717         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6718         spin_unlock(&kvm->mmu_lock);
6719 }
6720
6721 void kvm_arch_flush_shadow(struct kvm *kvm)
6722 {
6723         kvm_mmu_zap_all(kvm);
6724         kvm_reload_remote_mmus(kvm);
6725 }
6726
6727 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6728 {
6729         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6730                 !vcpu->arch.apf.halted)
6731                 || !list_empty_careful(&vcpu->async_pf.done)
6732                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6733                 || atomic_read(&vcpu->arch.nmi_queued) ||
6734                 (kvm_arch_interrupt_allowed(vcpu) &&
6735                  kvm_cpu_has_interrupt(vcpu));
6736 }
6737
6738 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6739 {
6740         int me;
6741         int cpu = vcpu->cpu;
6742
6743         if (waitqueue_active(&vcpu->wq)) {
6744                 wake_up_interruptible(&vcpu->wq);
6745                 ++vcpu->stat.halt_wakeup;
6746         }
6747
6748         me = get_cpu();
6749         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6750                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6751                         smp_send_reschedule(cpu);
6752         put_cpu();
6753 }
6754
6755 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6756 {
6757         return kvm_x86_ops->interrupt_allowed(vcpu);
6758 }
6759
6760 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6761 {
6762         unsigned long current_rip = kvm_rip_read(vcpu) +
6763                 get_segment_base(vcpu, VCPU_SREG_CS);
6764
6765         return current_rip == linear_rip;
6766 }
6767 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6768
6769 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6770 {
6771         unsigned long rflags;
6772
6773         rflags = kvm_x86_ops->get_rflags(vcpu);
6774         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6775                 rflags &= ~X86_EFLAGS_TF;
6776         return rflags;
6777 }
6778 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6779
6780 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6781 {
6782         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6783             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6784                 rflags |= X86_EFLAGS_TF;
6785         kvm_x86_ops->set_rflags(vcpu, rflags);
6786         kvm_make_request(KVM_REQ_EVENT, vcpu);
6787 }
6788 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6789
6790 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6791 {
6792         int r;
6793
6794         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6795               is_error_page(work->page))
6796                 return;
6797
6798         r = kvm_mmu_reload(vcpu);
6799         if (unlikely(r))
6800                 return;
6801
6802         if (!vcpu->arch.mmu.direct_map &&
6803               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6804                 return;
6805
6806         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6807 }
6808
6809 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6810 {
6811         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6812 }
6813
6814 static inline u32 kvm_async_pf_next_probe(u32 key)
6815 {
6816         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6817 }
6818
6819 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6820 {
6821         u32 key = kvm_async_pf_hash_fn(gfn);
6822
6823         while (vcpu->arch.apf.gfns[key] != ~0)
6824                 key = kvm_async_pf_next_probe(key);
6825
6826         vcpu->arch.apf.gfns[key] = gfn;
6827 }
6828
6829 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6830 {
6831         int i;
6832         u32 key = kvm_async_pf_hash_fn(gfn);
6833
6834         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6835                      (vcpu->arch.apf.gfns[key] != gfn &&
6836                       vcpu->arch.apf.gfns[key] != ~0); i++)
6837                 key = kvm_async_pf_next_probe(key);
6838
6839         return key;
6840 }
6841
6842 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6843 {
6844         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6845 }
6846
6847 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6848 {
6849         u32 i, j, k;
6850
6851         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6852         while (true) {
6853                 vcpu->arch.apf.gfns[i] = ~0;
6854                 do {
6855                         j = kvm_async_pf_next_probe(j);
6856                         if (vcpu->arch.apf.gfns[j] == ~0)
6857                                 return;
6858                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6859                         /*
6860                          * k lies cyclically in ]i,j]
6861                          * |    i.k.j |
6862                          * |....j i.k.| or  |.k..j i...|
6863                          */
6864                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6865                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6866                 i = j;
6867         }
6868 }
6869
6870 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6871 {
6872
6873         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6874                                       sizeof(val));
6875 }
6876
6877 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6878                                      struct kvm_async_pf *work)
6879 {
6880         struct x86_exception fault;
6881
6882         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6883         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6884
6885         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6886             (vcpu->arch.apf.send_user_only &&
6887              kvm_x86_ops->get_cpl(vcpu) == 0))
6888                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6889         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6890                 fault.vector = PF_VECTOR;
6891                 fault.error_code_valid = true;
6892                 fault.error_code = 0;
6893                 fault.nested_page_fault = false;
6894                 fault.address = work->arch.token;
6895                 kvm_inject_page_fault(vcpu, &fault);
6896         }
6897 }
6898
6899 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6900                                  struct kvm_async_pf *work)
6901 {
6902         struct x86_exception fault;
6903
6904         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6905         if (is_error_page(work->page))
6906                 work->arch.token = ~0; /* broadcast wakeup */
6907         else
6908                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6909
6910         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6911             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6912                 fault.vector = PF_VECTOR;
6913                 fault.error_code_valid = true;
6914                 fault.error_code = 0;
6915                 fault.nested_page_fault = false;
6916                 fault.address = work->arch.token;
6917                 kvm_inject_page_fault(vcpu, &fault);
6918         }
6919         vcpu->arch.apf.halted = false;
6920 }
6921
6922 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6923 {
6924         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6925                 return true;
6926         else
6927                 return !kvm_event_needs_reinjection(vcpu) &&
6928                         kvm_x86_ops->interrupt_allowed(vcpu);
6929 }
6930
6931 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6932 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6934 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6935 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6936 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6937 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6938 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6939 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6942 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);