arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 unsigned int min_timer_period_us = 500;
  96 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  97
  98 bool kvm_has_tsc_control;
  99 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 100 u32  kvm_max_guest_tsc_khz;
 101 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (!(xcr0 & XSTATE_FP))
 558                 return 1;
 559         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 560                 return 1;
 561         if (xcr0 & ~host_xcr0)
 562                 return 1;
 563         vcpu->arch.xcr0 = xcr0;
 564         vcpu->guest_xcr0_loaded = 0;
 565         return 0;
 566 }
 567
 568 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 569 {
 570         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 571             __kvm_set_xcr(vcpu, index, xcr)) {
 572                 kvm_inject_gp(vcpu, 0);
 573                 return 1;
 574         }
 575         return 0;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 578
 579 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 580 {
 581         struct kvm_cpuid_entry2 *best;
 582
 583         if (!static_cpu_has(X86_FEATURE_XSAVE))
 584                 return 0;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 588 }
 589
 590 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 591 {
 592         struct kvm_cpuid_entry2 *best;
 593
 594         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 595         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 596 }
 597
 598 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 599 {
 600         struct kvm_cpuid_entry2 *best;
 601
 602         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 603         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 604 }
 605
 606 static void update_cpuid(struct kvm_vcpu *vcpu)
 607 {
 608         struct kvm_cpuid_entry2 *best;
 609         struct kvm_lapic *apic = vcpu->arch.apic;
 610
 611         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 612         if (!best)
 613                 return;
 614
 615         /* Update OSXSAVE bit */
 616         if (cpu_has_xsave && best->function == 0x1) {
 617                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 618                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 619                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 620         }
 621
 622         if (apic) {
 623                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 624                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 625                 else
 626                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 627         }
 628 }
 629
 630 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 631 {
 632         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 633         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 634                                    X86_CR4_PAE | X86_CR4_SMEP;
 635         if (cr4 & CR4_RESERVED_BITS)
 636                 return 1;
 637
 638         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 639                 return 1;
 640
 641         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 642                 return 1;
 643
 644         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 645                 return 1;
 646
 647         if (is_long_mode(vcpu)) {
 648                 if (!(cr4 & X86_CR4_PAE))
 649                         return 1;
 650         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 651                    && ((cr4 ^ old_cr4) & pdptr_bits)
 652                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 653                                    kvm_read_cr3(vcpu)))
 654                 return 1;
 655
 656         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 657                 return 1;
 658
 659         if ((cr4 ^ old_cr4) & pdptr_bits)
 660                 kvm_mmu_reset_context(vcpu);
 661
 662         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 663                 update_cpuid(vcpu);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 668
 669 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 670 {
 671         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 672                 kvm_mmu_sync_roots(vcpu);
 673                 kvm_mmu_flush_tlb(vcpu);
 674                 return 0;
 675         }
 676
 677         if (is_long_mode(vcpu)) {
 678                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 679                         return 1;
 680         } else {
 681                 if (is_pae(vcpu)) {
 682                         if (cr3 & CR3_PAE_RESERVED_BITS)
 683                                 return 1;
 684                         if (is_paging(vcpu) &&
 685                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 686                                 return 1;
 687                 }
 688                 /*
 689                  * We don't check reserved bits in nonpae mode, because
 690                  * this isn't enforced, and VMware depends on this.
 691                  */
 692         }
 693
 694         /*
 695          * Does the new cr3 value map to physical memory? (Note, we
 696          * catch an invalid cr3 even in real-mode, because it would
 697          * cause trouble later on when we turn on paging anyway.)
 698          *
 699          * A real CPU would silently accept an invalid cr3 and would
 700          * attempt to use it - with largely undefined (and often hard
 701          * to debug) behavior on the guest side.
 702          */
 703         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 704                 return 1;
 705         vcpu->arch.cr3 = cr3;
 706         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 707         vcpu->arch.mmu.new_cr3(vcpu);
 708         return 0;
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 711
 712 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 713 {
 714         if (cr8 & CR8_RESERVED_BITS)
 715                 return 1;
 716         if (irqchip_in_kernel(vcpu->kvm))
 717                 kvm_lapic_set_tpr(vcpu, cr8);
 718         else
 719                 vcpu->arch.cr8 = cr8;
 720         return 0;
 721 }
 722 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 723
 724 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 725 {
 726         if (irqchip_in_kernel(vcpu->kvm))
 727                 return kvm_lapic_get_cr8(vcpu);
 728         else
 729                 return vcpu->arch.cr8;
 730 }
 731 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 732
 733 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 734 {
 735         switch (dr) {
 736         case 0 ... 3:
 737                 vcpu->arch.db[dr] = val;
 738                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 739                         vcpu->arch.eff_db[dr] = val;
 740                 break;
 741         case 4:
 742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 743                         return 1; /* #UD */
 744                 /* fall through */
 745         case 6:
 746                 if (val & 0xffffffff00000000ULL)
 747                         return -1; /* #GP */
 748                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 749                 break;
 750         case 5:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1; /* #UD */
 753                 /* fall through */
 754         default: /* 7 */
 755                 if (val & 0xffffffff00000000ULL)
 756                         return -1; /* #GP */
 757                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 758                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 759                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 760                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 761                 }
 762                 break;
 763         }
 764
 765         return 0;
 766 }
 767
 768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 769 {
 770         int res;
 771
 772         res = __kvm_set_dr(vcpu, dr, val);
 773         if (res > 0)
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775         else if (res < 0)
 776                 kvm_inject_gp(vcpu, 0);
 777
 778         return res;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_set_dr);
 781
 782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         switch (dr) {
 785         case 0 ... 3:
 786                 *val = vcpu->arch.db[dr];
 787                 break;
 788         case 4:
 789                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 790                         return 1;
 791                 /* fall through */
 792         case 6:
 793                 *val = vcpu->arch.dr6;
 794                 break;
 795         case 5:
 796                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 797                         return 1;
 798                 /* fall through */
 799         default: /* 7 */
 800                 *val = vcpu->arch.dr7;
 801                 break;
 802         }
 803
 804         return 0;
 805 }
 806
 807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 808 {
 809         if (_kvm_get_dr(vcpu, dr, val)) {
 810                 kvm_queue_exception(vcpu, UD_VECTOR);
 811                 return 1;
 812         }
 813         return 0;
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_get_dr);
 816
 817 /*
 818  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 819  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 820  *
 821  * This list is modified at module load time to reflect the
 822  * capabilities of the host cpu. This capabilities test skips MSRs that are
 823  * kvm-specific. Those are put in the beginning of the list.
 824  */
 825
 826 #define KVM_SAVE_MSRS_BEGIN     9
 827 static u32 msrs_to_save[] = {
 828         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 829         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 830         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 831         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 832         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 833         MSR_STAR,
 834 #ifdef CONFIG_X86_64
 835         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 836 #endif
 837         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 838 };
 839
 840 static unsigned num_msrs_to_save;
 841
 842 static u32 emulated_msrs[] = {
 843         MSR_IA32_TSCDEADLINE,
 844         MSR_IA32_MISC_ENABLE,
 845         MSR_IA32_MCG_STATUS,
 846         MSR_IA32_MCG_CTL,
 847 };
 848
 849 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 850 {
 851         u64 old_efer = vcpu->arch.efer;
 852
 853         if (efer & efer_reserved_bits)
 854                 return 1;
 855
 856         if (is_paging(vcpu)
 857             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 858                 return 1;
 859
 860         if (efer & EFER_FFXSR) {
 861                 struct kvm_cpuid_entry2 *feat;
 862
 863                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 864                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 865                         return 1;
 866         }
 867
 868         if (efer & EFER_SVME) {
 869                 struct kvm_cpuid_entry2 *feat;
 870
 871                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 872                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 873                         return 1;
 874         }
 875
 876         efer &= ~EFER_LMA;
 877         efer |= vcpu->arch.efer & EFER_LMA;
 878
 879         kvm_x86_ops->set_efer(vcpu, efer);
 880
 881         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 882
 883         /* Update reserved bits */
 884         if ((efer ^ old_efer) & EFER_NX)
 885                 kvm_mmu_reset_context(vcpu);
 886
 887         return 0;
 888 }
 889
 890 void kvm_enable_efer_bits(u64 mask)
 891 {
 892        efer_reserved_bits &= ~mask;
 893 }
 894 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 895
 896
 897 /*
 898  * Writes msr value into into the appropriate "register".
 899  * Returns 0 on success, non-0 otherwise.
 900  * Assumes vcpu_load() was already called.
 901  */
 902 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 903 {
 904         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 905 }
 906
 907 /*
 908  * Adapt set_msr() to msr_io()'s calling convention
 909  */
 910 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 911 {
 912         return kvm_set_msr(vcpu, index, *data);
 913 }
 914
 915 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 916 {
 917         int version;
 918         int r;
 919         struct pvclock_wall_clock wc;
 920         struct timespec boot;
 921
 922         if (!wall_clock)
 923                 return;
 924
 925         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 926         if (r)
 927                 return;
 928
 929         if (version & 1)
 930                 ++version;  /* first time write, random junk */
 931
 932         ++version;
 933
 934         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 935
 936         /*
 937          * The guest calculates current wall clock time by adding
 938          * system time (updated by kvm_guest_time_update below) to the
 939          * wall clock specified here.  guest system time equals host
 940          * system time for us, thus we must fill in host boot time here.
 941          */
 942         getboottime(&boot);
 943
 944         wc.sec = boot.tv_sec;
 945         wc.nsec = boot.tv_nsec;
 946         wc.version = version;
 947
 948         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 949
 950         version++;
 951         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 952 }
 953
 954 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 955 {
 956         uint32_t quotient, remainder;
 957
 958         /* Don't try to replace with do_div(), this one calculates
 959          * "(dividend << 32) / divisor" */
 960         __asm__ ( "divl %4"
 961                   : "=a" (quotient), "=d" (remainder)
 962                   : "0" (0), "1" (dividend), "r" (divisor) );
 963         return quotient;
 964 }
 965
 966 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 967                                s8 *pshift, u32 *pmultiplier)
 968 {
 969         uint64_t scaled64;
 970         int32_t  shift = 0;
 971         uint64_t tps64;
 972         uint32_t tps32;
 973
 974         tps64 = base_khz * 1000LL;
 975         scaled64 = scaled_khz * 1000LL;
 976         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 977                 tps64 >>= 1;
 978                 shift--;
 979         }
 980
 981         tps32 = (uint32_t)tps64;
 982         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 983                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 984                         scaled64 >>= 1;
 985                 else
 986                         tps32 <<= 1;
 987                 shift++;
 988         }
 989
 990         *pshift = shift;
 991         *pmultiplier = div_frac(scaled64, tps32);
 992
 993         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 994                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 995 }
 996
 997 static inline u64 get_kernel_ns(void)
 998 {
 999         struct timespec ts;
1000
1001         WARN_ON(preemptible());
1002         ktime_get_ts(&ts);
1003         monotonic_to_bootbased(&ts);
1004         return timespec_to_ns(&ts);
1005 }
1006
1007 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1008 unsigned long max_tsc_khz;
1009
1010 static inline int kvm_tsc_changes_freq(void)
1011 {
1012         int cpu = get_cpu();
1013         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1014                   cpufreq_quick_get(cpu) != 0;
1015         put_cpu();
1016         return ret;
1017 }
1018
1019 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1020 {
1021         if (vcpu->arch.virtual_tsc_khz)
1022                 return vcpu->arch.virtual_tsc_khz;
1023         else
1024                 return __this_cpu_read(cpu_tsc_khz);
1025 }
1026
1027 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1028 {
1029         u64 ret;
1030
1031         WARN_ON(preemptible());
1032         if (kvm_tsc_changes_freq())
1033                 printk_once(KERN_WARNING
1034                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1035         ret = nsec * vcpu_tsc_khz(vcpu);
1036         do_div(ret, USEC_PER_SEC);
1037         return ret;
1038 }
1039
1040 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1041 {
1042         /* Compute a scale to convert nanoseconds in TSC cycles */
1043         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1044                            &vcpu->arch.tsc_catchup_shift,
1045                            &vcpu->arch.tsc_catchup_mult);
1046 }
1047
1048 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1049 {
1050         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1051                                       vcpu->arch.tsc_catchup_mult,
1052                                       vcpu->arch.tsc_catchup_shift);
1053         tsc += vcpu->arch.last_tsc_write;
1054         return tsc;
1055 }
1056
1057 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1058 {
1059         struct kvm *kvm = vcpu->kvm;
1060         u64 offset, ns, elapsed;
1061         unsigned long flags;
1062         s64 sdiff;
1063
1064         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1065         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1066         ns = get_kernel_ns();
1067         elapsed = ns - kvm->arch.last_tsc_nsec;
1068         sdiff = data - kvm->arch.last_tsc_write;
1069         if (sdiff < 0)
1070                 sdiff = -sdiff;
1071
1072         /*
1073          * Special case: close write to TSC within 5 seconds of
1074          * another CPU is interpreted as an attempt to synchronize
1075          * The 5 seconds is to accommodate host load / swapping as
1076          * well as any reset of TSC during the boot process.
1077          *
1078          * In that case, for a reliable TSC, we can match TSC offsets,
1079          * or make a best guest using elapsed value.
1080          */
1081         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1082             elapsed < 5ULL * NSEC_PER_SEC) {
1083                 if (!check_tsc_unstable()) {
1084                         offset = kvm->arch.last_tsc_offset;
1085                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1086                 } else {
1087                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1088                         offset += delta;
1089                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1090                 }
1091                 ns = kvm->arch.last_tsc_nsec;
1092         }
1093         kvm->arch.last_tsc_nsec = ns;
1094         kvm->arch.last_tsc_write = data;
1095         kvm->arch.last_tsc_offset = offset;
1096         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1097         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1098
1099         /* Reset of TSC must disable overshoot protection below */
1100         vcpu->arch.hv_clock.tsc_timestamp = 0;
1101         vcpu->arch.last_tsc_write = data;
1102         vcpu->arch.last_tsc_nsec = ns;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1105
1106 static int kvm_guest_time_update(struct kvm_vcpu *v)
1107 {
1108         unsigned long flags;
1109         struct kvm_vcpu_arch *vcpu = &v->arch;
1110         unsigned long this_tsc_khz;
1111         s64 kernel_ns, max_kernel_ns;
1112         u64 tsc_timestamp;
1113
1114         /* Keep irq disabled to prevent changes to the clock */
1115         local_irq_save(flags);
1116         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1117         kernel_ns = get_kernel_ns();
1118         this_tsc_khz = vcpu_tsc_khz(v);
1119         if (unlikely(this_tsc_khz == 0)) {
1120                 local_irq_restore(flags);
1121                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1122                 return 1;
1123         }
1124
1125         /*
1126          * We may have to catch up the TSC to match elapsed wall clock
1127          * time for two reasons, even if kvmclock is used.
1128          *   1) CPU could have been running below the maximum TSC rate
1129          *   2) Broken TSC compensation resets the base at each VCPU
1130          *      entry to avoid unknown leaps of TSC even when running
1131          *      again on the same CPU.  This may cause apparent elapsed
1132          *      time to disappear, and the guest to stand still or run
1133          *      very slowly.
1134          */
1135         if (vcpu->tsc_catchup) {
1136                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1137                 if (tsc > tsc_timestamp) {
1138                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1139                         tsc_timestamp = tsc;
1140                 }
1141         }
1142
1143         local_irq_restore(flags);
1144
1145         if (!vcpu->pv_time_enabled)
1146                 return 0;
1147
1148         /*
1149          * Time as measured by the TSC may go backwards when resetting the base
1150          * tsc_timestamp.  The reason for this is that the TSC resolution is
1151          * higher than the resolution of the other clock scales.  Thus, many
1152          * possible measurments of the TSC correspond to one measurement of any
1153          * other clock, and so a spread of values is possible.  This is not a
1154          * problem for the computation of the nanosecond clock; with TSC rates
1155          * around 1GHZ, there can only be a few cycles which correspond to one
1156          * nanosecond value, and any path through this code will inevitably
1157          * take longer than that.  However, with the kernel_ns value itself,
1158          * the precision may be much lower, down to HZ granularity.  If the
1159          * first sampling of TSC against kernel_ns ends in the low part of the
1160          * range, and the second in the high end of the range, we can get:
1161          *
1162          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1163          *
1164          * As the sampling errors potentially range in the thousands of cycles,
1165          * it is possible such a time value has already been observed by the
1166          * guest.  To protect against this, we must compute the system time as
1167          * observed by the guest and ensure the new system time is greater.
1168          */
1169         max_kernel_ns = 0;
1170         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1171                 max_kernel_ns = vcpu->last_guest_tsc -
1172                                 vcpu->hv_clock.tsc_timestamp;
1173                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1174                                     vcpu->hv_clock.tsc_to_system_mul,
1175                                     vcpu->hv_clock.tsc_shift);
1176                 max_kernel_ns += vcpu->last_kernel_ns;
1177         }
1178
1179         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1180                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1181                                    &vcpu->hv_clock.tsc_shift,
1182                                    &vcpu->hv_clock.tsc_to_system_mul);
1183                 vcpu->hw_tsc_khz = this_tsc_khz;
1184         }
1185
1186         if (max_kernel_ns > kernel_ns)
1187                 kernel_ns = max_kernel_ns;
1188
1189         /* With all the info we got, fill in the values */
1190         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1191         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1192         vcpu->last_kernel_ns = kernel_ns;
1193         vcpu->last_guest_tsc = tsc_timestamp;
1194         vcpu->hv_clock.flags = 0;
1195
1196         /*
1197          * The interface expects us to write an even number signaling that the
1198          * update is finished. Since the guest won't see the intermediate
1199          * state, we just increase by 2 at the end.
1200          */
1201         vcpu->hv_clock.version += 2;
1202
1203         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1204                                 &vcpu->hv_clock,
1205                                 sizeof(vcpu->hv_clock));
1206         return 0;
1207 }
1208
1209 static bool msr_mtrr_valid(unsigned msr)
1210 {
1211         switch (msr) {
1212         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1213         case MSR_MTRRfix64K_00000:
1214         case MSR_MTRRfix16K_80000:
1215         case MSR_MTRRfix16K_A0000:
1216         case MSR_MTRRfix4K_C0000:
1217         case MSR_MTRRfix4K_C8000:
1218         case MSR_MTRRfix4K_D0000:
1219         case MSR_MTRRfix4K_D8000:
1220         case MSR_MTRRfix4K_E0000:
1221         case MSR_MTRRfix4K_E8000:
1222         case MSR_MTRRfix4K_F0000:
1223         case MSR_MTRRfix4K_F8000:
1224         case MSR_MTRRdefType:
1225         case MSR_IA32_CR_PAT:
1226                 return true;
1227         case 0x2f8:
1228                 return true;
1229         }
1230         return false;
1231 }
1232
1233 static bool valid_pat_type(unsigned t)
1234 {
1235         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1236 }
1237
1238 static bool valid_mtrr_type(unsigned t)
1239 {
1240         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1241 }
1242
1243 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1244 {
1245         int i;
1246
1247         if (!msr_mtrr_valid(msr))
1248                 return false;
1249
1250         if (msr == MSR_IA32_CR_PAT) {
1251                 for (i = 0; i < 8; i++)
1252                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1253                                 return false;
1254                 return true;
1255         } else if (msr == MSR_MTRRdefType) {
1256                 if (data & ~0xcff)
1257                         return false;
1258                 return valid_mtrr_type(data & 0xff);
1259         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1260                 for (i = 0; i < 8 ; i++)
1261                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1262                                 return false;
1263                 return true;
1264         }
1265
1266         /* variable MTRRs */
1267         return valid_mtrr_type(data & 0xff);
1268 }
1269
1270 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1271 {
1272         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1273
1274         if (!mtrr_valid(vcpu, msr, data))
1275                 return 1;
1276
1277         if (msr == MSR_MTRRdefType) {
1278                 vcpu->arch.mtrr_state.def_type = data;
1279                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1280         } else if (msr == MSR_MTRRfix64K_00000)
1281                 p[0] = data;
1282         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1283                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1284         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1285                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1286         else if (msr == MSR_IA32_CR_PAT)
1287                 vcpu->arch.pat = data;
1288         else {  /* Variable MTRRs */
1289                 int idx, is_mtrr_mask;
1290                 u64 *pt;
1291
1292                 idx = (msr - 0x200) / 2;
1293                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1294                 if (!is_mtrr_mask)
1295                         pt =
1296                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1297                 else
1298                         pt =
1299                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1300                 *pt = data;
1301         }
1302
1303         kvm_mmu_reset_context(vcpu);
1304         return 0;
1305 }
1306
1307 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1308 {
1309         u64 mcg_cap = vcpu->arch.mcg_cap;
1310         unsigned bank_num = mcg_cap & 0xff;
1311
1312         switch (msr) {
1313         case MSR_IA32_MCG_STATUS:
1314                 vcpu->arch.mcg_status = data;
1315                 break;
1316         case MSR_IA32_MCG_CTL:
1317                 if (!(mcg_cap & MCG_CTL_P))
1318                         return 1;
1319                 if (data != 0 && data != ~(u64)0)
1320                         return -1;
1321                 vcpu->arch.mcg_ctl = data;
1322                 break;
1323         default:
1324                 if (msr >= MSR_IA32_MC0_CTL &&
1325                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1326                         u32 offset = msr - MSR_IA32_MC0_CTL;
1327                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1328                          * some Linux kernels though clear bit 10 in bank 4 to
1329                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1330                          * this to avoid an uncatched #GP in the guest
1331                          */
1332                         if ((offset & 0x3) == 0 &&
1333                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1334                                 return -1;
1335                         vcpu->arch.mce_banks[offset] = data;
1336                         break;
1337                 }
1338                 return 1;
1339         }
1340         return 0;
1341 }
1342
1343 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1344 {
1345         struct kvm *kvm = vcpu->kvm;
1346         int lm = is_long_mode(vcpu);
1347         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1348                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1349         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1350                 : kvm->arch.xen_hvm_config.blob_size_32;
1351         u32 page_num = data & ~PAGE_MASK;
1352         u64 page_addr = data & PAGE_MASK;
1353         u8 *page;
1354         int r;
1355
1356         r = -E2BIG;
1357         if (page_num >= blob_size)
1358                 goto out;
1359         r = -ENOMEM;
1360         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1361         if (!page)
1362                 goto out;
1363         r = -EFAULT;
1364         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1365                 goto out_free;
1366         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1367                 goto out_free;
1368         r = 0;
1369 out_free:
1370         kfree(page);
1371 out:
1372         return r;
1373 }
1374
1375 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1376 {
1377         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1378 }
1379
1380 static bool kvm_hv_msr_partition_wide(u32 msr)
1381 {
1382         bool r = false;
1383         switch (msr) {
1384         case HV_X64_MSR_GUEST_OS_ID:
1385         case HV_X64_MSR_HYPERCALL:
1386                 r = true;
1387                 break;
1388         }
1389
1390         return r;
1391 }
1392
1393 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1394 {
1395         struct kvm *kvm = vcpu->kvm;
1396
1397         switch (msr) {
1398         case HV_X64_MSR_GUEST_OS_ID:
1399                 kvm->arch.hv_guest_os_id = data;
1400                 /* setting guest os id to zero disables hypercall page */
1401                 if (!kvm->arch.hv_guest_os_id)
1402                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1403                 break;
1404         case HV_X64_MSR_HYPERCALL: {
1405                 u64 gfn;
1406                 unsigned long addr;
1407                 u8 instructions[4];
1408
1409                 /* if guest os id is not set hypercall should remain disabled */
1410                 if (!kvm->arch.hv_guest_os_id)
1411                         break;
1412                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1413                         kvm->arch.hv_hypercall = data;
1414                         break;
1415                 }
1416                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1417                 addr = gfn_to_hva(kvm, gfn);
1418                 if (kvm_is_error_hva(addr))
1419                         return 1;
1420                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1421                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1422                 if (__copy_to_user((void __user *)addr, instructions, 4))
1423                         return 1;
1424                 kvm->arch.hv_hypercall = data;
1425                 break;
1426         }
1427         default:
1428                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1429                           "data 0x%llx\n", msr, data);
1430                 return 1;
1431         }
1432         return 0;
1433 }
1434
1435 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1436 {
1437         switch (msr) {
1438         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1439                 unsigned long addr;
1440
1441                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1442                         vcpu->arch.hv_vapic = data;
1443                         break;
1444                 }
1445                 addr = gfn_to_hva(vcpu->kvm, data >>
1446                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1447                 if (kvm_is_error_hva(addr))
1448                         return 1;
1449                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1450                         return 1;
1451                 vcpu->arch.hv_vapic = data;
1452                 break;
1453         }
1454         case HV_X64_MSR_EOI:
1455                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1456         case HV_X64_MSR_ICR:
1457                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1458         case HV_X64_MSR_TPR:
1459                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1460         default:
1461                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1462                           "data 0x%llx\n", msr, data);
1463                 return 1;
1464         }
1465
1466         return 0;
1467 }
1468
1469 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1470 {
1471         gpa_t gpa = data & ~0x3f;
1472
1473         /* Bits 2:5 are resrved, Should be zero */
1474         if (data & 0x3c)
1475                 return 1;
1476
1477         vcpu->arch.apf.msr_val = data;
1478
1479         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1480                 kvm_clear_async_pf_completion_queue(vcpu);
1481                 kvm_async_pf_hash_reset(vcpu);
1482                 return 0;
1483         }
1484
1485         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1486                                         sizeof(u32)))
1487                 return 1;
1488
1489         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1490         kvm_async_pf_wakeup_all(vcpu);
1491         return 0;
1492 }
1493
1494 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1495 {
1496         vcpu->arch.pv_time_enabled = false;
1497 }
1498
1499 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1500 {
1501         u64 delta;
1502
1503         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1504                 return;
1505
1506         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1507         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1508         vcpu->arch.st.accum_steal = delta;
1509 }
1510
1511 static void record_steal_time(struct kvm_vcpu *vcpu)
1512 {
1513         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1514                 return;
1515
1516         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1518                 return;
1519
1520         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1521         vcpu->arch.st.steal.version += 2;
1522         vcpu->arch.st.accum_steal = 0;
1523
1524         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1525                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1526 }
1527
1528 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1529 {
1530         switch (msr) {
1531         case MSR_EFER:
1532                 return set_efer(vcpu, data);
1533         case MSR_K7_HWCR:
1534                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1535                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1536                 if (data != 0) {
1537                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1538                                 data);
1539                         return 1;
1540                 }
1541                 break;
1542         case MSR_FAM10H_MMIO_CONF_BASE:
1543                 if (data != 0) {
1544                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1545                                 "0x%llx\n", data);
1546                         return 1;
1547                 }
1548                 break;
1549         case MSR_AMD64_NB_CFG:
1550                 break;
1551         case MSR_IA32_DEBUGCTLMSR:
1552                 if (!data) {
1553                         /* We support the non-activated case already */
1554                         break;
1555                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1556                         /* Values other than LBR and BTF are vendor-specific,
1557                            thus reserved and should throw a #GP */
1558                         return 1;
1559                 }
1560                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1561                         __func__, data);
1562                 break;
1563         case MSR_IA32_UCODE_REV:
1564         case MSR_IA32_UCODE_WRITE:
1565         case MSR_VM_HSAVE_PA:
1566         case MSR_AMD64_PATCH_LOADER:
1567                 break;
1568         case 0x200 ... 0x2ff:
1569                 return set_msr_mtrr(vcpu, msr, data);
1570         case MSR_IA32_APICBASE:
1571                 kvm_set_apic_base(vcpu, data);
1572                 break;
1573         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1574                 return kvm_x2apic_msr_write(vcpu, msr, data);
1575         case MSR_IA32_TSCDEADLINE:
1576                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1577                 break;
1578         case MSR_IA32_MISC_ENABLE:
1579                 vcpu->arch.ia32_misc_enable_msr = data;
1580                 break;
1581         case MSR_KVM_WALL_CLOCK_NEW:
1582         case MSR_KVM_WALL_CLOCK:
1583                 vcpu->kvm->arch.wall_clock = data;
1584                 kvm_write_wall_clock(vcpu->kvm, data);
1585                 break;
1586         case MSR_KVM_SYSTEM_TIME_NEW:
1587         case MSR_KVM_SYSTEM_TIME: {
1588                 u64 gpa_offset;
1589                 kvmclock_reset(vcpu);
1590
1591                 vcpu->arch.time = data;
1592                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1593
1594                 /* we verify if the enable bit is set... */
1595                 if (!(data & 1))
1596                         break;
1597
1598                 gpa_offset = data & ~(PAGE_MASK | 1);
1599
1600                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1601                      &vcpu->arch.pv_time, data & ~1ULL,
1602                      sizeof(struct pvclock_vcpu_time_info)))
1603                         vcpu->arch.pv_time_enabled = false;
1604                 else
1605                         vcpu->arch.pv_time_enabled = true;
1606                 break;
1607         }
1608         case MSR_KVM_ASYNC_PF_EN:
1609                 if (kvm_pv_enable_async_pf(vcpu, data))
1610                         return 1;
1611                 break;
1612         case MSR_KVM_STEAL_TIME:
1613
1614                 if (unlikely(!sched_info_on()))
1615                         return 1;
1616
1617                 if (data & KVM_STEAL_RESERVED_MASK)
1618                         return 1;
1619
1620                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1621                                                 data & KVM_STEAL_VALID_BITS,
1622                                                 sizeof(struct kvm_steal_time)))
1623                         return 1;
1624
1625                 vcpu->arch.st.msr_val = data;
1626
1627                 if (!(data & KVM_MSR_ENABLED))
1628                         break;
1629
1630                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1631
1632                 preempt_disable();
1633                 accumulate_steal_time(vcpu);
1634                 preempt_enable();
1635
1636                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1637
1638                 break;
1639
1640         case MSR_IA32_MCG_CTL:
1641         case MSR_IA32_MCG_STATUS:
1642         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1643                 return set_msr_mce(vcpu, msr, data);
1644
1645         /* Performance counters are not protected by a CPUID bit,
1646          * so we should check all of them in the generic path for the sake of
1647          * cross vendor migration.
1648          * Writing a zero into the event select MSRs disables them,
1649          * which we perfectly emulate ;-). Any other value should be at least
1650          * reported, some guests depend on them.
1651          */
1652         case MSR_P6_EVNTSEL0:
1653         case MSR_P6_EVNTSEL1:
1654         case MSR_K7_EVNTSEL0:
1655         case MSR_K7_EVNTSEL1:
1656         case MSR_K7_EVNTSEL2:
1657         case MSR_K7_EVNTSEL3:
1658                 if (data != 0)
1659                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1660                                 "0x%x data 0x%llx\n", msr, data);
1661                 break;
1662         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1663          * so we ignore writes to make it happy.
1664          */
1665         case MSR_P6_PERFCTR0:
1666         case MSR_P6_PERFCTR1:
1667         case MSR_K7_PERFCTR0:
1668         case MSR_K7_PERFCTR1:
1669         case MSR_K7_PERFCTR2:
1670         case MSR_K7_PERFCTR3:
1671                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1672                         "0x%x data 0x%llx\n", msr, data);
1673                 break;
1674         case MSR_K7_CLK_CTL:
1675                 /*
1676                  * Ignore all writes to this no longer documented MSR.
1677                  * Writes are only relevant for old K7 processors,
1678                  * all pre-dating SVM, but a recommended workaround from
1679                  * AMD for these chips. It is possible to speicify the
1680                  * affected processor models on the command line, hence
1681                  * the need to ignore the workaround.
1682                  */
1683                 break;
1684         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1685                 if (kvm_hv_msr_partition_wide(msr)) {
1686                         int r;
1687                         mutex_lock(&vcpu->kvm->lock);
1688                         r = set_msr_hyperv_pw(vcpu, msr, data);
1689                         mutex_unlock(&vcpu->kvm->lock);
1690                         return r;
1691                 } else
1692                         return set_msr_hyperv(vcpu, msr, data);
1693                 break;
1694         case MSR_IA32_BBL_CR_CTL3:
1695                 /* Drop writes to this legacy MSR -- see rdmsr
1696                  * counterpart for further detail.
1697                  */
1698                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1699                 break;
1700         default:
1701                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1702                         return xen_hvm_config(vcpu, data);
1703                 if (!ignore_msrs) {
1704                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1705                                 msr, data);
1706                         return 1;
1707                 } else {
1708                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1709                                 msr, data);
1710                         break;
1711                 }
1712         }
1713         return 0;
1714 }
1715 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1716
1717
1718 /*
1719  * Reads an msr value (of 'msr_index') into 'pdata'.
1720  * Returns 0 on success, non-0 otherwise.
1721  * Assumes vcpu_load() was already called.
1722  */
1723 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1724 {
1725         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1726 }
1727
1728 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1729 {
1730         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1731
1732         if (!msr_mtrr_valid(msr))
1733                 return 1;
1734
1735         if (msr == MSR_MTRRdefType)
1736                 *pdata = vcpu->arch.mtrr_state.def_type +
1737                          (vcpu->arch.mtrr_state.enabled << 10);
1738         else if (msr == MSR_MTRRfix64K_00000)
1739                 *pdata = p[0];
1740         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1741                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1742         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1743                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1744         else if (msr == MSR_IA32_CR_PAT)
1745                 *pdata = vcpu->arch.pat;
1746         else {  /* Variable MTRRs */
1747                 int idx, is_mtrr_mask;
1748                 u64 *pt;
1749
1750                 idx = (msr - 0x200) / 2;
1751                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1752                 if (!is_mtrr_mask)
1753                         pt =
1754                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1755                 else
1756                         pt =
1757                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1758                 *pdata = *pt;
1759         }
1760
1761         return 0;
1762 }
1763
1764 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1765 {
1766         u64 data;
1767         u64 mcg_cap = vcpu->arch.mcg_cap;
1768         unsigned bank_num = mcg_cap & 0xff;
1769
1770         switch (msr) {
1771         case MSR_IA32_P5_MC_ADDR:
1772         case MSR_IA32_P5_MC_TYPE:
1773                 data = 0;
1774                 break;
1775         case MSR_IA32_MCG_CAP:
1776                 data = vcpu->arch.mcg_cap;
1777                 break;
1778         case MSR_IA32_MCG_CTL:
1779                 if (!(mcg_cap & MCG_CTL_P))
1780                         return 1;
1781                 data = vcpu->arch.mcg_ctl;
1782                 break;
1783         case MSR_IA32_MCG_STATUS:
1784                 data = vcpu->arch.mcg_status;
1785                 break;
1786         default:
1787                 if (msr >= MSR_IA32_MC0_CTL &&
1788                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1789                         u32 offset = msr - MSR_IA32_MC0_CTL;
1790                         data = vcpu->arch.mce_banks[offset];
1791                         break;
1792                 }
1793                 return 1;
1794         }
1795         *pdata = data;
1796         return 0;
1797 }
1798
1799 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1800 {
1801         u64 data = 0;
1802         struct kvm *kvm = vcpu->kvm;
1803
1804         switch (msr) {
1805         case HV_X64_MSR_GUEST_OS_ID:
1806                 data = kvm->arch.hv_guest_os_id;
1807                 break;
1808         case HV_X64_MSR_HYPERCALL:
1809                 data = kvm->arch.hv_hypercall;
1810                 break;
1811         default:
1812                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1813                 return 1;
1814         }
1815
1816         *pdata = data;
1817         return 0;
1818 }
1819
1820 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1821 {
1822         u64 data = 0;
1823
1824         switch (msr) {
1825         case HV_X64_MSR_VP_INDEX: {
1826                 int r;
1827                 struct kvm_vcpu *v;
1828                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1829                         if (v == vcpu)
1830                                 data = r;
1831                 break;
1832         }
1833         case HV_X64_MSR_EOI:
1834                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1835         case HV_X64_MSR_ICR:
1836                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1837         case HV_X64_MSR_TPR:
1838                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1839         case HV_X64_MSR_APIC_ASSIST_PAGE:
1840                 data = vcpu->arch.hv_vapic;
1841                 break;
1842         default:
1843                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1844                 return 1;
1845         }
1846         *pdata = data;
1847         return 0;
1848 }
1849
1850 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1851 {
1852         u64 data;
1853
1854         switch (msr) {
1855         case MSR_IA32_PLATFORM_ID:
1856         case MSR_IA32_EBL_CR_POWERON:
1857         case MSR_IA32_DEBUGCTLMSR:
1858         case MSR_IA32_LASTBRANCHFROMIP:
1859         case MSR_IA32_LASTBRANCHTOIP:
1860         case MSR_IA32_LASTINTFROMIP:
1861         case MSR_IA32_LASTINTTOIP:
1862         case MSR_K8_SYSCFG:
1863         case MSR_K7_HWCR:
1864         case MSR_VM_HSAVE_PA:
1865         case MSR_P6_PERFCTR0:
1866         case MSR_P6_PERFCTR1:
1867         case MSR_P6_EVNTSEL0:
1868         case MSR_P6_EVNTSEL1:
1869         case MSR_K7_EVNTSEL0:
1870         case MSR_K7_PERFCTR0:
1871         case MSR_K8_INT_PENDING_MSG:
1872         case MSR_AMD64_NB_CFG:
1873         case MSR_FAM10H_MMIO_CONF_BASE:
1874                 data = 0;
1875                 break;
1876         case MSR_IA32_UCODE_REV:
1877                 data = 0x100000000ULL;
1878                 break;
1879         case MSR_MTRRcap:
1880                 data = 0x500 | KVM_NR_VAR_MTRR;
1881                 break;
1882         case 0x200 ... 0x2ff:
1883                 return get_msr_mtrr(vcpu, msr, pdata);
1884         case 0xcd: /* fsb frequency */
1885                 data = 3;
1886                 break;
1887                 /*
1888                  * MSR_EBC_FREQUENCY_ID
1889                  * Conservative value valid for even the basic CPU models.
1890                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1891                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1892                  * and 266MHz for model 3, or 4. Set Core Clock
1893                  * Frequency to System Bus Frequency Ratio to 1 (bits
1894                  * 31:24) even though these are only valid for CPU
1895                  * models > 2, however guests may end up dividing or
1896                  * multiplying by zero otherwise.
1897                  */
1898         case MSR_EBC_FREQUENCY_ID:
1899                 data = 1 << 24;
1900                 break;
1901         case MSR_IA32_APICBASE:
1902                 data = kvm_get_apic_base(vcpu);
1903                 break;
1904         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1905                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1906                 break;
1907         case MSR_IA32_TSCDEADLINE:
1908                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1909                 break;
1910         case MSR_IA32_MISC_ENABLE:
1911                 data = vcpu->arch.ia32_misc_enable_msr;
1912                 break;
1913         case MSR_IA32_PERF_STATUS:
1914                 /* TSC increment by tick */
1915                 data = 1000ULL;
1916                 /* CPU multiplier */
1917                 data |= (((uint64_t)4ULL) << 40);
1918                 break;
1919         case MSR_EFER:
1920                 data = vcpu->arch.efer;
1921                 break;
1922         case MSR_KVM_WALL_CLOCK:
1923         case MSR_KVM_WALL_CLOCK_NEW:
1924                 data = vcpu->kvm->arch.wall_clock;
1925                 break;
1926         case MSR_KVM_SYSTEM_TIME:
1927         case MSR_KVM_SYSTEM_TIME_NEW:
1928                 data = vcpu->arch.time;
1929                 break;
1930         case MSR_KVM_ASYNC_PF_EN:
1931                 data = vcpu->arch.apf.msr_val;
1932                 break;
1933         case MSR_KVM_STEAL_TIME:
1934                 data = vcpu->arch.st.msr_val;
1935                 break;
1936         case MSR_IA32_P5_MC_ADDR:
1937         case MSR_IA32_P5_MC_TYPE:
1938         case MSR_IA32_MCG_CAP:
1939         case MSR_IA32_MCG_CTL:
1940         case MSR_IA32_MCG_STATUS:
1941         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1942                 return get_msr_mce(vcpu, msr, pdata);
1943         case MSR_K7_CLK_CTL:
1944                 /*
1945                  * Provide expected ramp-up count for K7. All other
1946                  * are set to zero, indicating minimum divisors for
1947                  * every field.
1948                  *
1949                  * This prevents guest kernels on AMD host with CPU
1950                  * type 6, model 8 and higher from exploding due to
1951                  * the rdmsr failing.
1952                  */
1953                 data = 0x20000000;
1954                 break;
1955         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1956                 if (kvm_hv_msr_partition_wide(msr)) {
1957                         int r;
1958                         mutex_lock(&vcpu->kvm->lock);
1959                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1960                         mutex_unlock(&vcpu->kvm->lock);
1961                         return r;
1962                 } else
1963                         return get_msr_hyperv(vcpu, msr, pdata);
1964                 break;
1965         case MSR_IA32_BBL_CR_CTL3:
1966                 /* This legacy MSR exists but isn't fully documented in current
1967                  * silicon.  It is however accessed by winxp in very narrow
1968                  * scenarios where it sets bit #19, itself documented as
1969                  * a "reserved" bit.  Best effort attempt to source coherent
1970                  * read data here should the balance of the register be
1971                  * interpreted by the guest:
1972                  *
1973                  * L2 cache control register 3: 64GB range, 256KB size,
1974                  * enabled, latency 0x1, configured
1975                  */
1976                 data = 0xbe702111;
1977                 break;
1978         default:
1979                 if (!ignore_msrs) {
1980                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1981                         return 1;
1982                 } else {
1983                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1984                         data = 0;
1985                 }
1986                 break;
1987         }
1988         *pdata = data;
1989         return 0;
1990 }
1991 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1992
1993 /*
1994  * Read or write a bunch of msrs. All parameters are kernel addresses.
1995  *
1996  * @return number of msrs set successfully.
1997  */
1998 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1999                     struct kvm_msr_entry *entries,
2000                     int (*do_msr)(struct kvm_vcpu *vcpu,
2001                                   unsigned index, u64 *data))
2002 {
2003         int i, idx;
2004
2005         idx = srcu_read_lock(&vcpu->kvm->srcu);
2006         for (i = 0; i < msrs->nmsrs; ++i)
2007                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2008                         break;
2009         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2010
2011         return i;
2012 }
2013
2014 /*
2015  * Read or write a bunch of msrs. Parameters are user addresses.
2016  *
2017  * @return number of msrs set successfully.
2018  */
2019 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2020                   int (*do_msr)(struct kvm_vcpu *vcpu,
2021                                 unsigned index, u64 *data),
2022                   int writeback)
2023 {
2024         struct kvm_msrs msrs;
2025         struct kvm_msr_entry *entries;
2026         int r, n;
2027         unsigned size;
2028
2029         r = -EFAULT;
2030         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2031                 goto out;
2032
2033         r = -E2BIG;
2034         if (msrs.nmsrs >= MAX_IO_MSRS)
2035                 goto out;
2036
2037         r = -ENOMEM;
2038         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2039         entries = kmalloc(size, GFP_KERNEL);
2040         if (!entries)
2041                 goto out;
2042
2043         r = -EFAULT;
2044         if (copy_from_user(entries, user_msrs->entries, size))
2045                 goto out_free;
2046
2047         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2048         if (r < 0)
2049                 goto out_free;
2050
2051         r = -EFAULT;
2052         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2053                 goto out_free;
2054
2055         r = n;
2056
2057 out_free:
2058         kfree(entries);
2059 out:
2060         return r;
2061 }
2062
2063 int kvm_dev_ioctl_check_extension(long ext)
2064 {
2065         int r;
2066
2067         switch (ext) {
2068         case KVM_CAP_IRQCHIP:
2069         case KVM_CAP_HLT:
2070         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2071         case KVM_CAP_SET_TSS_ADDR:
2072         case KVM_CAP_EXT_CPUID:
2073         case KVM_CAP_CLOCKSOURCE:
2074         case KVM_CAP_PIT:
2075         case KVM_CAP_NOP_IO_DELAY:
2076         case KVM_CAP_MP_STATE:
2077         case KVM_CAP_SYNC_MMU:
2078         case KVM_CAP_USER_NMI:
2079         case KVM_CAP_REINJECT_CONTROL:
2080         case KVM_CAP_IRQ_INJECT_STATUS:
2081         case KVM_CAP_ASSIGN_DEV_IRQ:
2082         case KVM_CAP_IRQFD:
2083         case KVM_CAP_IOEVENTFD:
2084         case KVM_CAP_PIT2:
2085         case KVM_CAP_PIT_STATE2:
2086         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2087         case KVM_CAP_XEN_HVM:
2088         case KVM_CAP_ADJUST_CLOCK:
2089         case KVM_CAP_VCPU_EVENTS:
2090         case KVM_CAP_HYPERV:
2091         case KVM_CAP_HYPERV_VAPIC:
2092         case KVM_CAP_HYPERV_SPIN:
2093         case KVM_CAP_PCI_SEGMENT:
2094         case KVM_CAP_DEBUGREGS:
2095         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2096         case KVM_CAP_XSAVE:
2097         case KVM_CAP_ASYNC_PF:
2098         case KVM_CAP_GET_TSC_KHZ:
2099                 r = 1;
2100                 break;
2101         case KVM_CAP_COALESCED_MMIO:
2102                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2103                 break;
2104         case KVM_CAP_VAPIC:
2105                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2106                 break;
2107         case KVM_CAP_NR_VCPUS:
2108                 r = KVM_SOFT_MAX_VCPUS;
2109                 break;
2110         case KVM_CAP_MAX_VCPUS:
2111                 r = KVM_MAX_VCPUS;
2112                 break;
2113         case KVM_CAP_NR_MEMSLOTS:
2114                 r = KVM_MEMORY_SLOTS;
2115                 break;
2116         case KVM_CAP_PV_MMU:    /* obsolete */
2117                 r = 0;
2118                 break;
2119         case KVM_CAP_IOMMU:
2120                 r = iommu_present(&pci_bus_type);
2121                 break;
2122         case KVM_CAP_MCE:
2123                 r = KVM_MAX_MCE_BANKS;
2124                 break;
2125         case KVM_CAP_XCRS:
2126                 r = cpu_has_xsave;
2127                 break;
2128         case KVM_CAP_TSC_CONTROL:
2129                 r = kvm_has_tsc_control;
2130                 break;
2131         case KVM_CAP_TSC_DEADLINE_TIMER:
2132                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2133                 break;
2134         default:
2135                 r = 0;
2136                 break;
2137         }
2138         return r;
2139
2140 }
2141
2142 long kvm_arch_dev_ioctl(struct file *filp,
2143                         unsigned int ioctl, unsigned long arg)
2144 {
2145         void __user *argp = (void __user *)arg;
2146         long r;
2147
2148         switch (ioctl) {
2149         case KVM_GET_MSR_INDEX_LIST: {
2150                 struct kvm_msr_list __user *user_msr_list = argp;
2151                 struct kvm_msr_list msr_list;
2152                 unsigned n;
2153
2154                 r = -EFAULT;
2155                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2156                         goto out;
2157                 n = msr_list.nmsrs;
2158                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2159                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2160                         goto out;
2161                 r = -E2BIG;
2162                 if (n < msr_list.nmsrs)
2163                         goto out;
2164                 r = -EFAULT;
2165                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2166                                  num_msrs_to_save * sizeof(u32)))
2167                         goto out;
2168                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2169                                  &emulated_msrs,
2170                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2171                         goto out;
2172                 r = 0;
2173                 break;
2174         }
2175         case KVM_GET_SUPPORTED_CPUID: {
2176                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2177                 struct kvm_cpuid2 cpuid;
2178
2179                 r = -EFAULT;
2180                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2181                         goto out;
2182                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2183                                                       cpuid_arg->entries);
2184                 if (r)
2185                         goto out;
2186
2187                 r = -EFAULT;
2188                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2189                         goto out;
2190                 r = 0;
2191                 break;
2192         }
2193         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2194                 u64 mce_cap;
2195
2196                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2197                 r = -EFAULT;
2198                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2199                         goto out;
2200                 r = 0;
2201                 break;
2202         }
2203         default:
2204                 r = -EINVAL;
2205         }
2206 out:
2207         return r;
2208 }
2209
2210 static void wbinvd_ipi(void *garbage)
2211 {
2212         wbinvd();
2213 }
2214
2215 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2216 {
2217         return vcpu->kvm->arch.iommu_domain &&
2218                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2219 }
2220
2221 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2222 {
2223         /* Address WBINVD may be executed by guest */
2224         if (need_emulate_wbinvd(vcpu)) {
2225                 if (kvm_x86_ops->has_wbinvd_exit())
2226                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2227                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2228                         smp_call_function_single(vcpu->cpu,
2229                                         wbinvd_ipi, NULL, 1);
2230         }
2231
2232         kvm_x86_ops->vcpu_load(vcpu, cpu);
2233         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2234                 /* Make sure TSC doesn't go backwards */
2235                 s64 tsc_delta;
2236                 u64 tsc;
2237
2238                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2239                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2240                              tsc - vcpu->arch.last_guest_tsc;
2241
2242                 if (tsc_delta < 0)
2243                         mark_tsc_unstable("KVM discovered backwards TSC");
2244                 if (check_tsc_unstable()) {
2245                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2246                         vcpu->arch.tsc_catchup = 1;
2247                 }
2248                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2249                 if (vcpu->cpu != cpu)
2250                         kvm_migrate_timers(vcpu);
2251                 vcpu->cpu = cpu;
2252         }
2253
2254         accumulate_steal_time(vcpu);
2255         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2256 }
2257
2258 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2259 {
2260         kvm_x86_ops->vcpu_put(vcpu);
2261         kvm_put_guest_fpu(vcpu);
2262         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2263 }
2264
2265 static int is_efer_nx(void)
2266 {
2267         unsigned long long efer = 0;
2268
2269         rdmsrl_safe(MSR_EFER, &efer);
2270         return efer & EFER_NX;
2271 }
2272
2273 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2274 {
2275         int i;
2276         struct kvm_cpuid_entry2 *e, *entry;
2277
2278         entry = NULL;
2279         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2280                 e = &vcpu->arch.cpuid_entries[i];
2281                 if (e->function == 0x80000001) {
2282                         entry = e;
2283                         break;
2284                 }
2285         }
2286         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2287                 entry->edx &= ~(1 << 20);
2288                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2289         }
2290 }
2291
2292 /* when an old userspace process fills a new kernel module */
2293 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2294                                     struct kvm_cpuid *cpuid,
2295                                     struct kvm_cpuid_entry __user *entries)
2296 {
2297         int r, i;
2298         struct kvm_cpuid_entry *cpuid_entries;
2299
2300         r = -E2BIG;
2301         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2302                 goto out;
2303         r = -ENOMEM;
2304         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2305         if (!cpuid_entries)
2306                 goto out;
2307         r = -EFAULT;
2308         if (copy_from_user(cpuid_entries, entries,
2309                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2310                 goto out_free;
2311         for (i = 0; i < cpuid->nent; i++) {
2312                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2313                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2314                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2315                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2316                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2317                 vcpu->arch.cpuid_entries[i].index = 0;
2318                 vcpu->arch.cpuid_entries[i].flags = 0;
2319                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2320                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2321                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2322         }
2323         vcpu->arch.cpuid_nent = cpuid->nent;
2324         cpuid_fix_nx_cap(vcpu);
2325         r = 0;
2326         kvm_apic_set_version(vcpu);
2327         kvm_x86_ops->cpuid_update(vcpu);
2328         update_cpuid(vcpu);
2329
2330 out_free:
2331         vfree(cpuid_entries);
2332 out:
2333         return r;
2334 }
2335
2336 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2337                                      struct kvm_cpuid2 *cpuid,
2338                                      struct kvm_cpuid_entry2 __user *entries)
2339 {
2340         int r;
2341
2342         r = -E2BIG;
2343         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2344                 goto out;
2345         r = -EFAULT;
2346         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2347                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2348                 goto out;
2349         vcpu->arch.cpuid_nent = cpuid->nent;
2350         kvm_apic_set_version(vcpu);
2351         kvm_x86_ops->cpuid_update(vcpu);
2352         update_cpuid(vcpu);
2353         return 0;
2354
2355 out:
2356         return r;
2357 }
2358
2359 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2360                                      struct kvm_cpuid2 *cpuid,
2361                                      struct kvm_cpuid_entry2 __user *entries)
2362 {
2363         int r;
2364
2365         r = -E2BIG;
2366         if (cpuid->nent < vcpu->arch.cpuid_nent)
2367                 goto out;
2368         r = -EFAULT;
2369         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2370                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2371                 goto out;
2372         return 0;
2373
2374 out:
2375         cpuid->nent = vcpu->arch.cpuid_nent;
2376         return r;
2377 }
2378
2379 static void cpuid_mask(u32 *word, int wordnum)
2380 {
2381         *word &= boot_cpu_data.x86_capability[wordnum];
2382 }
2383
2384 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2385                            u32 index)
2386 {
2387         entry->function = function;
2388         entry->index = index;
2389         cpuid_count(entry->function, entry->index,
2390                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2391         entry->flags = 0;
2392 }
2393
2394 static bool supported_xcr0_bit(unsigned bit)
2395 {
2396         u64 mask = ((u64)1 << bit);
2397
2398         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2399 }
2400
2401 #define F(x) bit(X86_FEATURE_##x)
2402
2403 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2404                          u32 index, int *nent, int maxnent)
2405 {
2406         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2407 #ifdef CONFIG_X86_64
2408         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2409                                 ? F(GBPAGES) : 0;
2410         unsigned f_lm = F(LM);
2411 #else
2412         unsigned f_gbpages = 0;
2413         unsigned f_lm = 0;
2414 #endif
2415         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2416
2417         /* cpuid 1.edx */
2418         const u32 kvm_supported_word0_x86_features =
2419                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2420                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2421                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2422                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2423                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2424                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2425                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2426                 0 /* HTT, TM, Reserved, PBE */;
2427         /* cpuid 0x80000001.edx */
2428         const u32 kvm_supported_word1_x86_features =
2429                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2430                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2431                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2432                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2433                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2434                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2435                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2436                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2437         /* cpuid 1.ecx */
2438         const u32 kvm_supported_word4_x86_features =
2439                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2440                 0 /* DS-CPL, VMX, SMX, EST */ |
2441                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2442                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2443                 0 /* Reserved, DCA */ | F(XMM4_1) |
2444                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2445                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2446                 F(F16C) | F(RDRAND);
2447         /* cpuid 0x80000001.ecx */
2448         const u32 kvm_supported_word6_x86_features =
2449                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2450                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2451                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2452                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2453
2454         /* cpuid 0xC0000001.edx */
2455         const u32 kvm_supported_word5_x86_features =
2456                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2457                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2458                 F(PMM) | F(PMM_EN);
2459
2460         /* cpuid 7.0.ebx */
2461         const u32 kvm_supported_word9_x86_features =
2462                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2463
2464         /* all calls to cpuid_count() should be made on the same cpu */
2465         get_cpu();
2466         do_cpuid_1_ent(entry, function, index);
2467         ++*nent;
2468
2469         switch (function) {
2470         case 0:
2471                 entry->eax = min(entry->eax, (u32)0xd);
2472                 break;
2473         case 1:
2474                 entry->edx &= kvm_supported_word0_x86_features;
2475                 cpuid_mask(&entry->edx, 0);
2476                 entry->ecx &= kvm_supported_word4_x86_features;
2477                 cpuid_mask(&entry->ecx, 4);
2478                 /* we support x2apic emulation even if host does not support
2479                  * it since we emulate x2apic in software */
2480                 entry->ecx |= F(X2APIC);
2481                 break;
2482         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2483          * may return different values. This forces us to get_cpu() before
2484          * issuing the first command, and also to emulate this annoying behavior
2485          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2486         case 2: {
2487                 int t, times = entry->eax & 0xff;
2488
2489                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2490                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2491                 for (t = 1; t < times && *nent < maxnent; ++t) {
2492                         do_cpuid_1_ent(&entry[t], function, 0);
2493                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2494                         ++*nent;
2495                 }
2496                 break;
2497         }
2498         /* function 4 has additional index. */
2499         case 4: {
2500                 int i, cache_type;
2501
2502                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2503                 /* read more entries until cache_type is zero */
2504                 for (i = 1; *nent < maxnent; ++i) {
2505                         cache_type = entry[i - 1].eax & 0x1f;
2506                         if (!cache_type)
2507                                 break;
2508                         do_cpuid_1_ent(&entry[i], function, i);
2509                         entry[i].flags |=
2510                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2511                         ++*nent;
2512                 }
2513                 break;
2514         }
2515         case 7: {
2516                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2517                 /* Mask ebx against host capbability word 9 */
2518                 if (index == 0) {
2519                         entry->ebx &= kvm_supported_word9_x86_features;
2520                         cpuid_mask(&entry->ebx, 9);
2521                 } else
2522                         entry->ebx = 0;
2523                 entry->eax = 0;
2524                 entry->ecx = 0;
2525                 entry->edx = 0;
2526                 break;
2527         }
2528         case 9:
2529                 break;
2530         /* function 0xb has additional index. */
2531         case 0xb: {
2532                 int i, level_type;
2533
2534                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2535                 /* read more entries until level_type is zero */
2536                 for (i = 1; *nent < maxnent; ++i) {
2537                         level_type = entry[i - 1].ecx & 0xff00;
2538                         if (!level_type)
2539                                 break;
2540                         do_cpuid_1_ent(&entry[i], function, i);
2541                         entry[i].flags |=
2542                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2543                         ++*nent;
2544                 }
2545                 break;
2546         }
2547         case 0xd: {
2548                 int idx, i;
2549
2550                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2551                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2552                         do_cpuid_1_ent(&entry[i], function, idx);
2553                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2554                                 continue;
2555                         entry[i].flags |=
2556                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2557                         ++*nent;
2558                         ++i;
2559                 }
2560                 break;
2561         }
2562         case KVM_CPUID_SIGNATURE: {
2563                 char signature[12] = "KVMKVMKVM\0\0";
2564                 u32 *sigptr = (u32 *)signature;
2565                 entry->eax = 0;
2566                 entry->ebx = sigptr[0];
2567                 entry->ecx = sigptr[1];
2568                 entry->edx = sigptr[2];
2569                 break;
2570         }
2571         case KVM_CPUID_FEATURES:
2572                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2573                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2574                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2575                              (1 << KVM_FEATURE_ASYNC_PF) |
2576                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2577
2578                 if (sched_info_on())
2579                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2580
2581                 entry->ebx = 0;
2582                 entry->ecx = 0;
2583                 entry->edx = 0;
2584                 break;
2585         case 0x80000000:
2586                 entry->eax = min(entry->eax, 0x8000001a);
2587                 break;
2588         case 0x80000001:
2589                 entry->edx &= kvm_supported_word1_x86_features;
2590                 cpuid_mask(&entry->edx, 1);
2591                 entry->ecx &= kvm_supported_word6_x86_features;
2592                 cpuid_mask(&entry->ecx, 6);
2593                 break;
2594         case 0x80000008: {
2595                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2596                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2597                 unsigned phys_as = entry->eax & 0xff;
2598
2599                 if (!g_phys_as)
2600                         g_phys_as = phys_as;
2601                 entry->eax = g_phys_as | (virt_as << 8);
2602                 entry->ebx = entry->edx = 0;
2603                 break;
2604         }
2605         case 0x80000019:
2606                 entry->ecx = entry->edx = 0;
2607                 break;
2608         case 0x8000001a:
2609                 break;
2610         case 0x8000001d:
2611                 break;
2612         /*Add support for Centaur's CPUID instruction*/
2613         case 0xC0000000:
2614                 /*Just support up to 0xC0000004 now*/
2615                 entry->eax = min(entry->eax, 0xC0000004);
2616                 break;
2617         case 0xC0000001:
2618                 entry->edx &= kvm_supported_word5_x86_features;
2619                 cpuid_mask(&entry->edx, 5);
2620                 break;
2621         case 3: /* Processor serial number */
2622         case 5: /* MONITOR/MWAIT */
2623         case 6: /* Thermal management */
2624         case 0xA: /* Architectural Performance Monitoring */
2625         case 0x80000007: /* Advanced power management */
2626         case 0xC0000002:
2627         case 0xC0000003:
2628         case 0xC0000004:
2629         default:
2630                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2631                 break;
2632         }
2633
2634         kvm_x86_ops->set_supported_cpuid(function, entry);
2635
2636         put_cpu();
2637 }
2638
2639 #undef F
2640
2641 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2642                                      struct kvm_cpuid_entry2 __user *entries)
2643 {
2644         struct kvm_cpuid_entry2 *cpuid_entries;
2645         int limit, nent = 0, r = -E2BIG;
2646         u32 func;
2647
2648         if (cpuid->nent < 1)
2649                 goto out;
2650         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2651                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2652         r = -ENOMEM;
2653         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2654         if (!cpuid_entries)
2655                 goto out;
2656
2657         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2658         limit = cpuid_entries[0].eax;
2659         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2660                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2661                              &nent, cpuid->nent);
2662         r = -E2BIG;
2663         if (nent >= cpuid->nent)
2664                 goto out_free;
2665
2666         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2667         limit = cpuid_entries[nent - 1].eax;
2668         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2669                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2670                              &nent, cpuid->nent);
2671
2672
2673
2674         r = -E2BIG;
2675         if (nent >= cpuid->nent)
2676                 goto out_free;
2677
2678         /* Add support for Centaur's CPUID instruction. */
2679         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2680                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2681                                 &nent, cpuid->nent);
2682
2683                 r = -E2BIG;
2684                 if (nent >= cpuid->nent)
2685                         goto out_free;
2686
2687                 limit = cpuid_entries[nent - 1].eax;
2688                 for (func = 0xC0000001;
2689                         func <= limit && nent < cpuid->nent; ++func)
2690                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2691                                         &nent, cpuid->nent);
2692
2693                 r = -E2BIG;
2694                 if (nent >= cpuid->nent)
2695                         goto out_free;
2696         }
2697
2698         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2699                      cpuid->nent);
2700
2701         r = -E2BIG;
2702         if (nent >= cpuid->nent)
2703                 goto out_free;
2704
2705         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2706                      cpuid->nent);
2707
2708         r = -E2BIG;
2709         if (nent >= cpuid->nent)
2710                 goto out_free;
2711
2712         r = -EFAULT;
2713         if (copy_to_user(entries, cpuid_entries,
2714                          nent * sizeof(struct kvm_cpuid_entry2)))
2715                 goto out_free;
2716         cpuid->nent = nent;
2717         r = 0;
2718
2719 out_free:
2720         vfree(cpuid_entries);
2721 out:
2722         return r;
2723 }
2724
2725 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2726                                     struct kvm_lapic_state *s)
2727 {
2728         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2729
2730         return 0;
2731 }
2732
2733 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2734                                     struct kvm_lapic_state *s)
2735 {
2736         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2737         kvm_apic_post_state_restore(vcpu);
2738         update_cr8_intercept(vcpu);
2739
2740         return 0;
2741 }
2742
2743 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2744                                     struct kvm_interrupt *irq)
2745 {
2746         if (irq->irq < 0 || irq->irq >= 256)
2747                 return -EINVAL;
2748         if (irqchip_in_kernel(vcpu->kvm))
2749                 return -ENXIO;
2750
2751         kvm_queue_interrupt(vcpu, irq->irq, false);
2752         kvm_make_request(KVM_REQ_EVENT, vcpu);
2753
2754         return 0;
2755 }
2756
2757 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2758 {
2759         kvm_inject_nmi(vcpu);
2760
2761         return 0;
2762 }
2763
2764 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2765                                            struct kvm_tpr_access_ctl *tac)
2766 {
2767         if (tac->flags)
2768                 return -EINVAL;
2769         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2770         return 0;
2771 }
2772
2773 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2774                                         u64 mcg_cap)
2775 {
2776         int r;
2777         unsigned bank_num = mcg_cap & 0xff, bank;
2778
2779         r = -EINVAL;
2780         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2781                 goto out;
2782         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2783                 goto out;
2784         r = 0;
2785         vcpu->arch.mcg_cap = mcg_cap;
2786         /* Init IA32_MCG_CTL to all 1s */
2787         if (mcg_cap & MCG_CTL_P)
2788                 vcpu->arch.mcg_ctl = ~(u64)0;
2789         /* Init IA32_MCi_CTL to all 1s */
2790         for (bank = 0; bank < bank_num; bank++)
2791                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2792 out:
2793         return r;
2794 }
2795
2796 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2797                                       struct kvm_x86_mce *mce)
2798 {
2799         u64 mcg_cap = vcpu->arch.mcg_cap;
2800         unsigned bank_num = mcg_cap & 0xff;
2801         u64 *banks = vcpu->arch.mce_banks;
2802
2803         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2804                 return -EINVAL;
2805         /*
2806          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2807          * reporting is disabled
2808          */
2809         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2810             vcpu->arch.mcg_ctl != ~(u64)0)
2811                 return 0;
2812         banks += 4 * mce->bank;
2813         /*
2814          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2815          * reporting is disabled for the bank
2816          */
2817         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2818                 return 0;
2819         if (mce->status & MCI_STATUS_UC) {
2820                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2821                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2822                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2823                         return 0;
2824                 }
2825                 if (banks[1] & MCI_STATUS_VAL)
2826                         mce->status |= MCI_STATUS_OVER;
2827                 banks[2] = mce->addr;
2828                 banks[3] = mce->misc;
2829                 vcpu->arch.mcg_status = mce->mcg_status;
2830                 banks[1] = mce->status;
2831                 kvm_queue_exception(vcpu, MC_VECTOR);
2832         } else if (!(banks[1] & MCI_STATUS_VAL)
2833                    || !(banks[1] & MCI_STATUS_UC)) {
2834                 if (banks[1] & MCI_STATUS_VAL)
2835                         mce->status |= MCI_STATUS_OVER;
2836                 banks[2] = mce->addr;
2837                 banks[3] = mce->misc;
2838                 banks[1] = mce->status;
2839         } else
2840                 banks[1] |= MCI_STATUS_OVER;
2841         return 0;
2842 }
2843
2844 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2845                                                struct kvm_vcpu_events *events)
2846 {
2847         process_nmi(vcpu);
2848         events->exception.injected =
2849                 vcpu->arch.exception.pending &&
2850                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2851         events->exception.nr = vcpu->arch.exception.nr;
2852         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2853         events->exception.pad = 0;
2854         events->exception.error_code = vcpu->arch.exception.error_code;
2855
2856         events->interrupt.injected =
2857                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2858         events->interrupt.nr = vcpu->arch.interrupt.nr;
2859         events->interrupt.soft = 0;
2860         events->interrupt.shadow =
2861                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2862                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2863
2864         events->nmi.injected = vcpu->arch.nmi_injected;
2865         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2866         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2867         events->nmi.pad = 0;
2868
2869         events->sipi_vector = vcpu->arch.sipi_vector;
2870
2871         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2872                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2873                          | KVM_VCPUEVENT_VALID_SHADOW);
2874         memset(&events->reserved, 0, sizeof(events->reserved));
2875 }
2876
2877 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2878                                               struct kvm_vcpu_events *events)
2879 {
2880         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2881                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2882                               | KVM_VCPUEVENT_VALID_SHADOW))
2883                 return -EINVAL;
2884
2885         process_nmi(vcpu);
2886         vcpu->arch.exception.pending = events->exception.injected;
2887         vcpu->arch.exception.nr = events->exception.nr;
2888         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2889         vcpu->arch.exception.error_code = events->exception.error_code;
2890
2891         vcpu->arch.interrupt.pending = events->interrupt.injected;
2892         vcpu->arch.interrupt.nr = events->interrupt.nr;
2893         vcpu->arch.interrupt.soft = events->interrupt.soft;
2894         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2895                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2896                                                   events->interrupt.shadow);
2897
2898         vcpu->arch.nmi_injected = events->nmi.injected;
2899         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2900                 vcpu->arch.nmi_pending = events->nmi.pending;
2901         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2902
2903         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2904                 vcpu->arch.sipi_vector = events->sipi_vector;
2905
2906         kvm_make_request(KVM_REQ_EVENT, vcpu);
2907
2908         return 0;
2909 }
2910
2911 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2912                                              struct kvm_debugregs *dbgregs)
2913 {
2914         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2915         dbgregs->dr6 = vcpu->arch.dr6;
2916         dbgregs->dr7 = vcpu->arch.dr7;
2917         dbgregs->flags = 0;
2918         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2919 }
2920
2921 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2922                                             struct kvm_debugregs *dbgregs)
2923 {
2924         if (dbgregs->flags)
2925                 return -EINVAL;
2926
2927         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2928         vcpu->arch.dr6 = dbgregs->dr6;
2929         vcpu->arch.dr7 = dbgregs->dr7;
2930
2931         return 0;
2932 }
2933
2934 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2935                                          struct kvm_xsave *guest_xsave)
2936 {
2937         if (cpu_has_xsave)
2938                 memcpy(guest_xsave->region,
2939                         &vcpu->arch.guest_fpu.state->xsave,
2940                         xstate_size);
2941         else {
2942                 memcpy(guest_xsave->region,
2943                         &vcpu->arch.guest_fpu.state->fxsave,
2944                         sizeof(struct i387_fxsave_struct));
2945                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2946                         XSTATE_FPSSE;
2947         }
2948 }
2949
2950 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2951                                         struct kvm_xsave *guest_xsave)
2952 {
2953         u64 xstate_bv =
2954                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2955
2956         if (cpu_has_xsave)
2957                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2958                         guest_xsave->region, xstate_size);
2959         else {
2960                 if (xstate_bv & ~XSTATE_FPSSE)
2961                         return -EINVAL;
2962                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2963                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2964         }
2965         return 0;
2966 }
2967
2968 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2969                                         struct kvm_xcrs *guest_xcrs)
2970 {
2971         if (!cpu_has_xsave) {
2972                 guest_xcrs->nr_xcrs = 0;
2973                 return;
2974         }
2975
2976         guest_xcrs->nr_xcrs = 1;
2977         guest_xcrs->flags = 0;
2978         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2979         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2980 }
2981
2982 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2983                                        struct kvm_xcrs *guest_xcrs)
2984 {
2985         int i, r = 0;
2986
2987         if (!cpu_has_xsave)
2988                 return -EINVAL;
2989
2990         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2991                 return -EINVAL;
2992
2993         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2994                 /* Only support XCR0 currently */
2995                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2996                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2997                                 guest_xcrs->xcrs[0].value);
2998                         break;
2999                 }
3000         if (r)
3001                 r = -EINVAL;
3002         return r;
3003 }
3004
3005 long kvm_arch_vcpu_ioctl(struct file *filp,
3006                          unsigned int ioctl, unsigned long arg)
3007 {
3008         struct kvm_vcpu *vcpu = filp->private_data;
3009         void __user *argp = (void __user *)arg;
3010         int r;
3011         union {
3012                 struct kvm_lapic_state *lapic;
3013                 struct kvm_xsave *xsave;
3014                 struct kvm_xcrs *xcrs;
3015                 void *buffer;
3016         } u;
3017
3018         u.buffer = NULL;
3019         switch (ioctl) {
3020         case KVM_GET_LAPIC: {
3021                 r = -EINVAL;
3022                 if (!vcpu->arch.apic)
3023                         goto out;
3024                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3025
3026                 r = -ENOMEM;
3027                 if (!u.lapic)
3028                         goto out;
3029                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3030                 if (r)
3031                         goto out;
3032                 r = -EFAULT;
3033                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3034                         goto out;
3035                 r = 0;
3036                 break;
3037         }
3038         case KVM_SET_LAPIC: {
3039                 r = -EINVAL;
3040                 if (!vcpu->arch.apic)
3041                         goto out;
3042                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3043                 r = -ENOMEM;
3044                 if (!u.lapic)
3045                         goto out;
3046                 r = -EFAULT;
3047                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3048                         goto out;
3049                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3050                 if (r)
3051                         goto out;
3052                 r = 0;
3053                 break;
3054         }
3055         case KVM_INTERRUPT: {
3056                 struct kvm_interrupt irq;
3057
3058                 r = -EFAULT;
3059                 if (copy_from_user(&irq, argp, sizeof irq))
3060                         goto out;
3061                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3062                 if (r)
3063                         goto out;
3064                 r = 0;
3065                 break;
3066         }
3067         case KVM_NMI: {
3068                 r = kvm_vcpu_ioctl_nmi(vcpu);
3069                 if (r)
3070                         goto out;
3071                 r = 0;
3072                 break;
3073         }
3074         case KVM_SET_CPUID: {
3075                 struct kvm_cpuid __user *cpuid_arg = argp;
3076                 struct kvm_cpuid cpuid;
3077
3078                 r = -EFAULT;
3079                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3080                         goto out;
3081                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3082                 if (r)
3083                         goto out;
3084                 break;
3085         }
3086         case KVM_SET_CPUID2: {
3087                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3088                 struct kvm_cpuid2 cpuid;
3089
3090                 r = -EFAULT;
3091                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3092                         goto out;
3093                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3094                                               cpuid_arg->entries);
3095                 if (r)
3096                         goto out;
3097                 break;
3098         }
3099         case KVM_GET_CPUID2: {
3100                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3101                 struct kvm_cpuid2 cpuid;
3102
3103                 r = -EFAULT;
3104                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3105                         goto out;
3106                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3107                                               cpuid_arg->entries);
3108                 if (r)
3109                         goto out;
3110                 r = -EFAULT;
3111                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3112                         goto out;
3113                 r = 0;
3114                 break;
3115         }
3116         case KVM_GET_MSRS:
3117                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3118                 break;
3119         case KVM_SET_MSRS:
3120                 r = msr_io(vcpu, argp, do_set_msr, 0);
3121                 break;
3122         case KVM_TPR_ACCESS_REPORTING: {
3123                 struct kvm_tpr_access_ctl tac;
3124
3125                 r = -EFAULT;
3126                 if (copy_from_user(&tac, argp, sizeof tac))
3127                         goto out;
3128                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3129                 if (r)
3130                         goto out;
3131                 r = -EFAULT;
3132                 if (copy_to_user(argp, &tac, sizeof tac))
3133                         goto out;
3134                 r = 0;
3135                 break;
3136         };
3137         case KVM_SET_VAPIC_ADDR: {
3138                 struct kvm_vapic_addr va;
3139
3140                 r = -EINVAL;
3141                 if (!irqchip_in_kernel(vcpu->kvm))
3142                         goto out;
3143                 r = -EFAULT;
3144                 if (copy_from_user(&va, argp, sizeof va))
3145                         goto out;
3146                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3147                 break;
3148         }
3149         case KVM_X86_SETUP_MCE: {
3150                 u64 mcg_cap;
3151
3152                 r = -EFAULT;
3153                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3154                         goto out;
3155                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3156                 break;
3157         }
3158         case KVM_X86_SET_MCE: {
3159                 struct kvm_x86_mce mce;
3160
3161                 r = -EFAULT;
3162                 if (copy_from_user(&mce, argp, sizeof mce))
3163                         goto out;
3164                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3165                 break;
3166         }
3167         case KVM_GET_VCPU_EVENTS: {
3168                 struct kvm_vcpu_events events;
3169
3170                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3171
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3174                         break;
3175                 r = 0;
3176                 break;
3177         }
3178         case KVM_SET_VCPU_EVENTS: {
3179                 struct kvm_vcpu_events events;
3180
3181                 r = -EFAULT;
3182                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3183                         break;
3184
3185                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3186                 break;
3187         }
3188         case KVM_GET_DEBUGREGS: {
3189                 struct kvm_debugregs dbgregs;
3190
3191                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3192
3193                 r = -EFAULT;
3194                 if (copy_to_user(argp, &dbgregs,
3195                                  sizeof(struct kvm_debugregs)))
3196                         break;
3197                 r = 0;
3198                 break;
3199         }
3200         case KVM_SET_DEBUGREGS: {
3201                 struct kvm_debugregs dbgregs;
3202
3203                 r = -EFAULT;
3204                 if (copy_from_user(&dbgregs, argp,
3205                                    sizeof(struct kvm_debugregs)))
3206                         break;
3207
3208                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3209                 break;
3210         }
3211         case KVM_GET_XSAVE: {
3212                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3213                 r = -ENOMEM;
3214                 if (!u.xsave)
3215                         break;
3216
3217                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3218
3219                 r = -EFAULT;
3220                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3221                         break;
3222                 r = 0;
3223                 break;
3224         }
3225         case KVM_SET_XSAVE: {
3226                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3227                 r = -ENOMEM;
3228                 if (!u.xsave)
3229                         break;
3230
3231                 r = -EFAULT;
3232                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3233                         break;
3234
3235                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3236                 break;
3237         }
3238         case KVM_GET_XCRS: {
3239                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3240                 r = -ENOMEM;
3241                 if (!u.xcrs)
3242                         break;
3243
3244                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3245
3246                 r = -EFAULT;
3247                 if (copy_to_user(argp, u.xcrs,
3248                                  sizeof(struct kvm_xcrs)))
3249                         break;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_SET_XCRS: {
3254                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3255                 r = -ENOMEM;
3256                 if (!u.xcrs)
3257                         break;
3258
3259                 r = -EFAULT;
3260                 if (copy_from_user(u.xcrs, argp,
3261                                    sizeof(struct kvm_xcrs)))
3262                         break;
3263
3264                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3265                 break;
3266         }
3267         case KVM_SET_TSC_KHZ: {
3268                 u32 user_tsc_khz;
3269
3270                 r = -EINVAL;
3271                 if (!kvm_has_tsc_control)
3272                         break;
3273
3274                 user_tsc_khz = (u32)arg;
3275
3276                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3277                         goto out;
3278
3279                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3280
3281                 r = 0;
3282                 goto out;
3283         }
3284         case KVM_GET_TSC_KHZ: {
3285                 r = -EIO;
3286                 if (check_tsc_unstable())
3287                         goto out;
3288
3289                 r = vcpu_tsc_khz(vcpu);
3290
3291                 goto out;
3292         }
3293         default:
3294                 r = -EINVAL;
3295         }
3296 out:
3297         kfree(u.buffer);
3298         return r;
3299 }
3300
3301 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3302 {
3303         int ret;
3304
3305         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3306                 return -1;
3307         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3308         return ret;
3309 }
3310
3311 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3312                                               u64 ident_addr)
3313 {
3314         kvm->arch.ept_identity_map_addr = ident_addr;
3315         return 0;
3316 }
3317
3318 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3319                                           u32 kvm_nr_mmu_pages)
3320 {
3321         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3322                 return -EINVAL;
3323
3324         mutex_lock(&kvm->slots_lock);
3325         spin_lock(&kvm->mmu_lock);
3326
3327         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3328         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3329
3330         spin_unlock(&kvm->mmu_lock);
3331         mutex_unlock(&kvm->slots_lock);
3332         return 0;
3333 }
3334
3335 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3336 {
3337         return kvm->arch.n_max_mmu_pages;
3338 }
3339
3340 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3341 {
3342         int r;
3343
3344         r = 0;
3345         switch (chip->chip_id) {
3346         case KVM_IRQCHIP_PIC_MASTER:
3347                 memcpy(&chip->chip.pic,
3348                         &pic_irqchip(kvm)->pics[0],
3349                         sizeof(struct kvm_pic_state));
3350                 break;
3351         case KVM_IRQCHIP_PIC_SLAVE:
3352                 memcpy(&chip->chip.pic,
3353                         &pic_irqchip(kvm)->pics[1],
3354                         sizeof(struct kvm_pic_state));
3355                 break;
3356         case KVM_IRQCHIP_IOAPIC:
3357                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3358                 break;
3359         default:
3360                 r = -EINVAL;
3361                 break;
3362         }
3363         return r;
3364 }
3365
3366 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3367 {
3368         int r;
3369
3370         r = 0;
3371         switch (chip->chip_id) {
3372         case KVM_IRQCHIP_PIC_MASTER:
3373                 spin_lock(&pic_irqchip(kvm)->lock);
3374                 memcpy(&pic_irqchip(kvm)->pics[0],
3375                         &chip->chip.pic,
3376                         sizeof(struct kvm_pic_state));
3377                 spin_unlock(&pic_irqchip(kvm)->lock);
3378                 break;
3379         case KVM_IRQCHIP_PIC_SLAVE:
3380                 spin_lock(&pic_irqchip(kvm)->lock);
3381                 memcpy(&pic_irqchip(kvm)->pics[1],
3382                         &chip->chip.pic,
3383                         sizeof(struct kvm_pic_state));
3384                 spin_unlock(&pic_irqchip(kvm)->lock);
3385                 break;
3386         case KVM_IRQCHIP_IOAPIC:
3387                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3388                 break;
3389         default:
3390                 r = -EINVAL;
3391                 break;
3392         }
3393         kvm_pic_update_irq(pic_irqchip(kvm));
3394         return r;
3395 }
3396
3397 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3398 {
3399         int r = 0;
3400
3401         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3402         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3403         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3408 {
3409         int r = 0;
3410
3411         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3412         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3413         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3414         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3415         return r;
3416 }
3417
3418 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3419 {
3420         int r = 0;
3421
3422         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3423         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3424                 sizeof(ps->channels));
3425         ps->flags = kvm->arch.vpit->pit_state.flags;
3426         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3427         memset(&ps->reserved, 0, sizeof(ps->reserved));
3428         return r;
3429 }
3430
3431 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3432 {
3433         int r = 0, start = 0;
3434         u32 prev_legacy, cur_legacy;
3435         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3436         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3437         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3438         if (!prev_legacy && cur_legacy)
3439                 start = 1;
3440         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3441                sizeof(kvm->arch.vpit->pit_state.channels));
3442         kvm->arch.vpit->pit_state.flags = ps->flags;
3443         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return r;
3446 }
3447
3448 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3449                                  struct kvm_reinject_control *control)
3450 {
3451         if (!kvm->arch.vpit)
3452                 return -ENXIO;
3453         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3454         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         return 0;
3457 }
3458
3459 /*
3460  * Get (and clear) the dirty memory log for a memory slot.
3461  */
3462 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3463                                       struct kvm_dirty_log *log)
3464 {
3465         int r, i;
3466         struct kvm_memory_slot *memslot;
3467         unsigned long n;
3468         unsigned long is_dirty = 0;
3469
3470         mutex_lock(&kvm->slots_lock);
3471
3472         r = -EINVAL;
3473         if (log->slot >= KVM_MEMORY_SLOTS)
3474                 goto out;
3475
3476         memslot = &kvm->memslots->memslots[log->slot];
3477         r = -ENOENT;
3478         if (!memslot->dirty_bitmap)
3479                 goto out;
3480
3481         n = kvm_dirty_bitmap_bytes(memslot);
3482
3483         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3484                 is_dirty = memslot->dirty_bitmap[i];
3485
3486         /* If nothing is dirty, don't bother messing with page tables. */
3487         if (is_dirty) {
3488                 struct kvm_memslots *slots, *old_slots;
3489                 unsigned long *dirty_bitmap;
3490
3491                 dirty_bitmap = memslot->dirty_bitmap_head;
3492                 if (memslot->dirty_bitmap == dirty_bitmap)
3493                         dirty_bitmap += n / sizeof(long);
3494                 memset(dirty_bitmap, 0, n);
3495
3496                 r = -ENOMEM;
3497                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3498                 if (!slots)
3499                         goto out;
3500                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3501                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3502                 slots->generation++;
3503
3504                 old_slots = kvm->memslots;
3505                 rcu_assign_pointer(kvm->memslots, slots);
3506                 synchronize_srcu_expedited(&kvm->srcu);
3507                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3508                 kfree(old_slots);
3509
3510                 spin_lock(&kvm->mmu_lock);
3511                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3512                 spin_unlock(&kvm->mmu_lock);
3513
3514                 r = -EFAULT;
3515                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3516                         goto out;
3517         } else {
3518                 r = -EFAULT;
3519                 if (clear_user(log->dirty_bitmap, n))
3520                         goto out;
3521         }
3522
3523         r = 0;
3524 out:
3525         mutex_unlock(&kvm->slots_lock);
3526         return r;
3527 }
3528
3529 long kvm_arch_vm_ioctl(struct file *filp,
3530                        unsigned int ioctl, unsigned long arg)
3531 {
3532         struct kvm *kvm = filp->private_data;
3533         void __user *argp = (void __user *)arg;
3534         int r = -ENOTTY;
3535         /*
3536          * This union makes it completely explicit to gcc-3.x
3537          * that these two variables' stack usage should be
3538          * combined, not added together.
3539          */
3540         union {
3541                 struct kvm_pit_state ps;
3542                 struct kvm_pit_state2 ps2;
3543                 struct kvm_pit_config pit_config;
3544         } u;
3545
3546         switch (ioctl) {
3547         case KVM_SET_TSS_ADDR:
3548                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3549                 if (r < 0)
3550                         goto out;
3551                 break;
3552         case KVM_SET_IDENTITY_MAP_ADDR: {
3553                 u64 ident_addr;
3554
3555                 r = -EFAULT;
3556                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3557                         goto out;
3558                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3559                 if (r < 0)
3560                         goto out;
3561                 break;
3562         }
3563         case KVM_SET_NR_MMU_PAGES:
3564                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3565                 if (r)
3566                         goto out;
3567                 break;
3568         case KVM_GET_NR_MMU_PAGES:
3569                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3570                 break;
3571         case KVM_CREATE_IRQCHIP: {
3572                 struct kvm_pic *vpic;
3573
3574                 mutex_lock(&kvm->lock);
3575                 r = -EEXIST;
3576                 if (kvm->arch.vpic)
3577                         goto create_irqchip_unlock;
3578                 r = -EINVAL;
3579                 if (atomic_read(&kvm->online_vcpus))
3580                         goto create_irqchip_unlock;
3581                 r = -ENOMEM;
3582                 vpic = kvm_create_pic(kvm);
3583                 if (vpic) {
3584                         r = kvm_ioapic_init(kvm);
3585                         if (r) {
3586                                 mutex_lock(&kvm->slots_lock);
3587                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3588                                                           &vpic->dev_master);
3589                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3590                                                           &vpic->dev_slave);
3591                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3592                                                           &vpic->dev_eclr);
3593                                 mutex_unlock(&kvm->slots_lock);
3594                                 kfree(vpic);
3595                                 goto create_irqchip_unlock;
3596                         }
3597                 } else
3598                         goto create_irqchip_unlock;
3599                 smp_wmb();
3600                 kvm->arch.vpic = vpic;
3601                 smp_wmb();
3602                 r = kvm_setup_default_irq_routing(kvm);
3603                 if (r) {
3604                         mutex_lock(&kvm->slots_lock);
3605                         mutex_lock(&kvm->irq_lock);
3606                         kvm_ioapic_destroy(kvm);
3607                         kvm_destroy_pic(kvm);
3608                         mutex_unlock(&kvm->irq_lock);
3609                         mutex_unlock(&kvm->slots_lock);
3610                 }
3611         create_irqchip_unlock:
3612                 mutex_unlock(&kvm->lock);
3613                 break;
3614         }
3615         case KVM_CREATE_PIT:
3616                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3617                 goto create_pit;
3618         case KVM_CREATE_PIT2:
3619                 r = -EFAULT;
3620                 if (copy_from_user(&u.pit_config, argp,
3621                                    sizeof(struct kvm_pit_config)))
3622                         goto out;
3623         create_pit:
3624                 mutex_lock(&kvm->slots_lock);
3625                 r = -EEXIST;
3626                 if (kvm->arch.vpit)
3627                         goto create_pit_unlock;
3628                 r = -ENOMEM;
3629                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3630                 if (kvm->arch.vpit)
3631                         r = 0;
3632         create_pit_unlock:
3633                 mutex_unlock(&kvm->slots_lock);
3634                 break;
3635         case KVM_IRQ_LINE_STATUS:
3636         case KVM_IRQ_LINE: {
3637                 struct kvm_irq_level irq_event;
3638
3639                 r = -EFAULT;
3640                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3641                         goto out;
3642                 r = -ENXIO;
3643                 if (irqchip_in_kernel(kvm)) {
3644                         __s32 status;
3645                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3646                                         irq_event.irq, irq_event.level);
3647                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3648                                 r = -EFAULT;
3649                                 irq_event.status = status;
3650                                 if (copy_to_user(argp, &irq_event,
3651                                                         sizeof irq_event))
3652                                         goto out;
3653                         }
3654                         r = 0;
3655                 }
3656                 break;
3657         }
3658         case KVM_GET_IRQCHIP: {
3659                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3660                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3661
3662                 r = -ENOMEM;
3663                 if (!chip)
3664                         goto out;
3665                 r = -EFAULT;
3666                 if (copy_from_user(chip, argp, sizeof *chip))
3667                         goto get_irqchip_out;
3668                 r = -ENXIO;
3669                 if (!irqchip_in_kernel(kvm))
3670                         goto get_irqchip_out;
3671                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3672                 if (r)
3673                         goto get_irqchip_out;
3674                 r = -EFAULT;
3675                 if (copy_to_user(argp, chip, sizeof *chip))
3676                         goto get_irqchip_out;
3677                 r = 0;
3678         get_irqchip_out:
3679                 kfree(chip);
3680                 if (r)
3681                         goto out;
3682                 break;
3683         }
3684         case KVM_SET_IRQCHIP: {
3685                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3686                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3687
3688                 r = -ENOMEM;
3689                 if (!chip)
3690                         goto out;
3691                 r = -EFAULT;
3692                 if (copy_from_user(chip, argp, sizeof *chip))
3693                         goto set_irqchip_out;
3694                 r = -ENXIO;
3695                 if (!irqchip_in_kernel(kvm))
3696                         goto set_irqchip_out;
3697                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3698                 if (r)
3699                         goto set_irqchip_out;
3700                 r = 0;
3701         set_irqchip_out:
3702                 kfree(chip);
3703                 if (r)
3704                         goto out;
3705                 break;
3706         }
3707         case KVM_GET_PIT: {
3708                 r = -EFAULT;
3709                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3710                         goto out;
3711                 r = -ENXIO;
3712                 if (!kvm->arch.vpit)
3713                         goto out;
3714                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3715                 if (r)
3716                         goto out;
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3719                         goto out;
3720                 r = 0;
3721                 break;
3722         }
3723         case KVM_SET_PIT: {
3724                 r = -EFAULT;
3725                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3726                         goto out;
3727                 r = -ENXIO;
3728                 if (!kvm->arch.vpit)
3729                         goto out;
3730                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3731                 if (r)
3732                         goto out;
3733                 r = 0;
3734                 break;
3735         }
3736         case KVM_GET_PIT2: {
3737                 r = -ENXIO;
3738                 if (!kvm->arch.vpit)
3739                         goto out;
3740                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3741                 if (r)
3742                         goto out;
3743                 r = -EFAULT;
3744                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3745                         goto out;
3746                 r = 0;
3747                 break;
3748         }
3749         case KVM_SET_PIT2: {
3750                 r = -EFAULT;
3751                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3752                         goto out;
3753                 r = -ENXIO;
3754                 if (!kvm->arch.vpit)
3755                         goto out;
3756                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3757                 if (r)
3758                         goto out;
3759                 r = 0;
3760                 break;
3761         }
3762         case KVM_REINJECT_CONTROL: {
3763                 struct kvm_reinject_control control;
3764                 r =  -EFAULT;
3765                 if (copy_from_user(&control, argp, sizeof(control)))
3766                         goto out;
3767                 r = kvm_vm_ioctl_reinject(kvm, &control);
3768                 if (r)
3769                         goto out;
3770                 r = 0;
3771                 break;
3772         }
3773         case KVM_XEN_HVM_CONFIG: {
3774                 r = -EFAULT;
3775                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3776                                    sizeof(struct kvm_xen_hvm_config)))
3777                         goto out;
3778                 r = -EINVAL;
3779                 if (kvm->arch.xen_hvm_config.flags)
3780                         goto out;
3781                 r = 0;
3782                 break;
3783         }
3784         case KVM_SET_CLOCK: {
3785                 struct kvm_clock_data user_ns;
3786                 u64 now_ns;
3787                 s64 delta;
3788
3789                 r = -EFAULT;
3790                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3791                         goto out;
3792
3793                 r = -EINVAL;
3794                 if (user_ns.flags)
3795                         goto out;
3796
3797                 r = 0;
3798                 local_irq_disable();
3799                 now_ns = get_kernel_ns();
3800                 delta = user_ns.clock - now_ns;
3801                 local_irq_enable();
3802                 kvm->arch.kvmclock_offset = delta;
3803                 break;
3804         }
3805         case KVM_GET_CLOCK: {
3806                 struct kvm_clock_data user_ns;
3807                 u64 now_ns;
3808
3809                 local_irq_disable();
3810                 now_ns = get_kernel_ns();
3811                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3812                 local_irq_enable();
3813                 user_ns.flags = 0;
3814                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3815
3816                 r = -EFAULT;
3817                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3818                         goto out;
3819                 r = 0;
3820                 break;
3821         }
3822
3823         default:
3824                 ;
3825         }
3826 out:
3827         return r;
3828 }
3829
3830 static void kvm_init_msr_list(void)
3831 {
3832         u32 dummy[2];
3833         unsigned i, j;
3834
3835         /* skip the first msrs in the list. KVM-specific */
3836         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3837                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3838                         continue;
3839                 if (j < i)
3840                         msrs_to_save[j] = msrs_to_save[i];
3841                 j++;
3842         }
3843         num_msrs_to_save = j;
3844 }
3845
3846 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3847                            const void *v)
3848 {
3849         int handled = 0;
3850         int n;
3851
3852         do {
3853                 n = min(len, 8);
3854                 if (!(vcpu->arch.apic &&
3855                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3856                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3857                         break;
3858                 handled += n;
3859                 addr += n;
3860                 len -= n;
3861                 v += n;
3862         } while (len);
3863
3864         return handled;
3865 }
3866
3867 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3868 {
3869         int handled = 0;
3870         int n;
3871
3872         do {
3873                 n = min(len, 8);
3874                 if (!(vcpu->arch.apic &&
3875                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3876                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3877                         break;
3878                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3879                 handled += n;
3880                 addr += n;
3881                 len -= n;
3882                 v += n;
3883         } while (len);
3884
3885         return handled;
3886 }
3887
3888 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3889                         struct kvm_segment *var, int seg)
3890 {
3891         kvm_x86_ops->set_segment(vcpu, var, seg);
3892 }
3893
3894 void kvm_get_segment(struct kvm_vcpu *vcpu,
3895                      struct kvm_segment *var, int seg)
3896 {
3897         kvm_x86_ops->get_segment(vcpu, var, seg);
3898 }
3899
3900 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3901 {
3902         return gpa;
3903 }
3904
3905 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3906 {
3907         gpa_t t_gpa;
3908         struct x86_exception exception;
3909
3910         BUG_ON(!mmu_is_nested(vcpu));
3911
3912         /* NPT walks are always user-walks */
3913         access |= PFERR_USER_MASK;
3914         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3915
3916         return t_gpa;
3917 }
3918
3919 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3920                               struct x86_exception *exception)
3921 {
3922         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3923         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3924 }
3925
3926  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3927                                 struct x86_exception *exception)
3928 {
3929         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3930         access |= PFERR_FETCH_MASK;
3931         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3932 }
3933
3934 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3935                                struct x86_exception *exception)
3936 {
3937         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3938         access |= PFERR_WRITE_MASK;
3939         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3940 }
3941
3942 /* uses this to access any guest's mapped memory without checking CPL */
3943 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3944                                 struct x86_exception *exception)
3945 {
3946         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3947 }
3948
3949 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3950                                       struct kvm_vcpu *vcpu, u32 access,
3951                                       struct x86_exception *exception)
3952 {
3953         void *data = val;
3954         int r = X86EMUL_CONTINUE;
3955
3956         while (bytes) {
3957                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3958                                                             exception);
3959                 unsigned offset = addr & (PAGE_SIZE-1);
3960                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3961                 int ret;
3962
3963                 if (gpa == UNMAPPED_GVA)
3964                         return X86EMUL_PROPAGATE_FAULT;
3965                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3966                 if (ret < 0) {
3967                         r = X86EMUL_IO_NEEDED;
3968                         goto out;
3969                 }
3970
3971                 bytes -= toread;
3972                 data += toread;
3973                 addr += toread;
3974         }
3975 out:
3976         return r;
3977 }
3978
3979 /* used for instruction fetching */
3980 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3981                                 gva_t addr, void *val, unsigned int bytes,
3982                                 struct x86_exception *exception)
3983 {
3984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3985         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3986
3987         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3988                                           access | PFERR_FETCH_MASK,
3989                                           exception);
3990 }
3991
3992 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3993                                gva_t addr, void *val, unsigned int bytes,
3994                                struct x86_exception *exception)
3995 {
3996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3997         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3998
3999         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4000                                           exception);
4001 }
4002 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4003
4004 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4005                                       gva_t addr, void *val, unsigned int bytes,
4006                                       struct x86_exception *exception)
4007 {
4008         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4009         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4010 }
4011
4012 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4013                                        gva_t addr, void *val,
4014                                        unsigned int bytes,
4015                                        struct x86_exception *exception)
4016 {
4017         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4018         void *data = val;
4019         int r = X86EMUL_CONTINUE;
4020
4021         while (bytes) {
4022                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4023                                                              PFERR_WRITE_MASK,
4024                                                              exception);
4025                 unsigned offset = addr & (PAGE_SIZE-1);
4026                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4027                 int ret;
4028
4029                 if (gpa == UNMAPPED_GVA)
4030                         return X86EMUL_PROPAGATE_FAULT;
4031                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4032                 if (ret < 0) {
4033                         r = X86EMUL_IO_NEEDED;
4034                         goto out;
4035                 }
4036
4037                 bytes -= towrite;
4038                 data += towrite;
4039                 addr += towrite;
4040         }
4041 out:
4042         return r;
4043 }
4044 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4045
4046 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4047                                 gpa_t *gpa, struct x86_exception *exception,
4048                                 bool write)
4049 {
4050         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4051
4052         if (vcpu_match_mmio_gva(vcpu, gva) &&
4053                   check_write_user_access(vcpu, write, access,
4054                   vcpu->arch.access)) {
4055                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4056                                         (gva & (PAGE_SIZE - 1));
4057                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4058                 return 1;
4059         }
4060
4061         if (write)
4062                 access |= PFERR_WRITE_MASK;
4063
4064         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4065
4066         if (*gpa == UNMAPPED_GVA)
4067                 return -1;
4068
4069         /* For APIC access vmexit */
4070         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4071                 return 1;
4072
4073         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4074                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4075                 return 1;
4076         }
4077
4078         return 0;
4079 }
4080
4081 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4082                         const void *val, int bytes)
4083 {
4084         int ret;
4085
4086         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4087         if (ret < 0)
4088                 return 0;
4089         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4090         return 1;
4091 }
4092
4093 struct read_write_emulator_ops {
4094         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4095                                   int bytes);
4096         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097                                   void *val, int bytes);
4098         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099                                int bytes, void *val);
4100         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4101                                     void *val, int bytes);
4102         bool write;
4103 };
4104
4105 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4106 {
4107         if (vcpu->mmio_read_completed) {
4108                 memcpy(val, vcpu->mmio_data, bytes);
4109                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4110                                vcpu->mmio_phys_addr, *(u64 *)val);
4111                 vcpu->mmio_read_completed = 0;
4112                 return 1;
4113         }
4114
4115         return 0;
4116 }
4117
4118 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4119                         void *val, int bytes)
4120 {
4121         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4122 }
4123
4124 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4125                          void *val, int bytes)
4126 {
4127         return emulator_write_phys(vcpu, gpa, val, bytes);
4128 }
4129
4130 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4131 {
4132         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4133         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4134 }
4135
4136 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4137                           void *val, int bytes)
4138 {
4139         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4140         return X86EMUL_IO_NEEDED;
4141 }
4142
4143 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4144                            void *val, int bytes)
4145 {
4146         memcpy(vcpu->mmio_data, val, bytes);
4147         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4148         return X86EMUL_CONTINUE;
4149 }
4150
4151 static struct read_write_emulator_ops read_emultor = {
4152         .read_write_prepare = read_prepare,
4153         .read_write_emulate = read_emulate,
4154         .read_write_mmio = vcpu_mmio_read,
4155         .read_write_exit_mmio = read_exit_mmio,
4156 };
4157
4158 static struct read_write_emulator_ops write_emultor = {
4159         .read_write_emulate = write_emulate,
4160         .read_write_mmio = write_mmio,
4161         .read_write_exit_mmio = write_exit_mmio,
4162         .write = true,
4163 };
4164
4165 static int emulator_read_write_onepage(unsigned long addr, void *val,
4166                                        unsigned int bytes,
4167                                        struct x86_exception *exception,
4168                                        struct kvm_vcpu *vcpu,
4169                                        struct read_write_emulator_ops *ops)
4170 {
4171         gpa_t gpa;
4172         int handled, ret;
4173         bool write = ops->write;
4174
4175         if (ops->read_write_prepare &&
4176                   ops->read_write_prepare(vcpu, val, bytes))
4177                 return X86EMUL_CONTINUE;
4178
4179         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4180
4181         if (ret < 0)
4182                 return X86EMUL_PROPAGATE_FAULT;
4183
4184         /* For APIC access vmexit */
4185         if (ret)
4186                 goto mmio;
4187
4188         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4189                 return X86EMUL_CONTINUE;
4190
4191 mmio:
4192         /*
4193          * Is this MMIO handled locally?
4194          */
4195         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4196         if (handled == bytes)
4197                 return X86EMUL_CONTINUE;
4198
4199         gpa += handled;
4200         bytes -= handled;
4201         val += handled;
4202
4203         vcpu->mmio_needed = 1;
4204         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4205         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4206         vcpu->mmio_size = bytes;
4207         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4208         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4209         vcpu->mmio_index = 0;
4210
4211         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4212 }
4213
4214 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4215                         void *val, unsigned int bytes,
4216                         struct x86_exception *exception,
4217                         struct read_write_emulator_ops *ops)
4218 {
4219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4220
4221         /* Crossing a page boundary? */
4222         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4223                 int rc, now;
4224
4225                 now = -addr & ~PAGE_MASK;
4226                 rc = emulator_read_write_onepage(addr, val, now, exception,
4227                                                  vcpu, ops);
4228
4229                 if (rc != X86EMUL_CONTINUE)
4230                         return rc;
4231                 addr += now;
4232                 val += now;
4233                 bytes -= now;
4234         }
4235
4236         return emulator_read_write_onepage(addr, val, bytes, exception,
4237                                            vcpu, ops);
4238 }
4239
4240 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4241                                   unsigned long addr,
4242                                   void *val,
4243                                   unsigned int bytes,
4244                                   struct x86_exception *exception)
4245 {
4246         return emulator_read_write(ctxt, addr, val, bytes,
4247                                    exception, &read_emultor);
4248 }
4249
4250 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4251                             unsigned long addr,
4252                             const void *val,
4253                             unsigned int bytes,
4254                             struct x86_exception *exception)
4255 {
4256         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4257                                    exception, &write_emultor);
4258 }
4259
4260 #define CMPXCHG_TYPE(t, ptr, old, new) \
4261         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4262
4263 #ifdef CONFIG_X86_64
4264 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4265 #else
4266 #  define CMPXCHG64(ptr, old, new) \
4267         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4268 #endif
4269
4270 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4271                                      unsigned long addr,
4272                                      const void *old,
4273                                      const void *new,
4274                                      unsigned int bytes,
4275                                      struct x86_exception *exception)
4276 {
4277         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4278         gpa_t gpa;
4279         struct page *page;
4280         char *kaddr;
4281         bool exchanged;
4282
4283         /* guests cmpxchg8b have to be emulated atomically */
4284         if (bytes > 8 || (bytes & (bytes - 1)))
4285                 goto emul_write;
4286
4287         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4288
4289         if (gpa == UNMAPPED_GVA ||
4290             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4291                 goto emul_write;
4292
4293         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4294                 goto emul_write;
4295
4296         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4297         if (is_error_page(page)) {
4298                 kvm_release_page_clean(page);
4299                 goto emul_write;
4300         }
4301
4302         kaddr = kmap_atomic(page, KM_USER0);
4303         kaddr += offset_in_page(gpa);
4304         switch (bytes) {
4305         case 1:
4306                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4307                 break;
4308         case 2:
4309                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4310                 break;
4311         case 4:
4312                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4313                 break;
4314         case 8:
4315                 exchanged = CMPXCHG64(kaddr, old, new);
4316                 break;
4317         default:
4318                 BUG();
4319         }
4320         kunmap_atomic(kaddr, KM_USER0);
4321         kvm_release_page_dirty(page);
4322
4323         if (!exchanged)
4324                 return X86EMUL_CMPXCHG_FAILED;
4325
4326         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4327
4328         return X86EMUL_CONTINUE;
4329
4330 emul_write:
4331         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4332
4333         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4334 }
4335
4336 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4337 {
4338         /* TODO: String I/O for in kernel device */
4339         int r;
4340
4341         if (vcpu->arch.pio.in)
4342                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4343                                     vcpu->arch.pio.size, pd);
4344         else
4345                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4346                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4347                                      pd);
4348         return r;
4349 }
4350
4351
4352 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4353                                     int size, unsigned short port, void *val,
4354                                     unsigned int count)
4355 {
4356         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4357
4358         if (vcpu->arch.pio.count)
4359                 goto data_avail;
4360
4361         trace_kvm_pio(0, port, size, count);
4362
4363         vcpu->arch.pio.port = port;
4364         vcpu->arch.pio.in = 1;
4365         vcpu->arch.pio.count  = count;
4366         vcpu->arch.pio.size = size;
4367
4368         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4369         data_avail:
4370                 memcpy(val, vcpu->arch.pio_data, size * count);
4371                 vcpu->arch.pio.count = 0;
4372                 return 1;
4373         }
4374
4375         vcpu->run->exit_reason = KVM_EXIT_IO;
4376         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4377         vcpu->run->io.size = size;
4378         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4379         vcpu->run->io.count = count;
4380         vcpu->run->io.port = port;
4381
4382         return 0;
4383 }
4384
4385 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4386                                      int size, unsigned short port,
4387                                      const void *val, unsigned int count)
4388 {
4389         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4390
4391         trace_kvm_pio(1, port, size, count);
4392
4393         vcpu->arch.pio.port = port;
4394         vcpu->arch.pio.in = 0;
4395         vcpu->arch.pio.count = count;
4396         vcpu->arch.pio.size = size;
4397
4398         memcpy(vcpu->arch.pio_data, val, size * count);
4399
4400         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4401                 vcpu->arch.pio.count = 0;
4402                 return 1;
4403         }
4404
4405         vcpu->run->exit_reason = KVM_EXIT_IO;
4406         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4407         vcpu->run->io.size = size;
4408         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4409         vcpu->run->io.count = count;
4410         vcpu->run->io.port = port;
4411
4412         return 0;
4413 }
4414
4415 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4416 {
4417         return kvm_x86_ops->get_segment_base(vcpu, seg);
4418 }
4419
4420 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4421 {
4422         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4423 }
4424
4425 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4426 {
4427         if (!need_emulate_wbinvd(vcpu))
4428                 return X86EMUL_CONTINUE;
4429
4430         if (kvm_x86_ops->has_wbinvd_exit()) {
4431                 int cpu = get_cpu();
4432
4433                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4434                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4435                                 wbinvd_ipi, NULL, 1);
4436                 put_cpu();
4437                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4438         } else
4439                 wbinvd();
4440         return X86EMUL_CONTINUE;
4441 }
4442 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4443
4444 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4445 {
4446         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4447 }
4448
4449 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4450 {
4451         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4452 }
4453
4454 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4455 {
4456
4457         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4458 }
4459
4460 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4461 {
4462         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4463 }
4464
4465 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4466 {
4467         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4468         unsigned long value;
4469
4470         switch (cr) {
4471         case 0:
4472                 value = kvm_read_cr0(vcpu);
4473                 break;
4474         case 2:
4475                 value = vcpu->arch.cr2;
4476                 break;
4477         case 3:
4478                 value = kvm_read_cr3(vcpu);
4479                 break;
4480         case 4:
4481                 value = kvm_read_cr4(vcpu);
4482                 break;
4483         case 8:
4484                 value = kvm_get_cr8(vcpu);
4485                 break;
4486         default:
4487                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4488                 return 0;
4489         }
4490
4491         return value;
4492 }
4493
4494 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4495 {
4496         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4497         int res = 0;
4498
4499         switch (cr) {
4500         case 0:
4501                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4502                 break;
4503         case 2:
4504                 vcpu->arch.cr2 = val;
4505                 break;
4506         case 3:
4507                 res = kvm_set_cr3(vcpu, val);
4508                 break;
4509         case 4:
4510                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4511                 break;
4512         case 8:
4513                 res = kvm_set_cr8(vcpu, val);
4514                 break;
4515         default:
4516                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4517                 res = -1;
4518         }
4519
4520         return res;
4521 }
4522
4523 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4524 {
4525         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4526 }
4527
4528 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4529 {
4530         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4531 }
4532
4533 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4534 {
4535         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4536 }
4537
4538 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4539 {
4540         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4541 }
4542
4543 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4544 {
4545         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4546 }
4547
4548 static unsigned long emulator_get_cached_segment_base(
4549         struct x86_emulate_ctxt *ctxt, int seg)
4550 {
4551         return get_segment_base(emul_to_vcpu(ctxt), seg);
4552 }
4553
4554 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4555                                  struct desc_struct *desc, u32 *base3,
4556                                  int seg)
4557 {
4558         struct kvm_segment var;
4559
4560         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4561         *selector = var.selector;
4562
4563         if (var.unusable)
4564                 return false;
4565
4566         if (var.g)
4567                 var.limit >>= 12;
4568         set_desc_limit(desc, var.limit);
4569         set_desc_base(desc, (unsigned long)var.base);
4570 #ifdef CONFIG_X86_64
4571         if (base3)
4572                 *base3 = var.base >> 32;
4573 #endif
4574         desc->type = var.type;
4575         desc->s = var.s;
4576         desc->dpl = var.dpl;
4577         desc->p = var.present;
4578         desc->avl = var.avl;
4579         desc->l = var.l;
4580         desc->d = var.db;
4581         desc->g = var.g;
4582
4583         return true;
4584 }
4585
4586 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4587                                  struct desc_struct *desc, u32 base3,
4588                                  int seg)
4589 {
4590         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4591         struct kvm_segment var;
4592
4593         var.selector = selector;
4594         var.base = get_desc_base(desc);
4595 #ifdef CONFIG_X86_64
4596         var.base |= ((u64)base3) << 32;
4597 #endif
4598         var.limit = get_desc_limit(desc);
4599         if (desc->g)
4600                 var.limit = (var.limit << 12) | 0xfff;
4601         var.type = desc->type;
4602         var.present = desc->p;
4603         var.dpl = desc->dpl;
4604         var.db = desc->d;
4605         var.s = desc->s;
4606         var.l = desc->l;
4607         var.g = desc->g;
4608         var.avl = desc->avl;
4609         var.present = desc->p;
4610         var.unusable = !var.present;
4611         var.padding = 0;
4612
4613         kvm_set_segment(vcpu, &var, seg);
4614         return;
4615 }
4616
4617 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4618                             u32 msr_index, u64 *pdata)
4619 {
4620         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4621 }
4622
4623 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4624                             u32 msr_index, u64 data)
4625 {
4626         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4627 }
4628
4629 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4630 {
4631         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4632 }
4633
4634 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4635 {
4636         preempt_disable();
4637         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4638         /*
4639          * CR0.TS may reference the host fpu state, not the guest fpu state,
4640          * so it may be clear at this point.
4641          */
4642         clts();
4643 }
4644
4645 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4646 {
4647         preempt_enable();
4648 }
4649
4650 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4651                               struct x86_instruction_info *info,
4652                               enum x86_intercept_stage stage)
4653 {
4654         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4655 }
4656
4657 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4658                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4659 {
4660         struct kvm_cpuid_entry2 *cpuid = NULL;
4661
4662         if (eax && ecx)
4663                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4664                                             *eax, *ecx);
4665
4666         if (cpuid) {
4667                 *eax = cpuid->eax;
4668                 *ecx = cpuid->ecx;
4669                 if (ebx)
4670                         *ebx = cpuid->ebx;
4671                 if (edx)
4672                         *edx = cpuid->edx;
4673                 return true;
4674         }
4675
4676         return false;
4677 }
4678
4679 static struct x86_emulate_ops emulate_ops = {
4680         .read_std            = kvm_read_guest_virt_system,
4681         .write_std           = kvm_write_guest_virt_system,
4682         .fetch               = kvm_fetch_guest_virt,
4683         .read_emulated       = emulator_read_emulated,
4684         .write_emulated      = emulator_write_emulated,
4685         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4686         .invlpg              = emulator_invlpg,
4687         .pio_in_emulated     = emulator_pio_in_emulated,
4688         .pio_out_emulated    = emulator_pio_out_emulated,
4689         .get_segment         = emulator_get_segment,
4690         .set_segment         = emulator_set_segment,
4691         .get_cached_segment_base = emulator_get_cached_segment_base,
4692         .get_gdt             = emulator_get_gdt,
4693         .get_idt             = emulator_get_idt,
4694         .set_gdt             = emulator_set_gdt,
4695         .set_idt             = emulator_set_idt,
4696         .get_cr              = emulator_get_cr,
4697         .set_cr              = emulator_set_cr,
4698         .cpl                 = emulator_get_cpl,
4699         .get_dr              = emulator_get_dr,
4700         .set_dr              = emulator_set_dr,
4701         .set_msr             = emulator_set_msr,
4702         .get_msr             = emulator_get_msr,
4703         .halt                = emulator_halt,
4704         .wbinvd              = emulator_wbinvd,
4705         .fix_hypercall       = emulator_fix_hypercall,
4706         .get_fpu             = emulator_get_fpu,
4707         .put_fpu             = emulator_put_fpu,
4708         .intercept           = emulator_intercept,
4709         .get_cpuid           = emulator_get_cpuid,
4710 };
4711
4712 static void cache_all_regs(struct kvm_vcpu *vcpu)
4713 {
4714         kvm_register_read(vcpu, VCPU_REGS_RAX);
4715         kvm_register_read(vcpu, VCPU_REGS_RSP);
4716         kvm_register_read(vcpu, VCPU_REGS_RIP);
4717         vcpu->arch.regs_dirty = ~0;
4718 }
4719
4720 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4721 {
4722         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4723         /*
4724          * an sti; sti; sequence only disable interrupts for the first
4725          * instruction. So, if the last instruction, be it emulated or
4726          * not, left the system with the INT_STI flag enabled, it
4727          * means that the last instruction is an sti. We should not
4728          * leave the flag on in this case. The same goes for mov ss
4729          */
4730         if (!(int_shadow & mask))
4731                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4732 }
4733
4734 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4735 {
4736         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4737         if (ctxt->exception.vector == PF_VECTOR)
4738                 kvm_propagate_fault(vcpu, &ctxt->exception);
4739         else if (ctxt->exception.error_code_valid)
4740                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4741                                       ctxt->exception.error_code);
4742         else
4743                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4744 }
4745
4746 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4747                               const unsigned long *regs)
4748 {
4749         memset(&ctxt->twobyte, 0,
4750                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4751         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4752
4753         ctxt->fetch.start = 0;
4754         ctxt->fetch.end = 0;
4755         ctxt->io_read.pos = 0;
4756         ctxt->io_read.end = 0;
4757         ctxt->mem_read.pos = 0;
4758         ctxt->mem_read.end = 0;
4759 }
4760
4761 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4762 {
4763         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4764         int cs_db, cs_l;
4765
4766         /*
4767          * TODO: fix emulate.c to use guest_read/write_register
4768          * instead of direct ->regs accesses, can save hundred cycles
4769          * on Intel for instructions that don't read/change RSP, for
4770          * for example.
4771          */
4772         cache_all_regs(vcpu);
4773
4774         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4775
4776         ctxt->eflags = kvm_get_rflags(vcpu);
4777         ctxt->eip = kvm_rip_read(vcpu);
4778         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4779                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4780                      cs_l                               ? X86EMUL_MODE_PROT64 :
4781                      cs_db                              ? X86EMUL_MODE_PROT32 :
4782                                                           X86EMUL_MODE_PROT16;
4783         ctxt->guest_mode = is_guest_mode(vcpu);
4784
4785         init_decode_cache(ctxt, vcpu->arch.regs);
4786         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4787 }
4788
4789 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4790 {
4791         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4792         int ret;
4793
4794         init_emulate_ctxt(vcpu);
4795
4796         ctxt->op_bytes = 2;
4797         ctxt->ad_bytes = 2;
4798         ctxt->_eip = ctxt->eip + inc_eip;
4799         ret = emulate_int_real(ctxt, irq);
4800
4801         if (ret != X86EMUL_CONTINUE)
4802                 return EMULATE_FAIL;
4803
4804         ctxt->eip = ctxt->_eip;
4805         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4806         kvm_rip_write(vcpu, ctxt->eip);
4807         kvm_set_rflags(vcpu, ctxt->eflags);
4808
4809         if (irq == NMI_VECTOR)
4810                 vcpu->arch.nmi_pending = 0;
4811         else
4812                 vcpu->arch.interrupt.pending = false;
4813
4814         return EMULATE_DONE;
4815 }
4816 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4817
4818 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4819 {
4820         int r = EMULATE_DONE;
4821
4822         ++vcpu->stat.insn_emulation_fail;
4823         trace_kvm_emulate_insn_failed(vcpu);
4824         if (!is_guest_mode(vcpu)) {
4825                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4826                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4827                 vcpu->run->internal.ndata = 0;
4828                 r = EMULATE_FAIL;
4829         }
4830         kvm_queue_exception(vcpu, UD_VECTOR);
4831
4832         return r;
4833 }
4834
4835 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4836 {
4837         gpa_t gpa;
4838
4839         if (tdp_enabled)
4840                 return false;
4841
4842         /*
4843          * if emulation was due to access to shadowed page table
4844          * and it failed try to unshadow page and re-entetr the
4845          * guest to let CPU execute the instruction.
4846          */
4847         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4848                 return true;
4849
4850         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4851
4852         if (gpa == UNMAPPED_GVA)
4853                 return true; /* let cpu generate fault */
4854
4855         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4856                 return true;
4857
4858         return false;
4859 }
4860
4861 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4862                             unsigned long cr2,
4863                             int emulation_type,
4864                             void *insn,
4865                             int insn_len)
4866 {
4867         int r;
4868         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4869         bool writeback = true;
4870
4871         kvm_clear_exception_queue(vcpu);
4872
4873         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4874                 init_emulate_ctxt(vcpu);
4875                 ctxt->interruptibility = 0;
4876                 ctxt->have_exception = false;
4877                 ctxt->perm_ok = false;
4878
4879                 ctxt->only_vendor_specific_insn
4880                         = emulation_type & EMULTYPE_TRAP_UD;
4881
4882                 r = x86_decode_insn(ctxt, insn, insn_len);
4883
4884                 trace_kvm_emulate_insn_start(vcpu);
4885                 ++vcpu->stat.insn_emulation;
4886                 if (r != EMULATION_OK)  {
4887                         if (emulation_type & EMULTYPE_TRAP_UD)
4888                                 return EMULATE_FAIL;
4889                         if (reexecute_instruction(vcpu, cr2))
4890                                 return EMULATE_DONE;
4891                         if (emulation_type & EMULTYPE_SKIP)
4892                                 return EMULATE_FAIL;
4893                         return handle_emulation_failure(vcpu);
4894                 }
4895         }
4896
4897         if (emulation_type & EMULTYPE_SKIP) {
4898                 kvm_rip_write(vcpu, ctxt->_eip);
4899                 return EMULATE_DONE;
4900         }
4901
4902         /* this is needed for vmware backdoor interface to work since it
4903            changes registers values  during IO operation */
4904         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4905                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4906                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4907         }
4908
4909 restart:
4910         r = x86_emulate_insn(ctxt);
4911
4912         if (r == EMULATION_INTERCEPTED)
4913                 return EMULATE_DONE;
4914
4915         if (r == EMULATION_FAILED) {
4916                 if (reexecute_instruction(vcpu, cr2))
4917                         return EMULATE_DONE;
4918
4919                 return handle_emulation_failure(vcpu);
4920         }
4921
4922         if (ctxt->have_exception) {
4923                 inject_emulated_exception(vcpu);
4924                 r = EMULATE_DONE;
4925         } else if (vcpu->arch.pio.count) {
4926                 if (!vcpu->arch.pio.in)
4927                         vcpu->arch.pio.count = 0;
4928                 else
4929                         writeback = false;
4930                 r = EMULATE_DO_MMIO;
4931         } else if (vcpu->mmio_needed) {
4932                 if (!vcpu->mmio_is_write)
4933                         writeback = false;
4934                 r = EMULATE_DO_MMIO;
4935         } else if (r == EMULATION_RESTART)
4936                 goto restart;
4937         else
4938                 r = EMULATE_DONE;
4939
4940         if (writeback) {
4941                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4942                 kvm_set_rflags(vcpu, ctxt->eflags);
4943                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4944                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4945                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4946                 kvm_rip_write(vcpu, ctxt->eip);
4947         } else
4948                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4949
4950         return r;
4951 }
4952 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4953
4954 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4955 {
4956         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4957         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4958                                             size, port, &val, 1);
4959         /* do not return to emulator after return from userspace */
4960         vcpu->arch.pio.count = 0;
4961         return ret;
4962 }
4963 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4964
4965 static void tsc_bad(void *info)
4966 {
4967         __this_cpu_write(cpu_tsc_khz, 0);
4968 }
4969
4970 static void tsc_khz_changed(void *data)
4971 {
4972         struct cpufreq_freqs *freq = data;
4973         unsigned long khz = 0;
4974
4975         if (data)
4976                 khz = freq->new;
4977         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4978                 khz = cpufreq_quick_get(raw_smp_processor_id());
4979         if (!khz)
4980                 khz = tsc_khz;
4981         __this_cpu_write(cpu_tsc_khz, khz);
4982 }
4983
4984 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4985                                      void *data)
4986 {
4987         struct cpufreq_freqs *freq = data;
4988         struct kvm *kvm;
4989         struct kvm_vcpu *vcpu;
4990         int i, send_ipi = 0;
4991
4992         /*
4993          * We allow guests to temporarily run on slowing clocks,
4994          * provided we notify them after, or to run on accelerating
4995          * clocks, provided we notify them before.  Thus time never
4996          * goes backwards.
4997          *
4998          * However, we have a problem.  We can't atomically update
4999          * the frequency of a given CPU from this function; it is
5000          * merely a notifier, which can be called from any CPU.
5001          * Changing the TSC frequency at arbitrary points in time
5002          * requires a recomputation of local variables related to
5003          * the TSC for each VCPU.  We must flag these local variables
5004          * to be updated and be sure the update takes place with the
5005          * new frequency before any guests proceed.
5006          *
5007          * Unfortunately, the combination of hotplug CPU and frequency
5008          * change creates an intractable locking scenario; the order
5009          * of when these callouts happen is undefined with respect to
5010          * CPU hotplug, and they can race with each other.  As such,
5011          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5012          * undefined; you can actually have a CPU frequency change take
5013          * place in between the computation of X and the setting of the
5014          * variable.  To protect against this problem, all updates of
5015          * the per_cpu tsc_khz variable are done in an interrupt
5016          * protected IPI, and all callers wishing to update the value
5017          * must wait for a synchronous IPI to complete (which is trivial
5018          * if the caller is on the CPU already).  This establishes the
5019          * necessary total order on variable updates.
5020          *
5021          * Note that because a guest time update may take place
5022          * anytime after the setting of the VCPU's request bit, the
5023          * correct TSC value must be set before the request.  However,
5024          * to ensure the update actually makes it to any guest which
5025          * starts running in hardware virtualization between the set
5026          * and the acquisition of the spinlock, we must also ping the
5027          * CPU after setting the request bit.
5028          *
5029          */
5030
5031         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5032                 return 0;
5033         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5034                 return 0;
5035
5036         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5037
5038         raw_spin_lock(&kvm_lock);
5039         list_for_each_entry(kvm, &vm_list, vm_list) {
5040                 kvm_for_each_vcpu(i, vcpu, kvm) {
5041                         if (vcpu->cpu != freq->cpu)
5042                                 continue;
5043                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5044                         if (vcpu->cpu != smp_processor_id())
5045                                 send_ipi = 1;
5046                 }
5047         }
5048         raw_spin_unlock(&kvm_lock);
5049
5050         if (freq->old < freq->new && send_ipi) {
5051                 /*
5052                  * We upscale the frequency.  Must make the guest
5053                  * doesn't see old kvmclock values while running with
5054                  * the new frequency, otherwise we risk the guest sees
5055                  * time go backwards.
5056                  *
5057                  * In case we update the frequency for another cpu
5058                  * (which might be in guest context) send an interrupt
5059                  * to kick the cpu out of guest context.  Next time
5060                  * guest context is entered kvmclock will be updated,
5061                  * so the guest will not see stale values.
5062                  */
5063                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5064         }
5065         return 0;
5066 }
5067
5068 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5069         .notifier_call  = kvmclock_cpufreq_notifier
5070 };
5071
5072 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5073                                         unsigned long action, void *hcpu)
5074 {
5075         unsigned int cpu = (unsigned long)hcpu;
5076
5077         switch (action) {
5078                 case CPU_ONLINE:
5079                 case CPU_DOWN_FAILED:
5080                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5081                         break;
5082                 case CPU_DOWN_PREPARE:
5083                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5084                         break;
5085         }
5086         return NOTIFY_OK;
5087 }
5088
5089 static struct notifier_block kvmclock_cpu_notifier_block = {
5090         .notifier_call  = kvmclock_cpu_notifier,
5091         .priority = -INT_MAX
5092 };
5093
5094 static void kvm_timer_init(void)
5095 {
5096         int cpu;
5097
5098         max_tsc_khz = tsc_khz;
5099         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5100         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5101 #ifdef CONFIG_CPU_FREQ
5102                 struct cpufreq_policy policy;
5103                 memset(&policy, 0, sizeof(policy));
5104                 cpu = get_cpu();
5105                 cpufreq_get_policy(&policy, cpu);
5106                 if (policy.cpuinfo.max_freq)
5107                         max_tsc_khz = policy.cpuinfo.max_freq;
5108                 put_cpu();
5109 #endif
5110                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5111                                           CPUFREQ_TRANSITION_NOTIFIER);
5112         }
5113         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5114         for_each_online_cpu(cpu)
5115                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5116 }
5117
5118 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5119
5120 static int kvm_is_in_guest(void)
5121 {
5122         return percpu_read(current_vcpu) != NULL;
5123 }
5124
5125 static int kvm_is_user_mode(void)
5126 {
5127         int user_mode = 3;
5128
5129         if (percpu_read(current_vcpu))
5130                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5131
5132         return user_mode != 0;
5133 }
5134
5135 static unsigned long kvm_get_guest_ip(void)
5136 {
5137         unsigned long ip = 0;
5138
5139         if (percpu_read(current_vcpu))
5140                 ip = kvm_rip_read(percpu_read(current_vcpu));
5141
5142         return ip;
5143 }
5144
5145 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5146         .is_in_guest            = kvm_is_in_guest,
5147         .is_user_mode           = kvm_is_user_mode,
5148         .get_guest_ip           = kvm_get_guest_ip,
5149 };
5150
5151 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5152 {
5153         percpu_write(current_vcpu, vcpu);
5154 }
5155 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5156
5157 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5158 {
5159         percpu_write(current_vcpu, NULL);
5160 }
5161 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5162
5163 static void kvm_set_mmio_spte_mask(void)
5164 {
5165         u64 mask;
5166         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5167
5168         /*
5169          * Set the reserved bits and the present bit of an paging-structure
5170          * entry to generate page fault with PFER.RSV = 1.
5171          */
5172         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5173         mask |= 1ull;
5174
5175 #ifdef CONFIG_X86_64
5176         /*
5177          * If reserved bit is not supported, clear the present bit to disable
5178          * mmio page fault.
5179          */
5180         if (maxphyaddr == 52)
5181                 mask &= ~1ull;
5182 #endif
5183
5184         kvm_mmu_set_mmio_spte_mask(mask);
5185 }
5186
5187 int kvm_arch_init(void *opaque)
5188 {
5189         int r;
5190         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5191
5192         if (kvm_x86_ops) {
5193                 printk(KERN_ERR "kvm: already loaded the other module\n");
5194                 r = -EEXIST;
5195                 goto out;
5196         }
5197
5198         if (!ops->cpu_has_kvm_support()) {
5199                 printk(KERN_ERR "kvm: no hardware support\n");
5200                 r = -EOPNOTSUPP;
5201                 goto out;
5202         }
5203         if (ops->disabled_by_bios()) {
5204                 printk(KERN_ERR "kvm: disabled by bios\n");
5205                 r = -EOPNOTSUPP;
5206                 goto out;
5207         }
5208
5209         r = kvm_mmu_module_init();
5210         if (r)
5211                 goto out;
5212
5213         kvm_set_mmio_spte_mask();
5214         kvm_init_msr_list();
5215
5216         kvm_x86_ops = ops;
5217         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5218                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5219
5220         kvm_timer_init();
5221
5222         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5223
5224         if (cpu_has_xsave)
5225                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5226
5227         return 0;
5228
5229 out:
5230         return r;
5231 }
5232
5233 void kvm_arch_exit(void)
5234 {
5235         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5236
5237         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5238                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5239                                             CPUFREQ_TRANSITION_NOTIFIER);
5240         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5241         kvm_x86_ops = NULL;
5242         kvm_mmu_module_exit();
5243 }
5244
5245 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5246 {
5247         ++vcpu->stat.halt_exits;
5248         if (irqchip_in_kernel(vcpu->kvm)) {
5249                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5250                 return 1;
5251         } else {
5252                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5253                 return 0;
5254         }
5255 }
5256 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5257
5258 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5259                            unsigned long a1)
5260 {
5261         if (is_long_mode(vcpu))
5262                 return a0;
5263         else
5264                 return a0 | ((gpa_t)a1 << 32);
5265 }
5266
5267 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5268 {
5269         u64 param, ingpa, outgpa, ret;
5270         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5271         bool fast, longmode;
5272         int cs_db, cs_l;
5273
5274         /*
5275          * hypercall generates UD from non zero cpl and real mode
5276          * per HYPER-V spec
5277          */
5278         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5279                 kvm_queue_exception(vcpu, UD_VECTOR);
5280                 return 0;
5281         }
5282
5283         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5284         longmode = is_long_mode(vcpu) && cs_l == 1;
5285
5286         if (!longmode) {
5287                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5288                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5289                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5290                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5291                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5292                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5293         }
5294 #ifdef CONFIG_X86_64
5295         else {
5296                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5297                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5298                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5299         }
5300 #endif
5301
5302         code = param & 0xffff;
5303         fast = (param >> 16) & 0x1;
5304         rep_cnt = (param >> 32) & 0xfff;
5305         rep_idx = (param >> 48) & 0xfff;
5306
5307         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5308
5309         switch (code) {
5310         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5311                 kvm_vcpu_on_spin(vcpu);
5312                 break;
5313         default:
5314                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5315                 break;
5316         }
5317
5318         ret = res | (((u64)rep_done & 0xfff) << 32);
5319         if (longmode) {
5320                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5321         } else {
5322                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5323                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5324         }
5325
5326         return 1;
5327 }
5328
5329 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5330 {
5331         unsigned long nr, a0, a1, a2, a3, ret;
5332         int r = 1;
5333
5334         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5335                 return kvm_hv_hypercall(vcpu);
5336
5337         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5338         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5339         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5340         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5341         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5342
5343         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5344
5345         if (!is_long_mode(vcpu)) {
5346                 nr &= 0xFFFFFFFF;
5347                 a0 &= 0xFFFFFFFF;
5348                 a1 &= 0xFFFFFFFF;
5349                 a2 &= 0xFFFFFFFF;
5350                 a3 &= 0xFFFFFFFF;
5351         }
5352
5353         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5354                 ret = -KVM_EPERM;
5355                 goto out;
5356         }
5357
5358         switch (nr) {
5359         case KVM_HC_VAPIC_POLL_IRQ:
5360                 ret = 0;
5361                 break;
5362         case KVM_HC_MMU_OP:
5363                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5364                 break;
5365         default:
5366                 ret = -KVM_ENOSYS;
5367                 break;
5368         }
5369 out:
5370         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5371         ++vcpu->stat.hypercalls;
5372         return r;
5373 }
5374 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5375
5376 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5377 {
5378         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5379         char instruction[3];
5380         unsigned long rip = kvm_rip_read(vcpu);
5381
5382         /*
5383          * Blow out the MMU to ensure that no other VCPU has an active mapping
5384          * to ensure that the updated hypercall appears atomically across all
5385          * VCPUs.
5386          */
5387         kvm_mmu_zap_all(vcpu->kvm);
5388
5389         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5390
5391         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5392 }
5393
5394 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5395 {
5396         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5397         int j, nent = vcpu->arch.cpuid_nent;
5398
5399         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5400         /* when no next entry is found, the current entry[i] is reselected */
5401         for (j = i + 1; ; j = (j + 1) % nent) {
5402                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5403                 if (ej->function == e->function) {
5404                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5405                         return j;
5406                 }
5407         }
5408         return 0; /* silence gcc, even though control never reaches here */
5409 }
5410
5411 /* find an entry with matching function, matching index (if needed), and that
5412  * should be read next (if it's stateful) */
5413 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5414         u32 function, u32 index)
5415 {
5416         if (e->function != function)
5417                 return 0;
5418         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5419                 return 0;
5420         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5421             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5422                 return 0;
5423         return 1;
5424 }
5425
5426 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5427                                               u32 function, u32 index)
5428 {
5429         int i;
5430         struct kvm_cpuid_entry2 *best = NULL;
5431
5432         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5433                 struct kvm_cpuid_entry2 *e;
5434
5435                 e = &vcpu->arch.cpuid_entries[i];
5436                 if (is_matching_cpuid_entry(e, function, index)) {
5437                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5438                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5439                         best = e;
5440                         break;
5441                 }
5442         }
5443         return best;
5444 }
5445 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5446
5447 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5448 {
5449         struct kvm_cpuid_entry2 *best;
5450
5451         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5452         if (!best || best->eax < 0x80000008)
5453                 goto not_found;
5454         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5455         if (best)
5456                 return best->eax & 0xff;
5457 not_found:
5458         return 36;
5459 }
5460
5461 /*
5462  * If no match is found, check whether we exceed the vCPU's limit
5463  * and return the content of the highest valid _standard_ leaf instead.
5464  * This is to satisfy the CPUID specification.
5465  */
5466 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5467                                                   u32 function, u32 index)
5468 {
5469         struct kvm_cpuid_entry2 *maxlevel;
5470
5471         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5472         if (!maxlevel || maxlevel->eax >= function)
5473                 return NULL;
5474         if (function & 0x80000000) {
5475                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5476                 if (!maxlevel)
5477                         return NULL;
5478         }
5479         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5480 }
5481
5482 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5483 {
5484         u32 function, index;
5485         struct kvm_cpuid_entry2 *best;
5486
5487         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5488         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5489         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5490         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5491         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5492         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5493         best = kvm_find_cpuid_entry(vcpu, function, index);
5494
5495         if (!best)
5496                 best = check_cpuid_limit(vcpu, function, index);
5497
5498         if (best) {
5499                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5500                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5501                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5502                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5503         }
5504         kvm_x86_ops->skip_emulated_instruction(vcpu);
5505         trace_kvm_cpuid(function,
5506                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5507                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5508                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5509                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5510 }
5511 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5512
5513 /*
5514  * Check if userspace requested an interrupt window, and that the
5515  * interrupt window is open.
5516  *
5517  * No need to exit to userspace if we already have an interrupt queued.
5518  */
5519 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5520 {
5521         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5522                 vcpu->run->request_interrupt_window &&
5523                 kvm_arch_interrupt_allowed(vcpu));
5524 }
5525
5526 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5527 {
5528         struct kvm_run *kvm_run = vcpu->run;
5529
5530         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5531         kvm_run->cr8 = kvm_get_cr8(vcpu);
5532         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5533         if (irqchip_in_kernel(vcpu->kvm))
5534                 kvm_run->ready_for_interrupt_injection = 1;
5535         else
5536                 kvm_run->ready_for_interrupt_injection =
5537                         kvm_arch_interrupt_allowed(vcpu) &&
5538                         !kvm_cpu_has_interrupt(vcpu) &&
5539                         !kvm_event_needs_reinjection(vcpu);
5540 }
5541
5542 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5543 {
5544         int max_irr, tpr;
5545
5546         if (!kvm_x86_ops->update_cr8_intercept)
5547                 return;
5548
5549         if (!vcpu->arch.apic)
5550                 return;
5551
5552         if (!vcpu->arch.apic->vapic_addr)
5553                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5554         else
5555                 max_irr = -1;
5556
5557         if (max_irr != -1)
5558                 max_irr >>= 4;
5559
5560         tpr = kvm_lapic_get_cr8(vcpu);
5561
5562         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5563 }
5564
5565 static void inject_pending_event(struct kvm_vcpu *vcpu)
5566 {
5567         /* try to reinject previous events if any */
5568         if (vcpu->arch.exception.pending) {
5569                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5570                                         vcpu->arch.exception.has_error_code,
5571                                         vcpu->arch.exception.error_code);
5572                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5573                                           vcpu->arch.exception.has_error_code,
5574                                           vcpu->arch.exception.error_code,
5575                                           vcpu->arch.exception.reinject);
5576                 return;
5577         }
5578
5579         if (vcpu->arch.nmi_injected) {
5580                 kvm_x86_ops->set_nmi(vcpu);
5581                 return;
5582         }
5583
5584         if (vcpu->arch.interrupt.pending) {
5585                 kvm_x86_ops->set_irq(vcpu);
5586                 return;
5587         }
5588
5589         /* try to inject new event if pending */
5590         if (vcpu->arch.nmi_pending) {
5591                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5592                         --vcpu->arch.nmi_pending;
5593                         vcpu->arch.nmi_injected = true;
5594                         kvm_x86_ops->set_nmi(vcpu);
5595                 }
5596         } else if (kvm_cpu_has_interrupt(vcpu)) {
5597                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5598                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5599                                             false);
5600                         kvm_x86_ops->set_irq(vcpu);
5601                 }
5602         }
5603 }
5604
5605 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5606 {
5607         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5608                         !vcpu->guest_xcr0_loaded) {
5609                 /* kvm_set_xcr() also depends on this */
5610                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5611                 vcpu->guest_xcr0_loaded = 1;
5612         }
5613 }
5614
5615 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5616 {
5617         if (vcpu->guest_xcr0_loaded) {
5618                 if (vcpu->arch.xcr0 != host_xcr0)
5619                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5620                 vcpu->guest_xcr0_loaded = 0;
5621         }
5622 }
5623
5624 static void process_nmi(struct kvm_vcpu *vcpu)
5625 {
5626         unsigned limit = 2;
5627
5628         /*
5629          * x86 is limited to one NMI running, and one NMI pending after it.
5630          * If an NMI is already in progress, limit further NMIs to just one.
5631          * Otherwise, allow two (and we'll inject the first one immediately).
5632          */
5633         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5634                 limit = 1;
5635
5636         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5637         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5638         kvm_make_request(KVM_REQ_EVENT, vcpu);
5639 }
5640
5641 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5642 {
5643         int r;
5644         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5645                 vcpu->run->request_interrupt_window;
5646
5647         if (vcpu->requests) {
5648                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5649                         kvm_mmu_unload(vcpu);
5650                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5651                         __kvm_migrate_timers(vcpu);
5652                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5653                         r = kvm_guest_time_update(vcpu);
5654                         if (unlikely(r))
5655                                 goto out;
5656                 }
5657                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5658                         kvm_mmu_sync_roots(vcpu);
5659                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5660                         kvm_x86_ops->tlb_flush(vcpu);
5661                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5662                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5663                         r = 0;
5664                         goto out;
5665                 }
5666                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5667                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5668                         r = 0;
5669                         goto out;
5670                 }
5671                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5672                         vcpu->fpu_active = 0;
5673                         kvm_x86_ops->fpu_deactivate(vcpu);
5674                 }
5675                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5676                         /* Page is swapped out. Do synthetic halt */
5677                         vcpu->arch.apf.halted = true;
5678                         r = 1;
5679                         goto out;
5680                 }
5681                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5682                         record_steal_time(vcpu);
5683                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5684                         process_nmi(vcpu);
5685
5686         }
5687
5688         r = kvm_mmu_reload(vcpu);
5689         if (unlikely(r))
5690                 goto out;
5691
5692         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5693                 inject_pending_event(vcpu);
5694
5695                 /* enable NMI/IRQ window open exits if needed */
5696                 if (vcpu->arch.nmi_pending)
5697                         kvm_x86_ops->enable_nmi_window(vcpu);
5698                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5699                         kvm_x86_ops->enable_irq_window(vcpu);
5700
5701                 if (kvm_lapic_enabled(vcpu)) {
5702                         update_cr8_intercept(vcpu);
5703                         kvm_lapic_sync_to_vapic(vcpu);
5704                 }
5705         }
5706
5707         preempt_disable();
5708
5709         kvm_x86_ops->prepare_guest_switch(vcpu);
5710         if (vcpu->fpu_active)
5711                 kvm_load_guest_fpu(vcpu);
5712         kvm_load_guest_xcr0(vcpu);
5713
5714         vcpu->mode = IN_GUEST_MODE;
5715
5716         /* We should set ->mode before check ->requests,
5717          * see the comment in make_all_cpus_request.
5718          */
5719         smp_mb();
5720
5721         local_irq_disable();
5722
5723         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5724             || need_resched() || signal_pending(current)) {
5725                 vcpu->mode = OUTSIDE_GUEST_MODE;
5726                 smp_wmb();
5727                 local_irq_enable();
5728                 preempt_enable();
5729                 kvm_x86_ops->cancel_injection(vcpu);
5730                 r = 1;
5731                 goto out;
5732         }
5733
5734         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5735
5736         kvm_guest_enter();
5737
5738         if (unlikely(vcpu->arch.switch_db_regs)) {
5739                 set_debugreg(0, 7);
5740                 set_debugreg(vcpu->arch.eff_db[0], 0);
5741                 set_debugreg(vcpu->arch.eff_db[1], 1);
5742                 set_debugreg(vcpu->arch.eff_db[2], 2);
5743                 set_debugreg(vcpu->arch.eff_db[3], 3);
5744         }
5745
5746         trace_kvm_entry(vcpu->vcpu_id);
5747         kvm_x86_ops->run(vcpu);
5748
5749         /*
5750          * If the guest has used debug registers, at least dr7
5751          * will be disabled while returning to the host.
5752          * If we don't have active breakpoints in the host, we don't
5753          * care about the messed up debug address registers. But if
5754          * we have some of them active, restore the old state.
5755          */
5756         if (hw_breakpoint_active())
5757                 hw_breakpoint_restore();
5758
5759         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5760
5761         vcpu->mode = OUTSIDE_GUEST_MODE;
5762         smp_wmb();
5763         local_irq_enable();
5764
5765         ++vcpu->stat.exits;
5766
5767         /*
5768          * We must have an instruction between local_irq_enable() and
5769          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5770          * the interrupt shadow.  The stat.exits increment will do nicely.
5771          * But we need to prevent reordering, hence this barrier():
5772          */
5773         barrier();
5774
5775         kvm_guest_exit();
5776
5777         preempt_enable();
5778
5779         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5780
5781         /*
5782          * Profile KVM exit RIPs:
5783          */
5784         if (unlikely(prof_on == KVM_PROFILING)) {
5785                 unsigned long rip = kvm_rip_read(vcpu);
5786                 profile_hit(KVM_PROFILING, (void *)rip);
5787         }
5788
5789
5790         kvm_lapic_sync_from_vapic(vcpu);
5791
5792         r = kvm_x86_ops->handle_exit(vcpu);
5793 out:
5794         return r;
5795 }
5796
5797
5798 static int __vcpu_run(struct kvm_vcpu *vcpu)
5799 {
5800         int r;
5801         struct kvm *kvm = vcpu->kvm;
5802
5803         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5804                 pr_debug("vcpu %d received sipi with vector # %x\n",
5805                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5806                 kvm_lapic_reset(vcpu);
5807                 r = kvm_arch_vcpu_reset(vcpu);
5808                 if (r)
5809                         return r;
5810                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5811         }
5812
5813         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5814
5815         r = 1;
5816         while (r > 0) {
5817                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5818                     !vcpu->arch.apf.halted)
5819                         r = vcpu_enter_guest(vcpu);
5820                 else {
5821                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5822                         kvm_vcpu_block(vcpu);
5823                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5824                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5825                         {
5826                                 switch(vcpu->arch.mp_state) {
5827                                 case KVM_MP_STATE_HALTED:
5828                                         vcpu->arch.mp_state =
5829                                                 KVM_MP_STATE_RUNNABLE;
5830                                 case KVM_MP_STATE_RUNNABLE:
5831                                         vcpu->arch.apf.halted = false;
5832                                         break;
5833                                 case KVM_MP_STATE_SIPI_RECEIVED:
5834                                 default:
5835                                         r = -EINTR;
5836                                         break;
5837                                 }
5838                         }
5839                 }
5840
5841                 if (r <= 0)
5842                         break;
5843
5844                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5845                 if (kvm_cpu_has_pending_timer(vcpu))
5846                         kvm_inject_pending_timer_irqs(vcpu);
5847
5848                 if (dm_request_for_irq_injection(vcpu)) {
5849                         r = -EINTR;
5850                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5851                         ++vcpu->stat.request_irq_exits;
5852                 }
5853
5854                 kvm_check_async_pf_completion(vcpu);
5855
5856                 if (signal_pending(current)) {
5857                         r = -EINTR;
5858                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5859                         ++vcpu->stat.signal_exits;
5860                 }
5861                 if (need_resched()) {
5862                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5863                         kvm_resched(vcpu);
5864                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5865                 }
5866         }
5867
5868         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5869
5870         return r;
5871 }
5872
5873 static int complete_mmio(struct kvm_vcpu *vcpu)
5874 {
5875         struct kvm_run *run = vcpu->run;
5876         int r;
5877
5878         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5879                 return 1;
5880
5881         if (vcpu->mmio_needed) {
5882                 vcpu->mmio_needed = 0;
5883                 if (!vcpu->mmio_is_write)
5884                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5885                                run->mmio.data, 8);
5886                 vcpu->mmio_index += 8;
5887                 if (vcpu->mmio_index < vcpu->mmio_size) {
5888                         run->exit_reason = KVM_EXIT_MMIO;
5889                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5890                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5891                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5892                         run->mmio.is_write = vcpu->mmio_is_write;
5893                         vcpu->mmio_needed = 1;
5894                         return 0;
5895                 }
5896                 if (vcpu->mmio_is_write)
5897                         return 1;
5898                 vcpu->mmio_read_completed = 1;
5899         }
5900         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5901         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5902         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5903         if (r != EMULATE_DONE)
5904                 return 0;
5905         return 1;
5906 }
5907
5908 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5909 {
5910         int r;
5911         sigset_t sigsaved;
5912
5913         if (!tsk_used_math(current) && init_fpu(current))
5914                 return -ENOMEM;
5915
5916         if (vcpu->sigset_active)
5917                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5918
5919         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5920                 kvm_vcpu_block(vcpu);
5921                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5922                 r = -EAGAIN;
5923                 goto out;
5924         }
5925
5926         /* re-sync apic's tpr */
5927         if (!irqchip_in_kernel(vcpu->kvm)) {
5928                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5929                         r = -EINVAL;
5930                         goto out;
5931                 }
5932         }
5933
5934         r = complete_mmio(vcpu);
5935         if (r <= 0)
5936                 goto out;
5937
5938         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5939                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5940                                      kvm_run->hypercall.ret);
5941
5942         r = __vcpu_run(vcpu);
5943
5944 out:
5945         post_kvm_run_save(vcpu);
5946         if (vcpu->sigset_active)
5947                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5948
5949         return r;
5950 }
5951
5952 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5953 {
5954         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5955                 /*
5956                  * We are here if userspace calls get_regs() in the middle of
5957                  * instruction emulation. Registers state needs to be copied
5958                  * back from emulation context to vcpu. Usrapace shouldn't do
5959                  * that usually, but some bad designed PV devices (vmware
5960                  * backdoor interface) need this to work
5961                  */
5962                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5963                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5964                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5965         }
5966         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5967         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5968         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5969         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5970         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5971         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5972         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5973         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5974 #ifdef CONFIG_X86_64
5975         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5976         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5977         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5978         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5979         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5980         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5981         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5982         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5983 #endif
5984
5985         regs->rip = kvm_rip_read(vcpu);
5986         regs->rflags = kvm_get_rflags(vcpu);
5987
5988         return 0;
5989 }
5990
5991 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5992 {
5993         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5994         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5995
5996         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5997         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5998         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5999         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6000         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6001         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6002         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6003         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6004 #ifdef CONFIG_X86_64
6005         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6006         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6007         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6008         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6009         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6010         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6011         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6012         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6013 #endif
6014
6015         kvm_rip_write(vcpu, regs->rip);
6016         kvm_set_rflags(vcpu, regs->rflags);
6017
6018         vcpu->arch.exception.pending = false;
6019
6020         kvm_make_request(KVM_REQ_EVENT, vcpu);
6021
6022         return 0;
6023 }
6024
6025 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6026 {
6027         struct kvm_segment cs;
6028
6029         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6030         *db = cs.db;
6031         *l = cs.l;
6032 }
6033 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6034
6035 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6036                                   struct kvm_sregs *sregs)
6037 {
6038         struct desc_ptr dt;
6039
6040         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6041         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6042         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6043         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6044         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6045         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6046
6047         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6048         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6049
6050         kvm_x86_ops->get_idt(vcpu, &dt);
6051         sregs->idt.limit = dt.size;
6052         sregs->idt.base = dt.address;
6053         kvm_x86_ops->get_gdt(vcpu, &dt);
6054         sregs->gdt.limit = dt.size;
6055         sregs->gdt.base = dt.address;
6056
6057         sregs->cr0 = kvm_read_cr0(vcpu);
6058         sregs->cr2 = vcpu->arch.cr2;
6059         sregs->cr3 = kvm_read_cr3(vcpu);
6060         sregs->cr4 = kvm_read_cr4(vcpu);
6061         sregs->cr8 = kvm_get_cr8(vcpu);
6062         sregs->efer = vcpu->arch.efer;
6063         sregs->apic_base = kvm_get_apic_base(vcpu);
6064
6065         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6066
6067         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6068                 set_bit(vcpu->arch.interrupt.nr,
6069                         (unsigned long *)sregs->interrupt_bitmap);
6070
6071         return 0;
6072 }
6073
6074 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6075                                     struct kvm_mp_state *mp_state)
6076 {
6077         mp_state->mp_state = vcpu->arch.mp_state;
6078         return 0;
6079 }
6080
6081 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6082                                     struct kvm_mp_state *mp_state)
6083 {
6084         vcpu->arch.mp_state = mp_state->mp_state;
6085         kvm_make_request(KVM_REQ_EVENT, vcpu);
6086         return 0;
6087 }
6088
6089 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6090                     bool has_error_code, u32 error_code)
6091 {
6092         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6093         int ret;
6094
6095         init_emulate_ctxt(vcpu);
6096
6097         ret = emulator_task_switch(ctxt, tss_selector, reason,
6098                                    has_error_code, error_code);
6099
6100         if (ret)
6101                 return EMULATE_FAIL;
6102
6103         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6104         kvm_rip_write(vcpu, ctxt->eip);
6105         kvm_set_rflags(vcpu, ctxt->eflags);
6106         kvm_make_request(KVM_REQ_EVENT, vcpu);
6107         return EMULATE_DONE;
6108 }
6109 EXPORT_SYMBOL_GPL(kvm_task_switch);
6110
6111 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6112                                   struct kvm_sregs *sregs)
6113 {
6114         int mmu_reset_needed = 0;
6115         int pending_vec, max_bits, idx;
6116         struct desc_ptr dt;
6117
6118         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6119                 return -EINVAL;
6120
6121         dt.size = sregs->idt.limit;
6122         dt.address = sregs->idt.base;
6123         kvm_x86_ops->set_idt(vcpu, &dt);
6124         dt.size = sregs->gdt.limit;
6125         dt.address = sregs->gdt.base;
6126         kvm_x86_ops->set_gdt(vcpu, &dt);
6127
6128         vcpu->arch.cr2 = sregs->cr2;
6129         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6130         vcpu->arch.cr3 = sregs->cr3;
6131         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6132
6133         kvm_set_cr8(vcpu, sregs->cr8);
6134
6135         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6136         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6137         kvm_set_apic_base(vcpu, sregs->apic_base);
6138
6139         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6140         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6141         vcpu->arch.cr0 = sregs->cr0;
6142
6143         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6144         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6145         if (sregs->cr4 & X86_CR4_OSXSAVE)
6146                 update_cpuid(vcpu);
6147
6148         idx = srcu_read_lock(&vcpu->kvm->srcu);
6149         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6150                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6151                 mmu_reset_needed = 1;
6152         }
6153         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6154
6155         if (mmu_reset_needed)
6156                 kvm_mmu_reset_context(vcpu);
6157
6158         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6159         pending_vec = find_first_bit(
6160                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6161         if (pending_vec < max_bits) {
6162                 kvm_queue_interrupt(vcpu, pending_vec, false);
6163                 pr_debug("Set back pending irq %d\n", pending_vec);
6164         }
6165
6166         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6167         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6168         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6169         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6170         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6171         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6172
6173         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6174         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6175
6176         update_cr8_intercept(vcpu);
6177
6178         /* Older userspace won't unhalt the vcpu on reset. */
6179         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6180             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6181             !is_protmode(vcpu))
6182                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6183
6184         kvm_make_request(KVM_REQ_EVENT, vcpu);
6185
6186         return 0;
6187 }
6188
6189 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6190                                         struct kvm_guest_debug *dbg)
6191 {
6192         unsigned long rflags;
6193         int i, r;
6194
6195         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6196                 r = -EBUSY;
6197                 if (vcpu->arch.exception.pending)
6198                         goto out;
6199                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6200                         kvm_queue_exception(vcpu, DB_VECTOR);
6201                 else
6202                         kvm_queue_exception(vcpu, BP_VECTOR);
6203         }
6204
6205         /*
6206          * Read rflags as long as potentially injected trace flags are still
6207          * filtered out.
6208          */
6209         rflags = kvm_get_rflags(vcpu);
6210
6211         vcpu->guest_debug = dbg->control;
6212         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6213                 vcpu->guest_debug = 0;
6214
6215         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6216                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6217                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6218                 vcpu->arch.switch_db_regs =
6219                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6220         } else {
6221                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6222                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6223                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6224         }
6225
6226         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6227                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6228                         get_segment_base(vcpu, VCPU_SREG_CS);
6229
6230         /*
6231          * Trigger an rflags update that will inject or remove the trace
6232          * flags.
6233          */
6234         kvm_set_rflags(vcpu, rflags);
6235
6236         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6237
6238         r = 0;
6239
6240 out:
6241
6242         return r;
6243 }
6244
6245 /*
6246  * Translate a guest virtual address to a guest physical address.
6247  */
6248 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6249                                     struct kvm_translation *tr)
6250 {
6251         unsigned long vaddr = tr->linear_address;
6252         gpa_t gpa;
6253         int idx;
6254
6255         idx = srcu_read_lock(&vcpu->kvm->srcu);
6256         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6257         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6258         tr->physical_address = gpa;
6259         tr->valid = gpa != UNMAPPED_GVA;
6260         tr->writeable = 1;
6261         tr->usermode = 0;
6262
6263         return 0;
6264 }
6265
6266 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6267 {
6268         struct i387_fxsave_struct *fxsave =
6269                         &vcpu->arch.guest_fpu.state->fxsave;
6270
6271         memcpy(fpu->fpr, fxsave->st_space, 128);
6272         fpu->fcw = fxsave->cwd;
6273         fpu->fsw = fxsave->swd;
6274         fpu->ftwx = fxsave->twd;
6275         fpu->last_opcode = fxsave->fop;
6276         fpu->last_ip = fxsave->rip;
6277         fpu->last_dp = fxsave->rdp;
6278         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6279
6280         return 0;
6281 }
6282
6283 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6284 {
6285         struct i387_fxsave_struct *fxsave =
6286                         &vcpu->arch.guest_fpu.state->fxsave;
6287
6288         memcpy(fxsave->st_space, fpu->fpr, 128);
6289         fxsave->cwd = fpu->fcw;
6290         fxsave->swd = fpu->fsw;
6291         fxsave->twd = fpu->ftwx;
6292         fxsave->fop = fpu->last_opcode;
6293         fxsave->rip = fpu->last_ip;
6294         fxsave->rdp = fpu->last_dp;
6295         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6296
6297         return 0;
6298 }
6299
6300 int fx_init(struct kvm_vcpu *vcpu)
6301 {
6302         int err;
6303
6304         err = fpu_alloc(&vcpu->arch.guest_fpu);
6305         if (err)
6306                 return err;
6307
6308         fpu_finit(&vcpu->arch.guest_fpu);
6309
6310         /*
6311          * Ensure guest xcr0 is valid for loading
6312          */
6313         vcpu->arch.xcr0 = XSTATE_FP;
6314
6315         vcpu->arch.cr0 |= X86_CR0_ET;
6316
6317         return 0;
6318 }
6319 EXPORT_SYMBOL_GPL(fx_init);
6320
6321 static void fx_free(struct kvm_vcpu *vcpu)
6322 {
6323         fpu_free(&vcpu->arch.guest_fpu);
6324 }
6325
6326 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6327 {
6328         if (vcpu->guest_fpu_loaded)
6329                 return;
6330
6331         /*
6332          * Restore all possible states in the guest,
6333          * and assume host would use all available bits.
6334          * Guest xcr0 would be loaded later.
6335          */
6336         kvm_put_guest_xcr0(vcpu);
6337         vcpu->guest_fpu_loaded = 1;
6338         unlazy_fpu(current);
6339         fpu_restore_checking(&vcpu->arch.guest_fpu);
6340         trace_kvm_fpu(1);
6341 }
6342
6343 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6344 {
6345         kvm_put_guest_xcr0(vcpu);
6346
6347         if (!vcpu->guest_fpu_loaded)
6348                 return;
6349
6350         vcpu->guest_fpu_loaded = 0;
6351         fpu_save_init(&vcpu->arch.guest_fpu);
6352         ++vcpu->stat.fpu_reload;
6353         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6354         trace_kvm_fpu(0);
6355 }
6356
6357 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6358 {
6359         kvmclock_reset(vcpu);
6360
6361         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6362         fx_free(vcpu);
6363         kvm_x86_ops->vcpu_free(vcpu);
6364 }
6365
6366 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6367                                                 unsigned int id)
6368 {
6369         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6370                 printk_once(KERN_WARNING
6371                 "kvm: SMP vm created on host with unstable TSC; "
6372                 "guest TSC will not be reliable\n");
6373         return kvm_x86_ops->vcpu_create(kvm, id);
6374 }
6375
6376 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6377 {
6378         int r;
6379
6380         vcpu->arch.mtrr_state.have_fixed = 1;
6381         vcpu_load(vcpu);
6382         r = kvm_arch_vcpu_reset(vcpu);
6383         if (r == 0)
6384                 r = kvm_mmu_setup(vcpu);
6385         vcpu_put(vcpu);
6386
6387         return r;
6388 }
6389
6390 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6391 {
6392         vcpu->arch.apf.msr_val = 0;
6393
6394         vcpu_load(vcpu);
6395         kvm_mmu_unload(vcpu);
6396         vcpu_put(vcpu);
6397
6398         fx_free(vcpu);
6399         kvm_x86_ops->vcpu_free(vcpu);
6400 }
6401
6402 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6403 {
6404         atomic_set(&vcpu->arch.nmi_queued, 0);
6405         vcpu->arch.nmi_pending = 0;
6406         vcpu->arch.nmi_injected = false;
6407
6408         vcpu->arch.switch_db_regs = 0;
6409         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6410         vcpu->arch.dr6 = DR6_FIXED_1;
6411         vcpu->arch.dr7 = DR7_FIXED_1;
6412
6413         kvm_make_request(KVM_REQ_EVENT, vcpu);
6414         vcpu->arch.apf.msr_val = 0;
6415         vcpu->arch.st.msr_val = 0;
6416
6417         kvmclock_reset(vcpu);
6418
6419         kvm_clear_async_pf_completion_queue(vcpu);
6420         kvm_async_pf_hash_reset(vcpu);
6421         vcpu->arch.apf.halted = false;
6422
6423         return kvm_x86_ops->vcpu_reset(vcpu);
6424 }
6425
6426 int kvm_arch_hardware_enable(void *garbage)
6427 {
6428         struct kvm *kvm;
6429         struct kvm_vcpu *vcpu;
6430         int i;
6431
6432         kvm_shared_msr_cpu_online();
6433         list_for_each_entry(kvm, &vm_list, vm_list)
6434                 kvm_for_each_vcpu(i, vcpu, kvm)
6435                         if (vcpu->cpu == smp_processor_id())
6436                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6437         return kvm_x86_ops->hardware_enable(garbage);
6438 }
6439
6440 void kvm_arch_hardware_disable(void *garbage)
6441 {
6442         kvm_x86_ops->hardware_disable(garbage);
6443         drop_user_return_notifiers(garbage);
6444 }
6445
6446 int kvm_arch_hardware_setup(void)
6447 {
6448         return kvm_x86_ops->hardware_setup();
6449 }
6450
6451 void kvm_arch_hardware_unsetup(void)
6452 {
6453         kvm_x86_ops->hardware_unsetup();
6454 }
6455
6456 void kvm_arch_check_processor_compat(void *rtn)
6457 {
6458         kvm_x86_ops->check_processor_compatibility(rtn);
6459 }
6460
6461 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6462 {
6463         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6464 }
6465
6466 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6467 {
6468         struct page *page;
6469         struct kvm *kvm;
6470         int r;
6471
6472         BUG_ON(vcpu->kvm == NULL);
6473         kvm = vcpu->kvm;
6474
6475         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6476         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6477         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6478         vcpu->arch.mmu.translate_gpa = translate_gpa;
6479         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6480         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6481                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6482         else
6483                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6484
6485         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6486         if (!page) {
6487                 r = -ENOMEM;
6488                 goto fail;
6489         }
6490         vcpu->arch.pio_data = page_address(page);
6491
6492         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6493
6494         r = kvm_mmu_create(vcpu);
6495         if (r < 0)
6496                 goto fail_free_pio_data;
6497
6498         if (irqchip_in_kernel(kvm)) {
6499                 r = kvm_create_lapic(vcpu);
6500                 if (r < 0)
6501                         goto fail_mmu_destroy;
6502         }
6503
6504         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6505                                        GFP_KERNEL);
6506         if (!vcpu->arch.mce_banks) {
6507                 r = -ENOMEM;
6508                 goto fail_free_lapic;
6509         }
6510         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6511
6512         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6513                 goto fail_free_mce_banks;
6514
6515         vcpu->arch.pv_time_enabled = false;
6516         kvm_async_pf_hash_reset(vcpu);
6517
6518         return 0;
6519 fail_free_mce_banks:
6520         kfree(vcpu->arch.mce_banks);
6521 fail_free_lapic:
6522         kvm_free_lapic(vcpu);
6523 fail_mmu_destroy:
6524         kvm_mmu_destroy(vcpu);
6525 fail_free_pio_data:
6526         free_page((unsigned long)vcpu->arch.pio_data);
6527 fail:
6528         return r;
6529 }
6530
6531 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6532 {
6533         int idx;
6534
6535         kfree(vcpu->arch.mce_banks);
6536         kvm_free_lapic(vcpu);
6537         idx = srcu_read_lock(&vcpu->kvm->srcu);
6538         kvm_mmu_destroy(vcpu);
6539         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6540         free_page((unsigned long)vcpu->arch.pio_data);
6541 }
6542
6543 int kvm_arch_init_vm(struct kvm *kvm)
6544 {
6545         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6546         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6547
6548         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6549         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6550
6551         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6552
6553         return 0;
6554 }
6555
6556 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6557 {
6558         vcpu_load(vcpu);
6559         kvm_mmu_unload(vcpu);
6560         vcpu_put(vcpu);
6561 }
6562
6563 static void kvm_free_vcpus(struct kvm *kvm)
6564 {
6565         unsigned int i;
6566         struct kvm_vcpu *vcpu;
6567
6568         /*
6569          * Unpin any mmu pages first.
6570          */
6571         kvm_for_each_vcpu(i, vcpu, kvm) {
6572                 kvm_clear_async_pf_completion_queue(vcpu);
6573                 kvm_unload_vcpu_mmu(vcpu);
6574         }
6575         kvm_for_each_vcpu(i, vcpu, kvm)
6576                 kvm_arch_vcpu_free(vcpu);
6577
6578         mutex_lock(&kvm->lock);
6579         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6580                 kvm->vcpus[i] = NULL;
6581
6582         atomic_set(&kvm->online_vcpus, 0);
6583         mutex_unlock(&kvm->lock);
6584 }
6585
6586 void kvm_arch_sync_events(struct kvm *kvm)
6587 {
6588         kvm_free_all_assigned_devices(kvm);
6589         kvm_free_pit(kvm);
6590 }
6591
6592 void kvm_arch_destroy_vm(struct kvm *kvm)
6593 {
6594         kvm_iommu_unmap_guest(kvm);
6595         kfree(kvm->arch.vpic);
6596         kfree(kvm->arch.vioapic);
6597         kvm_free_vcpus(kvm);
6598         if (kvm->arch.apic_access_page)
6599                 put_page(kvm->arch.apic_access_page);
6600         if (kvm->arch.ept_identity_pagetable)
6601                 put_page(kvm->arch.ept_identity_pagetable);
6602 }
6603
6604 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6605                                 struct kvm_memory_slot *memslot,
6606                                 struct kvm_memory_slot old,
6607                                 struct kvm_userspace_memory_region *mem,
6608                                 int user_alloc)
6609 {
6610         int npages = memslot->npages;
6611         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6612
6613         /* Prevent internal slot pages from being moved by fork()/COW. */
6614         if (memslot->id >= KVM_MEMORY_SLOTS)
6615                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6616
6617         /*To keep backward compatibility with older userspace,
6618          *x86 needs to hanlde !user_alloc case.
6619          */
6620         if (!user_alloc) {
6621                 if (npages && !old.rmap) {
6622                         unsigned long userspace_addr;
6623
6624                         down_write(&current->mm->mmap_sem);
6625                         userspace_addr = do_mmap(NULL, 0,
6626                                                  npages * PAGE_SIZE,
6627                                                  PROT_READ | PROT_WRITE,
6628                                                  map_flags,
6629                                                  0);
6630                         up_write(&current->mm->mmap_sem);
6631
6632                         if (IS_ERR((void *)userspace_addr))
6633                                 return PTR_ERR((void *)userspace_addr);
6634
6635                         memslot->userspace_addr = userspace_addr;
6636                 }
6637         }
6638
6639
6640         return 0;
6641 }
6642
6643 void kvm_arch_commit_memory_region(struct kvm *kvm,
6644                                 struct kvm_userspace_memory_region *mem,
6645                                 struct kvm_memory_slot old,
6646                                 int user_alloc)
6647 {
6648
6649         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6650
6651         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6652                 int ret;
6653
6654                 down_write(&current->mm->mmap_sem);
6655                 ret = do_munmap(current->mm, old.userspace_addr,
6656                                 old.npages * PAGE_SIZE);
6657                 up_write(&current->mm->mmap_sem);
6658                 if (ret < 0)
6659                         printk(KERN_WARNING
6660                                "kvm_vm_ioctl_set_memory_region: "
6661                                "failed to munmap memory\n");
6662         }
6663
6664         if (!kvm->arch.n_requested_mmu_pages)
6665                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6666
6667         spin_lock(&kvm->mmu_lock);
6668         if (nr_mmu_pages)
6669                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6670         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6671         spin_unlock(&kvm->mmu_lock);
6672 }
6673
6674 void kvm_arch_flush_shadow(struct kvm *kvm)
6675 {
6676         kvm_mmu_zap_all(kvm);
6677         kvm_reload_remote_mmus(kvm);
6678 }
6679
6680 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6681 {
6682         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6683                 !vcpu->arch.apf.halted)
6684                 || !list_empty_careful(&vcpu->async_pf.done)
6685                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6686                 || atomic_read(&vcpu->arch.nmi_queued) ||
6687                 (kvm_arch_interrupt_allowed(vcpu) &&
6688                  kvm_cpu_has_interrupt(vcpu));
6689 }
6690
6691 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6692 {
6693         int me;
6694         int cpu = vcpu->cpu;
6695
6696         if (waitqueue_active(&vcpu->wq)) {
6697                 wake_up_interruptible(&vcpu->wq);
6698                 ++vcpu->stat.halt_wakeup;
6699         }
6700
6701         me = get_cpu();
6702         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6703                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6704                         smp_send_reschedule(cpu);
6705         put_cpu();
6706 }
6707
6708 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6709 {
6710         return kvm_x86_ops->interrupt_allowed(vcpu);
6711 }
6712
6713 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6714 {
6715         unsigned long current_rip = kvm_rip_read(vcpu) +
6716                 get_segment_base(vcpu, VCPU_SREG_CS);
6717
6718         return current_rip == linear_rip;
6719 }
6720 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6721
6722 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6723 {
6724         unsigned long rflags;
6725
6726         rflags = kvm_x86_ops->get_rflags(vcpu);
6727         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6728                 rflags &= ~X86_EFLAGS_TF;
6729         return rflags;
6730 }
6731 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6732
6733 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6734 {
6735         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6736             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6737                 rflags |= X86_EFLAGS_TF;
6738         kvm_x86_ops->set_rflags(vcpu, rflags);
6739         kvm_make_request(KVM_REQ_EVENT, vcpu);
6740 }
6741 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6742
6743 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6744 {
6745         int r;
6746
6747         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6748               is_error_page(work->page))
6749                 return;
6750
6751         r = kvm_mmu_reload(vcpu);
6752         if (unlikely(r))
6753                 return;
6754
6755         if (!vcpu->arch.mmu.direct_map &&
6756               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6757                 return;
6758
6759         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6760 }
6761
6762 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6763 {
6764         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6765 }
6766
6767 static inline u32 kvm_async_pf_next_probe(u32 key)
6768 {
6769         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6770 }
6771
6772 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6773 {
6774         u32 key = kvm_async_pf_hash_fn(gfn);
6775
6776         while (vcpu->arch.apf.gfns[key] != ~0)
6777                 key = kvm_async_pf_next_probe(key);
6778
6779         vcpu->arch.apf.gfns[key] = gfn;
6780 }
6781
6782 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6783 {
6784         int i;
6785         u32 key = kvm_async_pf_hash_fn(gfn);
6786
6787         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6788                      (vcpu->arch.apf.gfns[key] != gfn &&
6789                       vcpu->arch.apf.gfns[key] != ~0); i++)
6790                 key = kvm_async_pf_next_probe(key);
6791
6792         return key;
6793 }
6794
6795 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6796 {
6797         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6798 }
6799
6800 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6801 {
6802         u32 i, j, k;
6803
6804         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6805         while (true) {
6806                 vcpu->arch.apf.gfns[i] = ~0;
6807                 do {
6808                         j = kvm_async_pf_next_probe(j);
6809                         if (vcpu->arch.apf.gfns[j] == ~0)
6810                                 return;
6811                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6812                         /*
6813                          * k lies cyclically in ]i,j]
6814                          * |    i.k.j |
6815                          * |....j i.k.| or  |.k..j i...|
6816                          */
6817                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6818                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6819                 i = j;
6820         }
6821 }
6822
6823 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6824 {
6825
6826         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6827                                       sizeof(val));
6828 }
6829
6830 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6831                                      struct kvm_async_pf *work)
6832 {
6833         struct x86_exception fault;
6834
6835         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6836         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6837
6838         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6839             (vcpu->arch.apf.send_user_only &&
6840              kvm_x86_ops->get_cpl(vcpu) == 0))
6841                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6842         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6843                 fault.vector = PF_VECTOR;
6844                 fault.error_code_valid = true;
6845                 fault.error_code = 0;
6846                 fault.nested_page_fault = false;
6847                 fault.address = work->arch.token;
6848                 kvm_inject_page_fault(vcpu, &fault);
6849         }
6850 }
6851
6852 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6853                                  struct kvm_async_pf *work)
6854 {
6855         struct x86_exception fault;
6856
6857         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6858         if (is_error_page(work->page))
6859                 work->arch.token = ~0; /* broadcast wakeup */
6860         else
6861                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6862
6863         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6864             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6865                 fault.vector = PF_VECTOR;
6866                 fault.error_code_valid = true;
6867                 fault.error_code = 0;
6868                 fault.nested_page_fault = false;
6869                 fault.address = work->arch.token;
6870                 kvm_inject_page_fault(vcpu, &fault);
6871         }
6872         vcpu->arch.apf.halted = false;
6873 }
6874
6875 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6876 {
6877         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6878                 return true;
6879         else
6880                 return !kvm_event_needs_reinjection(vcpu) &&
6881                         kvm_x86_ops->interrupt_allowed(vcpu);
6882 }
6883
6884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6893 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6894 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6895 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);