arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 #define KVM_NR_SHARED_MSRS 16
 101
 102 struct kvm_shared_msrs_global {
 103         int nr;
 104         u32 msrs[KVM_NR_SHARED_MSRS];
 105 };
 106
 107 struct kvm_shared_msrs {
 108         struct user_return_notifier urn;
 109         bool registered;
 110         struct kvm_shared_msr_values {
 111                 u64 host;
 112                 u64 curr;
 113         } values[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 117 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 118
 119 struct kvm_stats_debugfs_item debugfs_entries[] = {
 120         { "pf_fixed", VCPU_STAT(pf_fixed) },
 121         { "pf_guest", VCPU_STAT(pf_guest) },
 122         { "tlb_flush", VCPU_STAT(tlb_flush) },
 123         { "invlpg", VCPU_STAT(invlpg) },
 124         { "exits", VCPU_STAT(exits) },
 125         { "io_exits", VCPU_STAT(io_exits) },
 126         { "mmio_exits", VCPU_STAT(mmio_exits) },
 127         { "signal_exits", VCPU_STAT(signal_exits) },
 128         { "irq_window", VCPU_STAT(irq_window_exits) },
 129         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 130         { "halt_exits", VCPU_STAT(halt_exits) },
 131         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 132         { "hypercalls", VCPU_STAT(hypercalls) },
 133         { "request_irq", VCPU_STAT(request_irq_exits) },
 134         { "irq_exits", VCPU_STAT(irq_exits) },
 135         { "host_state_reload", VCPU_STAT(host_state_reload) },
 136         { "efer_reload", VCPU_STAT(efer_reload) },
 137         { "fpu_reload", VCPU_STAT(fpu_reload) },
 138         { "insn_emulation", VCPU_STAT(insn_emulation) },
 139         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 140         { "irq_injections", VCPU_STAT(irq_injections) },
 141         { "nmi_injections", VCPU_STAT(nmi_injections) },
 142         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 143         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 144         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 145         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 146         { "mmu_flooded", VM_STAT(mmu_flooded) },
 147         { "mmu_recycled", VM_STAT(mmu_recycled) },
 148         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 149         { "mmu_unsync", VM_STAT(mmu_unsync) },
 150         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 151         { "largepages", VM_STAT(lpages) },
 152         { NULL }
 153 };
 154
 155 u64 __read_mostly host_xcr0;
 156
 157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         atomic_inc(&vcpu->arch.nmi_queued);
 365         kvm_make_request(KVM_REQ_NMI, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         if (!static_cpu_has(X86_FEATURE_XSAVE))
 582                 return 0;
 583
 584         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 585         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 586 }
 587
 588 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 589 {
 590         struct kvm_cpuid_entry2 *best;
 591
 592         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 593         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 594 }
 595
 596 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 597 {
 598         struct kvm_cpuid_entry2 *best;
 599
 600         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 601         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 602 }
 603
 604 static void update_cpuid(struct kvm_vcpu *vcpu)
 605 {
 606         struct kvm_cpuid_entry2 *best;
 607         struct kvm_lapic *apic = vcpu->arch.apic;
 608
 609         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 610         if (!best)
 611                 return;
 612
 613         /* Update OSXSAVE bit */
 614         if (cpu_has_xsave && best->function == 0x1) {
 615                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 616                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 617                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 618         }
 619
 620         if (apic) {
 621                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 622                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 623                 else
 624                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 625         }
 626 }
 627
 628 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 629 {
 630         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 631         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 632                                    X86_CR4_PAE | X86_CR4_SMEP;
 633         if (cr4 & CR4_RESERVED_BITS)
 634                 return 1;
 635
 636         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 637                 return 1;
 638
 639         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 640                 return 1;
 641
 642         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 643                 return 1;
 644
 645         if (is_long_mode(vcpu)) {
 646                 if (!(cr4 & X86_CR4_PAE))
 647                         return 1;
 648         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 649                    && ((cr4 ^ old_cr4) & pdptr_bits)
 650                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 651                                    kvm_read_cr3(vcpu)))
 652                 return 1;
 653
 654         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 655                 return 1;
 656
 657         if ((cr4 ^ old_cr4) & pdptr_bits)
 658                 kvm_mmu_reset_context(vcpu);
 659
 660         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 661                 update_cpuid(vcpu);
 662
 663         return 0;
 664 }
 665 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 666
 667 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 668 {
 669         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 670                 kvm_mmu_sync_roots(vcpu);
 671                 kvm_mmu_flush_tlb(vcpu);
 672                 return 0;
 673         }
 674
 675         if (is_long_mode(vcpu)) {
 676                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 677                         return 1;
 678         } else {
 679                 if (is_pae(vcpu)) {
 680                         if (cr3 & CR3_PAE_RESERVED_BITS)
 681                                 return 1;
 682                         if (is_paging(vcpu) &&
 683                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 684                                 return 1;
 685                 }
 686                 /*
 687                  * We don't check reserved bits in nonpae mode, because
 688                  * this isn't enforced, and VMware depends on this.
 689                  */
 690         }
 691
 692         /*
 693          * Does the new cr3 value map to physical memory? (Note, we
 694          * catch an invalid cr3 even in real-mode, because it would
 695          * cause trouble later on when we turn on paging anyway.)
 696          *
 697          * A real CPU would silently accept an invalid cr3 and would
 698          * attempt to use it - with largely undefined (and often hard
 699          * to debug) behavior on the guest side.
 700          */
 701         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 702                 return 1;
 703         vcpu->arch.cr3 = cr3;
 704         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 705         vcpu->arch.mmu.new_cr3(vcpu);
 706         return 0;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 709
 710 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 711 {
 712         if (cr8 & CR8_RESERVED_BITS)
 713                 return 1;
 714         if (irqchip_in_kernel(vcpu->kvm))
 715                 kvm_lapic_set_tpr(vcpu, cr8);
 716         else
 717                 vcpu->arch.cr8 = cr8;
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 721
 722 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 723 {
 724         if (irqchip_in_kernel(vcpu->kvm))
 725                 return kvm_lapic_get_cr8(vcpu);
 726         else
 727                 return vcpu->arch.cr8;
 728 }
 729 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 730
 731 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 732 {
 733         switch (dr) {
 734         case 0 ... 3:
 735                 vcpu->arch.db[dr] = val;
 736                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 737                         vcpu->arch.eff_db[dr] = val;
 738                 break;
 739         case 4:
 740                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 741                         return 1; /* #UD */
 742                 /* fall through */
 743         case 6:
 744                 if (val & 0xffffffff00000000ULL)
 745                         return -1; /* #GP */
 746                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 747                 break;
 748         case 5:
 749                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                         return 1; /* #UD */
 751                 /* fall through */
 752         default: /* 7 */
 753                 if (val & 0xffffffff00000000ULL)
 754                         return -1; /* #GP */
 755                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 756                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 757                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 758                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 759                 }
 760                 break;
 761         }
 762
 763         return 0;
 764 }
 765
 766 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 767 {
 768         int res;
 769
 770         res = __kvm_set_dr(vcpu, dr, val);
 771         if (res > 0)
 772                 kvm_queue_exception(vcpu, UD_VECTOR);
 773         else if (res < 0)
 774                 kvm_inject_gp(vcpu, 0);
 775
 776         return res;
 777 }
 778 EXPORT_SYMBOL_GPL(kvm_set_dr);
 779
 780 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 781 {
 782         switch (dr) {
 783         case 0 ... 3:
 784                 *val = vcpu->arch.db[dr];
 785                 break;
 786         case 4:
 787                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 788                         return 1;
 789                 /* fall through */
 790         case 6:
 791                 *val = vcpu->arch.dr6;
 792                 break;
 793         case 5:
 794                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 795                         return 1;
 796                 /* fall through */
 797         default: /* 7 */
 798                 *val = vcpu->arch.dr7;
 799                 break;
 800         }
 801
 802         return 0;
 803 }
 804
 805 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 806 {
 807         if (_kvm_get_dr(vcpu, dr, val)) {
 808                 kvm_queue_exception(vcpu, UD_VECTOR);
 809                 return 1;
 810         }
 811         return 0;
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_get_dr);
 814
 815 /*
 816  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 817  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 818  *
 819  * This list is modified at module load time to reflect the
 820  * capabilities of the host cpu. This capabilities test skips MSRs that are
 821  * kvm-specific. Those are put in the beginning of the list.
 822  */
 823
 824 #define KVM_SAVE_MSRS_BEGIN     9
 825 static u32 msrs_to_save[] = {
 826         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 827         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 828         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 829         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 830         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 831         MSR_STAR,
 832 #ifdef CONFIG_X86_64
 833         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 834 #endif
 835         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 836 };
 837
 838 static unsigned num_msrs_to_save;
 839
 840 static u32 emulated_msrs[] = {
 841         MSR_IA32_TSCDEADLINE,
 842         MSR_IA32_MISC_ENABLE,
 843         MSR_IA32_MCG_STATUS,
 844         MSR_IA32_MCG_CTL,
 845 };
 846
 847 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 848 {
 849         u64 old_efer = vcpu->arch.efer;
 850
 851         if (efer & efer_reserved_bits)
 852                 return 1;
 853
 854         if (is_paging(vcpu)
 855             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 856                 return 1;
 857
 858         if (efer & EFER_FFXSR) {
 859                 struct kvm_cpuid_entry2 *feat;
 860
 861                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 862                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 863                         return 1;
 864         }
 865
 866         if (efer & EFER_SVME) {
 867                 struct kvm_cpuid_entry2 *feat;
 868
 869                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 870                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 871                         return 1;
 872         }
 873
 874         efer &= ~EFER_LMA;
 875         efer |= vcpu->arch.efer & EFER_LMA;
 876
 877         kvm_x86_ops->set_efer(vcpu, efer);
 878
 879         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 880
 881         /* Update reserved bits */
 882         if ((efer ^ old_efer) & EFER_NX)
 883                 kvm_mmu_reset_context(vcpu);
 884
 885         return 0;
 886 }
 887
 888 void kvm_enable_efer_bits(u64 mask)
 889 {
 890        efer_reserved_bits &= ~mask;
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 893
 894
 895 /*
 896  * Writes msr value into into the appropriate "register".
 897  * Returns 0 on success, non-0 otherwise.
 898  * Assumes vcpu_load() was already called.
 899  */
 900 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 901 {
 902         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 903 }
 904
 905 /*
 906  * Adapt set_msr() to msr_io()'s calling convention
 907  */
 908 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 909 {
 910         return kvm_set_msr(vcpu, index, *data);
 911 }
 912
 913 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 914 {
 915         int version;
 916         int r;
 917         struct pvclock_wall_clock wc;
 918         struct timespec boot;
 919
 920         if (!wall_clock)
 921                 return;
 922
 923         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 924         if (r)
 925                 return;
 926
 927         if (version & 1)
 928                 ++version;  /* first time write, random junk */
 929
 930         ++version;
 931
 932         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 933
 934         /*
 935          * The guest calculates current wall clock time by adding
 936          * system time (updated by kvm_guest_time_update below) to the
 937          * wall clock specified here.  guest system time equals host
 938          * system time for us, thus we must fill in host boot time here.
 939          */
 940         getboottime(&boot);
 941
 942         wc.sec = boot.tv_sec;
 943         wc.nsec = boot.tv_nsec;
 944         wc.version = version;
 945
 946         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 947
 948         version++;
 949         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 950 }
 951
 952 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 953 {
 954         uint32_t quotient, remainder;
 955
 956         /* Don't try to replace with do_div(), this one calculates
 957          * "(dividend << 32) / divisor" */
 958         __asm__ ( "divl %4"
 959                   : "=a" (quotient), "=d" (remainder)
 960                   : "0" (0), "1" (dividend), "r" (divisor) );
 961         return quotient;
 962 }
 963
 964 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 965                                s8 *pshift, u32 *pmultiplier)
 966 {
 967         uint64_t scaled64;
 968         int32_t  shift = 0;
 969         uint64_t tps64;
 970         uint32_t tps32;
 971
 972         tps64 = base_khz * 1000LL;
 973         scaled64 = scaled_khz * 1000LL;
 974         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 975                 tps64 >>= 1;
 976                 shift--;
 977         }
 978
 979         tps32 = (uint32_t)tps64;
 980         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 981                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 982                         scaled64 >>= 1;
 983                 else
 984                         tps32 <<= 1;
 985                 shift++;
 986         }
 987
 988         *pshift = shift;
 989         *pmultiplier = div_frac(scaled64, tps32);
 990
 991         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 992                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 993 }
 994
 995 static inline u64 get_kernel_ns(void)
 996 {
 997         struct timespec ts;
 998
 999         WARN_ON(preemptible());
1000         ktime_get_ts(&ts);
1001         monotonic_to_bootbased(&ts);
1002         return timespec_to_ns(&ts);
1003 }
1004
1005 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1006 unsigned long max_tsc_khz;
1007
1008 static inline int kvm_tsc_changes_freq(void)
1009 {
1010         int cpu = get_cpu();
1011         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1012                   cpufreq_quick_get(cpu) != 0;
1013         put_cpu();
1014         return ret;
1015 }
1016
1017 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1018 {
1019         if (vcpu->arch.virtual_tsc_khz)
1020                 return vcpu->arch.virtual_tsc_khz;
1021         else
1022                 return __this_cpu_read(cpu_tsc_khz);
1023 }
1024
1025 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1026 {
1027         u64 ret;
1028
1029         WARN_ON(preemptible());
1030         if (kvm_tsc_changes_freq())
1031                 printk_once(KERN_WARNING
1032                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1033         ret = nsec * vcpu_tsc_khz(vcpu);
1034         do_div(ret, USEC_PER_SEC);
1035         return ret;
1036 }
1037
1038 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1039 {
1040         /* Compute a scale to convert nanoseconds in TSC cycles */
1041         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1042                            &vcpu->arch.tsc_catchup_shift,
1043                            &vcpu->arch.tsc_catchup_mult);
1044 }
1045
1046 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1047 {
1048         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1049                                       vcpu->arch.tsc_catchup_mult,
1050                                       vcpu->arch.tsc_catchup_shift);
1051         tsc += vcpu->arch.last_tsc_write;
1052         return tsc;
1053 }
1054
1055 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1056 {
1057         struct kvm *kvm = vcpu->kvm;
1058         u64 offset, ns, elapsed;
1059         unsigned long flags;
1060         s64 sdiff;
1061
1062         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1063         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1064         ns = get_kernel_ns();
1065         elapsed = ns - kvm->arch.last_tsc_nsec;
1066         sdiff = data - kvm->arch.last_tsc_write;
1067         if (sdiff < 0)
1068                 sdiff = -sdiff;
1069
1070         /*
1071          * Special case: close write to TSC within 5 seconds of
1072          * another CPU is interpreted as an attempt to synchronize
1073          * The 5 seconds is to accommodate host load / swapping as
1074          * well as any reset of TSC during the boot process.
1075          *
1076          * In that case, for a reliable TSC, we can match TSC offsets,
1077          * or make a best guest using elapsed value.
1078          */
1079         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1080             elapsed < 5ULL * NSEC_PER_SEC) {
1081                 if (!check_tsc_unstable()) {
1082                         offset = kvm->arch.last_tsc_offset;
1083                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1084                 } else {
1085                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1086                         offset += delta;
1087                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1088                 }
1089                 ns = kvm->arch.last_tsc_nsec;
1090         }
1091         kvm->arch.last_tsc_nsec = ns;
1092         kvm->arch.last_tsc_write = data;
1093         kvm->arch.last_tsc_offset = offset;
1094         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1095         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1096
1097         /* Reset of TSC must disable overshoot protection below */
1098         vcpu->arch.hv_clock.tsc_timestamp = 0;
1099         vcpu->arch.last_tsc_write = data;
1100         vcpu->arch.last_tsc_nsec = ns;
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1103
1104 static int kvm_guest_time_update(struct kvm_vcpu *v)
1105 {
1106         unsigned long flags;
1107         struct kvm_vcpu_arch *vcpu = &v->arch;
1108         unsigned long this_tsc_khz;
1109         s64 kernel_ns, max_kernel_ns;
1110         u64 tsc_timestamp;
1111
1112         /* Keep irq disabled to prevent changes to the clock */
1113         local_irq_save(flags);
1114         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1115         kernel_ns = get_kernel_ns();
1116         this_tsc_khz = vcpu_tsc_khz(v);
1117         if (unlikely(this_tsc_khz == 0)) {
1118                 local_irq_restore(flags);
1119                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1120                 return 1;
1121         }
1122
1123         /*
1124          * We may have to catch up the TSC to match elapsed wall clock
1125          * time for two reasons, even if kvmclock is used.
1126          *   1) CPU could have been running below the maximum TSC rate
1127          *   2) Broken TSC compensation resets the base at each VCPU
1128          *      entry to avoid unknown leaps of TSC even when running
1129          *      again on the same CPU.  This may cause apparent elapsed
1130          *      time to disappear, and the guest to stand still or run
1131          *      very slowly.
1132          */
1133         if (vcpu->tsc_catchup) {
1134                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1135                 if (tsc > tsc_timestamp) {
1136                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1137                         tsc_timestamp = tsc;
1138                 }
1139         }
1140
1141         local_irq_restore(flags);
1142
1143         if (!vcpu->pv_time_enabled)
1144                 return 0;
1145
1146         /*
1147          * Time as measured by the TSC may go backwards when resetting the base
1148          * tsc_timestamp.  The reason for this is that the TSC resolution is
1149          * higher than the resolution of the other clock scales.  Thus, many
1150          * possible measurments of the TSC correspond to one measurement of any
1151          * other clock, and so a spread of values is possible.  This is not a
1152          * problem for the computation of the nanosecond clock; with TSC rates
1153          * around 1GHZ, there can only be a few cycles which correspond to one
1154          * nanosecond value, and any path through this code will inevitably
1155          * take longer than that.  However, with the kernel_ns value itself,
1156          * the precision may be much lower, down to HZ granularity.  If the
1157          * first sampling of TSC against kernel_ns ends in the low part of the
1158          * range, and the second in the high end of the range, we can get:
1159          *
1160          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1161          *
1162          * As the sampling errors potentially range in the thousands of cycles,
1163          * it is possible such a time value has already been observed by the
1164          * guest.  To protect against this, we must compute the system time as
1165          * observed by the guest and ensure the new system time is greater.
1166          */
1167         max_kernel_ns = 0;
1168         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1169                 max_kernel_ns = vcpu->last_guest_tsc -
1170                                 vcpu->hv_clock.tsc_timestamp;
1171                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1172                                     vcpu->hv_clock.tsc_to_system_mul,
1173                                     vcpu->hv_clock.tsc_shift);
1174                 max_kernel_ns += vcpu->last_kernel_ns;
1175         }
1176
1177         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1178                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1179                                    &vcpu->hv_clock.tsc_shift,
1180                                    &vcpu->hv_clock.tsc_to_system_mul);
1181                 vcpu->hw_tsc_khz = this_tsc_khz;
1182         }
1183
1184         if (max_kernel_ns > kernel_ns)
1185                 kernel_ns = max_kernel_ns;
1186
1187         /* With all the info we got, fill in the values */
1188         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1189         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1190         vcpu->last_kernel_ns = kernel_ns;
1191         vcpu->last_guest_tsc = tsc_timestamp;
1192         vcpu->hv_clock.flags = 0;
1193
1194         /*
1195          * The interface expects us to write an even number signaling that the
1196          * update is finished. Since the guest won't see the intermediate
1197          * state, we just increase by 2 at the end.
1198          */
1199         vcpu->hv_clock.version += 2;
1200
1201         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1202                                 &vcpu->hv_clock,
1203                                 sizeof(vcpu->hv_clock));
1204         return 0;
1205 }
1206
1207 static bool msr_mtrr_valid(unsigned msr)
1208 {
1209         switch (msr) {
1210         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1211         case MSR_MTRRfix64K_00000:
1212         case MSR_MTRRfix16K_80000:
1213         case MSR_MTRRfix16K_A0000:
1214         case MSR_MTRRfix4K_C0000:
1215         case MSR_MTRRfix4K_C8000:
1216         case MSR_MTRRfix4K_D0000:
1217         case MSR_MTRRfix4K_D8000:
1218         case MSR_MTRRfix4K_E0000:
1219         case MSR_MTRRfix4K_E8000:
1220         case MSR_MTRRfix4K_F0000:
1221         case MSR_MTRRfix4K_F8000:
1222         case MSR_MTRRdefType:
1223         case MSR_IA32_CR_PAT:
1224                 return true;
1225         case 0x2f8:
1226                 return true;
1227         }
1228         return false;
1229 }
1230
1231 static bool valid_pat_type(unsigned t)
1232 {
1233         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1234 }
1235
1236 static bool valid_mtrr_type(unsigned t)
1237 {
1238         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1239 }
1240
1241 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1242 {
1243         int i;
1244
1245         if (!msr_mtrr_valid(msr))
1246                 return false;
1247
1248         if (msr == MSR_IA32_CR_PAT) {
1249                 for (i = 0; i < 8; i++)
1250                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1251                                 return false;
1252                 return true;
1253         } else if (msr == MSR_MTRRdefType) {
1254                 if (data & ~0xcff)
1255                         return false;
1256                 return valid_mtrr_type(data & 0xff);
1257         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1258                 for (i = 0; i < 8 ; i++)
1259                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1260                                 return false;
1261                 return true;
1262         }
1263
1264         /* variable MTRRs */
1265         return valid_mtrr_type(data & 0xff);
1266 }
1267
1268 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1269 {
1270         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1271
1272         if (!mtrr_valid(vcpu, msr, data))
1273                 return 1;
1274
1275         if (msr == MSR_MTRRdefType) {
1276                 vcpu->arch.mtrr_state.def_type = data;
1277                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1278         } else if (msr == MSR_MTRRfix64K_00000)
1279                 p[0] = data;
1280         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1281                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1282         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1283                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1284         else if (msr == MSR_IA32_CR_PAT)
1285                 vcpu->arch.pat = data;
1286         else {  /* Variable MTRRs */
1287                 int idx, is_mtrr_mask;
1288                 u64 *pt;
1289
1290                 idx = (msr - 0x200) / 2;
1291                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1292                 if (!is_mtrr_mask)
1293                         pt =
1294                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1295                 else
1296                         pt =
1297                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1298                 *pt = data;
1299         }
1300
1301         kvm_mmu_reset_context(vcpu);
1302         return 0;
1303 }
1304
1305 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1306 {
1307         u64 mcg_cap = vcpu->arch.mcg_cap;
1308         unsigned bank_num = mcg_cap & 0xff;
1309
1310         switch (msr) {
1311         case MSR_IA32_MCG_STATUS:
1312                 vcpu->arch.mcg_status = data;
1313                 break;
1314         case MSR_IA32_MCG_CTL:
1315                 if (!(mcg_cap & MCG_CTL_P))
1316                         return 1;
1317                 if (data != 0 && data != ~(u64)0)
1318                         return -1;
1319                 vcpu->arch.mcg_ctl = data;
1320                 break;
1321         default:
1322                 if (msr >= MSR_IA32_MC0_CTL &&
1323                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1324                         u32 offset = msr - MSR_IA32_MC0_CTL;
1325                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1326                          * some Linux kernels though clear bit 10 in bank 4 to
1327                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1328                          * this to avoid an uncatched #GP in the guest
1329                          */
1330                         if ((offset & 0x3) == 0 &&
1331                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1332                                 return -1;
1333                         vcpu->arch.mce_banks[offset] = data;
1334                         break;
1335                 }
1336                 return 1;
1337         }
1338         return 0;
1339 }
1340
1341 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1342 {
1343         struct kvm *kvm = vcpu->kvm;
1344         int lm = is_long_mode(vcpu);
1345         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1346                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1347         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1348                 : kvm->arch.xen_hvm_config.blob_size_32;
1349         u32 page_num = data & ~PAGE_MASK;
1350         u64 page_addr = data & PAGE_MASK;
1351         u8 *page;
1352         int r;
1353
1354         r = -E2BIG;
1355         if (page_num >= blob_size)
1356                 goto out;
1357         r = -ENOMEM;
1358         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1359         if (!page)
1360                 goto out;
1361         r = -EFAULT;
1362         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1363                 goto out_free;
1364         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1365                 goto out_free;
1366         r = 0;
1367 out_free:
1368         kfree(page);
1369 out:
1370         return r;
1371 }
1372
1373 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1374 {
1375         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1376 }
1377
1378 static bool kvm_hv_msr_partition_wide(u32 msr)
1379 {
1380         bool r = false;
1381         switch (msr) {
1382         case HV_X64_MSR_GUEST_OS_ID:
1383         case HV_X64_MSR_HYPERCALL:
1384                 r = true;
1385                 break;
1386         }
1387
1388         return r;
1389 }
1390
1391 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1392 {
1393         struct kvm *kvm = vcpu->kvm;
1394
1395         switch (msr) {
1396         case HV_X64_MSR_GUEST_OS_ID:
1397                 kvm->arch.hv_guest_os_id = data;
1398                 /* setting guest os id to zero disables hypercall page */
1399                 if (!kvm->arch.hv_guest_os_id)
1400                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1401                 break;
1402         case HV_X64_MSR_HYPERCALL: {
1403                 u64 gfn;
1404                 unsigned long addr;
1405                 u8 instructions[4];
1406
1407                 /* if guest os id is not set hypercall should remain disabled */
1408                 if (!kvm->arch.hv_guest_os_id)
1409                         break;
1410                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1411                         kvm->arch.hv_hypercall = data;
1412                         break;
1413                 }
1414                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1415                 addr = gfn_to_hva(kvm, gfn);
1416                 if (kvm_is_error_hva(addr))
1417                         return 1;
1418                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1419                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1420                 if (__copy_to_user((void __user *)addr, instructions, 4))
1421                         return 1;
1422                 kvm->arch.hv_hypercall = data;
1423                 break;
1424         }
1425         default:
1426                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1427                           "data 0x%llx\n", msr, data);
1428                 return 1;
1429         }
1430         return 0;
1431 }
1432
1433 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1434 {
1435         switch (msr) {
1436         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1437                 unsigned long addr;
1438
1439                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1440                         vcpu->arch.hv_vapic = data;
1441                         break;
1442                 }
1443                 addr = gfn_to_hva(vcpu->kvm, data >>
1444                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1445                 if (kvm_is_error_hva(addr))
1446                         return 1;
1447                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1448                         return 1;
1449                 vcpu->arch.hv_vapic = data;
1450                 break;
1451         }
1452         case HV_X64_MSR_EOI:
1453                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1454         case HV_X64_MSR_ICR:
1455                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1456         case HV_X64_MSR_TPR:
1457                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1458         default:
1459                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1460                           "data 0x%llx\n", msr, data);
1461                 return 1;
1462         }
1463
1464         return 0;
1465 }
1466
1467 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1468 {
1469         gpa_t gpa = data & ~0x3f;
1470
1471         /* Bits 2:5 are resrved, Should be zero */
1472         if (data & 0x3c)
1473                 return 1;
1474
1475         vcpu->arch.apf.msr_val = data;
1476
1477         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1478                 kvm_clear_async_pf_completion_queue(vcpu);
1479                 kvm_async_pf_hash_reset(vcpu);
1480                 return 0;
1481         }
1482
1483         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1484                 return 1;
1485
1486         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1487         kvm_async_pf_wakeup_all(vcpu);
1488         return 0;
1489 }
1490
1491 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1492 {
1493         vcpu->arch.pv_time_enabled = false;
1494 }
1495
1496 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1497 {
1498         u64 delta;
1499
1500         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1501                 return;
1502
1503         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1504         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1505         vcpu->arch.st.accum_steal = delta;
1506 }
1507
1508 static void record_steal_time(struct kvm_vcpu *vcpu)
1509 {
1510         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1511                 return;
1512
1513         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1514                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1515                 return;
1516
1517         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1518         vcpu->arch.st.steal.version += 2;
1519         vcpu->arch.st.accum_steal = 0;
1520
1521         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1522                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1523 }
1524
1525 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1526 {
1527         switch (msr) {
1528         case MSR_EFER:
1529                 return set_efer(vcpu, data);
1530         case MSR_K7_HWCR:
1531                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1532                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1533                 if (data != 0) {
1534                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1535                                 data);
1536                         return 1;
1537                 }
1538                 break;
1539         case MSR_FAM10H_MMIO_CONF_BASE:
1540                 if (data != 0) {
1541                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1542                                 "0x%llx\n", data);
1543                         return 1;
1544                 }
1545                 break;
1546         case MSR_AMD64_NB_CFG:
1547                 break;
1548         case MSR_IA32_DEBUGCTLMSR:
1549                 if (!data) {
1550                         /* We support the non-activated case already */
1551                         break;
1552                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1553                         /* Values other than LBR and BTF are vendor-specific,
1554                            thus reserved and should throw a #GP */
1555                         return 1;
1556                 }
1557                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1558                         __func__, data);
1559                 break;
1560         case MSR_IA32_UCODE_REV:
1561         case MSR_IA32_UCODE_WRITE:
1562         case MSR_VM_HSAVE_PA:
1563         case MSR_AMD64_PATCH_LOADER:
1564                 break;
1565         case 0x200 ... 0x2ff:
1566                 return set_msr_mtrr(vcpu, msr, data);
1567         case MSR_IA32_APICBASE:
1568                 kvm_set_apic_base(vcpu, data);
1569                 break;
1570         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1571                 return kvm_x2apic_msr_write(vcpu, msr, data);
1572         case MSR_IA32_TSCDEADLINE:
1573                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1574                 break;
1575         case MSR_IA32_MISC_ENABLE:
1576                 vcpu->arch.ia32_misc_enable_msr = data;
1577                 break;
1578         case MSR_KVM_WALL_CLOCK_NEW:
1579         case MSR_KVM_WALL_CLOCK:
1580                 vcpu->kvm->arch.wall_clock = data;
1581                 kvm_write_wall_clock(vcpu->kvm, data);
1582                 break;
1583         case MSR_KVM_SYSTEM_TIME_NEW:
1584         case MSR_KVM_SYSTEM_TIME: {
1585                 u64 gpa_offset;
1586                 kvmclock_reset(vcpu);
1587
1588                 vcpu->arch.time = data;
1589                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1590
1591                 /* we verify if the enable bit is set... */
1592                 if (!(data & 1))
1593                         break;
1594
1595                 gpa_offset = data & ~(PAGE_MASK | 1);
1596
1597                 /* Check that the address is 32-byte aligned. */
1598                 if (gpa_offset & (sizeof(struct pvclock_vcpu_time_info) - 1))
1599                         break;
1600
1601                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1602                      &vcpu->arch.pv_time, data & ~1ULL))
1603                         vcpu->arch.pv_time_enabled = false;
1604                 else
1605                         vcpu->arch.pv_time_enabled = true;
1606                 break;
1607         }
1608         case MSR_KVM_ASYNC_PF_EN:
1609                 if (kvm_pv_enable_async_pf(vcpu, data))
1610                         return 1;
1611                 break;
1612         case MSR_KVM_STEAL_TIME:
1613
1614                 if (unlikely(!sched_info_on()))
1615                         return 1;
1616
1617                 if (data & KVM_STEAL_RESERVED_MASK)
1618                         return 1;
1619
1620                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1621                                                         data & KVM_STEAL_VALID_BITS))
1622                         return 1;
1623
1624                 vcpu->arch.st.msr_val = data;
1625
1626                 if (!(data & KVM_MSR_ENABLED))
1627                         break;
1628
1629                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1630
1631                 preempt_disable();
1632                 accumulate_steal_time(vcpu);
1633                 preempt_enable();
1634
1635                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1636
1637                 break;
1638
1639         case MSR_IA32_MCG_CTL:
1640         case MSR_IA32_MCG_STATUS:
1641         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1642                 return set_msr_mce(vcpu, msr, data);
1643
1644         /* Performance counters are not protected by a CPUID bit,
1645          * so we should check all of them in the generic path for the sake of
1646          * cross vendor migration.
1647          * Writing a zero into the event select MSRs disables them,
1648          * which we perfectly emulate ;-). Any other value should be at least
1649          * reported, some guests depend on them.
1650          */
1651         case MSR_P6_EVNTSEL0:
1652         case MSR_P6_EVNTSEL1:
1653         case MSR_K7_EVNTSEL0:
1654         case MSR_K7_EVNTSEL1:
1655         case MSR_K7_EVNTSEL2:
1656         case MSR_K7_EVNTSEL3:
1657                 if (data != 0)
1658                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1659                                 "0x%x data 0x%llx\n", msr, data);
1660                 break;
1661         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1662          * so we ignore writes to make it happy.
1663          */
1664         case MSR_P6_PERFCTR0:
1665         case MSR_P6_PERFCTR1:
1666         case MSR_K7_PERFCTR0:
1667         case MSR_K7_PERFCTR1:
1668         case MSR_K7_PERFCTR2:
1669         case MSR_K7_PERFCTR3:
1670                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1671                         "0x%x data 0x%llx\n", msr, data);
1672                 break;
1673         case MSR_K7_CLK_CTL:
1674                 /*
1675                  * Ignore all writes to this no longer documented MSR.
1676                  * Writes are only relevant for old K7 processors,
1677                  * all pre-dating SVM, but a recommended workaround from
1678                  * AMD for these chips. It is possible to speicify the
1679                  * affected processor models on the command line, hence
1680                  * the need to ignore the workaround.
1681                  */
1682                 break;
1683         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1684                 if (kvm_hv_msr_partition_wide(msr)) {
1685                         int r;
1686                         mutex_lock(&vcpu->kvm->lock);
1687                         r = set_msr_hyperv_pw(vcpu, msr, data);
1688                         mutex_unlock(&vcpu->kvm->lock);
1689                         return r;
1690                 } else
1691                         return set_msr_hyperv(vcpu, msr, data);
1692                 break;
1693         case MSR_IA32_BBL_CR_CTL3:
1694                 /* Drop writes to this legacy MSR -- see rdmsr
1695                  * counterpart for further detail.
1696                  */
1697                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1698                 break;
1699         default:
1700                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1701                         return xen_hvm_config(vcpu, data);
1702                 if (!ignore_msrs) {
1703                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1704                                 msr, data);
1705                         return 1;
1706                 } else {
1707                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1708                                 msr, data);
1709                         break;
1710                 }
1711         }
1712         return 0;
1713 }
1714 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1715
1716
1717 /*
1718  * Reads an msr value (of 'msr_index') into 'pdata'.
1719  * Returns 0 on success, non-0 otherwise.
1720  * Assumes vcpu_load() was already called.
1721  */
1722 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1723 {
1724         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1725 }
1726
1727 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1728 {
1729         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1730
1731         if (!msr_mtrr_valid(msr))
1732                 return 1;
1733
1734         if (msr == MSR_MTRRdefType)
1735                 *pdata = vcpu->arch.mtrr_state.def_type +
1736                          (vcpu->arch.mtrr_state.enabled << 10);
1737         else if (msr == MSR_MTRRfix64K_00000)
1738                 *pdata = p[0];
1739         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1740                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1741         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1742                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1743         else if (msr == MSR_IA32_CR_PAT)
1744                 *pdata = vcpu->arch.pat;
1745         else {  /* Variable MTRRs */
1746                 int idx, is_mtrr_mask;
1747                 u64 *pt;
1748
1749                 idx = (msr - 0x200) / 2;
1750                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1751                 if (!is_mtrr_mask)
1752                         pt =
1753                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1754                 else
1755                         pt =
1756                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1757                 *pdata = *pt;
1758         }
1759
1760         return 0;
1761 }
1762
1763 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1764 {
1765         u64 data;
1766         u64 mcg_cap = vcpu->arch.mcg_cap;
1767         unsigned bank_num = mcg_cap & 0xff;
1768
1769         switch (msr) {
1770         case MSR_IA32_P5_MC_ADDR:
1771         case MSR_IA32_P5_MC_TYPE:
1772                 data = 0;
1773                 break;
1774         case MSR_IA32_MCG_CAP:
1775                 data = vcpu->arch.mcg_cap;
1776                 break;
1777         case MSR_IA32_MCG_CTL:
1778                 if (!(mcg_cap & MCG_CTL_P))
1779                         return 1;
1780                 data = vcpu->arch.mcg_ctl;
1781                 break;
1782         case MSR_IA32_MCG_STATUS:
1783                 data = vcpu->arch.mcg_status;
1784                 break;
1785         default:
1786                 if (msr >= MSR_IA32_MC0_CTL &&
1787                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1788                         u32 offset = msr - MSR_IA32_MC0_CTL;
1789                         data = vcpu->arch.mce_banks[offset];
1790                         break;
1791                 }
1792                 return 1;
1793         }
1794         *pdata = data;
1795         return 0;
1796 }
1797
1798 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1799 {
1800         u64 data = 0;
1801         struct kvm *kvm = vcpu->kvm;
1802
1803         switch (msr) {
1804         case HV_X64_MSR_GUEST_OS_ID:
1805                 data = kvm->arch.hv_guest_os_id;
1806                 break;
1807         case HV_X64_MSR_HYPERCALL:
1808                 data = kvm->arch.hv_hypercall;
1809                 break;
1810         default:
1811                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1812                 return 1;
1813         }
1814
1815         *pdata = data;
1816         return 0;
1817 }
1818
1819 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1820 {
1821         u64 data = 0;
1822
1823         switch (msr) {
1824         case HV_X64_MSR_VP_INDEX: {
1825                 int r;
1826                 struct kvm_vcpu *v;
1827                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1828                         if (v == vcpu)
1829                                 data = r;
1830                 break;
1831         }
1832         case HV_X64_MSR_EOI:
1833                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1834         case HV_X64_MSR_ICR:
1835                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1836         case HV_X64_MSR_TPR:
1837                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1838         case HV_X64_MSR_APIC_ASSIST_PAGE:
1839                 data = vcpu->arch.hv_vapic;
1840                 break;
1841         default:
1842                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1843                 return 1;
1844         }
1845         *pdata = data;
1846         return 0;
1847 }
1848
1849 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1850 {
1851         u64 data;
1852
1853         switch (msr) {
1854         case MSR_IA32_PLATFORM_ID:
1855         case MSR_IA32_EBL_CR_POWERON:
1856         case MSR_IA32_DEBUGCTLMSR:
1857         case MSR_IA32_LASTBRANCHFROMIP:
1858         case MSR_IA32_LASTBRANCHTOIP:
1859         case MSR_IA32_LASTINTFROMIP:
1860         case MSR_IA32_LASTINTTOIP:
1861         case MSR_K8_SYSCFG:
1862         case MSR_K7_HWCR:
1863         case MSR_VM_HSAVE_PA:
1864         case MSR_P6_PERFCTR0:
1865         case MSR_P6_PERFCTR1:
1866         case MSR_P6_EVNTSEL0:
1867         case MSR_P6_EVNTSEL1:
1868         case MSR_K7_EVNTSEL0:
1869         case MSR_K7_PERFCTR0:
1870         case MSR_K8_INT_PENDING_MSG:
1871         case MSR_AMD64_NB_CFG:
1872         case MSR_FAM10H_MMIO_CONF_BASE:
1873                 data = 0;
1874                 break;
1875         case MSR_IA32_UCODE_REV:
1876                 data = 0x100000000ULL;
1877                 break;
1878         case MSR_MTRRcap:
1879                 data = 0x500 | KVM_NR_VAR_MTRR;
1880                 break;
1881         case 0x200 ... 0x2ff:
1882                 return get_msr_mtrr(vcpu, msr, pdata);
1883         case 0xcd: /* fsb frequency */
1884                 data = 3;
1885                 break;
1886                 /*
1887                  * MSR_EBC_FREQUENCY_ID
1888                  * Conservative value valid for even the basic CPU models.
1889                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1890                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1891                  * and 266MHz for model 3, or 4. Set Core Clock
1892                  * Frequency to System Bus Frequency Ratio to 1 (bits
1893                  * 31:24) even though these are only valid for CPU
1894                  * models > 2, however guests may end up dividing or
1895                  * multiplying by zero otherwise.
1896                  */
1897         case MSR_EBC_FREQUENCY_ID:
1898                 data = 1 << 24;
1899                 break;
1900         case MSR_IA32_APICBASE:
1901                 data = kvm_get_apic_base(vcpu);
1902                 break;
1903         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1904                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1905                 break;
1906         case MSR_IA32_TSCDEADLINE:
1907                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1908                 break;
1909         case MSR_IA32_MISC_ENABLE:
1910                 data = vcpu->arch.ia32_misc_enable_msr;
1911                 break;
1912         case MSR_IA32_PERF_STATUS:
1913                 /* TSC increment by tick */
1914                 data = 1000ULL;
1915                 /* CPU multiplier */
1916                 data |= (((uint64_t)4ULL) << 40);
1917                 break;
1918         case MSR_EFER:
1919                 data = vcpu->arch.efer;
1920                 break;
1921         case MSR_KVM_WALL_CLOCK:
1922         case MSR_KVM_WALL_CLOCK_NEW:
1923                 data = vcpu->kvm->arch.wall_clock;
1924                 break;
1925         case MSR_KVM_SYSTEM_TIME:
1926         case MSR_KVM_SYSTEM_TIME_NEW:
1927                 data = vcpu->arch.time;
1928                 break;
1929         case MSR_KVM_ASYNC_PF_EN:
1930                 data = vcpu->arch.apf.msr_val;
1931                 break;
1932         case MSR_KVM_STEAL_TIME:
1933                 data = vcpu->arch.st.msr_val;
1934                 break;
1935         case MSR_IA32_P5_MC_ADDR:
1936         case MSR_IA32_P5_MC_TYPE:
1937         case MSR_IA32_MCG_CAP:
1938         case MSR_IA32_MCG_CTL:
1939         case MSR_IA32_MCG_STATUS:
1940         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1941                 return get_msr_mce(vcpu, msr, pdata);
1942         case MSR_K7_CLK_CTL:
1943                 /*
1944                  * Provide expected ramp-up count for K7. All other
1945                  * are set to zero, indicating minimum divisors for
1946                  * every field.
1947                  *
1948                  * This prevents guest kernels on AMD host with CPU
1949                  * type 6, model 8 and higher from exploding due to
1950                  * the rdmsr failing.
1951                  */
1952                 data = 0x20000000;
1953                 break;
1954         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1955                 if (kvm_hv_msr_partition_wide(msr)) {
1956                         int r;
1957                         mutex_lock(&vcpu->kvm->lock);
1958                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1959                         mutex_unlock(&vcpu->kvm->lock);
1960                         return r;
1961                 } else
1962                         return get_msr_hyperv(vcpu, msr, pdata);
1963                 break;
1964         case MSR_IA32_BBL_CR_CTL3:
1965                 /* This legacy MSR exists but isn't fully documented in current
1966                  * silicon.  It is however accessed by winxp in very narrow
1967                  * scenarios where it sets bit #19, itself documented as
1968                  * a "reserved" bit.  Best effort attempt to source coherent
1969                  * read data here should the balance of the register be
1970                  * interpreted by the guest:
1971                  *
1972                  * L2 cache control register 3: 64GB range, 256KB size,
1973                  * enabled, latency 0x1, configured
1974                  */
1975                 data = 0xbe702111;
1976                 break;
1977         default:
1978                 if (!ignore_msrs) {
1979                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1980                         return 1;
1981                 } else {
1982                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1983                         data = 0;
1984                 }
1985                 break;
1986         }
1987         *pdata = data;
1988         return 0;
1989 }
1990 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1991
1992 /*
1993  * Read or write a bunch of msrs. All parameters are kernel addresses.
1994  *
1995  * @return number of msrs set successfully.
1996  */
1997 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1998                     struct kvm_msr_entry *entries,
1999                     int (*do_msr)(struct kvm_vcpu *vcpu,
2000                                   unsigned index, u64 *data))
2001 {
2002         int i, idx;
2003
2004         idx = srcu_read_lock(&vcpu->kvm->srcu);
2005         for (i = 0; i < msrs->nmsrs; ++i)
2006                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2007                         break;
2008         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2009
2010         return i;
2011 }
2012
2013 /*
2014  * Read or write a bunch of msrs. Parameters are user addresses.
2015  *
2016  * @return number of msrs set successfully.
2017  */
2018 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2019                   int (*do_msr)(struct kvm_vcpu *vcpu,
2020                                 unsigned index, u64 *data),
2021                   int writeback)
2022 {
2023         struct kvm_msrs msrs;
2024         struct kvm_msr_entry *entries;
2025         int r, n;
2026         unsigned size;
2027
2028         r = -EFAULT;
2029         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2030                 goto out;
2031
2032         r = -E2BIG;
2033         if (msrs.nmsrs >= MAX_IO_MSRS)
2034                 goto out;
2035
2036         r = -ENOMEM;
2037         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2038         entries = kmalloc(size, GFP_KERNEL);
2039         if (!entries)
2040                 goto out;
2041
2042         r = -EFAULT;
2043         if (copy_from_user(entries, user_msrs->entries, size))
2044                 goto out_free;
2045
2046         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2047         if (r < 0)
2048                 goto out_free;
2049
2050         r = -EFAULT;
2051         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2052                 goto out_free;
2053
2054         r = n;
2055
2056 out_free:
2057         kfree(entries);
2058 out:
2059         return r;
2060 }
2061
2062 int kvm_dev_ioctl_check_extension(long ext)
2063 {
2064         int r;
2065
2066         switch (ext) {
2067         case KVM_CAP_IRQCHIP:
2068         case KVM_CAP_HLT:
2069         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2070         case KVM_CAP_SET_TSS_ADDR:
2071         case KVM_CAP_EXT_CPUID:
2072         case KVM_CAP_CLOCKSOURCE:
2073         case KVM_CAP_PIT:
2074         case KVM_CAP_NOP_IO_DELAY:
2075         case KVM_CAP_MP_STATE:
2076         case KVM_CAP_SYNC_MMU:
2077         case KVM_CAP_USER_NMI:
2078         case KVM_CAP_REINJECT_CONTROL:
2079         case KVM_CAP_IRQ_INJECT_STATUS:
2080         case KVM_CAP_ASSIGN_DEV_IRQ:
2081         case KVM_CAP_IRQFD:
2082         case KVM_CAP_IOEVENTFD:
2083         case KVM_CAP_PIT2:
2084         case KVM_CAP_PIT_STATE2:
2085         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2086         case KVM_CAP_XEN_HVM:
2087         case KVM_CAP_ADJUST_CLOCK:
2088         case KVM_CAP_VCPU_EVENTS:
2089         case KVM_CAP_HYPERV:
2090         case KVM_CAP_HYPERV_VAPIC:
2091         case KVM_CAP_HYPERV_SPIN:
2092         case KVM_CAP_PCI_SEGMENT:
2093         case KVM_CAP_DEBUGREGS:
2094         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2095         case KVM_CAP_XSAVE:
2096         case KVM_CAP_ASYNC_PF:
2097         case KVM_CAP_GET_TSC_KHZ:
2098                 r = 1;
2099                 break;
2100         case KVM_CAP_COALESCED_MMIO:
2101                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2102                 break;
2103         case KVM_CAP_VAPIC:
2104                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2105                 break;
2106         case KVM_CAP_NR_VCPUS:
2107                 r = KVM_SOFT_MAX_VCPUS;
2108                 break;
2109         case KVM_CAP_MAX_VCPUS:
2110                 r = KVM_MAX_VCPUS;
2111                 break;
2112         case KVM_CAP_NR_MEMSLOTS:
2113                 r = KVM_MEMORY_SLOTS;
2114                 break;
2115         case KVM_CAP_PV_MMU:    /* obsolete */
2116                 r = 0;
2117                 break;
2118         case KVM_CAP_IOMMU:
2119                 r = iommu_present(&pci_bus_type);
2120                 break;
2121         case KVM_CAP_MCE:
2122                 r = KVM_MAX_MCE_BANKS;
2123                 break;
2124         case KVM_CAP_XCRS:
2125                 r = cpu_has_xsave;
2126                 break;
2127         case KVM_CAP_TSC_CONTROL:
2128                 r = kvm_has_tsc_control;
2129                 break;
2130         case KVM_CAP_TSC_DEADLINE_TIMER:
2131                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2132                 break;
2133         default:
2134                 r = 0;
2135                 break;
2136         }
2137         return r;
2138
2139 }
2140
2141 long kvm_arch_dev_ioctl(struct file *filp,
2142                         unsigned int ioctl, unsigned long arg)
2143 {
2144         void __user *argp = (void __user *)arg;
2145         long r;
2146
2147         switch (ioctl) {
2148         case KVM_GET_MSR_INDEX_LIST: {
2149                 struct kvm_msr_list __user *user_msr_list = argp;
2150                 struct kvm_msr_list msr_list;
2151                 unsigned n;
2152
2153                 r = -EFAULT;
2154                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2155                         goto out;
2156                 n = msr_list.nmsrs;
2157                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2158                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2159                         goto out;
2160                 r = -E2BIG;
2161                 if (n < msr_list.nmsrs)
2162                         goto out;
2163                 r = -EFAULT;
2164                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2165                                  num_msrs_to_save * sizeof(u32)))
2166                         goto out;
2167                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2168                                  &emulated_msrs,
2169                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2170                         goto out;
2171                 r = 0;
2172                 break;
2173         }
2174         case KVM_GET_SUPPORTED_CPUID: {
2175                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2176                 struct kvm_cpuid2 cpuid;
2177
2178                 r = -EFAULT;
2179                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2180                         goto out;
2181                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2182                                                       cpuid_arg->entries);
2183                 if (r)
2184                         goto out;
2185
2186                 r = -EFAULT;
2187                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2188                         goto out;
2189                 r = 0;
2190                 break;
2191         }
2192         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2193                 u64 mce_cap;
2194
2195                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2196                 r = -EFAULT;
2197                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2198                         goto out;
2199                 r = 0;
2200                 break;
2201         }
2202         default:
2203                 r = -EINVAL;
2204         }
2205 out:
2206         return r;
2207 }
2208
2209 static void wbinvd_ipi(void *garbage)
2210 {
2211         wbinvd();
2212 }
2213
2214 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2215 {
2216         return vcpu->kvm->arch.iommu_domain &&
2217                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2218 }
2219
2220 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2221 {
2222         /* Address WBINVD may be executed by guest */
2223         if (need_emulate_wbinvd(vcpu)) {
2224                 if (kvm_x86_ops->has_wbinvd_exit())
2225                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2226                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2227                         smp_call_function_single(vcpu->cpu,
2228                                         wbinvd_ipi, NULL, 1);
2229         }
2230
2231         kvm_x86_ops->vcpu_load(vcpu, cpu);
2232         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2233                 /* Make sure TSC doesn't go backwards */
2234                 s64 tsc_delta;
2235                 u64 tsc;
2236
2237                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2238                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2239                              tsc - vcpu->arch.last_guest_tsc;
2240
2241                 if (tsc_delta < 0)
2242                         mark_tsc_unstable("KVM discovered backwards TSC");
2243                 if (check_tsc_unstable()) {
2244                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2245                         vcpu->arch.tsc_catchup = 1;
2246                 }
2247                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2248                 if (vcpu->cpu != cpu)
2249                         kvm_migrate_timers(vcpu);
2250                 vcpu->cpu = cpu;
2251         }
2252
2253         accumulate_steal_time(vcpu);
2254         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2255 }
2256
2257 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2258 {
2259         kvm_x86_ops->vcpu_put(vcpu);
2260         kvm_put_guest_fpu(vcpu);
2261         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2262 }
2263
2264 static int is_efer_nx(void)
2265 {
2266         unsigned long long efer = 0;
2267
2268         rdmsrl_safe(MSR_EFER, &efer);
2269         return efer & EFER_NX;
2270 }
2271
2272 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2273 {
2274         int i;
2275         struct kvm_cpuid_entry2 *e, *entry;
2276
2277         entry = NULL;
2278         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2279                 e = &vcpu->arch.cpuid_entries[i];
2280                 if (e->function == 0x80000001) {
2281                         entry = e;
2282                         break;
2283                 }
2284         }
2285         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2286                 entry->edx &= ~(1 << 20);
2287                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2288         }
2289 }
2290
2291 /* when an old userspace process fills a new kernel module */
2292 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2293                                     struct kvm_cpuid *cpuid,
2294                                     struct kvm_cpuid_entry __user *entries)
2295 {
2296         int r, i;
2297         struct kvm_cpuid_entry *cpuid_entries;
2298
2299         r = -E2BIG;
2300         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2301                 goto out;
2302         r = -ENOMEM;
2303         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2304         if (!cpuid_entries)
2305                 goto out;
2306         r = -EFAULT;
2307         if (copy_from_user(cpuid_entries, entries,
2308                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2309                 goto out_free;
2310         for (i = 0; i < cpuid->nent; i++) {
2311                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2312                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2313                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2314                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2315                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2316                 vcpu->arch.cpuid_entries[i].index = 0;
2317                 vcpu->arch.cpuid_entries[i].flags = 0;
2318                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2319                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2320                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2321         }
2322         vcpu->arch.cpuid_nent = cpuid->nent;
2323         cpuid_fix_nx_cap(vcpu);
2324         r = 0;
2325         kvm_apic_set_version(vcpu);
2326         kvm_x86_ops->cpuid_update(vcpu);
2327         update_cpuid(vcpu);
2328
2329 out_free:
2330         vfree(cpuid_entries);
2331 out:
2332         return r;
2333 }
2334
2335 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2336                                      struct kvm_cpuid2 *cpuid,
2337                                      struct kvm_cpuid_entry2 __user *entries)
2338 {
2339         int r;
2340
2341         r = -E2BIG;
2342         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2343                 goto out;
2344         r = -EFAULT;
2345         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2346                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2347                 goto out;
2348         vcpu->arch.cpuid_nent = cpuid->nent;
2349         kvm_apic_set_version(vcpu);
2350         kvm_x86_ops->cpuid_update(vcpu);
2351         update_cpuid(vcpu);
2352         return 0;
2353
2354 out:
2355         return r;
2356 }
2357
2358 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2359                                      struct kvm_cpuid2 *cpuid,
2360                                      struct kvm_cpuid_entry2 __user *entries)
2361 {
2362         int r;
2363
2364         r = -E2BIG;
2365         if (cpuid->nent < vcpu->arch.cpuid_nent)
2366                 goto out;
2367         r = -EFAULT;
2368         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2369                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2370                 goto out;
2371         return 0;
2372
2373 out:
2374         cpuid->nent = vcpu->arch.cpuid_nent;
2375         return r;
2376 }
2377
2378 static void cpuid_mask(u32 *word, int wordnum)
2379 {
2380         *word &= boot_cpu_data.x86_capability[wordnum];
2381 }
2382
2383 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2384                            u32 index)
2385 {
2386         entry->function = function;
2387         entry->index = index;
2388         cpuid_count(entry->function, entry->index,
2389                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2390         entry->flags = 0;
2391 }
2392
2393 static bool supported_xcr0_bit(unsigned bit)
2394 {
2395         u64 mask = ((u64)1 << bit);
2396
2397         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2398 }
2399
2400 #define F(x) bit(X86_FEATURE_##x)
2401
2402 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2403                          u32 index, int *nent, int maxnent)
2404 {
2405         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2406 #ifdef CONFIG_X86_64
2407         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2408                                 ? F(GBPAGES) : 0;
2409         unsigned f_lm = F(LM);
2410 #else
2411         unsigned f_gbpages = 0;
2412         unsigned f_lm = 0;
2413 #endif
2414         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2415
2416         /* cpuid 1.edx */
2417         const u32 kvm_supported_word0_x86_features =
2418                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2419                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2420                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2421                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2422                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2423                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2424                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2425                 0 /* HTT, TM, Reserved, PBE */;
2426         /* cpuid 0x80000001.edx */
2427         const u32 kvm_supported_word1_x86_features =
2428                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2429                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2430                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2431                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2432                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2433                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2434                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2435                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2436         /* cpuid 1.ecx */
2437         const u32 kvm_supported_word4_x86_features =
2438                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2439                 0 /* DS-CPL, VMX, SMX, EST */ |
2440                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2441                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2442                 0 /* Reserved, DCA */ | F(XMM4_1) |
2443                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2444                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2445                 F(F16C) | F(RDRAND);
2446         /* cpuid 0x80000001.ecx */
2447         const u32 kvm_supported_word6_x86_features =
2448                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2449                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2450                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2451                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2452
2453         /* cpuid 0xC0000001.edx */
2454         const u32 kvm_supported_word5_x86_features =
2455                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2456                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2457                 F(PMM) | F(PMM_EN);
2458
2459         /* cpuid 7.0.ebx */
2460         const u32 kvm_supported_word9_x86_features =
2461                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2462
2463         /* all calls to cpuid_count() should be made on the same cpu */
2464         get_cpu();
2465         do_cpuid_1_ent(entry, function, index);
2466         ++*nent;
2467
2468         switch (function) {
2469         case 0:
2470                 entry->eax = min(entry->eax, (u32)0xd);
2471                 break;
2472         case 1:
2473                 entry->edx &= kvm_supported_word0_x86_features;
2474                 cpuid_mask(&entry->edx, 0);
2475                 entry->ecx &= kvm_supported_word4_x86_features;
2476                 cpuid_mask(&entry->ecx, 4);
2477                 /* we support x2apic emulation even if host does not support
2478                  * it since we emulate x2apic in software */
2479                 entry->ecx |= F(X2APIC);
2480                 break;
2481         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2482          * may return different values. This forces us to get_cpu() before
2483          * issuing the first command, and also to emulate this annoying behavior
2484          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2485         case 2: {
2486                 int t, times = entry->eax & 0xff;
2487
2488                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2489                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2490                 for (t = 1; t < times && *nent < maxnent; ++t) {
2491                         do_cpuid_1_ent(&entry[t], function, 0);
2492                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2493                         ++*nent;
2494                 }
2495                 break;
2496         }
2497         /* function 4 has additional index. */
2498         case 4: {
2499                 int i, cache_type;
2500
2501                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2502                 /* read more entries until cache_type is zero */
2503                 for (i = 1; *nent < maxnent; ++i) {
2504                         cache_type = entry[i - 1].eax & 0x1f;
2505                         if (!cache_type)
2506                                 break;
2507                         do_cpuid_1_ent(&entry[i], function, i);
2508                         entry[i].flags |=
2509                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2510                         ++*nent;
2511                 }
2512                 break;
2513         }
2514         case 7: {
2515                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2516                 /* Mask ebx against host capbability word 9 */
2517                 if (index == 0) {
2518                         entry->ebx &= kvm_supported_word9_x86_features;
2519                         cpuid_mask(&entry->ebx, 9);
2520                 } else
2521                         entry->ebx = 0;
2522                 entry->eax = 0;
2523                 entry->ecx = 0;
2524                 entry->edx = 0;
2525                 break;
2526         }
2527         case 9:
2528                 break;
2529         /* function 0xb has additional index. */
2530         case 0xb: {
2531                 int i, level_type;
2532
2533                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2534                 /* read more entries until level_type is zero */
2535                 for (i = 1; *nent < maxnent; ++i) {
2536                         level_type = entry[i - 1].ecx & 0xff00;
2537                         if (!level_type)
2538                                 break;
2539                         do_cpuid_1_ent(&entry[i], function, i);
2540                         entry[i].flags |=
2541                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2542                         ++*nent;
2543                 }
2544                 break;
2545         }
2546         case 0xd: {
2547                 int idx, i;
2548
2549                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2550                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2551                         do_cpuid_1_ent(&entry[i], function, idx);
2552                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2553                                 continue;
2554                         entry[i].flags |=
2555                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2556                         ++*nent;
2557                         ++i;
2558                 }
2559                 break;
2560         }
2561         case KVM_CPUID_SIGNATURE: {
2562                 char signature[12] = "KVMKVMKVM\0\0";
2563                 u32 *sigptr = (u32 *)signature;
2564                 entry->eax = 0;
2565                 entry->ebx = sigptr[0];
2566                 entry->ecx = sigptr[1];
2567                 entry->edx = sigptr[2];
2568                 break;
2569         }
2570         case KVM_CPUID_FEATURES:
2571                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2572                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2573                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2574                              (1 << KVM_FEATURE_ASYNC_PF) |
2575                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2576
2577                 if (sched_info_on())
2578                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2579
2580                 entry->ebx = 0;
2581                 entry->ecx = 0;
2582                 entry->edx = 0;
2583                 break;
2584         case 0x80000000:
2585                 entry->eax = min(entry->eax, 0x8000001a);
2586                 break;
2587         case 0x80000001:
2588                 entry->edx &= kvm_supported_word1_x86_features;
2589                 cpuid_mask(&entry->edx, 1);
2590                 entry->ecx &= kvm_supported_word6_x86_features;
2591                 cpuid_mask(&entry->ecx, 6);
2592                 break;
2593         case 0x80000008: {
2594                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2595                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2596                 unsigned phys_as = entry->eax & 0xff;
2597
2598                 if (!g_phys_as)
2599                         g_phys_as = phys_as;
2600                 entry->eax = g_phys_as | (virt_as << 8);
2601                 entry->ebx = entry->edx = 0;
2602                 break;
2603         }
2604         case 0x80000019:
2605                 entry->ecx = entry->edx = 0;
2606                 break;
2607         case 0x8000001a:
2608                 break;
2609         case 0x8000001d:
2610                 break;
2611         /*Add support for Centaur's CPUID instruction*/
2612         case 0xC0000000:
2613                 /*Just support up to 0xC0000004 now*/
2614                 entry->eax = min(entry->eax, 0xC0000004);
2615                 break;
2616         case 0xC0000001:
2617                 entry->edx &= kvm_supported_word5_x86_features;
2618                 cpuid_mask(&entry->edx, 5);
2619                 break;
2620         case 3: /* Processor serial number */
2621         case 5: /* MONITOR/MWAIT */
2622         case 6: /* Thermal management */
2623         case 0xA: /* Architectural Performance Monitoring */
2624         case 0x80000007: /* Advanced power management */
2625         case 0xC0000002:
2626         case 0xC0000003:
2627         case 0xC0000004:
2628         default:
2629                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2630                 break;
2631         }
2632
2633         kvm_x86_ops->set_supported_cpuid(function, entry);
2634
2635         put_cpu();
2636 }
2637
2638 #undef F
2639
2640 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2641                                      struct kvm_cpuid_entry2 __user *entries)
2642 {
2643         struct kvm_cpuid_entry2 *cpuid_entries;
2644         int limit, nent = 0, r = -E2BIG;
2645         u32 func;
2646
2647         if (cpuid->nent < 1)
2648                 goto out;
2649         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2650                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2651         r = -ENOMEM;
2652         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2653         if (!cpuid_entries)
2654                 goto out;
2655
2656         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2657         limit = cpuid_entries[0].eax;
2658         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2659                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2660                              &nent, cpuid->nent);
2661         r = -E2BIG;
2662         if (nent >= cpuid->nent)
2663                 goto out_free;
2664
2665         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2666         limit = cpuid_entries[nent - 1].eax;
2667         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2668                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2669                              &nent, cpuid->nent);
2670
2671
2672
2673         r = -E2BIG;
2674         if (nent >= cpuid->nent)
2675                 goto out_free;
2676
2677         /* Add support for Centaur's CPUID instruction. */
2678         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2679                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2680                                 &nent, cpuid->nent);
2681
2682                 r = -E2BIG;
2683                 if (nent >= cpuid->nent)
2684                         goto out_free;
2685
2686                 limit = cpuid_entries[nent - 1].eax;
2687                 for (func = 0xC0000001;
2688                         func <= limit && nent < cpuid->nent; ++func)
2689                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2690                                         &nent, cpuid->nent);
2691
2692                 r = -E2BIG;
2693                 if (nent >= cpuid->nent)
2694                         goto out_free;
2695         }
2696
2697         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2698                      cpuid->nent);
2699
2700         r = -E2BIG;
2701         if (nent >= cpuid->nent)
2702                 goto out_free;
2703
2704         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2705                      cpuid->nent);
2706
2707         r = -E2BIG;
2708         if (nent >= cpuid->nent)
2709                 goto out_free;
2710
2711         r = -EFAULT;
2712         if (copy_to_user(entries, cpuid_entries,
2713                          nent * sizeof(struct kvm_cpuid_entry2)))
2714                 goto out_free;
2715         cpuid->nent = nent;
2716         r = 0;
2717
2718 out_free:
2719         vfree(cpuid_entries);
2720 out:
2721         return r;
2722 }
2723
2724 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2725                                     struct kvm_lapic_state *s)
2726 {
2727         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2728
2729         return 0;
2730 }
2731
2732 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2733                                     struct kvm_lapic_state *s)
2734 {
2735         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2736         kvm_apic_post_state_restore(vcpu);
2737         update_cr8_intercept(vcpu);
2738
2739         return 0;
2740 }
2741
2742 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2743                                     struct kvm_interrupt *irq)
2744 {
2745         if (irq->irq < 0 || irq->irq >= 256)
2746                 return -EINVAL;
2747         if (irqchip_in_kernel(vcpu->kvm))
2748                 return -ENXIO;
2749
2750         kvm_queue_interrupt(vcpu, irq->irq, false);
2751         kvm_make_request(KVM_REQ_EVENT, vcpu);
2752
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2757 {
2758         kvm_inject_nmi(vcpu);
2759
2760         return 0;
2761 }
2762
2763 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2764                                            struct kvm_tpr_access_ctl *tac)
2765 {
2766         if (tac->flags)
2767                 return -EINVAL;
2768         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2769         return 0;
2770 }
2771
2772 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2773                                         u64 mcg_cap)
2774 {
2775         int r;
2776         unsigned bank_num = mcg_cap & 0xff, bank;
2777
2778         r = -EINVAL;
2779         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2780                 goto out;
2781         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2782                 goto out;
2783         r = 0;
2784         vcpu->arch.mcg_cap = mcg_cap;
2785         /* Init IA32_MCG_CTL to all 1s */
2786         if (mcg_cap & MCG_CTL_P)
2787                 vcpu->arch.mcg_ctl = ~(u64)0;
2788         /* Init IA32_MCi_CTL to all 1s */
2789         for (bank = 0; bank < bank_num; bank++)
2790                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2791 out:
2792         return r;
2793 }
2794
2795 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2796                                       struct kvm_x86_mce *mce)
2797 {
2798         u64 mcg_cap = vcpu->arch.mcg_cap;
2799         unsigned bank_num = mcg_cap & 0xff;
2800         u64 *banks = vcpu->arch.mce_banks;
2801
2802         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2803                 return -EINVAL;
2804         /*
2805          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2806          * reporting is disabled
2807          */
2808         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2809             vcpu->arch.mcg_ctl != ~(u64)0)
2810                 return 0;
2811         banks += 4 * mce->bank;
2812         /*
2813          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2814          * reporting is disabled for the bank
2815          */
2816         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2817                 return 0;
2818         if (mce->status & MCI_STATUS_UC) {
2819                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2820                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2821                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2822                         return 0;
2823                 }
2824                 if (banks[1] & MCI_STATUS_VAL)
2825                         mce->status |= MCI_STATUS_OVER;
2826                 banks[2] = mce->addr;
2827                 banks[3] = mce->misc;
2828                 vcpu->arch.mcg_status = mce->mcg_status;
2829                 banks[1] = mce->status;
2830                 kvm_queue_exception(vcpu, MC_VECTOR);
2831         } else if (!(banks[1] & MCI_STATUS_VAL)
2832                    || !(banks[1] & MCI_STATUS_UC)) {
2833                 if (banks[1] & MCI_STATUS_VAL)
2834                         mce->status |= MCI_STATUS_OVER;
2835                 banks[2] = mce->addr;
2836                 banks[3] = mce->misc;
2837                 banks[1] = mce->status;
2838         } else
2839                 banks[1] |= MCI_STATUS_OVER;
2840         return 0;
2841 }
2842
2843 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2844                                                struct kvm_vcpu_events *events)
2845 {
2846         process_nmi(vcpu);
2847         events->exception.injected =
2848                 vcpu->arch.exception.pending &&
2849                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2850         events->exception.nr = vcpu->arch.exception.nr;
2851         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2852         events->exception.pad = 0;
2853         events->exception.error_code = vcpu->arch.exception.error_code;
2854
2855         events->interrupt.injected =
2856                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2857         events->interrupt.nr = vcpu->arch.interrupt.nr;
2858         events->interrupt.soft = 0;
2859         events->interrupt.shadow =
2860                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2861                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2862
2863         events->nmi.injected = vcpu->arch.nmi_injected;
2864         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2865         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2866         events->nmi.pad = 0;
2867
2868         events->sipi_vector = vcpu->arch.sipi_vector;
2869
2870         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2871                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2872                          | KVM_VCPUEVENT_VALID_SHADOW);
2873         memset(&events->reserved, 0, sizeof(events->reserved));
2874 }
2875
2876 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2877                                               struct kvm_vcpu_events *events)
2878 {
2879         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2880                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2881                               | KVM_VCPUEVENT_VALID_SHADOW))
2882                 return -EINVAL;
2883
2884         process_nmi(vcpu);
2885         vcpu->arch.exception.pending = events->exception.injected;
2886         vcpu->arch.exception.nr = events->exception.nr;
2887         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2888         vcpu->arch.exception.error_code = events->exception.error_code;
2889
2890         vcpu->arch.interrupt.pending = events->interrupt.injected;
2891         vcpu->arch.interrupt.nr = events->interrupt.nr;
2892         vcpu->arch.interrupt.soft = events->interrupt.soft;
2893         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2894                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2895                                                   events->interrupt.shadow);
2896
2897         vcpu->arch.nmi_injected = events->nmi.injected;
2898         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2899                 vcpu->arch.nmi_pending = events->nmi.pending;
2900         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2901
2902         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2903                 vcpu->arch.sipi_vector = events->sipi_vector;
2904
2905         kvm_make_request(KVM_REQ_EVENT, vcpu);
2906
2907         return 0;
2908 }
2909
2910 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2911                                              struct kvm_debugregs *dbgregs)
2912 {
2913         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2914         dbgregs->dr6 = vcpu->arch.dr6;
2915         dbgregs->dr7 = vcpu->arch.dr7;
2916         dbgregs->flags = 0;
2917         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2918 }
2919
2920 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2921                                             struct kvm_debugregs *dbgregs)
2922 {
2923         if (dbgregs->flags)
2924                 return -EINVAL;
2925
2926         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2927         vcpu->arch.dr6 = dbgregs->dr6;
2928         vcpu->arch.dr7 = dbgregs->dr7;
2929
2930         return 0;
2931 }
2932
2933 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2934                                          struct kvm_xsave *guest_xsave)
2935 {
2936         if (cpu_has_xsave)
2937                 memcpy(guest_xsave->region,
2938                         &vcpu->arch.guest_fpu.state->xsave,
2939                         xstate_size);
2940         else {
2941                 memcpy(guest_xsave->region,
2942                         &vcpu->arch.guest_fpu.state->fxsave,
2943                         sizeof(struct i387_fxsave_struct));
2944                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2945                         XSTATE_FPSSE;
2946         }
2947 }
2948
2949 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2950                                         struct kvm_xsave *guest_xsave)
2951 {
2952         u64 xstate_bv =
2953                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2954
2955         if (cpu_has_xsave)
2956                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2957                         guest_xsave->region, xstate_size);
2958         else {
2959                 if (xstate_bv & ~XSTATE_FPSSE)
2960                         return -EINVAL;
2961                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2962                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2963         }
2964         return 0;
2965 }
2966
2967 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2968                                         struct kvm_xcrs *guest_xcrs)
2969 {
2970         if (!cpu_has_xsave) {
2971                 guest_xcrs->nr_xcrs = 0;
2972                 return;
2973         }
2974
2975         guest_xcrs->nr_xcrs = 1;
2976         guest_xcrs->flags = 0;
2977         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2978         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2979 }
2980
2981 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2982                                        struct kvm_xcrs *guest_xcrs)
2983 {
2984         int i, r = 0;
2985
2986         if (!cpu_has_xsave)
2987                 return -EINVAL;
2988
2989         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2990                 return -EINVAL;
2991
2992         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2993                 /* Only support XCR0 currently */
2994                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2995                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2996                                 guest_xcrs->xcrs[0].value);
2997                         break;
2998                 }
2999         if (r)
3000                 r = -EINVAL;
3001         return r;
3002 }
3003
3004 long kvm_arch_vcpu_ioctl(struct file *filp,
3005                          unsigned int ioctl, unsigned long arg)
3006 {
3007         struct kvm_vcpu *vcpu = filp->private_data;
3008         void __user *argp = (void __user *)arg;
3009         int r;
3010         union {
3011                 struct kvm_lapic_state *lapic;
3012                 struct kvm_xsave *xsave;
3013                 struct kvm_xcrs *xcrs;
3014                 void *buffer;
3015         } u;
3016
3017         u.buffer = NULL;
3018         switch (ioctl) {
3019         case KVM_GET_LAPIC: {
3020                 r = -EINVAL;
3021                 if (!vcpu->arch.apic)
3022                         goto out;
3023                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3024
3025                 r = -ENOMEM;
3026                 if (!u.lapic)
3027                         goto out;
3028                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3029                 if (r)
3030                         goto out;
3031                 r = -EFAULT;
3032                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3033                         goto out;
3034                 r = 0;
3035                 break;
3036         }
3037         case KVM_SET_LAPIC: {
3038                 r = -EINVAL;
3039                 if (!vcpu->arch.apic)
3040                         goto out;
3041                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3042                 r = -ENOMEM;
3043                 if (!u.lapic)
3044                         goto out;
3045                 r = -EFAULT;
3046                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3047                         goto out;
3048                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3049                 if (r)
3050                         goto out;
3051                 r = 0;
3052                 break;
3053         }
3054         case KVM_INTERRUPT: {
3055                 struct kvm_interrupt irq;
3056
3057                 r = -EFAULT;
3058                 if (copy_from_user(&irq, argp, sizeof irq))
3059                         goto out;
3060                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3061                 if (r)
3062                         goto out;
3063                 r = 0;
3064                 break;
3065         }
3066         case KVM_NMI: {
3067                 r = kvm_vcpu_ioctl_nmi(vcpu);
3068                 if (r)
3069                         goto out;
3070                 r = 0;
3071                 break;
3072         }
3073         case KVM_SET_CPUID: {
3074                 struct kvm_cpuid __user *cpuid_arg = argp;
3075                 struct kvm_cpuid cpuid;
3076
3077                 r = -EFAULT;
3078                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3079                         goto out;
3080                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3081                 if (r)
3082                         goto out;
3083                 break;
3084         }
3085         case KVM_SET_CPUID2: {
3086                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3087                 struct kvm_cpuid2 cpuid;
3088
3089                 r = -EFAULT;
3090                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3091                         goto out;
3092                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3093                                               cpuid_arg->entries);
3094                 if (r)
3095                         goto out;
3096                 break;
3097         }
3098         case KVM_GET_CPUID2: {
3099                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3100                 struct kvm_cpuid2 cpuid;
3101
3102                 r = -EFAULT;
3103                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3104                         goto out;
3105                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3106                                               cpuid_arg->entries);
3107                 if (r)
3108                         goto out;
3109                 r = -EFAULT;
3110                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3111                         goto out;
3112                 r = 0;
3113                 break;
3114         }
3115         case KVM_GET_MSRS:
3116                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3117                 break;
3118         case KVM_SET_MSRS:
3119                 r = msr_io(vcpu, argp, do_set_msr, 0);
3120                 break;
3121         case KVM_TPR_ACCESS_REPORTING: {
3122                 struct kvm_tpr_access_ctl tac;
3123
3124                 r = -EFAULT;
3125                 if (copy_from_user(&tac, argp, sizeof tac))
3126                         goto out;
3127                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3128                 if (r)
3129                         goto out;
3130                 r = -EFAULT;
3131                 if (copy_to_user(argp, &tac, sizeof tac))
3132                         goto out;
3133                 r = 0;
3134                 break;
3135         };
3136         case KVM_SET_VAPIC_ADDR: {
3137                 struct kvm_vapic_addr va;
3138
3139                 r = -EINVAL;
3140                 if (!irqchip_in_kernel(vcpu->kvm))
3141                         goto out;
3142                 r = -EFAULT;
3143                 if (copy_from_user(&va, argp, sizeof va))
3144                         goto out;
3145                 r = 0;
3146                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3147                 break;
3148         }
3149         case KVM_X86_SETUP_MCE: {
3150                 u64 mcg_cap;
3151
3152                 r = -EFAULT;
3153                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3154                         goto out;
3155                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3156                 break;
3157         }
3158         case KVM_X86_SET_MCE: {
3159                 struct kvm_x86_mce mce;
3160
3161                 r = -EFAULT;
3162                 if (copy_from_user(&mce, argp, sizeof mce))
3163                         goto out;
3164                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3165                 break;
3166         }
3167         case KVM_GET_VCPU_EVENTS: {
3168                 struct kvm_vcpu_events events;
3169
3170                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3171
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3174                         break;
3175                 r = 0;
3176                 break;
3177         }
3178         case KVM_SET_VCPU_EVENTS: {
3179                 struct kvm_vcpu_events events;
3180
3181                 r = -EFAULT;
3182                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3183                         break;
3184
3185                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3186                 break;
3187         }
3188         case KVM_GET_DEBUGREGS: {
3189                 struct kvm_debugregs dbgregs;
3190
3191                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3192
3193                 r = -EFAULT;
3194                 if (copy_to_user(argp, &dbgregs,
3195                                  sizeof(struct kvm_debugregs)))
3196                         break;
3197                 r = 0;
3198                 break;
3199         }
3200         case KVM_SET_DEBUGREGS: {
3201                 struct kvm_debugregs dbgregs;
3202
3203                 r = -EFAULT;
3204                 if (copy_from_user(&dbgregs, argp,
3205                                    sizeof(struct kvm_debugregs)))
3206                         break;
3207
3208                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3209                 break;
3210         }
3211         case KVM_GET_XSAVE: {
3212                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3213                 r = -ENOMEM;
3214                 if (!u.xsave)
3215                         break;
3216
3217                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3218
3219                 r = -EFAULT;
3220                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3221                         break;
3222                 r = 0;
3223                 break;
3224         }
3225         case KVM_SET_XSAVE: {
3226                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3227                 r = -ENOMEM;
3228                 if (!u.xsave)
3229                         break;
3230
3231                 r = -EFAULT;
3232                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3233                         break;
3234
3235                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3236                 break;
3237         }
3238         case KVM_GET_XCRS: {
3239                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3240                 r = -ENOMEM;
3241                 if (!u.xcrs)
3242                         break;
3243
3244                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3245
3246                 r = -EFAULT;
3247                 if (copy_to_user(argp, u.xcrs,
3248                                  sizeof(struct kvm_xcrs)))
3249                         break;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_SET_XCRS: {
3254                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3255                 r = -ENOMEM;
3256                 if (!u.xcrs)
3257                         break;
3258
3259                 r = -EFAULT;
3260                 if (copy_from_user(u.xcrs, argp,
3261                                    sizeof(struct kvm_xcrs)))
3262                         break;
3263
3264                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3265                 break;
3266         }
3267         case KVM_SET_TSC_KHZ: {
3268                 u32 user_tsc_khz;
3269
3270                 r = -EINVAL;
3271                 if (!kvm_has_tsc_control)
3272                         break;
3273
3274                 user_tsc_khz = (u32)arg;
3275
3276                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3277                         goto out;
3278
3279                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3280
3281                 r = 0;
3282                 goto out;
3283         }
3284         case KVM_GET_TSC_KHZ: {
3285                 r = -EIO;
3286                 if (check_tsc_unstable())
3287                         goto out;
3288
3289                 r = vcpu_tsc_khz(vcpu);
3290
3291                 goto out;
3292         }
3293         default:
3294                 r = -EINVAL;
3295         }
3296 out:
3297         kfree(u.buffer);
3298         return r;
3299 }
3300
3301 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3302 {
3303         int ret;
3304
3305         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3306                 return -1;
3307         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3308         return ret;
3309 }
3310
3311 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3312                                               u64 ident_addr)
3313 {
3314         kvm->arch.ept_identity_map_addr = ident_addr;
3315         return 0;
3316 }
3317
3318 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3319                                           u32 kvm_nr_mmu_pages)
3320 {
3321         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3322                 return -EINVAL;
3323
3324         mutex_lock(&kvm->slots_lock);
3325         spin_lock(&kvm->mmu_lock);
3326
3327         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3328         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3329
3330         spin_unlock(&kvm->mmu_lock);
3331         mutex_unlock(&kvm->slots_lock);
3332         return 0;
3333 }
3334
3335 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3336 {
3337         return kvm->arch.n_max_mmu_pages;
3338 }
3339
3340 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3341 {
3342         int r;
3343
3344         r = 0;
3345         switch (chip->chip_id) {
3346         case KVM_IRQCHIP_PIC_MASTER:
3347                 memcpy(&chip->chip.pic,
3348                         &pic_irqchip(kvm)->pics[0],
3349                         sizeof(struct kvm_pic_state));
3350                 break;
3351         case KVM_IRQCHIP_PIC_SLAVE:
3352                 memcpy(&chip->chip.pic,
3353                         &pic_irqchip(kvm)->pics[1],
3354                         sizeof(struct kvm_pic_state));
3355                 break;
3356         case KVM_IRQCHIP_IOAPIC:
3357                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3358                 break;
3359         default:
3360                 r = -EINVAL;
3361                 break;
3362         }
3363         return r;
3364 }
3365
3366 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3367 {
3368         int r;
3369
3370         r = 0;
3371         switch (chip->chip_id) {
3372         case KVM_IRQCHIP_PIC_MASTER:
3373                 spin_lock(&pic_irqchip(kvm)->lock);
3374                 memcpy(&pic_irqchip(kvm)->pics[0],
3375                         &chip->chip.pic,
3376                         sizeof(struct kvm_pic_state));
3377                 spin_unlock(&pic_irqchip(kvm)->lock);
3378                 break;
3379         case KVM_IRQCHIP_PIC_SLAVE:
3380                 spin_lock(&pic_irqchip(kvm)->lock);
3381                 memcpy(&pic_irqchip(kvm)->pics[1],
3382                         &chip->chip.pic,
3383                         sizeof(struct kvm_pic_state));
3384                 spin_unlock(&pic_irqchip(kvm)->lock);
3385                 break;
3386         case KVM_IRQCHIP_IOAPIC:
3387                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3388                 break;
3389         default:
3390                 r = -EINVAL;
3391                 break;
3392         }
3393         kvm_pic_update_irq(pic_irqchip(kvm));
3394         return r;
3395 }
3396
3397 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3398 {
3399         int r = 0;
3400
3401         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3402         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3403         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3408 {
3409         int r = 0;
3410
3411         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3412         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3413         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3414         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3415         return r;
3416 }
3417
3418 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3419 {
3420         int r = 0;
3421
3422         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3423         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3424                 sizeof(ps->channels));
3425         ps->flags = kvm->arch.vpit->pit_state.flags;
3426         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3427         memset(&ps->reserved, 0, sizeof(ps->reserved));
3428         return r;
3429 }
3430
3431 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3432 {
3433         int r = 0, start = 0;
3434         u32 prev_legacy, cur_legacy;
3435         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3436         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3437         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3438         if (!prev_legacy && cur_legacy)
3439                 start = 1;
3440         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3441                sizeof(kvm->arch.vpit->pit_state.channels));
3442         kvm->arch.vpit->pit_state.flags = ps->flags;
3443         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return r;
3446 }
3447
3448 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3449                                  struct kvm_reinject_control *control)
3450 {
3451         if (!kvm->arch.vpit)
3452                 return -ENXIO;
3453         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3454         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         return 0;
3457 }
3458
3459 /*
3460  * Get (and clear) the dirty memory log for a memory slot.
3461  */
3462 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3463                                       struct kvm_dirty_log *log)
3464 {
3465         int r, i;
3466         struct kvm_memory_slot *memslot;
3467         unsigned long n;
3468         unsigned long is_dirty = 0;
3469
3470         mutex_lock(&kvm->slots_lock);
3471
3472         r = -EINVAL;
3473         if (log->slot >= KVM_MEMORY_SLOTS)
3474                 goto out;
3475
3476         memslot = &kvm->memslots->memslots[log->slot];
3477         r = -ENOENT;
3478         if (!memslot->dirty_bitmap)
3479                 goto out;
3480
3481         n = kvm_dirty_bitmap_bytes(memslot);
3482
3483         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3484                 is_dirty = memslot->dirty_bitmap[i];
3485
3486         /* If nothing is dirty, don't bother messing with page tables. */
3487         if (is_dirty) {
3488                 struct kvm_memslots *slots, *old_slots;
3489                 unsigned long *dirty_bitmap;
3490
3491                 dirty_bitmap = memslot->dirty_bitmap_head;
3492                 if (memslot->dirty_bitmap == dirty_bitmap)
3493                         dirty_bitmap += n / sizeof(long);
3494                 memset(dirty_bitmap, 0, n);
3495
3496                 r = -ENOMEM;
3497                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3498                 if (!slots)
3499                         goto out;
3500                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3501                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3502                 slots->generation++;
3503
3504                 old_slots = kvm->memslots;
3505                 rcu_assign_pointer(kvm->memslots, slots);
3506                 synchronize_srcu_expedited(&kvm->srcu);
3507                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3508                 kfree(old_slots);
3509
3510                 spin_lock(&kvm->mmu_lock);
3511                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3512                 spin_unlock(&kvm->mmu_lock);
3513
3514                 r = -EFAULT;
3515                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3516                         goto out;
3517         } else {
3518                 r = -EFAULT;
3519                 if (clear_user(log->dirty_bitmap, n))
3520                         goto out;
3521         }
3522
3523         r = 0;
3524 out:
3525         mutex_unlock(&kvm->slots_lock);
3526         return r;
3527 }
3528
3529 long kvm_arch_vm_ioctl(struct file *filp,
3530                        unsigned int ioctl, unsigned long arg)
3531 {
3532         struct kvm *kvm = filp->private_data;
3533         void __user *argp = (void __user *)arg;
3534         int r = -ENOTTY;
3535         /*
3536          * This union makes it completely explicit to gcc-3.x
3537          * that these two variables' stack usage should be
3538          * combined, not added together.
3539          */
3540         union {
3541                 struct kvm_pit_state ps;
3542                 struct kvm_pit_state2 ps2;
3543                 struct kvm_pit_config pit_config;
3544         } u;
3545
3546         switch (ioctl) {
3547         case KVM_SET_TSS_ADDR:
3548                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3549                 if (r < 0)
3550                         goto out;
3551                 break;
3552         case KVM_SET_IDENTITY_MAP_ADDR: {
3553                 u64 ident_addr;
3554
3555                 r = -EFAULT;
3556                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3557                         goto out;
3558                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3559                 if (r < 0)
3560                         goto out;
3561                 break;
3562         }
3563         case KVM_SET_NR_MMU_PAGES:
3564                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3565                 if (r)
3566                         goto out;
3567                 break;
3568         case KVM_GET_NR_MMU_PAGES:
3569                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3570                 break;
3571         case KVM_CREATE_IRQCHIP: {
3572                 struct kvm_pic *vpic;
3573
3574                 mutex_lock(&kvm->lock);
3575                 r = -EEXIST;
3576                 if (kvm->arch.vpic)
3577                         goto create_irqchip_unlock;
3578                 r = -EINVAL;
3579                 if (atomic_read(&kvm->online_vcpus))
3580                         goto create_irqchip_unlock;
3581                 r = -ENOMEM;
3582                 vpic = kvm_create_pic(kvm);
3583                 if (vpic) {
3584                         r = kvm_ioapic_init(kvm);
3585                         if (r) {
3586                                 mutex_lock(&kvm->slots_lock);
3587                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3588                                                           &vpic->dev_master);
3589                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3590                                                           &vpic->dev_slave);
3591                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3592                                                           &vpic->dev_eclr);
3593                                 mutex_unlock(&kvm->slots_lock);
3594                                 kfree(vpic);
3595                                 goto create_irqchip_unlock;
3596                         }
3597                 } else
3598                         goto create_irqchip_unlock;
3599                 smp_wmb();
3600                 kvm->arch.vpic = vpic;
3601                 smp_wmb();
3602                 r = kvm_setup_default_irq_routing(kvm);
3603                 if (r) {
3604                         mutex_lock(&kvm->slots_lock);
3605                         mutex_lock(&kvm->irq_lock);
3606                         kvm_ioapic_destroy(kvm);
3607                         kvm_destroy_pic(kvm);
3608                         mutex_unlock(&kvm->irq_lock);
3609                         mutex_unlock(&kvm->slots_lock);
3610                 }
3611         create_irqchip_unlock:
3612                 mutex_unlock(&kvm->lock);
3613                 break;
3614         }
3615         case KVM_CREATE_PIT:
3616                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3617                 goto create_pit;
3618         case KVM_CREATE_PIT2:
3619                 r = -EFAULT;
3620                 if (copy_from_user(&u.pit_config, argp,
3621                                    sizeof(struct kvm_pit_config)))
3622                         goto out;
3623         create_pit:
3624                 mutex_lock(&kvm->slots_lock);
3625                 r = -EEXIST;
3626                 if (kvm->arch.vpit)
3627                         goto create_pit_unlock;
3628                 r = -ENOMEM;
3629                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3630                 if (kvm->arch.vpit)
3631                         r = 0;
3632         create_pit_unlock:
3633                 mutex_unlock(&kvm->slots_lock);
3634                 break;
3635         case KVM_IRQ_LINE_STATUS:
3636         case KVM_IRQ_LINE: {
3637                 struct kvm_irq_level irq_event;
3638
3639                 r = -EFAULT;
3640                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3641                         goto out;
3642                 r = -ENXIO;
3643                 if (irqchip_in_kernel(kvm)) {
3644                         __s32 status;
3645                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3646                                         irq_event.irq, irq_event.level);
3647                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3648                                 r = -EFAULT;
3649                                 irq_event.status = status;
3650                                 if (copy_to_user(argp, &irq_event,
3651                                                         sizeof irq_event))
3652                                         goto out;
3653                         }
3654                         r = 0;
3655                 }
3656                 break;
3657         }
3658         case KVM_GET_IRQCHIP: {
3659                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3660                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3661
3662                 r = -ENOMEM;
3663                 if (!chip)
3664                         goto out;
3665                 r = -EFAULT;
3666                 if (copy_from_user(chip, argp, sizeof *chip))
3667                         goto get_irqchip_out;
3668                 r = -ENXIO;
3669                 if (!irqchip_in_kernel(kvm))
3670                         goto get_irqchip_out;
3671                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3672                 if (r)
3673                         goto get_irqchip_out;
3674                 r = -EFAULT;
3675                 if (copy_to_user(argp, chip, sizeof *chip))
3676                         goto get_irqchip_out;
3677                 r = 0;
3678         get_irqchip_out:
3679                 kfree(chip);
3680                 if (r)
3681                         goto out;
3682                 break;
3683         }
3684         case KVM_SET_IRQCHIP: {
3685                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3686                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3687
3688                 r = -ENOMEM;
3689                 if (!chip)
3690                         goto out;
3691                 r = -EFAULT;
3692                 if (copy_from_user(chip, argp, sizeof *chip))
3693                         goto set_irqchip_out;
3694                 r = -ENXIO;
3695                 if (!irqchip_in_kernel(kvm))
3696                         goto set_irqchip_out;
3697                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3698                 if (r)
3699                         goto set_irqchip_out;
3700                 r = 0;
3701         set_irqchip_out:
3702                 kfree(chip);
3703                 if (r)
3704                         goto out;
3705                 break;
3706         }
3707         case KVM_GET_PIT: {
3708                 r = -EFAULT;
3709                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3710                         goto out;
3711                 r = -ENXIO;
3712                 if (!kvm->arch.vpit)
3713                         goto out;
3714                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3715                 if (r)
3716                         goto out;
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3719                         goto out;
3720                 r = 0;
3721                 break;
3722         }
3723         case KVM_SET_PIT: {
3724                 r = -EFAULT;
3725                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3726                         goto out;
3727                 r = -ENXIO;
3728                 if (!kvm->arch.vpit)
3729                         goto out;
3730                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3731                 if (r)
3732                         goto out;
3733                 r = 0;
3734                 break;
3735         }
3736         case KVM_GET_PIT2: {
3737                 r = -ENXIO;
3738                 if (!kvm->arch.vpit)
3739                         goto out;
3740                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3741                 if (r)
3742                         goto out;
3743                 r = -EFAULT;
3744                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3745                         goto out;
3746                 r = 0;
3747                 break;
3748         }
3749         case KVM_SET_PIT2: {
3750                 r = -EFAULT;
3751                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3752                         goto out;
3753                 r = -ENXIO;
3754                 if (!kvm->arch.vpit)
3755                         goto out;
3756                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3757                 if (r)
3758                         goto out;
3759                 r = 0;
3760                 break;
3761         }
3762         case KVM_REINJECT_CONTROL: {
3763                 struct kvm_reinject_control control;
3764                 r =  -EFAULT;
3765                 if (copy_from_user(&control, argp, sizeof(control)))
3766                         goto out;
3767                 r = kvm_vm_ioctl_reinject(kvm, &control);
3768                 if (r)
3769                         goto out;
3770                 r = 0;
3771                 break;
3772         }
3773         case KVM_XEN_HVM_CONFIG: {
3774                 r = -EFAULT;
3775                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3776                                    sizeof(struct kvm_xen_hvm_config)))
3777                         goto out;
3778                 r = -EINVAL;
3779                 if (kvm->arch.xen_hvm_config.flags)
3780                         goto out;
3781                 r = 0;
3782                 break;
3783         }
3784         case KVM_SET_CLOCK: {
3785                 struct kvm_clock_data user_ns;
3786                 u64 now_ns;
3787                 s64 delta;
3788
3789                 r = -EFAULT;
3790                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3791                         goto out;
3792
3793                 r = -EINVAL;
3794                 if (user_ns.flags)
3795                         goto out;
3796
3797                 r = 0;
3798                 local_irq_disable();
3799                 now_ns = get_kernel_ns();
3800                 delta = user_ns.clock - now_ns;
3801                 local_irq_enable();
3802                 kvm->arch.kvmclock_offset = delta;
3803                 break;
3804         }
3805         case KVM_GET_CLOCK: {
3806                 struct kvm_clock_data user_ns;
3807                 u64 now_ns;
3808
3809                 local_irq_disable();
3810                 now_ns = get_kernel_ns();
3811                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3812                 local_irq_enable();
3813                 user_ns.flags = 0;
3814                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3815
3816                 r = -EFAULT;
3817                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3818                         goto out;
3819                 r = 0;
3820                 break;
3821         }
3822
3823         default:
3824                 ;
3825         }
3826 out:
3827         return r;
3828 }
3829
3830 static void kvm_init_msr_list(void)
3831 {
3832         u32 dummy[2];
3833         unsigned i, j;
3834
3835         /* skip the first msrs in the list. KVM-specific */
3836         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3837                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3838                         continue;
3839                 if (j < i)
3840                         msrs_to_save[j] = msrs_to_save[i];
3841                 j++;
3842         }
3843         num_msrs_to_save = j;
3844 }
3845
3846 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3847                            const void *v)
3848 {
3849         int handled = 0;
3850         int n;
3851
3852         do {
3853                 n = min(len, 8);
3854                 if (!(vcpu->arch.apic &&
3855                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3856                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3857                         break;
3858                 handled += n;
3859                 addr += n;
3860                 len -= n;
3861                 v += n;
3862         } while (len);
3863
3864         return handled;
3865 }
3866
3867 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3868 {
3869         int handled = 0;
3870         int n;
3871
3872         do {
3873                 n = min(len, 8);
3874                 if (!(vcpu->arch.apic &&
3875                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3876                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3877                         break;
3878                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3879                 handled += n;
3880                 addr += n;
3881                 len -= n;
3882                 v += n;
3883         } while (len);
3884
3885         return handled;
3886 }
3887
3888 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3889                         struct kvm_segment *var, int seg)
3890 {
3891         kvm_x86_ops->set_segment(vcpu, var, seg);
3892 }
3893
3894 void kvm_get_segment(struct kvm_vcpu *vcpu,
3895                      struct kvm_segment *var, int seg)
3896 {
3897         kvm_x86_ops->get_segment(vcpu, var, seg);
3898 }
3899
3900 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3901 {
3902         return gpa;
3903 }
3904
3905 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3906 {
3907         gpa_t t_gpa;
3908         struct x86_exception exception;
3909
3910         BUG_ON(!mmu_is_nested(vcpu));
3911
3912         /* NPT walks are always user-walks */
3913         access |= PFERR_USER_MASK;
3914         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3915
3916         return t_gpa;
3917 }
3918
3919 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3920                               struct x86_exception *exception)
3921 {
3922         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3923         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3924 }
3925
3926  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3927                                 struct x86_exception *exception)
3928 {
3929         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3930         access |= PFERR_FETCH_MASK;
3931         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3932 }
3933
3934 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3935                                struct x86_exception *exception)
3936 {
3937         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3938         access |= PFERR_WRITE_MASK;
3939         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3940 }
3941
3942 /* uses this to access any guest's mapped memory without checking CPL */
3943 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3944                                 struct x86_exception *exception)
3945 {
3946         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3947 }
3948
3949 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3950                                       struct kvm_vcpu *vcpu, u32 access,
3951                                       struct x86_exception *exception)
3952 {
3953         void *data = val;
3954         int r = X86EMUL_CONTINUE;
3955
3956         while (bytes) {
3957                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3958                                                             exception);
3959                 unsigned offset = addr & (PAGE_SIZE-1);
3960                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3961                 int ret;
3962
3963                 if (gpa == UNMAPPED_GVA)
3964                         return X86EMUL_PROPAGATE_FAULT;
3965                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3966                 if (ret < 0) {
3967                         r = X86EMUL_IO_NEEDED;
3968                         goto out;
3969                 }
3970
3971                 bytes -= toread;
3972                 data += toread;
3973                 addr += toread;
3974         }
3975 out:
3976         return r;
3977 }
3978
3979 /* used for instruction fetching */
3980 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3981                                 gva_t addr, void *val, unsigned int bytes,
3982                                 struct x86_exception *exception)
3983 {
3984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3985         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3986
3987         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3988                                           access | PFERR_FETCH_MASK,
3989                                           exception);
3990 }
3991
3992 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3993                                gva_t addr, void *val, unsigned int bytes,
3994                                struct x86_exception *exception)
3995 {
3996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3997         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3998
3999         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4000                                           exception);
4001 }
4002 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4003
4004 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4005                                       gva_t addr, void *val, unsigned int bytes,
4006                                       struct x86_exception *exception)
4007 {
4008         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4009         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4010 }
4011
4012 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4013                                        gva_t addr, void *val,
4014                                        unsigned int bytes,
4015                                        struct x86_exception *exception)
4016 {
4017         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4018         void *data = val;
4019         int r = X86EMUL_CONTINUE;
4020
4021         while (bytes) {
4022                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4023                                                              PFERR_WRITE_MASK,
4024                                                              exception);
4025                 unsigned offset = addr & (PAGE_SIZE-1);
4026                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4027                 int ret;
4028
4029                 if (gpa == UNMAPPED_GVA)
4030                         return X86EMUL_PROPAGATE_FAULT;
4031                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4032                 if (ret < 0) {
4033                         r = X86EMUL_IO_NEEDED;
4034                         goto out;
4035                 }
4036
4037                 bytes -= towrite;
4038                 data += towrite;
4039                 addr += towrite;
4040         }
4041 out:
4042         return r;
4043 }
4044 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4045
4046 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4047                                 gpa_t *gpa, struct x86_exception *exception,
4048                                 bool write)
4049 {
4050         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4051
4052         if (vcpu_match_mmio_gva(vcpu, gva) &&
4053                   check_write_user_access(vcpu, write, access,
4054                   vcpu->arch.access)) {
4055                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4056                                         (gva & (PAGE_SIZE - 1));
4057                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4058                 return 1;
4059         }
4060
4061         if (write)
4062                 access |= PFERR_WRITE_MASK;
4063
4064         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4065
4066         if (*gpa == UNMAPPED_GVA)
4067                 return -1;
4068
4069         /* For APIC access vmexit */
4070         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4071                 return 1;
4072
4073         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4074                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4075                 return 1;
4076         }
4077
4078         return 0;
4079 }
4080
4081 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4082                         const void *val, int bytes)
4083 {
4084         int ret;
4085
4086         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4087         if (ret < 0)
4088                 return 0;
4089         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4090         return 1;
4091 }
4092
4093 struct read_write_emulator_ops {
4094         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4095                                   int bytes);
4096         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097                                   void *val, int bytes);
4098         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099                                int bytes, void *val);
4100         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4101                                     void *val, int bytes);
4102         bool write;
4103 };
4104
4105 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4106 {
4107         if (vcpu->mmio_read_completed) {
4108                 memcpy(val, vcpu->mmio_data, bytes);
4109                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4110                                vcpu->mmio_phys_addr, *(u64 *)val);
4111                 vcpu->mmio_read_completed = 0;
4112                 return 1;
4113         }
4114
4115         return 0;
4116 }
4117
4118 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4119                         void *val, int bytes)
4120 {
4121         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4122 }
4123
4124 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4125                          void *val, int bytes)
4126 {
4127         return emulator_write_phys(vcpu, gpa, val, bytes);
4128 }
4129
4130 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4131 {
4132         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4133         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4134 }
4135
4136 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4137                           void *val, int bytes)
4138 {
4139         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4140         return X86EMUL_IO_NEEDED;
4141 }
4142
4143 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4144                            void *val, int bytes)
4145 {
4146         memcpy(vcpu->mmio_data, val, bytes);
4147         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4148         return X86EMUL_CONTINUE;
4149 }
4150
4151 static struct read_write_emulator_ops read_emultor = {
4152         .read_write_prepare = read_prepare,
4153         .read_write_emulate = read_emulate,
4154         .read_write_mmio = vcpu_mmio_read,
4155         .read_write_exit_mmio = read_exit_mmio,
4156 };
4157
4158 static struct read_write_emulator_ops write_emultor = {
4159         .read_write_emulate = write_emulate,
4160         .read_write_mmio = write_mmio,
4161         .read_write_exit_mmio = write_exit_mmio,
4162         .write = true,
4163 };
4164
4165 static int emulator_read_write_onepage(unsigned long addr, void *val,
4166                                        unsigned int bytes,
4167                                        struct x86_exception *exception,
4168                                        struct kvm_vcpu *vcpu,
4169                                        struct read_write_emulator_ops *ops)
4170 {
4171         gpa_t gpa;
4172         int handled, ret;
4173         bool write = ops->write;
4174
4175         if (ops->read_write_prepare &&
4176                   ops->read_write_prepare(vcpu, val, bytes))
4177                 return X86EMUL_CONTINUE;
4178
4179         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4180
4181         if (ret < 0)
4182                 return X86EMUL_PROPAGATE_FAULT;
4183
4184         /* For APIC access vmexit */
4185         if (ret)
4186                 goto mmio;
4187
4188         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4189                 return X86EMUL_CONTINUE;
4190
4191 mmio:
4192         /*
4193          * Is this MMIO handled locally?
4194          */
4195         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4196         if (handled == bytes)
4197                 return X86EMUL_CONTINUE;
4198
4199         gpa += handled;
4200         bytes -= handled;
4201         val += handled;
4202
4203         vcpu->mmio_needed = 1;
4204         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4205         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4206         vcpu->mmio_size = bytes;
4207         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4208         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4209         vcpu->mmio_index = 0;
4210
4211         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4212 }
4213
4214 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4215                         void *val, unsigned int bytes,
4216                         struct x86_exception *exception,
4217                         struct read_write_emulator_ops *ops)
4218 {
4219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4220
4221         /* Crossing a page boundary? */
4222         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4223                 int rc, now;
4224
4225                 now = -addr & ~PAGE_MASK;
4226                 rc = emulator_read_write_onepage(addr, val, now, exception,
4227                                                  vcpu, ops);
4228
4229                 if (rc != X86EMUL_CONTINUE)
4230                         return rc;
4231                 addr += now;
4232                 val += now;
4233                 bytes -= now;
4234         }
4235
4236         return emulator_read_write_onepage(addr, val, bytes, exception,
4237                                            vcpu, ops);
4238 }
4239
4240 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4241                                   unsigned long addr,
4242                                   void *val,
4243                                   unsigned int bytes,
4244                                   struct x86_exception *exception)
4245 {
4246         return emulator_read_write(ctxt, addr, val, bytes,
4247                                    exception, &read_emultor);
4248 }
4249
4250 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4251                             unsigned long addr,
4252                             const void *val,
4253                             unsigned int bytes,
4254                             struct x86_exception *exception)
4255 {
4256         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4257                                    exception, &write_emultor);
4258 }
4259
4260 #define CMPXCHG_TYPE(t, ptr, old, new) \
4261         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4262
4263 #ifdef CONFIG_X86_64
4264 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4265 #else
4266 #  define CMPXCHG64(ptr, old, new) \
4267         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4268 #endif
4269
4270 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4271                                      unsigned long addr,
4272                                      const void *old,
4273                                      const void *new,
4274                                      unsigned int bytes,
4275                                      struct x86_exception *exception)
4276 {
4277         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4278         gpa_t gpa;
4279         struct page *page;
4280         char *kaddr;
4281         bool exchanged;
4282
4283         /* guests cmpxchg8b have to be emulated atomically */
4284         if (bytes > 8 || (bytes & (bytes - 1)))
4285                 goto emul_write;
4286
4287         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4288
4289         if (gpa == UNMAPPED_GVA ||
4290             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4291                 goto emul_write;
4292
4293         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4294                 goto emul_write;
4295
4296         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4297         if (is_error_page(page)) {
4298                 kvm_release_page_clean(page);
4299                 goto emul_write;
4300         }
4301
4302         kaddr = kmap_atomic(page, KM_USER0);
4303         kaddr += offset_in_page(gpa);
4304         switch (bytes) {
4305         case 1:
4306                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4307                 break;
4308         case 2:
4309                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4310                 break;
4311         case 4:
4312                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4313                 break;
4314         case 8:
4315                 exchanged = CMPXCHG64(kaddr, old, new);
4316                 break;
4317         default:
4318                 BUG();
4319         }
4320         kunmap_atomic(kaddr, KM_USER0);
4321         kvm_release_page_dirty(page);
4322
4323         if (!exchanged)
4324                 return X86EMUL_CMPXCHG_FAILED;
4325
4326         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4327
4328         return X86EMUL_CONTINUE;
4329
4330 emul_write:
4331         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4332
4333         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4334 }
4335
4336 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4337 {
4338         /* TODO: String I/O for in kernel device */
4339         int r;
4340
4341         if (vcpu->arch.pio.in)
4342                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4343                                     vcpu->arch.pio.size, pd);
4344         else
4345                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4346                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4347                                      pd);
4348         return r;
4349 }
4350
4351
4352 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4353                                     int size, unsigned short port, void *val,
4354                                     unsigned int count)
4355 {
4356         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4357
4358         if (vcpu->arch.pio.count)
4359                 goto data_avail;
4360
4361         trace_kvm_pio(0, port, size, count);
4362
4363         vcpu->arch.pio.port = port;
4364         vcpu->arch.pio.in = 1;
4365         vcpu->arch.pio.count  = count;
4366         vcpu->arch.pio.size = size;
4367
4368         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4369         data_avail:
4370                 memcpy(val, vcpu->arch.pio_data, size * count);
4371                 vcpu->arch.pio.count = 0;
4372                 return 1;
4373         }
4374
4375         vcpu->run->exit_reason = KVM_EXIT_IO;
4376         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4377         vcpu->run->io.size = size;
4378         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4379         vcpu->run->io.count = count;
4380         vcpu->run->io.port = port;
4381
4382         return 0;
4383 }
4384
4385 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4386                                      int size, unsigned short port,
4387                                      const void *val, unsigned int count)
4388 {
4389         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4390
4391         trace_kvm_pio(1, port, size, count);
4392
4393         vcpu->arch.pio.port = port;
4394         vcpu->arch.pio.in = 0;
4395         vcpu->arch.pio.count = count;
4396         vcpu->arch.pio.size = size;
4397
4398         memcpy(vcpu->arch.pio_data, val, size * count);
4399
4400         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4401                 vcpu->arch.pio.count = 0;
4402                 return 1;
4403         }
4404
4405         vcpu->run->exit_reason = KVM_EXIT_IO;
4406         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4407         vcpu->run->io.size = size;
4408         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4409         vcpu->run->io.count = count;
4410         vcpu->run->io.port = port;
4411
4412         return 0;
4413 }
4414
4415 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4416 {
4417         return kvm_x86_ops->get_segment_base(vcpu, seg);
4418 }
4419
4420 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4421 {
4422         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4423 }
4424
4425 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4426 {
4427         if (!need_emulate_wbinvd(vcpu))
4428                 return X86EMUL_CONTINUE;
4429
4430         if (kvm_x86_ops->has_wbinvd_exit()) {
4431                 int cpu = get_cpu();
4432
4433                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4434                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4435                                 wbinvd_ipi, NULL, 1);
4436                 put_cpu();
4437                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4438         } else
4439                 wbinvd();
4440         return X86EMUL_CONTINUE;
4441 }
4442 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4443
4444 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4445 {
4446         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4447 }
4448
4449 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4450 {
4451         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4452 }
4453
4454 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4455 {
4456
4457         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4458 }
4459
4460 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4461 {
4462         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4463 }
4464
4465 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4466 {
4467         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4468         unsigned long value;
4469
4470         switch (cr) {
4471         case 0:
4472                 value = kvm_read_cr0(vcpu);
4473                 break;
4474         case 2:
4475                 value = vcpu->arch.cr2;
4476                 break;
4477         case 3:
4478                 value = kvm_read_cr3(vcpu);
4479                 break;
4480         case 4:
4481                 value = kvm_read_cr4(vcpu);
4482                 break;
4483         case 8:
4484                 value = kvm_get_cr8(vcpu);
4485                 break;
4486         default:
4487                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4488                 return 0;
4489         }
4490
4491         return value;
4492 }
4493
4494 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4495 {
4496         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4497         int res = 0;
4498
4499         switch (cr) {
4500         case 0:
4501                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4502                 break;
4503         case 2:
4504                 vcpu->arch.cr2 = val;
4505                 break;
4506         case 3:
4507                 res = kvm_set_cr3(vcpu, val);
4508                 break;
4509         case 4:
4510                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4511                 break;
4512         case 8:
4513                 res = kvm_set_cr8(vcpu, val);
4514                 break;
4515         default:
4516                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4517                 res = -1;
4518         }
4519
4520         return res;
4521 }
4522
4523 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4524 {
4525         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4526 }
4527
4528 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4529 {
4530         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4531 }
4532
4533 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4534 {
4535         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4536 }
4537
4538 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4539 {
4540         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4541 }
4542
4543 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4544 {
4545         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4546 }
4547
4548 static unsigned long emulator_get_cached_segment_base(
4549         struct x86_emulate_ctxt *ctxt, int seg)
4550 {
4551         return get_segment_base(emul_to_vcpu(ctxt), seg);
4552 }
4553
4554 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4555                                  struct desc_struct *desc, u32 *base3,
4556                                  int seg)
4557 {
4558         struct kvm_segment var;
4559
4560         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4561         *selector = var.selector;
4562
4563         if (var.unusable)
4564                 return false;
4565
4566         if (var.g)
4567                 var.limit >>= 12;
4568         set_desc_limit(desc, var.limit);
4569         set_desc_base(desc, (unsigned long)var.base);
4570 #ifdef CONFIG_X86_64
4571         if (base3)
4572                 *base3 = var.base >> 32;
4573 #endif
4574         desc->type = var.type;
4575         desc->s = var.s;
4576         desc->dpl = var.dpl;
4577         desc->p = var.present;
4578         desc->avl = var.avl;
4579         desc->l = var.l;
4580         desc->d = var.db;
4581         desc->g = var.g;
4582
4583         return true;
4584 }
4585
4586 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4587                                  struct desc_struct *desc, u32 base3,
4588                                  int seg)
4589 {
4590         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4591         struct kvm_segment var;
4592
4593         var.selector = selector;
4594         var.base = get_desc_base(desc);
4595 #ifdef CONFIG_X86_64
4596         var.base |= ((u64)base3) << 32;
4597 #endif
4598         var.limit = get_desc_limit(desc);
4599         if (desc->g)
4600                 var.limit = (var.limit << 12) | 0xfff;
4601         var.type = desc->type;
4602         var.present = desc->p;
4603         var.dpl = desc->dpl;
4604         var.db = desc->d;
4605         var.s = desc->s;
4606         var.l = desc->l;
4607         var.g = desc->g;
4608         var.avl = desc->avl;
4609         var.present = desc->p;
4610         var.unusable = !var.present;
4611         var.padding = 0;
4612
4613         kvm_set_segment(vcpu, &var, seg);
4614         return;
4615 }
4616
4617 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4618                             u32 msr_index, u64 *pdata)
4619 {
4620         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4621 }
4622
4623 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4624                             u32 msr_index, u64 data)
4625 {
4626         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4627 }
4628
4629 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4630 {
4631         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4632 }
4633
4634 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4635 {
4636         preempt_disable();
4637         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4638         /*
4639          * CR0.TS may reference the host fpu state, not the guest fpu state,
4640          * so it may be clear at this point.
4641          */
4642         clts();
4643 }
4644
4645 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4646 {
4647         preempt_enable();
4648 }
4649
4650 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4651                               struct x86_instruction_info *info,
4652                               enum x86_intercept_stage stage)
4653 {
4654         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4655 }
4656
4657 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4658                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4659 {
4660         struct kvm_cpuid_entry2 *cpuid = NULL;
4661
4662         if (eax && ecx)
4663                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4664                                             *eax, *ecx);
4665
4666         if (cpuid) {
4667                 *eax = cpuid->eax;
4668                 *ecx = cpuid->ecx;
4669                 if (ebx)
4670                         *ebx = cpuid->ebx;
4671                 if (edx)
4672                         *edx = cpuid->edx;
4673                 return true;
4674         }
4675
4676         return false;
4677 }
4678
4679 static struct x86_emulate_ops emulate_ops = {
4680         .read_std            = kvm_read_guest_virt_system,
4681         .write_std           = kvm_write_guest_virt_system,
4682         .fetch               = kvm_fetch_guest_virt,
4683         .read_emulated       = emulator_read_emulated,
4684         .write_emulated      = emulator_write_emulated,
4685         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4686         .invlpg              = emulator_invlpg,
4687         .pio_in_emulated     = emulator_pio_in_emulated,
4688         .pio_out_emulated    = emulator_pio_out_emulated,
4689         .get_segment         = emulator_get_segment,
4690         .set_segment         = emulator_set_segment,
4691         .get_cached_segment_base = emulator_get_cached_segment_base,
4692         .get_gdt             = emulator_get_gdt,
4693         .get_idt             = emulator_get_idt,
4694         .set_gdt             = emulator_set_gdt,
4695         .set_idt             = emulator_set_idt,
4696         .get_cr              = emulator_get_cr,
4697         .set_cr              = emulator_set_cr,
4698         .cpl                 = emulator_get_cpl,
4699         .get_dr              = emulator_get_dr,
4700         .set_dr              = emulator_set_dr,
4701         .set_msr             = emulator_set_msr,
4702         .get_msr             = emulator_get_msr,
4703         .halt                = emulator_halt,
4704         .wbinvd              = emulator_wbinvd,
4705         .fix_hypercall       = emulator_fix_hypercall,
4706         .get_fpu             = emulator_get_fpu,
4707         .put_fpu             = emulator_put_fpu,
4708         .intercept           = emulator_intercept,
4709         .get_cpuid           = emulator_get_cpuid,
4710 };
4711
4712 static void cache_all_regs(struct kvm_vcpu *vcpu)
4713 {
4714         kvm_register_read(vcpu, VCPU_REGS_RAX);
4715         kvm_register_read(vcpu, VCPU_REGS_RSP);
4716         kvm_register_read(vcpu, VCPU_REGS_RIP);
4717         vcpu->arch.regs_dirty = ~0;
4718 }
4719
4720 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4721 {
4722         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4723         /*
4724          * an sti; sti; sequence only disable interrupts for the first
4725          * instruction. So, if the last instruction, be it emulated or
4726          * not, left the system with the INT_STI flag enabled, it
4727          * means that the last instruction is an sti. We should not
4728          * leave the flag on in this case. The same goes for mov ss
4729          */
4730         if (!(int_shadow & mask))
4731                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4732 }
4733
4734 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4735 {
4736         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4737         if (ctxt->exception.vector == PF_VECTOR)
4738                 kvm_propagate_fault(vcpu, &ctxt->exception);
4739         else if (ctxt->exception.error_code_valid)
4740                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4741                                       ctxt->exception.error_code);
4742         else
4743                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4744 }
4745
4746 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4747                               const unsigned long *regs)
4748 {
4749         memset(&ctxt->twobyte, 0,
4750                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4751         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4752
4753         ctxt->fetch.start = 0;
4754         ctxt->fetch.end = 0;
4755         ctxt->io_read.pos = 0;
4756         ctxt->io_read.end = 0;
4757         ctxt->mem_read.pos = 0;
4758         ctxt->mem_read.end = 0;
4759 }
4760
4761 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4762 {
4763         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4764         int cs_db, cs_l;
4765
4766         /*
4767          * TODO: fix emulate.c to use guest_read/write_register
4768          * instead of direct ->regs accesses, can save hundred cycles
4769          * on Intel for instructions that don't read/change RSP, for
4770          * for example.
4771          */
4772         cache_all_regs(vcpu);
4773
4774         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4775
4776         ctxt->eflags = kvm_get_rflags(vcpu);
4777         ctxt->eip = kvm_rip_read(vcpu);
4778         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4779                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4780                      cs_l                               ? X86EMUL_MODE_PROT64 :
4781                      cs_db                              ? X86EMUL_MODE_PROT32 :
4782                                                           X86EMUL_MODE_PROT16;
4783         ctxt->guest_mode = is_guest_mode(vcpu);
4784
4785         init_decode_cache(ctxt, vcpu->arch.regs);
4786         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4787 }
4788
4789 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4790 {
4791         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4792         int ret;
4793
4794         init_emulate_ctxt(vcpu);
4795
4796         ctxt->op_bytes = 2;
4797         ctxt->ad_bytes = 2;
4798         ctxt->_eip = ctxt->eip + inc_eip;
4799         ret = emulate_int_real(ctxt, irq);
4800
4801         if (ret != X86EMUL_CONTINUE)
4802                 return EMULATE_FAIL;
4803
4804         ctxt->eip = ctxt->_eip;
4805         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4806         kvm_rip_write(vcpu, ctxt->eip);
4807         kvm_set_rflags(vcpu, ctxt->eflags);
4808
4809         if (irq == NMI_VECTOR)
4810                 vcpu->arch.nmi_pending = 0;
4811         else
4812                 vcpu->arch.interrupt.pending = false;
4813
4814         return EMULATE_DONE;
4815 }
4816 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4817
4818 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4819 {
4820         int r = EMULATE_DONE;
4821
4822         ++vcpu->stat.insn_emulation_fail;
4823         trace_kvm_emulate_insn_failed(vcpu);
4824         if (!is_guest_mode(vcpu)) {
4825                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4826                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4827                 vcpu->run->internal.ndata = 0;
4828                 r = EMULATE_FAIL;
4829         }
4830         kvm_queue_exception(vcpu, UD_VECTOR);
4831
4832         return r;
4833 }
4834
4835 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4836 {
4837         gpa_t gpa;
4838
4839         if (tdp_enabled)
4840                 return false;
4841
4842         /*
4843          * if emulation was due to access to shadowed page table
4844          * and it failed try to unshadow page and re-entetr the
4845          * guest to let CPU execute the instruction.
4846          */
4847         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4848                 return true;
4849
4850         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4851
4852         if (gpa == UNMAPPED_GVA)
4853                 return true; /* let cpu generate fault */
4854
4855         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4856                 return true;
4857
4858         return false;
4859 }
4860
4861 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4862                             unsigned long cr2,
4863                             int emulation_type,
4864                             void *insn,
4865                             int insn_len)
4866 {
4867         int r;
4868         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4869         bool writeback = true;
4870
4871         kvm_clear_exception_queue(vcpu);
4872
4873         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4874                 init_emulate_ctxt(vcpu);
4875                 ctxt->interruptibility = 0;
4876                 ctxt->have_exception = false;
4877                 ctxt->perm_ok = false;
4878
4879                 ctxt->only_vendor_specific_insn
4880                         = emulation_type & EMULTYPE_TRAP_UD;
4881
4882                 r = x86_decode_insn(ctxt, insn, insn_len);
4883
4884                 trace_kvm_emulate_insn_start(vcpu);
4885                 ++vcpu->stat.insn_emulation;
4886                 if (r != EMULATION_OK)  {
4887                         if (emulation_type & EMULTYPE_TRAP_UD)
4888                                 return EMULATE_FAIL;
4889                         if (reexecute_instruction(vcpu, cr2))
4890                                 return EMULATE_DONE;
4891                         if (emulation_type & EMULTYPE_SKIP)
4892                                 return EMULATE_FAIL;
4893                         return handle_emulation_failure(vcpu);
4894                 }
4895         }
4896
4897         if (emulation_type & EMULTYPE_SKIP) {
4898                 kvm_rip_write(vcpu, ctxt->_eip);
4899                 return EMULATE_DONE;
4900         }
4901
4902         /* this is needed for vmware backdoor interface to work since it
4903            changes registers values  during IO operation */
4904         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4905                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4906                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4907         }
4908
4909 restart:
4910         r = x86_emulate_insn(ctxt);
4911
4912         if (r == EMULATION_INTERCEPTED)
4913                 return EMULATE_DONE;
4914
4915         if (r == EMULATION_FAILED) {
4916                 if (reexecute_instruction(vcpu, cr2))
4917                         return EMULATE_DONE;
4918
4919                 return handle_emulation_failure(vcpu);
4920         }
4921
4922         if (ctxt->have_exception) {
4923                 inject_emulated_exception(vcpu);
4924                 r = EMULATE_DONE;
4925         } else if (vcpu->arch.pio.count) {
4926                 if (!vcpu->arch.pio.in)
4927                         vcpu->arch.pio.count = 0;
4928                 else
4929                         writeback = false;
4930                 r = EMULATE_DO_MMIO;
4931         } else if (vcpu->mmio_needed) {
4932                 if (!vcpu->mmio_is_write)
4933                         writeback = false;
4934                 r = EMULATE_DO_MMIO;
4935         } else if (r == EMULATION_RESTART)
4936                 goto restart;
4937         else
4938                 r = EMULATE_DONE;
4939
4940         if (writeback) {
4941                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4942                 kvm_set_rflags(vcpu, ctxt->eflags);
4943                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4944                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4945                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4946                 kvm_rip_write(vcpu, ctxt->eip);
4947         } else
4948                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4949
4950         return r;
4951 }
4952 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4953
4954 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4955 {
4956         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4957         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4958                                             size, port, &val, 1);
4959         /* do not return to emulator after return from userspace */
4960         vcpu->arch.pio.count = 0;
4961         return ret;
4962 }
4963 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4964
4965 static void tsc_bad(void *info)
4966 {
4967         __this_cpu_write(cpu_tsc_khz, 0);
4968 }
4969
4970 static void tsc_khz_changed(void *data)
4971 {
4972         struct cpufreq_freqs *freq = data;
4973         unsigned long khz = 0;
4974
4975         if (data)
4976                 khz = freq->new;
4977         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4978                 khz = cpufreq_quick_get(raw_smp_processor_id());
4979         if (!khz)
4980                 khz = tsc_khz;
4981         __this_cpu_write(cpu_tsc_khz, khz);
4982 }
4983
4984 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4985                                      void *data)
4986 {
4987         struct cpufreq_freqs *freq = data;
4988         struct kvm *kvm;
4989         struct kvm_vcpu *vcpu;
4990         int i, send_ipi = 0;
4991
4992         /*
4993          * We allow guests to temporarily run on slowing clocks,
4994          * provided we notify them after, or to run on accelerating
4995          * clocks, provided we notify them before.  Thus time never
4996          * goes backwards.
4997          *
4998          * However, we have a problem.  We can't atomically update
4999          * the frequency of a given CPU from this function; it is
5000          * merely a notifier, which can be called from any CPU.
5001          * Changing the TSC frequency at arbitrary points in time
5002          * requires a recomputation of local variables related to
5003          * the TSC for each VCPU.  We must flag these local variables
5004          * to be updated and be sure the update takes place with the
5005          * new frequency before any guests proceed.
5006          *
5007          * Unfortunately, the combination of hotplug CPU and frequency
5008          * change creates an intractable locking scenario; the order
5009          * of when these callouts happen is undefined with respect to
5010          * CPU hotplug, and they can race with each other.  As such,
5011          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5012          * undefined; you can actually have a CPU frequency change take
5013          * place in between the computation of X and the setting of the
5014          * variable.  To protect against this problem, all updates of
5015          * the per_cpu tsc_khz variable are done in an interrupt
5016          * protected IPI, and all callers wishing to update the value
5017          * must wait for a synchronous IPI to complete (which is trivial
5018          * if the caller is on the CPU already).  This establishes the
5019          * necessary total order on variable updates.
5020          *
5021          * Note that because a guest time update may take place
5022          * anytime after the setting of the VCPU's request bit, the
5023          * correct TSC value must be set before the request.  However,
5024          * to ensure the update actually makes it to any guest which
5025          * starts running in hardware virtualization between the set
5026          * and the acquisition of the spinlock, we must also ping the
5027          * CPU after setting the request bit.
5028          *
5029          */
5030
5031         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5032                 return 0;
5033         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5034                 return 0;
5035
5036         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5037
5038         raw_spin_lock(&kvm_lock);
5039         list_for_each_entry(kvm, &vm_list, vm_list) {
5040                 kvm_for_each_vcpu(i, vcpu, kvm) {
5041                         if (vcpu->cpu != freq->cpu)
5042                                 continue;
5043                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5044                         if (vcpu->cpu != smp_processor_id())
5045                                 send_ipi = 1;
5046                 }
5047         }
5048         raw_spin_unlock(&kvm_lock);
5049
5050         if (freq->old < freq->new && send_ipi) {
5051                 /*
5052                  * We upscale the frequency.  Must make the guest
5053                  * doesn't see old kvmclock values while running with
5054                  * the new frequency, otherwise we risk the guest sees
5055                  * time go backwards.
5056                  *
5057                  * In case we update the frequency for another cpu
5058                  * (which might be in guest context) send an interrupt
5059                  * to kick the cpu out of guest context.  Next time
5060                  * guest context is entered kvmclock will be updated,
5061                  * so the guest will not see stale values.
5062                  */
5063                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5064         }
5065         return 0;
5066 }
5067
5068 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5069         .notifier_call  = kvmclock_cpufreq_notifier
5070 };
5071
5072 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5073                                         unsigned long action, void *hcpu)
5074 {
5075         unsigned int cpu = (unsigned long)hcpu;
5076
5077         switch (action) {
5078                 case CPU_ONLINE:
5079                 case CPU_DOWN_FAILED:
5080                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5081                         break;
5082                 case CPU_DOWN_PREPARE:
5083                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5084                         break;
5085         }
5086         return NOTIFY_OK;
5087 }
5088
5089 static struct notifier_block kvmclock_cpu_notifier_block = {
5090         .notifier_call  = kvmclock_cpu_notifier,
5091         .priority = -INT_MAX
5092 };
5093
5094 static void kvm_timer_init(void)
5095 {
5096         int cpu;
5097
5098         max_tsc_khz = tsc_khz;
5099         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5100         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5101 #ifdef CONFIG_CPU_FREQ
5102                 struct cpufreq_policy policy;
5103                 memset(&policy, 0, sizeof(policy));
5104                 cpu = get_cpu();
5105                 cpufreq_get_policy(&policy, cpu);
5106                 if (policy.cpuinfo.max_freq)
5107                         max_tsc_khz = policy.cpuinfo.max_freq;
5108                 put_cpu();
5109 #endif
5110                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5111                                           CPUFREQ_TRANSITION_NOTIFIER);
5112         }
5113         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5114         for_each_online_cpu(cpu)
5115                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5116 }
5117
5118 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5119
5120 static int kvm_is_in_guest(void)
5121 {
5122         return percpu_read(current_vcpu) != NULL;
5123 }
5124
5125 static int kvm_is_user_mode(void)
5126 {
5127         int user_mode = 3;
5128
5129         if (percpu_read(current_vcpu))
5130                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5131
5132         return user_mode != 0;
5133 }
5134
5135 static unsigned long kvm_get_guest_ip(void)
5136 {
5137         unsigned long ip = 0;
5138
5139         if (percpu_read(current_vcpu))
5140                 ip = kvm_rip_read(percpu_read(current_vcpu));
5141
5142         return ip;
5143 }
5144
5145 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5146         .is_in_guest            = kvm_is_in_guest,
5147         .is_user_mode           = kvm_is_user_mode,
5148         .get_guest_ip           = kvm_get_guest_ip,
5149 };
5150
5151 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5152 {
5153         percpu_write(current_vcpu, vcpu);
5154 }
5155 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5156
5157 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5158 {
5159         percpu_write(current_vcpu, NULL);
5160 }
5161 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5162
5163 static void kvm_set_mmio_spte_mask(void)
5164 {
5165         u64 mask;
5166         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5167
5168         /*
5169          * Set the reserved bits and the present bit of an paging-structure
5170          * entry to generate page fault with PFER.RSV = 1.
5171          */
5172         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5173         mask |= 1ull;
5174
5175 #ifdef CONFIG_X86_64
5176         /*
5177          * If reserved bit is not supported, clear the present bit to disable
5178          * mmio page fault.
5179          */
5180         if (maxphyaddr == 52)
5181                 mask &= ~1ull;
5182 #endif
5183
5184         kvm_mmu_set_mmio_spte_mask(mask);
5185 }
5186
5187 int kvm_arch_init(void *opaque)
5188 {
5189         int r;
5190         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5191
5192         if (kvm_x86_ops) {
5193                 printk(KERN_ERR "kvm: already loaded the other module\n");
5194                 r = -EEXIST;
5195                 goto out;
5196         }
5197
5198         if (!ops->cpu_has_kvm_support()) {
5199                 printk(KERN_ERR "kvm: no hardware support\n");
5200                 r = -EOPNOTSUPP;
5201                 goto out;
5202         }
5203         if (ops->disabled_by_bios()) {
5204                 printk(KERN_ERR "kvm: disabled by bios\n");
5205                 r = -EOPNOTSUPP;
5206                 goto out;
5207         }
5208
5209         r = kvm_mmu_module_init();
5210         if (r)
5211                 goto out;
5212
5213         kvm_set_mmio_spte_mask();
5214         kvm_init_msr_list();
5215
5216         kvm_x86_ops = ops;
5217         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5218                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5219
5220         kvm_timer_init();
5221
5222         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5223
5224         if (cpu_has_xsave)
5225                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5226
5227         return 0;
5228
5229 out:
5230         return r;
5231 }
5232
5233 void kvm_arch_exit(void)
5234 {
5235         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5236
5237         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5238                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5239                                             CPUFREQ_TRANSITION_NOTIFIER);
5240         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5241         kvm_x86_ops = NULL;
5242         kvm_mmu_module_exit();
5243 }
5244
5245 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5246 {
5247         ++vcpu->stat.halt_exits;
5248         if (irqchip_in_kernel(vcpu->kvm)) {
5249                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5250                 return 1;
5251         } else {
5252                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5253                 return 0;
5254         }
5255 }
5256 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5257
5258 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5259                            unsigned long a1)
5260 {
5261         if (is_long_mode(vcpu))
5262                 return a0;
5263         else
5264                 return a0 | ((gpa_t)a1 << 32);
5265 }
5266
5267 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5268 {
5269         u64 param, ingpa, outgpa, ret;
5270         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5271         bool fast, longmode;
5272         int cs_db, cs_l;
5273
5274         /*
5275          * hypercall generates UD from non zero cpl and real mode
5276          * per HYPER-V spec
5277          */
5278         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5279                 kvm_queue_exception(vcpu, UD_VECTOR);
5280                 return 0;
5281         }
5282
5283         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5284         longmode = is_long_mode(vcpu) && cs_l == 1;
5285
5286         if (!longmode) {
5287                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5288                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5289                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5290                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5291                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5292                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5293         }
5294 #ifdef CONFIG_X86_64
5295         else {
5296                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5297                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5298                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5299         }
5300 #endif
5301
5302         code = param & 0xffff;
5303         fast = (param >> 16) & 0x1;
5304         rep_cnt = (param >> 32) & 0xfff;
5305         rep_idx = (param >> 48) & 0xfff;
5306
5307         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5308
5309         switch (code) {
5310         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5311                 kvm_vcpu_on_spin(vcpu);
5312                 break;
5313         default:
5314                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5315                 break;
5316         }
5317
5318         ret = res | (((u64)rep_done & 0xfff) << 32);
5319         if (longmode) {
5320                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5321         } else {
5322                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5323                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5324         }
5325
5326         return 1;
5327 }
5328
5329 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5330 {
5331         unsigned long nr, a0, a1, a2, a3, ret;
5332         int r = 1;
5333
5334         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5335                 return kvm_hv_hypercall(vcpu);
5336
5337         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5338         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5339         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5340         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5341         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5342
5343         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5344
5345         if (!is_long_mode(vcpu)) {
5346                 nr &= 0xFFFFFFFF;
5347                 a0 &= 0xFFFFFFFF;
5348                 a1 &= 0xFFFFFFFF;
5349                 a2 &= 0xFFFFFFFF;
5350                 a3 &= 0xFFFFFFFF;
5351         }
5352
5353         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5354                 ret = -KVM_EPERM;
5355                 goto out;
5356         }
5357
5358         switch (nr) {
5359         case KVM_HC_VAPIC_POLL_IRQ:
5360                 ret = 0;
5361                 break;
5362         case KVM_HC_MMU_OP:
5363                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5364                 break;
5365         default:
5366                 ret = -KVM_ENOSYS;
5367                 break;
5368         }
5369 out:
5370         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5371         ++vcpu->stat.hypercalls;
5372         return r;
5373 }
5374 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5375
5376 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5377 {
5378         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5379         char instruction[3];
5380         unsigned long rip = kvm_rip_read(vcpu);
5381
5382         /*
5383          * Blow out the MMU to ensure that no other VCPU has an active mapping
5384          * to ensure that the updated hypercall appears atomically across all
5385          * VCPUs.
5386          */
5387         kvm_mmu_zap_all(vcpu->kvm);
5388
5389         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5390
5391         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5392 }
5393
5394 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5395 {
5396         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5397         int j, nent = vcpu->arch.cpuid_nent;
5398
5399         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5400         /* when no next entry is found, the current entry[i] is reselected */
5401         for (j = i + 1; ; j = (j + 1) % nent) {
5402                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5403                 if (ej->function == e->function) {
5404                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5405                         return j;
5406                 }
5407         }
5408         return 0; /* silence gcc, even though control never reaches here */
5409 }
5410
5411 /* find an entry with matching function, matching index (if needed), and that
5412  * should be read next (if it's stateful) */
5413 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5414         u32 function, u32 index)
5415 {
5416         if (e->function != function)
5417                 return 0;
5418         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5419                 return 0;
5420         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5421             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5422                 return 0;
5423         return 1;
5424 }
5425
5426 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5427                                               u32 function, u32 index)
5428 {
5429         int i;
5430         struct kvm_cpuid_entry2 *best = NULL;
5431
5432         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5433                 struct kvm_cpuid_entry2 *e;
5434
5435                 e = &vcpu->arch.cpuid_entries[i];
5436                 if (is_matching_cpuid_entry(e, function, index)) {
5437                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5438                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5439                         best = e;
5440                         break;
5441                 }
5442         }
5443         return best;
5444 }
5445 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5446
5447 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5448 {
5449         struct kvm_cpuid_entry2 *best;
5450
5451         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5452         if (!best || best->eax < 0x80000008)
5453                 goto not_found;
5454         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5455         if (best)
5456                 return best->eax & 0xff;
5457 not_found:
5458         return 36;
5459 }
5460
5461 /*
5462  * If no match is found, check whether we exceed the vCPU's limit
5463  * and return the content of the highest valid _standard_ leaf instead.
5464  * This is to satisfy the CPUID specification.
5465  */
5466 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5467                                                   u32 function, u32 index)
5468 {
5469         struct kvm_cpuid_entry2 *maxlevel;
5470
5471         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5472         if (!maxlevel || maxlevel->eax >= function)
5473                 return NULL;
5474         if (function & 0x80000000) {
5475                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5476                 if (!maxlevel)
5477                         return NULL;
5478         }
5479         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5480 }
5481
5482 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5483 {
5484         u32 function, index;
5485         struct kvm_cpuid_entry2 *best;
5486
5487         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5488         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5489         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5490         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5491         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5492         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5493         best = kvm_find_cpuid_entry(vcpu, function, index);
5494
5495         if (!best)
5496                 best = check_cpuid_limit(vcpu, function, index);
5497
5498         if (best) {
5499                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5500                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5501                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5502                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5503         }
5504         kvm_x86_ops->skip_emulated_instruction(vcpu);
5505         trace_kvm_cpuid(function,
5506                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5507                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5508                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5509                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5510 }
5511 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5512
5513 /*
5514  * Check if userspace requested an interrupt window, and that the
5515  * interrupt window is open.
5516  *
5517  * No need to exit to userspace if we already have an interrupt queued.
5518  */
5519 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5520 {
5521         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5522                 vcpu->run->request_interrupt_window &&
5523                 kvm_arch_interrupt_allowed(vcpu));
5524 }
5525
5526 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5527 {
5528         struct kvm_run *kvm_run = vcpu->run;
5529
5530         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5531         kvm_run->cr8 = kvm_get_cr8(vcpu);
5532         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5533         if (irqchip_in_kernel(vcpu->kvm))
5534                 kvm_run->ready_for_interrupt_injection = 1;
5535         else
5536                 kvm_run->ready_for_interrupt_injection =
5537                         kvm_arch_interrupt_allowed(vcpu) &&
5538                         !kvm_cpu_has_interrupt(vcpu) &&
5539                         !kvm_event_needs_reinjection(vcpu);
5540 }
5541
5542 static void vapic_enter(struct kvm_vcpu *vcpu)
5543 {
5544         struct kvm_lapic *apic = vcpu->arch.apic;
5545         struct page *page;
5546
5547         if (!apic || !apic->vapic_addr)
5548                 return;
5549
5550         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5551
5552         vcpu->arch.apic->vapic_page = page;
5553 }
5554
5555 static void vapic_exit(struct kvm_vcpu *vcpu)
5556 {
5557         struct kvm_lapic *apic = vcpu->arch.apic;
5558         int idx;
5559
5560         if (!apic || !apic->vapic_addr)
5561                 return;
5562
5563         idx = srcu_read_lock(&vcpu->kvm->srcu);
5564         kvm_release_page_dirty(apic->vapic_page);
5565         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5566         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5567 }
5568
5569 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5570 {
5571         int max_irr, tpr;
5572
5573         if (!kvm_x86_ops->update_cr8_intercept)
5574                 return;
5575
5576         if (!vcpu->arch.apic)
5577                 return;
5578
5579         if (!vcpu->arch.apic->vapic_addr)
5580                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5581         else
5582                 max_irr = -1;
5583
5584         if (max_irr != -1)
5585                 max_irr >>= 4;
5586
5587         tpr = kvm_lapic_get_cr8(vcpu);
5588
5589         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5590 }
5591
5592 static void inject_pending_event(struct kvm_vcpu *vcpu)
5593 {
5594         /* try to reinject previous events if any */
5595         if (vcpu->arch.exception.pending) {
5596                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5597                                         vcpu->arch.exception.has_error_code,
5598                                         vcpu->arch.exception.error_code);
5599                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5600                                           vcpu->arch.exception.has_error_code,
5601                                           vcpu->arch.exception.error_code,
5602                                           vcpu->arch.exception.reinject);
5603                 return;
5604         }
5605
5606         if (vcpu->arch.nmi_injected) {
5607                 kvm_x86_ops->set_nmi(vcpu);
5608                 return;
5609         }
5610
5611         if (vcpu->arch.interrupt.pending) {
5612                 kvm_x86_ops->set_irq(vcpu);
5613                 return;
5614         }
5615
5616         /* try to inject new event if pending */
5617         if (vcpu->arch.nmi_pending) {
5618                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5619                         --vcpu->arch.nmi_pending;
5620                         vcpu->arch.nmi_injected = true;
5621                         kvm_x86_ops->set_nmi(vcpu);
5622                 }
5623         } else if (kvm_cpu_has_interrupt(vcpu)) {
5624                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5625                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5626                                             false);
5627                         kvm_x86_ops->set_irq(vcpu);
5628                 }
5629         }
5630 }
5631
5632 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5633 {
5634         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5635                         !vcpu->guest_xcr0_loaded) {
5636                 /* kvm_set_xcr() also depends on this */
5637                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5638                 vcpu->guest_xcr0_loaded = 1;
5639         }
5640 }
5641
5642 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5643 {
5644         if (vcpu->guest_xcr0_loaded) {
5645                 if (vcpu->arch.xcr0 != host_xcr0)
5646                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5647                 vcpu->guest_xcr0_loaded = 0;
5648         }
5649 }
5650
5651 static void process_nmi(struct kvm_vcpu *vcpu)
5652 {
5653         unsigned limit = 2;
5654
5655         /*
5656          * x86 is limited to one NMI running, and one NMI pending after it.
5657          * If an NMI is already in progress, limit further NMIs to just one.
5658          * Otherwise, allow two (and we'll inject the first one immediately).
5659          */
5660         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5661                 limit = 1;
5662
5663         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5664         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5665         kvm_make_request(KVM_REQ_EVENT, vcpu);
5666 }
5667
5668 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5669 {
5670         int r;
5671         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5672                 vcpu->run->request_interrupt_window;
5673
5674         if (vcpu->requests) {
5675                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5676                         kvm_mmu_unload(vcpu);
5677                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5678                         __kvm_migrate_timers(vcpu);
5679                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5680                         r = kvm_guest_time_update(vcpu);
5681                         if (unlikely(r))
5682                                 goto out;
5683                 }
5684                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5685                         kvm_mmu_sync_roots(vcpu);
5686                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5687                         kvm_x86_ops->tlb_flush(vcpu);
5688                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5689                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5690                         r = 0;
5691                         goto out;
5692                 }
5693                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5694                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5695                         r = 0;
5696                         goto out;
5697                 }
5698                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5699                         vcpu->fpu_active = 0;
5700                         kvm_x86_ops->fpu_deactivate(vcpu);
5701                 }
5702                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5703                         /* Page is swapped out. Do synthetic halt */
5704                         vcpu->arch.apf.halted = true;
5705                         r = 1;
5706                         goto out;
5707                 }
5708                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5709                         record_steal_time(vcpu);
5710                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5711                         process_nmi(vcpu);
5712
5713         }
5714
5715         r = kvm_mmu_reload(vcpu);
5716         if (unlikely(r))
5717                 goto out;
5718
5719         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5720                 inject_pending_event(vcpu);
5721
5722                 /* enable NMI/IRQ window open exits if needed */
5723                 if (vcpu->arch.nmi_pending)
5724                         kvm_x86_ops->enable_nmi_window(vcpu);
5725                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5726                         kvm_x86_ops->enable_irq_window(vcpu);
5727
5728                 if (kvm_lapic_enabled(vcpu)) {
5729                         update_cr8_intercept(vcpu);
5730                         kvm_lapic_sync_to_vapic(vcpu);
5731                 }
5732         }
5733
5734         preempt_disable();
5735
5736         kvm_x86_ops->prepare_guest_switch(vcpu);
5737         if (vcpu->fpu_active)
5738                 kvm_load_guest_fpu(vcpu);
5739         kvm_load_guest_xcr0(vcpu);
5740
5741         vcpu->mode = IN_GUEST_MODE;
5742
5743         /* We should set ->mode before check ->requests,
5744          * see the comment in make_all_cpus_request.
5745          */
5746         smp_mb();
5747
5748         local_irq_disable();
5749
5750         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5751             || need_resched() || signal_pending(current)) {
5752                 vcpu->mode = OUTSIDE_GUEST_MODE;
5753                 smp_wmb();
5754                 local_irq_enable();
5755                 preempt_enable();
5756                 kvm_x86_ops->cancel_injection(vcpu);
5757                 r = 1;
5758                 goto out;
5759         }
5760
5761         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5762
5763         kvm_guest_enter();
5764
5765         if (unlikely(vcpu->arch.switch_db_regs)) {
5766                 set_debugreg(0, 7);
5767                 set_debugreg(vcpu->arch.eff_db[0], 0);
5768                 set_debugreg(vcpu->arch.eff_db[1], 1);
5769                 set_debugreg(vcpu->arch.eff_db[2], 2);
5770                 set_debugreg(vcpu->arch.eff_db[3], 3);
5771         }
5772
5773         trace_kvm_entry(vcpu->vcpu_id);
5774         kvm_x86_ops->run(vcpu);
5775
5776         /*
5777          * If the guest has used debug registers, at least dr7
5778          * will be disabled while returning to the host.
5779          * If we don't have active breakpoints in the host, we don't
5780          * care about the messed up debug address registers. But if
5781          * we have some of them active, restore the old state.
5782          */
5783         if (hw_breakpoint_active())
5784                 hw_breakpoint_restore();
5785
5786         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5787
5788         vcpu->mode = OUTSIDE_GUEST_MODE;
5789         smp_wmb();
5790         local_irq_enable();
5791
5792         ++vcpu->stat.exits;
5793
5794         /*
5795          * We must have an instruction between local_irq_enable() and
5796          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5797          * the interrupt shadow.  The stat.exits increment will do nicely.
5798          * But we need to prevent reordering, hence this barrier():
5799          */
5800         barrier();
5801
5802         kvm_guest_exit();
5803
5804         preempt_enable();
5805
5806         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5807
5808         /*
5809          * Profile KVM exit RIPs:
5810          */
5811         if (unlikely(prof_on == KVM_PROFILING)) {
5812                 unsigned long rip = kvm_rip_read(vcpu);
5813                 profile_hit(KVM_PROFILING, (void *)rip);
5814         }
5815
5816
5817         kvm_lapic_sync_from_vapic(vcpu);
5818
5819         r = kvm_x86_ops->handle_exit(vcpu);
5820 out:
5821         return r;
5822 }
5823
5824
5825 static int __vcpu_run(struct kvm_vcpu *vcpu)
5826 {
5827         int r;
5828         struct kvm *kvm = vcpu->kvm;
5829
5830         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5831                 pr_debug("vcpu %d received sipi with vector # %x\n",
5832                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5833                 kvm_lapic_reset(vcpu);
5834                 r = kvm_arch_vcpu_reset(vcpu);
5835                 if (r)
5836                         return r;
5837                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5838         }
5839
5840         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5841         vapic_enter(vcpu);
5842
5843         r = 1;
5844         while (r > 0) {
5845                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5846                     !vcpu->arch.apf.halted)
5847                         r = vcpu_enter_guest(vcpu);
5848                 else {
5849                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5850                         kvm_vcpu_block(vcpu);
5851                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5852                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5853                         {
5854                                 switch(vcpu->arch.mp_state) {
5855                                 case KVM_MP_STATE_HALTED:
5856                                         vcpu->arch.mp_state =
5857                                                 KVM_MP_STATE_RUNNABLE;
5858                                 case KVM_MP_STATE_RUNNABLE:
5859                                         vcpu->arch.apf.halted = false;
5860                                         break;
5861                                 case KVM_MP_STATE_SIPI_RECEIVED:
5862                                 default:
5863                                         r = -EINTR;
5864                                         break;
5865                                 }
5866                         }
5867                 }
5868
5869                 if (r <= 0)
5870                         break;
5871
5872                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5873                 if (kvm_cpu_has_pending_timer(vcpu))
5874                         kvm_inject_pending_timer_irqs(vcpu);
5875
5876                 if (dm_request_for_irq_injection(vcpu)) {
5877                         r = -EINTR;
5878                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5879                         ++vcpu->stat.request_irq_exits;
5880                 }
5881
5882                 kvm_check_async_pf_completion(vcpu);
5883
5884                 if (signal_pending(current)) {
5885                         r = -EINTR;
5886                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5887                         ++vcpu->stat.signal_exits;
5888                 }
5889                 if (need_resched()) {
5890                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5891                         kvm_resched(vcpu);
5892                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5893                 }
5894         }
5895
5896         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5897
5898         vapic_exit(vcpu);
5899
5900         return r;
5901 }
5902
5903 static int complete_mmio(struct kvm_vcpu *vcpu)
5904 {
5905         struct kvm_run *run = vcpu->run;
5906         int r;
5907
5908         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5909                 return 1;
5910
5911         if (vcpu->mmio_needed) {
5912                 vcpu->mmio_needed = 0;
5913                 if (!vcpu->mmio_is_write)
5914                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5915                                run->mmio.data, 8);
5916                 vcpu->mmio_index += 8;
5917                 if (vcpu->mmio_index < vcpu->mmio_size) {
5918                         run->exit_reason = KVM_EXIT_MMIO;
5919                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5920                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5921                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5922                         run->mmio.is_write = vcpu->mmio_is_write;
5923                         vcpu->mmio_needed = 1;
5924                         return 0;
5925                 }
5926                 if (vcpu->mmio_is_write)
5927                         return 1;
5928                 vcpu->mmio_read_completed = 1;
5929         }
5930         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5931         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5932         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5933         if (r != EMULATE_DONE)
5934                 return 0;
5935         return 1;
5936 }
5937
5938 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5939 {
5940         int r;
5941         sigset_t sigsaved;
5942
5943         if (!tsk_used_math(current) && init_fpu(current))
5944                 return -ENOMEM;
5945
5946         if (vcpu->sigset_active)
5947                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5948
5949         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5950                 kvm_vcpu_block(vcpu);
5951                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5952                 r = -EAGAIN;
5953                 goto out;
5954         }
5955
5956         /* re-sync apic's tpr */
5957         if (!irqchip_in_kernel(vcpu->kvm)) {
5958                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5959                         r = -EINVAL;
5960                         goto out;
5961                 }
5962         }
5963
5964         r = complete_mmio(vcpu);
5965         if (r <= 0)
5966                 goto out;
5967
5968         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5969                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5970                                      kvm_run->hypercall.ret);
5971
5972         r = __vcpu_run(vcpu);
5973
5974 out:
5975         post_kvm_run_save(vcpu);
5976         if (vcpu->sigset_active)
5977                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5978
5979         return r;
5980 }
5981
5982 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5983 {
5984         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5985                 /*
5986                  * We are here if userspace calls get_regs() in the middle of
5987                  * instruction emulation. Registers state needs to be copied
5988                  * back from emulation context to vcpu. Usrapace shouldn't do
5989                  * that usually, but some bad designed PV devices (vmware
5990                  * backdoor interface) need this to work
5991                  */
5992                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5993                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5994                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5995         }
5996         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5997         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5998         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5999         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6000         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6001         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6002         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6003         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6004 #ifdef CONFIG_X86_64
6005         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6006         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6007         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6008         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6009         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6010         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6011         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6012         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6013 #endif
6014
6015         regs->rip = kvm_rip_read(vcpu);
6016         regs->rflags = kvm_get_rflags(vcpu);
6017
6018         return 0;
6019 }
6020
6021 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6022 {
6023         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6024         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6025
6026         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6027         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6028         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6029         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6030         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6031         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6032         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6033         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6034 #ifdef CONFIG_X86_64
6035         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6036         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6037         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6038         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6039         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6040         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6041         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6042         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6043 #endif
6044
6045         kvm_rip_write(vcpu, regs->rip);
6046         kvm_set_rflags(vcpu, regs->rflags);
6047
6048         vcpu->arch.exception.pending = false;
6049
6050         kvm_make_request(KVM_REQ_EVENT, vcpu);
6051
6052         return 0;
6053 }
6054
6055 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6056 {
6057         struct kvm_segment cs;
6058
6059         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6060         *db = cs.db;
6061         *l = cs.l;
6062 }
6063 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6064
6065 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6066                                   struct kvm_sregs *sregs)
6067 {
6068         struct desc_ptr dt;
6069
6070         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6071         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6072         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6073         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6074         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6075         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6076
6077         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6078         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6079
6080         kvm_x86_ops->get_idt(vcpu, &dt);
6081         sregs->idt.limit = dt.size;
6082         sregs->idt.base = dt.address;
6083         kvm_x86_ops->get_gdt(vcpu, &dt);
6084         sregs->gdt.limit = dt.size;
6085         sregs->gdt.base = dt.address;
6086
6087         sregs->cr0 = kvm_read_cr0(vcpu);
6088         sregs->cr2 = vcpu->arch.cr2;
6089         sregs->cr3 = kvm_read_cr3(vcpu);
6090         sregs->cr4 = kvm_read_cr4(vcpu);
6091         sregs->cr8 = kvm_get_cr8(vcpu);
6092         sregs->efer = vcpu->arch.efer;
6093         sregs->apic_base = kvm_get_apic_base(vcpu);
6094
6095         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6096
6097         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6098                 set_bit(vcpu->arch.interrupt.nr,
6099                         (unsigned long *)sregs->interrupt_bitmap);
6100
6101         return 0;
6102 }
6103
6104 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6105                                     struct kvm_mp_state *mp_state)
6106 {
6107         mp_state->mp_state = vcpu->arch.mp_state;
6108         return 0;
6109 }
6110
6111 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6112                                     struct kvm_mp_state *mp_state)
6113 {
6114         vcpu->arch.mp_state = mp_state->mp_state;
6115         kvm_make_request(KVM_REQ_EVENT, vcpu);
6116         return 0;
6117 }
6118
6119 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6120                     bool has_error_code, u32 error_code)
6121 {
6122         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6123         int ret;
6124
6125         init_emulate_ctxt(vcpu);
6126
6127         ret = emulator_task_switch(ctxt, tss_selector, reason,
6128                                    has_error_code, error_code);
6129
6130         if (ret)
6131                 return EMULATE_FAIL;
6132
6133         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6134         kvm_rip_write(vcpu, ctxt->eip);
6135         kvm_set_rflags(vcpu, ctxt->eflags);
6136         kvm_make_request(KVM_REQ_EVENT, vcpu);
6137         return EMULATE_DONE;
6138 }
6139 EXPORT_SYMBOL_GPL(kvm_task_switch);
6140
6141 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6142                                   struct kvm_sregs *sregs)
6143 {
6144         int mmu_reset_needed = 0;
6145         int pending_vec, max_bits, idx;
6146         struct desc_ptr dt;
6147
6148         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6149                 return -EINVAL;
6150
6151         dt.size = sregs->idt.limit;
6152         dt.address = sregs->idt.base;
6153         kvm_x86_ops->set_idt(vcpu, &dt);
6154         dt.size = sregs->gdt.limit;
6155         dt.address = sregs->gdt.base;
6156         kvm_x86_ops->set_gdt(vcpu, &dt);
6157
6158         vcpu->arch.cr2 = sregs->cr2;
6159         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6160         vcpu->arch.cr3 = sregs->cr3;
6161         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6162
6163         kvm_set_cr8(vcpu, sregs->cr8);
6164
6165         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6166         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6167         kvm_set_apic_base(vcpu, sregs->apic_base);
6168
6169         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6170         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6171         vcpu->arch.cr0 = sregs->cr0;
6172
6173         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6174         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6175         if (sregs->cr4 & X86_CR4_OSXSAVE)
6176                 update_cpuid(vcpu);
6177
6178         idx = srcu_read_lock(&vcpu->kvm->srcu);
6179         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6180                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6181                 mmu_reset_needed = 1;
6182         }
6183         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6184
6185         if (mmu_reset_needed)
6186                 kvm_mmu_reset_context(vcpu);
6187
6188         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6189         pending_vec = find_first_bit(
6190                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6191         if (pending_vec < max_bits) {
6192                 kvm_queue_interrupt(vcpu, pending_vec, false);
6193                 pr_debug("Set back pending irq %d\n", pending_vec);
6194         }
6195
6196         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6197         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6198         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6199         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6200         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6201         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6202
6203         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6204         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6205
6206         update_cr8_intercept(vcpu);
6207
6208         /* Older userspace won't unhalt the vcpu on reset. */
6209         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6210             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6211             !is_protmode(vcpu))
6212                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6213
6214         kvm_make_request(KVM_REQ_EVENT, vcpu);
6215
6216         return 0;
6217 }
6218
6219 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6220                                         struct kvm_guest_debug *dbg)
6221 {
6222         unsigned long rflags;
6223         int i, r;
6224
6225         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6226                 r = -EBUSY;
6227                 if (vcpu->arch.exception.pending)
6228                         goto out;
6229                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6230                         kvm_queue_exception(vcpu, DB_VECTOR);
6231                 else
6232                         kvm_queue_exception(vcpu, BP_VECTOR);
6233         }
6234
6235         /*
6236          * Read rflags as long as potentially injected trace flags are still
6237          * filtered out.
6238          */
6239         rflags = kvm_get_rflags(vcpu);
6240
6241         vcpu->guest_debug = dbg->control;
6242         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6243                 vcpu->guest_debug = 0;
6244
6245         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6246                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6247                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6248                 vcpu->arch.switch_db_regs =
6249                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6250         } else {
6251                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6252                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6253                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6254         }
6255
6256         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6257                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6258                         get_segment_base(vcpu, VCPU_SREG_CS);
6259
6260         /*
6261          * Trigger an rflags update that will inject or remove the trace
6262          * flags.
6263          */
6264         kvm_set_rflags(vcpu, rflags);
6265
6266         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6267
6268         r = 0;
6269
6270 out:
6271
6272         return r;
6273 }
6274
6275 /*
6276  * Translate a guest virtual address to a guest physical address.
6277  */
6278 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6279                                     struct kvm_translation *tr)
6280 {
6281         unsigned long vaddr = tr->linear_address;
6282         gpa_t gpa;
6283         int idx;
6284
6285         idx = srcu_read_lock(&vcpu->kvm->srcu);
6286         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6287         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6288         tr->physical_address = gpa;
6289         tr->valid = gpa != UNMAPPED_GVA;
6290         tr->writeable = 1;
6291         tr->usermode = 0;
6292
6293         return 0;
6294 }
6295
6296 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6297 {
6298         struct i387_fxsave_struct *fxsave =
6299                         &vcpu->arch.guest_fpu.state->fxsave;
6300
6301         memcpy(fpu->fpr, fxsave->st_space, 128);
6302         fpu->fcw = fxsave->cwd;
6303         fpu->fsw = fxsave->swd;
6304         fpu->ftwx = fxsave->twd;
6305         fpu->last_opcode = fxsave->fop;
6306         fpu->last_ip = fxsave->rip;
6307         fpu->last_dp = fxsave->rdp;
6308         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6309
6310         return 0;
6311 }
6312
6313 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6314 {
6315         struct i387_fxsave_struct *fxsave =
6316                         &vcpu->arch.guest_fpu.state->fxsave;
6317
6318         memcpy(fxsave->st_space, fpu->fpr, 128);
6319         fxsave->cwd = fpu->fcw;
6320         fxsave->swd = fpu->fsw;
6321         fxsave->twd = fpu->ftwx;
6322         fxsave->fop = fpu->last_opcode;
6323         fxsave->rip = fpu->last_ip;
6324         fxsave->rdp = fpu->last_dp;
6325         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6326
6327         return 0;
6328 }
6329
6330 int fx_init(struct kvm_vcpu *vcpu)
6331 {
6332         int err;
6333
6334         err = fpu_alloc(&vcpu->arch.guest_fpu);
6335         if (err)
6336                 return err;
6337
6338         fpu_finit(&vcpu->arch.guest_fpu);
6339
6340         /*
6341          * Ensure guest xcr0 is valid for loading
6342          */
6343         vcpu->arch.xcr0 = XSTATE_FP;
6344
6345         vcpu->arch.cr0 |= X86_CR0_ET;
6346
6347         return 0;
6348 }
6349 EXPORT_SYMBOL_GPL(fx_init);
6350
6351 static void fx_free(struct kvm_vcpu *vcpu)
6352 {
6353         fpu_free(&vcpu->arch.guest_fpu);
6354 }
6355
6356 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6357 {
6358         if (vcpu->guest_fpu_loaded)
6359                 return;
6360
6361         /*
6362          * Restore all possible states in the guest,
6363          * and assume host would use all available bits.
6364          * Guest xcr0 would be loaded later.
6365          */
6366         kvm_put_guest_xcr0(vcpu);
6367         vcpu->guest_fpu_loaded = 1;
6368         unlazy_fpu(current);
6369         fpu_restore_checking(&vcpu->arch.guest_fpu);
6370         trace_kvm_fpu(1);
6371 }
6372
6373 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6374 {
6375         kvm_put_guest_xcr0(vcpu);
6376
6377         if (!vcpu->guest_fpu_loaded)
6378                 return;
6379
6380         vcpu->guest_fpu_loaded = 0;
6381         fpu_save_init(&vcpu->arch.guest_fpu);
6382         ++vcpu->stat.fpu_reload;
6383         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6384         trace_kvm_fpu(0);
6385 }
6386
6387 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6388 {
6389         kvmclock_reset(vcpu);
6390
6391         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6392         fx_free(vcpu);
6393         kvm_x86_ops->vcpu_free(vcpu);
6394 }
6395
6396 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6397                                                 unsigned int id)
6398 {
6399         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6400                 printk_once(KERN_WARNING
6401                 "kvm: SMP vm created on host with unstable TSC; "
6402                 "guest TSC will not be reliable\n");
6403         return kvm_x86_ops->vcpu_create(kvm, id);
6404 }
6405
6406 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6407 {
6408         int r;
6409
6410         vcpu->arch.mtrr_state.have_fixed = 1;
6411         vcpu_load(vcpu);
6412         r = kvm_arch_vcpu_reset(vcpu);
6413         if (r == 0)
6414                 r = kvm_mmu_setup(vcpu);
6415         vcpu_put(vcpu);
6416
6417         return r;
6418 }
6419
6420 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6421 {
6422         vcpu->arch.apf.msr_val = 0;
6423
6424         vcpu_load(vcpu);
6425         kvm_mmu_unload(vcpu);
6426         vcpu_put(vcpu);
6427
6428         fx_free(vcpu);
6429         kvm_x86_ops->vcpu_free(vcpu);
6430 }
6431
6432 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6433 {
6434         atomic_set(&vcpu->arch.nmi_queued, 0);
6435         vcpu->arch.nmi_pending = 0;
6436         vcpu->arch.nmi_injected = false;
6437
6438         vcpu->arch.switch_db_regs = 0;
6439         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6440         vcpu->arch.dr6 = DR6_FIXED_1;
6441         vcpu->arch.dr7 = DR7_FIXED_1;
6442
6443         kvm_make_request(KVM_REQ_EVENT, vcpu);
6444         vcpu->arch.apf.msr_val = 0;
6445         vcpu->arch.st.msr_val = 0;
6446
6447         kvmclock_reset(vcpu);
6448
6449         kvm_clear_async_pf_completion_queue(vcpu);
6450         kvm_async_pf_hash_reset(vcpu);
6451         vcpu->arch.apf.halted = false;
6452
6453         return kvm_x86_ops->vcpu_reset(vcpu);
6454 }
6455
6456 int kvm_arch_hardware_enable(void *garbage)
6457 {
6458         struct kvm *kvm;
6459         struct kvm_vcpu *vcpu;
6460         int i;
6461
6462         kvm_shared_msr_cpu_online();
6463         list_for_each_entry(kvm, &vm_list, vm_list)
6464                 kvm_for_each_vcpu(i, vcpu, kvm)
6465                         if (vcpu->cpu == smp_processor_id())
6466                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6467         return kvm_x86_ops->hardware_enable(garbage);
6468 }
6469
6470 void kvm_arch_hardware_disable(void *garbage)
6471 {
6472         kvm_x86_ops->hardware_disable(garbage);
6473         drop_user_return_notifiers(garbage);
6474 }
6475
6476 int kvm_arch_hardware_setup(void)
6477 {
6478         return kvm_x86_ops->hardware_setup();
6479 }
6480
6481 void kvm_arch_hardware_unsetup(void)
6482 {
6483         kvm_x86_ops->hardware_unsetup();
6484 }
6485
6486 void kvm_arch_check_processor_compat(void *rtn)
6487 {
6488         kvm_x86_ops->check_processor_compatibility(rtn);
6489 }
6490
6491 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6492 {
6493         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6494 }
6495
6496 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6497 {
6498         struct page *page;
6499         struct kvm *kvm;
6500         int r;
6501
6502         BUG_ON(vcpu->kvm == NULL);
6503         kvm = vcpu->kvm;
6504
6505         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6506         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6507         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6508         vcpu->arch.mmu.translate_gpa = translate_gpa;
6509         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6510         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6511                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6512         else
6513                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6514
6515         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6516         if (!page) {
6517                 r = -ENOMEM;
6518                 goto fail;
6519         }
6520         vcpu->arch.pio_data = page_address(page);
6521
6522         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6523
6524         r = kvm_mmu_create(vcpu);
6525         if (r < 0)
6526                 goto fail_free_pio_data;
6527
6528         if (irqchip_in_kernel(kvm)) {
6529                 r = kvm_create_lapic(vcpu);
6530                 if (r < 0)
6531                         goto fail_mmu_destroy;
6532         }
6533
6534         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6535                                        GFP_KERNEL);
6536         if (!vcpu->arch.mce_banks) {
6537                 r = -ENOMEM;
6538                 goto fail_free_lapic;
6539         }
6540         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6541
6542         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6543                 goto fail_free_mce_banks;
6544
6545         vcpu->arch.pv_time_enabled = false;
6546         kvm_async_pf_hash_reset(vcpu);
6547
6548         return 0;
6549 fail_free_mce_banks:
6550         kfree(vcpu->arch.mce_banks);
6551 fail_free_lapic:
6552         kvm_free_lapic(vcpu);
6553 fail_mmu_destroy:
6554         kvm_mmu_destroy(vcpu);
6555 fail_free_pio_data:
6556         free_page((unsigned long)vcpu->arch.pio_data);
6557 fail:
6558         return r;
6559 }
6560
6561 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6562 {
6563         int idx;
6564
6565         kfree(vcpu->arch.mce_banks);
6566         kvm_free_lapic(vcpu);
6567         idx = srcu_read_lock(&vcpu->kvm->srcu);
6568         kvm_mmu_destroy(vcpu);
6569         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6570         free_page((unsigned long)vcpu->arch.pio_data);
6571 }
6572
6573 int kvm_arch_init_vm(struct kvm *kvm)
6574 {
6575         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6576         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6577
6578         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6579         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6580
6581         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6582
6583         return 0;
6584 }
6585
6586 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6587 {
6588         vcpu_load(vcpu);
6589         kvm_mmu_unload(vcpu);
6590         vcpu_put(vcpu);
6591 }
6592
6593 static void kvm_free_vcpus(struct kvm *kvm)
6594 {
6595         unsigned int i;
6596         struct kvm_vcpu *vcpu;
6597
6598         /*
6599          * Unpin any mmu pages first.
6600          */
6601         kvm_for_each_vcpu(i, vcpu, kvm) {
6602                 kvm_clear_async_pf_completion_queue(vcpu);
6603                 kvm_unload_vcpu_mmu(vcpu);
6604         }
6605         kvm_for_each_vcpu(i, vcpu, kvm)
6606                 kvm_arch_vcpu_free(vcpu);
6607
6608         mutex_lock(&kvm->lock);
6609         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6610                 kvm->vcpus[i] = NULL;
6611
6612         atomic_set(&kvm->online_vcpus, 0);
6613         mutex_unlock(&kvm->lock);
6614 }
6615
6616 void kvm_arch_sync_events(struct kvm *kvm)
6617 {
6618         kvm_free_all_assigned_devices(kvm);
6619         kvm_free_pit(kvm);
6620 }
6621
6622 void kvm_arch_destroy_vm(struct kvm *kvm)
6623 {
6624         kvm_iommu_unmap_guest(kvm);
6625         kfree(kvm->arch.vpic);
6626         kfree(kvm->arch.vioapic);
6627         kvm_free_vcpus(kvm);
6628         if (kvm->arch.apic_access_page)
6629                 put_page(kvm->arch.apic_access_page);
6630         if (kvm->arch.ept_identity_pagetable)
6631                 put_page(kvm->arch.ept_identity_pagetable);
6632 }
6633
6634 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6635                                 struct kvm_memory_slot *memslot,
6636                                 struct kvm_memory_slot old,
6637                                 struct kvm_userspace_memory_region *mem,
6638                                 int user_alloc)
6639 {
6640         int npages = memslot->npages;
6641         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6642
6643         /* Prevent internal slot pages from being moved by fork()/COW. */
6644         if (memslot->id >= KVM_MEMORY_SLOTS)
6645                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6646
6647         /*To keep backward compatibility with older userspace,
6648          *x86 needs to hanlde !user_alloc case.
6649          */
6650         if (!user_alloc) {
6651                 if (npages && !old.rmap) {
6652                         unsigned long userspace_addr;
6653
6654                         down_write(&current->mm->mmap_sem);
6655                         userspace_addr = do_mmap(NULL, 0,
6656                                                  npages * PAGE_SIZE,
6657                                                  PROT_READ | PROT_WRITE,
6658                                                  map_flags,
6659                                                  0);
6660                         up_write(&current->mm->mmap_sem);
6661
6662                         if (IS_ERR((void *)userspace_addr))
6663                                 return PTR_ERR((void *)userspace_addr);
6664
6665                         memslot->userspace_addr = userspace_addr;
6666                 }
6667         }
6668
6669
6670         return 0;
6671 }
6672
6673 void kvm_arch_commit_memory_region(struct kvm *kvm,
6674                                 struct kvm_userspace_memory_region *mem,
6675                                 struct kvm_memory_slot old,
6676                                 int user_alloc)
6677 {
6678
6679         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6680
6681         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6682                 int ret;
6683
6684                 down_write(&current->mm->mmap_sem);
6685                 ret = do_munmap(current->mm, old.userspace_addr,
6686                                 old.npages * PAGE_SIZE);
6687                 up_write(&current->mm->mmap_sem);
6688                 if (ret < 0)
6689                         printk(KERN_WARNING
6690                                "kvm_vm_ioctl_set_memory_region: "
6691                                "failed to munmap memory\n");
6692         }
6693
6694         if (!kvm->arch.n_requested_mmu_pages)
6695                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6696
6697         spin_lock(&kvm->mmu_lock);
6698         if (nr_mmu_pages)
6699                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6700         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6701         spin_unlock(&kvm->mmu_lock);
6702 }
6703
6704 void kvm_arch_flush_shadow(struct kvm *kvm)
6705 {
6706         kvm_mmu_zap_all(kvm);
6707         kvm_reload_remote_mmus(kvm);
6708 }
6709
6710 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6711 {
6712         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6713                 !vcpu->arch.apf.halted)
6714                 || !list_empty_careful(&vcpu->async_pf.done)
6715                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6716                 || atomic_read(&vcpu->arch.nmi_queued) ||
6717                 (kvm_arch_interrupt_allowed(vcpu) &&
6718                  kvm_cpu_has_interrupt(vcpu));
6719 }
6720
6721 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6722 {
6723         int me;
6724         int cpu = vcpu->cpu;
6725
6726         if (waitqueue_active(&vcpu->wq)) {
6727                 wake_up_interruptible(&vcpu->wq);
6728                 ++vcpu->stat.halt_wakeup;
6729         }
6730
6731         me = get_cpu();
6732         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6733                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6734                         smp_send_reschedule(cpu);
6735         put_cpu();
6736 }
6737
6738 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6739 {
6740         return kvm_x86_ops->interrupt_allowed(vcpu);
6741 }
6742
6743 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6744 {
6745         unsigned long current_rip = kvm_rip_read(vcpu) +
6746                 get_segment_base(vcpu, VCPU_SREG_CS);
6747
6748         return current_rip == linear_rip;
6749 }
6750 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6751
6752 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6753 {
6754         unsigned long rflags;
6755
6756         rflags = kvm_x86_ops->get_rflags(vcpu);
6757         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6758                 rflags &= ~X86_EFLAGS_TF;
6759         return rflags;
6760 }
6761 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6762
6763 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6764 {
6765         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6766             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6767                 rflags |= X86_EFLAGS_TF;
6768         kvm_x86_ops->set_rflags(vcpu, rflags);
6769         kvm_make_request(KVM_REQ_EVENT, vcpu);
6770 }
6771 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6772
6773 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6774 {
6775         int r;
6776
6777         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6778               is_error_page(work->page))
6779                 return;
6780
6781         r = kvm_mmu_reload(vcpu);
6782         if (unlikely(r))
6783                 return;
6784
6785         if (!vcpu->arch.mmu.direct_map &&
6786               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6787                 return;
6788
6789         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6790 }
6791
6792 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6793 {
6794         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6795 }
6796
6797 static inline u32 kvm_async_pf_next_probe(u32 key)
6798 {
6799         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6800 }
6801
6802 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6803 {
6804         u32 key = kvm_async_pf_hash_fn(gfn);
6805
6806         while (vcpu->arch.apf.gfns[key] != ~0)
6807                 key = kvm_async_pf_next_probe(key);
6808
6809         vcpu->arch.apf.gfns[key] = gfn;
6810 }
6811
6812 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6813 {
6814         int i;
6815         u32 key = kvm_async_pf_hash_fn(gfn);
6816
6817         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6818                      (vcpu->arch.apf.gfns[key] != gfn &&
6819                       vcpu->arch.apf.gfns[key] != ~0); i++)
6820                 key = kvm_async_pf_next_probe(key);
6821
6822         return key;
6823 }
6824
6825 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6826 {
6827         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6828 }
6829
6830 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6831 {
6832         u32 i, j, k;
6833
6834         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6835         while (true) {
6836                 vcpu->arch.apf.gfns[i] = ~0;
6837                 do {
6838                         j = kvm_async_pf_next_probe(j);
6839                         if (vcpu->arch.apf.gfns[j] == ~0)
6840                                 return;
6841                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6842                         /*
6843                          * k lies cyclically in ]i,j]
6844                          * |    i.k.j |
6845                          * |....j i.k.| or  |.k..j i...|
6846                          */
6847                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6848                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6849                 i = j;
6850         }
6851 }
6852
6853 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6854 {
6855
6856         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6857                                       sizeof(val));
6858 }
6859
6860 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6861                                      struct kvm_async_pf *work)
6862 {
6863         struct x86_exception fault;
6864
6865         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6866         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6867
6868         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6869             (vcpu->arch.apf.send_user_only &&
6870              kvm_x86_ops->get_cpl(vcpu) == 0))
6871                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6872         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6873                 fault.vector = PF_VECTOR;
6874                 fault.error_code_valid = true;
6875                 fault.error_code = 0;
6876                 fault.nested_page_fault = false;
6877                 fault.address = work->arch.token;
6878                 kvm_inject_page_fault(vcpu, &fault);
6879         }
6880 }
6881
6882 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6883                                  struct kvm_async_pf *work)
6884 {
6885         struct x86_exception fault;
6886
6887         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6888         if (is_error_page(work->page))
6889                 work->arch.token = ~0; /* broadcast wakeup */
6890         else
6891                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6892
6893         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6894             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6895                 fault.vector = PF_VECTOR;
6896                 fault.error_code_valid = true;
6897                 fault.error_code = 0;
6898                 fault.nested_page_fault = false;
6899                 fault.address = work->arch.token;
6900                 kvm_inject_page_fault(vcpu, &fault);
6901         }
6902         vcpu->arch.apf.halted = false;
6903 }
6904
6905 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6906 {
6907         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6908                 return true;
6909         else
6910                 return !kvm_event_needs_reinjection(vcpu) &&
6911                         kvm_x86_ops->interrupt_allowed(vcpu);
6912 }
6913
6914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6925 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);