2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <trace/events/kvm.h>
44 #undef TRACE_INCLUDE_FILE
45 #define CREATE_TRACE_POINTS
48 #include <asm/debugreg.h>
49 #include <asm/uaccess.h>
55 #define MAX_IO_MSRS 256
56 #define CR0_RESERVED_BITS \
57 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
58 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
59 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
60 #define CR4_RESERVED_BITS \
61 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
62 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
63 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
64 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
76 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
78 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
86 struct kvm_cpuid_entry2 __user *entries);
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94 #define KVM_NR_SHARED_MSRS 16
96 struct kvm_shared_msrs_global {
98 u32 msrs[KVM_NR_SHARED_MSRS];
101 struct kvm_shared_msrs {
102 struct user_return_notifier urn;
104 struct kvm_shared_msr_values {
107 } values[KVM_NR_SHARED_MSRS];
110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
111 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
113 struct kvm_stats_debugfs_item debugfs_entries[] = {
114 { "pf_fixed", VCPU_STAT(pf_fixed) },
115 { "pf_guest", VCPU_STAT(pf_guest) },
116 { "tlb_flush", VCPU_STAT(tlb_flush) },
117 { "invlpg", VCPU_STAT(invlpg) },
118 { "exits", VCPU_STAT(exits) },
119 { "io_exits", VCPU_STAT(io_exits) },
120 { "mmio_exits", VCPU_STAT(mmio_exits) },
121 { "signal_exits", VCPU_STAT(signal_exits) },
122 { "irq_window", VCPU_STAT(irq_window_exits) },
123 { "nmi_window", VCPU_STAT(nmi_window_exits) },
124 { "halt_exits", VCPU_STAT(halt_exits) },
125 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
126 { "hypercalls", VCPU_STAT(hypercalls) },
127 { "request_irq", VCPU_STAT(request_irq_exits) },
128 { "irq_exits", VCPU_STAT(irq_exits) },
129 { "host_state_reload", VCPU_STAT(host_state_reload) },
130 { "efer_reload", VCPU_STAT(efer_reload) },
131 { "fpu_reload", VCPU_STAT(fpu_reload) },
132 { "insn_emulation", VCPU_STAT(insn_emulation) },
133 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
134 { "irq_injections", VCPU_STAT(irq_injections) },
135 { "nmi_injections", VCPU_STAT(nmi_injections) },
136 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
137 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
138 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
139 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
140 { "mmu_flooded", VM_STAT(mmu_flooded) },
141 { "mmu_recycled", VM_STAT(mmu_recycled) },
142 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
143 { "mmu_unsync", VM_STAT(mmu_unsync) },
144 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
145 { "largepages", VM_STAT(lpages) },
149 static void kvm_on_user_return(struct user_return_notifier *urn)
152 struct kvm_shared_msrs *locals
153 = container_of(urn, struct kvm_shared_msrs, urn);
154 struct kvm_shared_msr_values *values;
156 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
157 values = &locals->values[slot];
158 if (values->host != values->curr) {
159 wrmsrl(shared_msrs_global.msrs[slot], values->host);
160 values->curr = values->host;
163 locals->registered = false;
164 user_return_notifier_unregister(urn);
167 static void shared_msr_update(unsigned slot, u32 msr)
169 struct kvm_shared_msrs *smsr;
172 smsr = &__get_cpu_var(shared_msrs);
173 /* only read, and nobody should modify it at this time,
174 * so don't need lock */
175 if (slot >= shared_msrs_global.nr) {
176 printk(KERN_ERR "kvm: invalid MSR slot!");
179 rdmsrl_safe(msr, &value);
180 smsr->values[slot].host = value;
181 smsr->values[slot].curr = value;
184 void kvm_define_shared_msr(unsigned slot, u32 msr)
186 if (slot >= shared_msrs_global.nr)
187 shared_msrs_global.nr = slot + 1;
188 shared_msrs_global.msrs[slot] = msr;
189 /* we need ensured the shared_msr_global have been updated */
192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
194 static void kvm_shared_msr_cpu_online(void)
198 for (i = 0; i < shared_msrs_global.nr; ++i)
199 shared_msr_update(i, shared_msrs_global.msrs[i]);
202 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
204 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
206 if (((value ^ smsr->values[slot].curr) & mask) == 0)
208 smsr->values[slot].curr = value;
209 wrmsrl(shared_msrs_global.msrs[slot], value);
210 if (!smsr->registered) {
211 smsr->urn.on_user_return = kvm_on_user_return;
212 user_return_notifier_register(&smsr->urn);
213 smsr->registered = true;
216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
218 static void drop_user_return_notifiers(void *ignore)
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222 if (smsr->registered)
223 kvm_on_user_return(&smsr->urn);
226 unsigned long segment_base(u16 selector)
228 struct descriptor_table gdt;
229 struct desc_struct *d;
230 unsigned long table_base;
237 table_base = gdt.base;
239 if (selector & 4) { /* from ldt */
240 u16 ldt_selector = kvm_read_ldt();
242 table_base = segment_base(ldt_selector);
244 d = (struct desc_struct *)(table_base + (selector & ~7));
245 v = get_desc_base(d);
247 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
248 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
252 EXPORT_SYMBOL_GPL(segment_base);
254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
256 if (irqchip_in_kernel(vcpu->kvm))
257 return vcpu->arch.apic_base;
259 return vcpu->arch.apic_base;
261 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
263 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
265 /* TODO: reserve bits check */
266 if (irqchip_in_kernel(vcpu->kvm))
267 kvm_lapic_set_base(vcpu, data);
269 vcpu->arch.apic_base = data;
271 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
273 #define EXCPT_BENIGN 0
274 #define EXCPT_CONTRIBUTORY 1
277 static int exception_class(int vector)
287 return EXCPT_CONTRIBUTORY;
294 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
295 unsigned nr, bool has_error, u32 error_code)
300 if (!vcpu->arch.exception.pending) {
302 vcpu->arch.exception.pending = true;
303 vcpu->arch.exception.has_error_code = has_error;
304 vcpu->arch.exception.nr = nr;
305 vcpu->arch.exception.error_code = error_code;
309 /* to check exception */
310 prev_nr = vcpu->arch.exception.nr;
311 if (prev_nr == DF_VECTOR) {
312 /* triple fault -> shutdown */
313 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
316 class1 = exception_class(prev_nr);
317 class2 = exception_class(nr);
318 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
319 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
320 /* generate double fault per SDM Table 5-5 */
321 vcpu->arch.exception.pending = true;
322 vcpu->arch.exception.has_error_code = true;
323 vcpu->arch.exception.nr = DF_VECTOR;
324 vcpu->arch.exception.error_code = 0;
326 /* replace previous exception with a new one in a hope
327 that instruction re-execution will regenerate lost
332 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
334 kvm_multiple_exception(vcpu, nr, false, 0);
336 EXPORT_SYMBOL_GPL(kvm_queue_exception);
338 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
341 ++vcpu->stat.pf_guest;
342 vcpu->arch.cr2 = addr;
343 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
346 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
348 vcpu->arch.nmi_pending = 1;
350 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
352 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
354 kvm_multiple_exception(vcpu, nr, true, error_code);
356 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
359 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
360 * a #GP and return false.
362 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
364 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
366 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
369 EXPORT_SYMBOL_GPL(kvm_require_cpl);
372 * Load the pae pdptrs. Return true is they are all valid.
374 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
376 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
377 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
380 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
382 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
383 offset * sizeof(u64), sizeof(pdpte));
388 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
389 if (is_present_gpte(pdpte[i]) &&
390 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
397 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_avail);
400 __set_bit(VCPU_EXREG_PDPTR,
401 (unsigned long *)&vcpu->arch.regs_dirty);
406 EXPORT_SYMBOL_GPL(load_pdptrs);
408 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
410 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
414 if (is_long_mode(vcpu) || !is_pae(vcpu))
417 if (!test_bit(VCPU_EXREG_PDPTR,
418 (unsigned long *)&vcpu->arch.regs_avail))
421 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
424 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
430 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
435 if (cr0 & 0xffffffff00000000UL) {
436 kvm_inject_gp(vcpu, 0);
441 cr0 &= ~CR0_RESERVED_BITS;
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
444 kvm_inject_gp(vcpu, 0);
448 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
449 kvm_inject_gp(vcpu, 0);
453 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
455 if ((vcpu->arch.efer & EFER_LME)) {
459 kvm_inject_gp(vcpu, 0);
462 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
464 kvm_inject_gp(vcpu, 0);
470 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
471 kvm_inject_gp(vcpu, 0);
477 kvm_x86_ops->set_cr0(vcpu, cr0);
478 vcpu->arch.cr0 = cr0;
480 kvm_mmu_reset_context(vcpu);
483 EXPORT_SYMBOL_GPL(kvm_set_cr0);
485 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
487 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
489 EXPORT_SYMBOL_GPL(kvm_lmsw);
491 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
493 unsigned long old_cr4 = kvm_read_cr4(vcpu);
494 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
496 if (cr4 & CR4_RESERVED_BITS) {
497 kvm_inject_gp(vcpu, 0);
501 if (is_long_mode(vcpu)) {
502 if (!(cr4 & X86_CR4_PAE)) {
503 kvm_inject_gp(vcpu, 0);
506 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
507 && ((cr4 ^ old_cr4) & pdptr_bits)
508 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
509 kvm_inject_gp(vcpu, 0);
513 if (cr4 & X86_CR4_VMXE) {
514 kvm_inject_gp(vcpu, 0);
517 kvm_x86_ops->set_cr4(vcpu, cr4);
518 vcpu->arch.cr4 = cr4;
519 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
520 kvm_mmu_reset_context(vcpu);
522 EXPORT_SYMBOL_GPL(kvm_set_cr4);
524 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
526 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
527 kvm_mmu_sync_roots(vcpu);
528 kvm_mmu_flush_tlb(vcpu);
532 if (is_long_mode(vcpu)) {
533 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
534 kvm_inject_gp(vcpu, 0);
539 if (cr3 & CR3_PAE_RESERVED_BITS) {
540 kvm_inject_gp(vcpu, 0);
543 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
544 kvm_inject_gp(vcpu, 0);
549 * We don't check reserved bits in nonpae mode, because
550 * this isn't enforced, and VMware depends on this.
555 * Does the new cr3 value map to physical memory? (Note, we
556 * catch an invalid cr3 even in real-mode, because it would
557 * cause trouble later on when we turn on paging anyway.)
559 * A real CPU would silently accept an invalid cr3 and would
560 * attempt to use it - with largely undefined (and often hard
561 * to debug) behavior on the guest side.
563 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
564 kvm_inject_gp(vcpu, 0);
566 vcpu->arch.cr3 = cr3;
567 vcpu->arch.mmu.new_cr3(vcpu);
570 EXPORT_SYMBOL_GPL(kvm_set_cr3);
572 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
574 if (cr8 & CR8_RESERVED_BITS) {
575 kvm_inject_gp(vcpu, 0);
578 if (irqchip_in_kernel(vcpu->kvm))
579 kvm_lapic_set_tpr(vcpu, cr8);
581 vcpu->arch.cr8 = cr8;
583 EXPORT_SYMBOL_GPL(kvm_set_cr8);
585 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
587 if (irqchip_in_kernel(vcpu->kvm))
588 return kvm_lapic_get_cr8(vcpu);
590 return vcpu->arch.cr8;
592 EXPORT_SYMBOL_GPL(kvm_get_cr8);
594 static inline u32 bit(int bitno)
596 return 1 << (bitno & 31);
600 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
601 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
603 * This list is modified at module load time to reflect the
604 * capabilities of the host cpu. This capabilities test skips MSRs that are
605 * kvm-specific. Those are put in the beginning of the list.
608 #define KVM_SAVE_MSRS_BEGIN 5
609 static u32 msrs_to_save[] = {
610 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
611 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
612 HV_X64_MSR_APIC_ASSIST_PAGE,
613 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
616 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
618 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
621 static unsigned num_msrs_to_save;
623 static u32 emulated_msrs[] = {
624 MSR_IA32_MISC_ENABLE,
627 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
629 if (efer & efer_reserved_bits) {
630 kvm_inject_gp(vcpu, 0);
635 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
636 kvm_inject_gp(vcpu, 0);
640 if (efer & EFER_FFXSR) {
641 struct kvm_cpuid_entry2 *feat;
643 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
644 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
645 kvm_inject_gp(vcpu, 0);
650 if (efer & EFER_SVME) {
651 struct kvm_cpuid_entry2 *feat;
653 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
654 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
655 kvm_inject_gp(vcpu, 0);
660 kvm_x86_ops->set_efer(vcpu, efer);
663 efer |= vcpu->arch.efer & EFER_LMA;
665 vcpu->arch.efer = efer;
667 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
668 kvm_mmu_reset_context(vcpu);
671 void kvm_enable_efer_bits(u64 mask)
673 efer_reserved_bits &= ~mask;
675 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
679 * Writes msr value into into the appropriate "register".
680 * Returns 0 on success, non-0 otherwise.
681 * Assumes vcpu_load() was already called.
683 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
685 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
689 * Adapt set_msr() to msr_io()'s calling convention
691 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
693 return kvm_set_msr(vcpu, index, *data);
696 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
699 struct pvclock_wall_clock wc;
700 struct timespec boot;
707 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
710 * The guest calculates current wall clock time by adding
711 * system time (updated by kvm_write_guest_time below) to the
712 * wall clock specified here. guest system time equals host
713 * system time for us, thus we must fill in host boot time here.
717 wc.sec = boot.tv_sec;
718 wc.nsec = boot.tv_nsec;
719 wc.version = version;
721 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
724 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
727 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
729 uint32_t quotient, remainder;
731 /* Don't try to replace with do_div(), this one calculates
732 * "(dividend << 32) / divisor" */
734 : "=a" (quotient), "=d" (remainder)
735 : "0" (0), "1" (dividend), "r" (divisor) );
739 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
741 uint64_t nsecs = 1000000000LL;
746 tps64 = tsc_khz * 1000LL;
747 while (tps64 > nsecs*2) {
752 tps32 = (uint32_t)tps64;
753 while (tps32 <= (uint32_t)nsecs) {
758 hv_clock->tsc_shift = shift;
759 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
761 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
762 __func__, tsc_khz, hv_clock->tsc_shift,
763 hv_clock->tsc_to_system_mul);
766 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
768 static void kvm_write_guest_time(struct kvm_vcpu *v)
772 struct kvm_vcpu_arch *vcpu = &v->arch;
774 unsigned long this_tsc_khz;
776 if ((!vcpu->time_page))
779 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
780 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
781 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
782 vcpu->hv_clock_tsc_khz = this_tsc_khz;
784 put_cpu_var(cpu_tsc_khz);
786 /* Keep irq disabled to prevent changes to the clock */
787 local_irq_save(flags);
788 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
790 monotonic_to_bootbased(&ts);
791 local_irq_restore(flags);
793 /* With all the info we got, fill in the values */
795 vcpu->hv_clock.system_time = ts.tv_nsec +
796 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
799 * The interface expects us to write an even number signaling that the
800 * update is finished. Since the guest won't see the intermediate
801 * state, we just increase by 2 at the end.
803 vcpu->hv_clock.version += 2;
805 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
807 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
808 sizeof(vcpu->hv_clock));
810 kunmap_atomic(shared_kaddr, KM_USER0);
812 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
815 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
817 struct kvm_vcpu_arch *vcpu = &v->arch;
819 if (!vcpu->time_page)
821 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
825 static bool msr_mtrr_valid(unsigned msr)
828 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
829 case MSR_MTRRfix64K_00000:
830 case MSR_MTRRfix16K_80000:
831 case MSR_MTRRfix16K_A0000:
832 case MSR_MTRRfix4K_C0000:
833 case MSR_MTRRfix4K_C8000:
834 case MSR_MTRRfix4K_D0000:
835 case MSR_MTRRfix4K_D8000:
836 case MSR_MTRRfix4K_E0000:
837 case MSR_MTRRfix4K_E8000:
838 case MSR_MTRRfix4K_F0000:
839 case MSR_MTRRfix4K_F8000:
840 case MSR_MTRRdefType:
841 case MSR_IA32_CR_PAT:
849 static bool valid_pat_type(unsigned t)
851 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
854 static bool valid_mtrr_type(unsigned t)
856 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
859 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
863 if (!msr_mtrr_valid(msr))
866 if (msr == MSR_IA32_CR_PAT) {
867 for (i = 0; i < 8; i++)
868 if (!valid_pat_type((data >> (i * 8)) & 0xff))
871 } else if (msr == MSR_MTRRdefType) {
874 return valid_mtrr_type(data & 0xff);
875 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
876 for (i = 0; i < 8 ; i++)
877 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
883 return valid_mtrr_type(data & 0xff);
886 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
888 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
890 if (!mtrr_valid(vcpu, msr, data))
893 if (msr == MSR_MTRRdefType) {
894 vcpu->arch.mtrr_state.def_type = data;
895 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
896 } else if (msr == MSR_MTRRfix64K_00000)
898 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
899 p[1 + msr - MSR_MTRRfix16K_80000] = data;
900 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
901 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
902 else if (msr == MSR_IA32_CR_PAT)
903 vcpu->arch.pat = data;
904 else { /* Variable MTRRs */
905 int idx, is_mtrr_mask;
908 idx = (msr - 0x200) / 2;
909 is_mtrr_mask = msr - 0x200 - 2 * idx;
912 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
915 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
919 kvm_mmu_reset_context(vcpu);
923 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
925 u64 mcg_cap = vcpu->arch.mcg_cap;
926 unsigned bank_num = mcg_cap & 0xff;
929 case MSR_IA32_MCG_STATUS:
930 vcpu->arch.mcg_status = data;
932 case MSR_IA32_MCG_CTL:
933 if (!(mcg_cap & MCG_CTL_P))
935 if (data != 0 && data != ~(u64)0)
937 vcpu->arch.mcg_ctl = data;
940 if (msr >= MSR_IA32_MC0_CTL &&
941 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
942 u32 offset = msr - MSR_IA32_MC0_CTL;
943 /* only 0 or all 1s can be written to IA32_MCi_CTL
944 * some Linux kernels though clear bit 10 in bank 4 to
945 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
946 * this to avoid an uncatched #GP in the guest
948 if ((offset & 0x3) == 0 &&
949 data != 0 && (data | (1 << 10)) != ~(u64)0)
951 vcpu->arch.mce_banks[offset] = data;
959 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
961 struct kvm *kvm = vcpu->kvm;
962 int lm = is_long_mode(vcpu);
963 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
964 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
965 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
966 : kvm->arch.xen_hvm_config.blob_size_32;
967 u32 page_num = data & ~PAGE_MASK;
968 u64 page_addr = data & PAGE_MASK;
973 if (page_num >= blob_size)
976 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
980 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
982 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
991 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
993 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
996 static bool kvm_hv_msr_partition_wide(u32 msr)
1000 case HV_X64_MSR_GUEST_OS_ID:
1001 case HV_X64_MSR_HYPERCALL:
1009 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1011 struct kvm *kvm = vcpu->kvm;
1014 case HV_X64_MSR_GUEST_OS_ID:
1015 kvm->arch.hv_guest_os_id = data;
1016 /* setting guest os id to zero disables hypercall page */
1017 if (!kvm->arch.hv_guest_os_id)
1018 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1020 case HV_X64_MSR_HYPERCALL: {
1025 /* if guest os id is not set hypercall should remain disabled */
1026 if (!kvm->arch.hv_guest_os_id)
1028 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1029 kvm->arch.hv_hypercall = data;
1032 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1033 addr = gfn_to_hva(kvm, gfn);
1034 if (kvm_is_error_hva(addr))
1036 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1037 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1038 if (copy_to_user((void __user *)addr, instructions, 4))
1040 kvm->arch.hv_hypercall = data;
1044 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1045 "data 0x%llx\n", msr, data);
1051 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1054 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1057 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1058 vcpu->arch.hv_vapic = data;
1061 addr = gfn_to_hva(vcpu->kvm, data >>
1062 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1063 if (kvm_is_error_hva(addr))
1065 if (clear_user((void __user *)addr, PAGE_SIZE))
1067 vcpu->arch.hv_vapic = data;
1070 case HV_X64_MSR_EOI:
1071 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1072 case HV_X64_MSR_ICR:
1073 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1074 case HV_X64_MSR_TPR:
1075 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1077 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1078 "data 0x%llx\n", msr, data);
1085 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1089 set_efer(vcpu, data);
1092 data &= ~(u64)0x40; /* ignore flush filter disable */
1094 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1099 case MSR_FAM10H_MMIO_CONF_BASE:
1101 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1106 case MSR_AMD64_NB_CFG:
1108 case MSR_IA32_DEBUGCTLMSR:
1110 /* We support the non-activated case already */
1112 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1113 /* Values other than LBR and BTF are vendor-specific,
1114 thus reserved and should throw a #GP */
1117 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1120 case MSR_IA32_UCODE_REV:
1121 case MSR_IA32_UCODE_WRITE:
1122 case MSR_VM_HSAVE_PA:
1123 case MSR_AMD64_PATCH_LOADER:
1125 case 0x200 ... 0x2ff:
1126 return set_msr_mtrr(vcpu, msr, data);
1127 case MSR_IA32_APICBASE:
1128 kvm_set_apic_base(vcpu, data);
1130 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1131 return kvm_x2apic_msr_write(vcpu, msr, data);
1132 case MSR_IA32_MISC_ENABLE:
1133 vcpu->arch.ia32_misc_enable_msr = data;
1135 case MSR_KVM_WALL_CLOCK:
1136 vcpu->kvm->arch.wall_clock = data;
1137 kvm_write_wall_clock(vcpu->kvm, data);
1139 case MSR_KVM_SYSTEM_TIME: {
1140 if (vcpu->arch.time_page) {
1141 kvm_release_page_dirty(vcpu->arch.time_page);
1142 vcpu->arch.time_page = NULL;
1145 vcpu->arch.time = data;
1147 /* we verify if the enable bit is set... */
1151 /* ...but clean it before doing the actual write */
1152 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1154 vcpu->arch.time_page =
1155 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1157 if (is_error_page(vcpu->arch.time_page)) {
1158 kvm_release_page_clean(vcpu->arch.time_page);
1159 vcpu->arch.time_page = NULL;
1162 kvm_request_guest_time_update(vcpu);
1165 case MSR_IA32_MCG_CTL:
1166 case MSR_IA32_MCG_STATUS:
1167 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1168 return set_msr_mce(vcpu, msr, data);
1170 /* Performance counters are not protected by a CPUID bit,
1171 * so we should check all of them in the generic path for the sake of
1172 * cross vendor migration.
1173 * Writing a zero into the event select MSRs disables them,
1174 * which we perfectly emulate ;-). Any other value should be at least
1175 * reported, some guests depend on them.
1177 case MSR_P6_EVNTSEL0:
1178 case MSR_P6_EVNTSEL1:
1179 case MSR_K7_EVNTSEL0:
1180 case MSR_K7_EVNTSEL1:
1181 case MSR_K7_EVNTSEL2:
1182 case MSR_K7_EVNTSEL3:
1184 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1185 "0x%x data 0x%llx\n", msr, data);
1187 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1188 * so we ignore writes to make it happy.
1190 case MSR_P6_PERFCTR0:
1191 case MSR_P6_PERFCTR1:
1192 case MSR_K7_PERFCTR0:
1193 case MSR_K7_PERFCTR1:
1194 case MSR_K7_PERFCTR2:
1195 case MSR_K7_PERFCTR3:
1196 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1197 "0x%x data 0x%llx\n", msr, data);
1199 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1200 if (kvm_hv_msr_partition_wide(msr)) {
1202 mutex_lock(&vcpu->kvm->lock);
1203 r = set_msr_hyperv_pw(vcpu, msr, data);
1204 mutex_unlock(&vcpu->kvm->lock);
1207 return set_msr_hyperv(vcpu, msr, data);
1210 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1211 return xen_hvm_config(vcpu, data);
1213 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1217 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1224 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1228 * Reads an msr value (of 'msr_index') into 'pdata'.
1229 * Returns 0 on success, non-0 otherwise.
1230 * Assumes vcpu_load() was already called.
1232 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1234 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1237 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1239 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1241 if (!msr_mtrr_valid(msr))
1244 if (msr == MSR_MTRRdefType)
1245 *pdata = vcpu->arch.mtrr_state.def_type +
1246 (vcpu->arch.mtrr_state.enabled << 10);
1247 else if (msr == MSR_MTRRfix64K_00000)
1249 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1251 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1253 else if (msr == MSR_IA32_CR_PAT)
1254 *pdata = vcpu->arch.pat;
1255 else { /* Variable MTRRs */
1256 int idx, is_mtrr_mask;
1259 idx = (msr - 0x200) / 2;
1260 is_mtrr_mask = msr - 0x200 - 2 * idx;
1263 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1266 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1273 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1276 u64 mcg_cap = vcpu->arch.mcg_cap;
1277 unsigned bank_num = mcg_cap & 0xff;
1280 case MSR_IA32_P5_MC_ADDR:
1281 case MSR_IA32_P5_MC_TYPE:
1284 case MSR_IA32_MCG_CAP:
1285 data = vcpu->arch.mcg_cap;
1287 case MSR_IA32_MCG_CTL:
1288 if (!(mcg_cap & MCG_CTL_P))
1290 data = vcpu->arch.mcg_ctl;
1292 case MSR_IA32_MCG_STATUS:
1293 data = vcpu->arch.mcg_status;
1296 if (msr >= MSR_IA32_MC0_CTL &&
1297 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1298 u32 offset = msr - MSR_IA32_MC0_CTL;
1299 data = vcpu->arch.mce_banks[offset];
1308 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1311 struct kvm *kvm = vcpu->kvm;
1314 case HV_X64_MSR_GUEST_OS_ID:
1315 data = kvm->arch.hv_guest_os_id;
1317 case HV_X64_MSR_HYPERCALL:
1318 data = kvm->arch.hv_hypercall;
1321 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1329 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1334 case HV_X64_MSR_VP_INDEX: {
1337 kvm_for_each_vcpu(r, v, vcpu->kvm)
1342 case HV_X64_MSR_EOI:
1343 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1344 case HV_X64_MSR_ICR:
1345 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1346 case HV_X64_MSR_TPR:
1347 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1349 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1356 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1361 case MSR_IA32_PLATFORM_ID:
1362 case MSR_IA32_UCODE_REV:
1363 case MSR_IA32_EBL_CR_POWERON:
1364 case MSR_IA32_DEBUGCTLMSR:
1365 case MSR_IA32_LASTBRANCHFROMIP:
1366 case MSR_IA32_LASTBRANCHTOIP:
1367 case MSR_IA32_LASTINTFROMIP:
1368 case MSR_IA32_LASTINTTOIP:
1371 case MSR_VM_HSAVE_PA:
1372 case MSR_P6_PERFCTR0:
1373 case MSR_P6_PERFCTR1:
1374 case MSR_P6_EVNTSEL0:
1375 case MSR_P6_EVNTSEL1:
1376 case MSR_K7_EVNTSEL0:
1377 case MSR_K7_PERFCTR0:
1378 case MSR_K8_INT_PENDING_MSG:
1379 case MSR_AMD64_NB_CFG:
1380 case MSR_FAM10H_MMIO_CONF_BASE:
1384 data = 0x500 | KVM_NR_VAR_MTRR;
1386 case 0x200 ... 0x2ff:
1387 return get_msr_mtrr(vcpu, msr, pdata);
1388 case 0xcd: /* fsb frequency */
1391 case MSR_IA32_APICBASE:
1392 data = kvm_get_apic_base(vcpu);
1394 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1395 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1397 case MSR_IA32_MISC_ENABLE:
1398 data = vcpu->arch.ia32_misc_enable_msr;
1400 case MSR_IA32_PERF_STATUS:
1401 /* TSC increment by tick */
1403 /* CPU multiplier */
1404 data |= (((uint64_t)4ULL) << 40);
1407 data = vcpu->arch.efer;
1409 case MSR_KVM_WALL_CLOCK:
1410 data = vcpu->kvm->arch.wall_clock;
1412 case MSR_KVM_SYSTEM_TIME:
1413 data = vcpu->arch.time;
1415 case MSR_IA32_P5_MC_ADDR:
1416 case MSR_IA32_P5_MC_TYPE:
1417 case MSR_IA32_MCG_CAP:
1418 case MSR_IA32_MCG_CTL:
1419 case MSR_IA32_MCG_STATUS:
1420 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1421 return get_msr_mce(vcpu, msr, pdata);
1422 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1423 if (kvm_hv_msr_partition_wide(msr)) {
1425 mutex_lock(&vcpu->kvm->lock);
1426 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1427 mutex_unlock(&vcpu->kvm->lock);
1430 return get_msr_hyperv(vcpu, msr, pdata);
1434 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1437 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1445 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1448 * Read or write a bunch of msrs. All parameters are kernel addresses.
1450 * @return number of msrs set successfully.
1452 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1453 struct kvm_msr_entry *entries,
1454 int (*do_msr)(struct kvm_vcpu *vcpu,
1455 unsigned index, u64 *data))
1461 idx = srcu_read_lock(&vcpu->kvm->srcu);
1462 for (i = 0; i < msrs->nmsrs; ++i)
1463 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1465 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1473 * Read or write a bunch of msrs. Parameters are user addresses.
1475 * @return number of msrs set successfully.
1477 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1478 int (*do_msr)(struct kvm_vcpu *vcpu,
1479 unsigned index, u64 *data),
1482 struct kvm_msrs msrs;
1483 struct kvm_msr_entry *entries;
1488 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1492 if (msrs.nmsrs >= MAX_IO_MSRS)
1496 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1497 entries = vmalloc(size);
1502 if (copy_from_user(entries, user_msrs->entries, size))
1505 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1510 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1521 int kvm_dev_ioctl_check_extension(long ext)
1526 case KVM_CAP_IRQCHIP:
1528 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1529 case KVM_CAP_SET_TSS_ADDR:
1530 case KVM_CAP_EXT_CPUID:
1531 case KVM_CAP_CLOCKSOURCE:
1533 case KVM_CAP_NOP_IO_DELAY:
1534 case KVM_CAP_MP_STATE:
1535 case KVM_CAP_SYNC_MMU:
1536 case KVM_CAP_REINJECT_CONTROL:
1537 case KVM_CAP_IRQ_INJECT_STATUS:
1538 case KVM_CAP_ASSIGN_DEV_IRQ:
1540 case KVM_CAP_IOEVENTFD:
1542 case KVM_CAP_PIT_STATE2:
1543 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1544 case KVM_CAP_XEN_HVM:
1545 case KVM_CAP_ADJUST_CLOCK:
1546 case KVM_CAP_VCPU_EVENTS:
1547 case KVM_CAP_HYPERV:
1548 case KVM_CAP_HYPERV_VAPIC:
1549 case KVM_CAP_HYPERV_SPIN:
1550 case KVM_CAP_PCI_SEGMENT:
1551 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1554 case KVM_CAP_COALESCED_MMIO:
1555 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1558 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1560 case KVM_CAP_NR_VCPUS:
1563 case KVM_CAP_NR_MEMSLOTS:
1564 r = KVM_MEMORY_SLOTS;
1566 case KVM_CAP_PV_MMU: /* obsolete */
1573 r = KVM_MAX_MCE_BANKS;
1583 long kvm_arch_dev_ioctl(struct file *filp,
1584 unsigned int ioctl, unsigned long arg)
1586 void __user *argp = (void __user *)arg;
1590 case KVM_GET_MSR_INDEX_LIST: {
1591 struct kvm_msr_list __user *user_msr_list = argp;
1592 struct kvm_msr_list msr_list;
1596 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1599 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1600 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1603 if (n < msr_list.nmsrs)
1606 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1607 num_msrs_to_save * sizeof(u32)))
1609 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1611 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1616 case KVM_GET_SUPPORTED_CPUID: {
1617 struct kvm_cpuid2 __user *cpuid_arg = argp;
1618 struct kvm_cpuid2 cpuid;
1621 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1623 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1624 cpuid_arg->entries);
1629 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1634 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1637 mce_cap = KVM_MCE_CAP_SUPPORTED;
1639 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1651 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1653 kvm_x86_ops->vcpu_load(vcpu, cpu);
1654 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1655 unsigned long khz = cpufreq_quick_get(cpu);
1658 per_cpu(cpu_tsc_khz, cpu) = khz;
1660 kvm_request_guest_time_update(vcpu);
1663 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1665 kvm_put_guest_fpu(vcpu);
1666 kvm_x86_ops->vcpu_put(vcpu);
1669 static int is_efer_nx(void)
1671 unsigned long long efer = 0;
1673 rdmsrl_safe(MSR_EFER, &efer);
1674 return efer & EFER_NX;
1677 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1680 struct kvm_cpuid_entry2 *e, *entry;
1683 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1684 e = &vcpu->arch.cpuid_entries[i];
1685 if (e->function == 0x80000001) {
1690 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1691 entry->edx &= ~(1 << 20);
1692 printk(KERN_INFO "kvm: guest NX capability removed\n");
1696 /* when an old userspace process fills a new kernel module */
1697 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1698 struct kvm_cpuid *cpuid,
1699 struct kvm_cpuid_entry __user *entries)
1702 struct kvm_cpuid_entry *cpuid_entries;
1705 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1708 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1712 if (copy_from_user(cpuid_entries, entries,
1713 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1716 for (i = 0; i < cpuid->nent; i++) {
1717 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1718 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1719 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1720 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1721 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1722 vcpu->arch.cpuid_entries[i].index = 0;
1723 vcpu->arch.cpuid_entries[i].flags = 0;
1724 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1725 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1726 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1728 vcpu->arch.cpuid_nent = cpuid->nent;
1729 cpuid_fix_nx_cap(vcpu);
1731 kvm_apic_set_version(vcpu);
1732 kvm_x86_ops->cpuid_update(vcpu);
1736 vfree(cpuid_entries);
1741 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1742 struct kvm_cpuid2 *cpuid,
1743 struct kvm_cpuid_entry2 __user *entries)
1748 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1751 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1752 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1755 vcpu->arch.cpuid_nent = cpuid->nent;
1756 kvm_apic_set_version(vcpu);
1757 kvm_x86_ops->cpuid_update(vcpu);
1765 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1766 struct kvm_cpuid2 *cpuid,
1767 struct kvm_cpuid_entry2 __user *entries)
1772 if (cpuid->nent < vcpu->arch.cpuid_nent)
1775 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1776 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1781 cpuid->nent = vcpu->arch.cpuid_nent;
1785 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1788 entry->function = function;
1789 entry->index = index;
1790 cpuid_count(entry->function, entry->index,
1791 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1795 #define F(x) bit(X86_FEATURE_##x)
1797 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1798 u32 index, int *nent, int maxnent)
1800 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1801 #ifdef CONFIG_X86_64
1802 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1804 unsigned f_lm = F(LM);
1806 unsigned f_gbpages = 0;
1809 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1812 const u32 kvm_supported_word0_x86_features =
1813 F(FPU) | F(VME) | F(DE) | F(PSE) |
1814 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1815 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1816 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1817 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1818 0 /* Reserved, DS, ACPI */ | F(MMX) |
1819 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1820 0 /* HTT, TM, Reserved, PBE */;
1821 /* cpuid 0x80000001.edx */
1822 const u32 kvm_supported_word1_x86_features =
1823 F(FPU) | F(VME) | F(DE) | F(PSE) |
1824 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1825 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1826 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1827 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1828 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1829 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1830 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1832 const u32 kvm_supported_word4_x86_features =
1833 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1834 0 /* DS-CPL, VMX, SMX, EST */ |
1835 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1836 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1837 0 /* Reserved, DCA */ | F(XMM4_1) |
1838 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1839 0 /* Reserved, XSAVE, OSXSAVE */;
1840 /* cpuid 0x80000001.ecx */
1841 const u32 kvm_supported_word6_x86_features =
1842 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1843 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1844 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1845 0 /* SKINIT */ | 0 /* WDT */;
1847 /* all calls to cpuid_count() should be made on the same cpu */
1849 do_cpuid_1_ent(entry, function, index);
1854 entry->eax = min(entry->eax, (u32)0xb);
1857 entry->edx &= kvm_supported_word0_x86_features;
1858 entry->ecx &= kvm_supported_word4_x86_features;
1859 /* we support x2apic emulation even if host does not support
1860 * it since we emulate x2apic in software */
1861 entry->ecx |= F(X2APIC);
1863 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1864 * may return different values. This forces us to get_cpu() before
1865 * issuing the first command, and also to emulate this annoying behavior
1866 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1868 int t, times = entry->eax & 0xff;
1870 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1871 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1872 for (t = 1; t < times && *nent < maxnent; ++t) {
1873 do_cpuid_1_ent(&entry[t], function, 0);
1874 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1879 /* function 4 and 0xb have additional index. */
1883 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1884 /* read more entries until cache_type is zero */
1885 for (i = 1; *nent < maxnent; ++i) {
1886 cache_type = entry[i - 1].eax & 0x1f;
1889 do_cpuid_1_ent(&entry[i], function, i);
1891 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1899 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1900 /* read more entries until level_type is zero */
1901 for (i = 1; *nent < maxnent; ++i) {
1902 level_type = entry[i - 1].ecx & 0xff00;
1905 do_cpuid_1_ent(&entry[i], function, i);
1907 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1913 entry->eax = min(entry->eax, 0x8000001a);
1916 entry->edx &= kvm_supported_word1_x86_features;
1917 entry->ecx &= kvm_supported_word6_x86_features;
1925 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1926 struct kvm_cpuid_entry2 __user *entries)
1928 struct kvm_cpuid_entry2 *cpuid_entries;
1929 int limit, nent = 0, r = -E2BIG;
1932 if (cpuid->nent < 1)
1934 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1935 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1937 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1941 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1942 limit = cpuid_entries[0].eax;
1943 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1944 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1945 &nent, cpuid->nent);
1947 if (nent >= cpuid->nent)
1950 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1951 limit = cpuid_entries[nent - 1].eax;
1952 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1953 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1954 &nent, cpuid->nent);
1956 if (nent >= cpuid->nent)
1960 if (copy_to_user(entries, cpuid_entries,
1961 nent * sizeof(struct kvm_cpuid_entry2)))
1967 vfree(cpuid_entries);
1972 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1973 struct kvm_lapic_state *s)
1976 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1982 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1983 struct kvm_lapic_state *s)
1986 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1987 kvm_apic_post_state_restore(vcpu);
1988 update_cr8_intercept(vcpu);
1994 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1995 struct kvm_interrupt *irq)
1997 if (irq->irq < 0 || irq->irq >= 256)
1999 if (irqchip_in_kernel(vcpu->kvm))
2003 kvm_queue_interrupt(vcpu, irq->irq, false);
2010 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2013 kvm_inject_nmi(vcpu);
2019 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2020 struct kvm_tpr_access_ctl *tac)
2024 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2028 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2032 unsigned bank_num = mcg_cap & 0xff, bank;
2035 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2037 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2040 vcpu->arch.mcg_cap = mcg_cap;
2041 /* Init IA32_MCG_CTL to all 1s */
2042 if (mcg_cap & MCG_CTL_P)
2043 vcpu->arch.mcg_ctl = ~(u64)0;
2044 /* Init IA32_MCi_CTL to all 1s */
2045 for (bank = 0; bank < bank_num; bank++)
2046 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2051 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2052 struct kvm_x86_mce *mce)
2054 u64 mcg_cap = vcpu->arch.mcg_cap;
2055 unsigned bank_num = mcg_cap & 0xff;
2056 u64 *banks = vcpu->arch.mce_banks;
2058 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2061 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2062 * reporting is disabled
2064 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2065 vcpu->arch.mcg_ctl != ~(u64)0)
2067 banks += 4 * mce->bank;
2069 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2070 * reporting is disabled for the bank
2072 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2074 if (mce->status & MCI_STATUS_UC) {
2075 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2076 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2077 printk(KERN_DEBUG "kvm: set_mce: "
2078 "injects mce exception while "
2079 "previous one is in progress!\n");
2080 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2083 if (banks[1] & MCI_STATUS_VAL)
2084 mce->status |= MCI_STATUS_OVER;
2085 banks[2] = mce->addr;
2086 banks[3] = mce->misc;
2087 vcpu->arch.mcg_status = mce->mcg_status;
2088 banks[1] = mce->status;
2089 kvm_queue_exception(vcpu, MC_VECTOR);
2090 } else if (!(banks[1] & MCI_STATUS_VAL)
2091 || !(banks[1] & MCI_STATUS_UC)) {
2092 if (banks[1] & MCI_STATUS_VAL)
2093 mce->status |= MCI_STATUS_OVER;
2094 banks[2] = mce->addr;
2095 banks[3] = mce->misc;
2096 banks[1] = mce->status;
2098 banks[1] |= MCI_STATUS_OVER;
2102 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2103 struct kvm_vcpu_events *events)
2107 events->exception.injected = vcpu->arch.exception.pending;
2108 events->exception.nr = vcpu->arch.exception.nr;
2109 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2110 events->exception.error_code = vcpu->arch.exception.error_code;
2112 events->interrupt.injected = vcpu->arch.interrupt.pending;
2113 events->interrupt.nr = vcpu->arch.interrupt.nr;
2114 events->interrupt.soft = vcpu->arch.interrupt.soft;
2116 events->nmi.injected = vcpu->arch.nmi_injected;
2117 events->nmi.pending = vcpu->arch.nmi_pending;
2118 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2120 events->sipi_vector = vcpu->arch.sipi_vector;
2122 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2123 | KVM_VCPUEVENT_VALID_SIPI_VECTOR);
2128 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2129 struct kvm_vcpu_events *events)
2131 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2132 | KVM_VCPUEVENT_VALID_SIPI_VECTOR))
2137 vcpu->arch.exception.pending = events->exception.injected;
2138 vcpu->arch.exception.nr = events->exception.nr;
2139 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2140 vcpu->arch.exception.error_code = events->exception.error_code;
2142 vcpu->arch.interrupt.pending = events->interrupt.injected;
2143 vcpu->arch.interrupt.nr = events->interrupt.nr;
2144 vcpu->arch.interrupt.soft = events->interrupt.soft;
2145 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2146 kvm_pic_clear_isr_ack(vcpu->kvm);
2148 vcpu->arch.nmi_injected = events->nmi.injected;
2149 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2150 vcpu->arch.nmi_pending = events->nmi.pending;
2151 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2153 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2154 vcpu->arch.sipi_vector = events->sipi_vector;
2161 long kvm_arch_vcpu_ioctl(struct file *filp,
2162 unsigned int ioctl, unsigned long arg)
2164 struct kvm_vcpu *vcpu = filp->private_data;
2165 void __user *argp = (void __user *)arg;
2167 struct kvm_lapic_state *lapic = NULL;
2170 case KVM_GET_LAPIC: {
2172 if (!vcpu->arch.apic)
2174 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2179 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2183 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2188 case KVM_SET_LAPIC: {
2190 if (!vcpu->arch.apic)
2192 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2197 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2199 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2205 case KVM_INTERRUPT: {
2206 struct kvm_interrupt irq;
2209 if (copy_from_user(&irq, argp, sizeof irq))
2211 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2218 r = kvm_vcpu_ioctl_nmi(vcpu);
2224 case KVM_SET_CPUID: {
2225 struct kvm_cpuid __user *cpuid_arg = argp;
2226 struct kvm_cpuid cpuid;
2229 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2231 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2236 case KVM_SET_CPUID2: {
2237 struct kvm_cpuid2 __user *cpuid_arg = argp;
2238 struct kvm_cpuid2 cpuid;
2241 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2243 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2244 cpuid_arg->entries);
2249 case KVM_GET_CPUID2: {
2250 struct kvm_cpuid2 __user *cpuid_arg = argp;
2251 struct kvm_cpuid2 cpuid;
2254 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2256 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2257 cpuid_arg->entries);
2261 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2267 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2270 r = msr_io(vcpu, argp, do_set_msr, 0);
2272 case KVM_TPR_ACCESS_REPORTING: {
2273 struct kvm_tpr_access_ctl tac;
2276 if (copy_from_user(&tac, argp, sizeof tac))
2278 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2282 if (copy_to_user(argp, &tac, sizeof tac))
2287 case KVM_SET_VAPIC_ADDR: {
2288 struct kvm_vapic_addr va;
2291 if (!irqchip_in_kernel(vcpu->kvm))
2294 if (copy_from_user(&va, argp, sizeof va))
2297 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2300 case KVM_X86_SETUP_MCE: {
2304 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2306 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2309 case KVM_X86_SET_MCE: {
2310 struct kvm_x86_mce mce;
2313 if (copy_from_user(&mce, argp, sizeof mce))
2315 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2318 case KVM_GET_VCPU_EVENTS: {
2319 struct kvm_vcpu_events events;
2321 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2324 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2329 case KVM_SET_VCPU_EVENTS: {
2330 struct kvm_vcpu_events events;
2333 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2336 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2347 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2351 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2353 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2357 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2360 kvm->arch.ept_identity_map_addr = ident_addr;
2364 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2365 u32 kvm_nr_mmu_pages)
2367 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2370 mutex_lock(&kvm->slots_lock);
2371 spin_lock(&kvm->mmu_lock);
2373 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2374 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2376 spin_unlock(&kvm->mmu_lock);
2377 mutex_unlock(&kvm->slots_lock);
2381 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2383 return kvm->arch.n_alloc_mmu_pages;
2386 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2389 struct kvm_mem_alias *alias;
2390 struct kvm_mem_aliases *aliases;
2392 aliases = rcu_dereference(kvm->arch.aliases);
2394 for (i = 0; i < aliases->naliases; ++i) {
2395 alias = &aliases->aliases[i];
2396 if (alias->flags & KVM_ALIAS_INVALID)
2398 if (gfn >= alias->base_gfn
2399 && gfn < alias->base_gfn + alias->npages)
2400 return alias->target_gfn + gfn - alias->base_gfn;
2405 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2408 struct kvm_mem_alias *alias;
2409 struct kvm_mem_aliases *aliases;
2411 aliases = rcu_dereference(kvm->arch.aliases);
2413 for (i = 0; i < aliases->naliases; ++i) {
2414 alias = &aliases->aliases[i];
2415 if (gfn >= alias->base_gfn
2416 && gfn < alias->base_gfn + alias->npages)
2417 return alias->target_gfn + gfn - alias->base_gfn;
2423 * Set a new alias region. Aliases map a portion of physical memory into
2424 * another portion. This is useful for memory windows, for example the PC
2427 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2428 struct kvm_memory_alias *alias)
2431 struct kvm_mem_alias *p;
2432 struct kvm_mem_aliases *aliases, *old_aliases;
2435 /* General sanity checks */
2436 if (alias->memory_size & (PAGE_SIZE - 1))
2438 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2440 if (alias->slot >= KVM_ALIAS_SLOTS)
2442 if (alias->guest_phys_addr + alias->memory_size
2443 < alias->guest_phys_addr)
2445 if (alias->target_phys_addr + alias->memory_size
2446 < alias->target_phys_addr)
2450 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2454 mutex_lock(&kvm->slots_lock);
2456 /* invalidate any gfn reference in case of deletion/shrinking */
2457 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2458 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2459 old_aliases = kvm->arch.aliases;
2460 rcu_assign_pointer(kvm->arch.aliases, aliases);
2461 synchronize_srcu_expedited(&kvm->srcu);
2462 kvm_mmu_zap_all(kvm);
2466 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2470 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2472 p = &aliases->aliases[alias->slot];
2473 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2474 p->npages = alias->memory_size >> PAGE_SHIFT;
2475 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2476 p->flags &= ~(KVM_ALIAS_INVALID);
2478 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2479 if (aliases->aliases[n - 1].npages)
2481 aliases->naliases = n;
2483 old_aliases = kvm->arch.aliases;
2484 rcu_assign_pointer(kvm->arch.aliases, aliases);
2485 synchronize_srcu_expedited(&kvm->srcu);
2490 mutex_unlock(&kvm->slots_lock);
2495 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2500 switch (chip->chip_id) {
2501 case KVM_IRQCHIP_PIC_MASTER:
2502 memcpy(&chip->chip.pic,
2503 &pic_irqchip(kvm)->pics[0],
2504 sizeof(struct kvm_pic_state));
2506 case KVM_IRQCHIP_PIC_SLAVE:
2507 memcpy(&chip->chip.pic,
2508 &pic_irqchip(kvm)->pics[1],
2509 sizeof(struct kvm_pic_state));
2511 case KVM_IRQCHIP_IOAPIC:
2512 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2521 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2526 switch (chip->chip_id) {
2527 case KVM_IRQCHIP_PIC_MASTER:
2528 raw_spin_lock(&pic_irqchip(kvm)->lock);
2529 memcpy(&pic_irqchip(kvm)->pics[0],
2531 sizeof(struct kvm_pic_state));
2532 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2534 case KVM_IRQCHIP_PIC_SLAVE:
2535 raw_spin_lock(&pic_irqchip(kvm)->lock);
2536 memcpy(&pic_irqchip(kvm)->pics[1],
2538 sizeof(struct kvm_pic_state));
2539 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2541 case KVM_IRQCHIP_IOAPIC:
2542 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2548 kvm_pic_update_irq(pic_irqchip(kvm));
2552 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2556 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2557 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2558 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2562 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2566 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2567 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2568 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2569 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2573 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2577 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2578 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2579 sizeof(ps->channels));
2580 ps->flags = kvm->arch.vpit->pit_state.flags;
2581 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2585 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2587 int r = 0, start = 0;
2588 u32 prev_legacy, cur_legacy;
2589 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2590 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2591 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2592 if (!prev_legacy && cur_legacy)
2594 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2595 sizeof(kvm->arch.vpit->pit_state.channels));
2596 kvm->arch.vpit->pit_state.flags = ps->flags;
2597 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2598 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2602 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2603 struct kvm_reinject_control *control)
2605 if (!kvm->arch.vpit)
2607 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2608 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2609 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2614 * Get (and clear) the dirty memory log for a memory slot.
2616 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2617 struct kvm_dirty_log *log)
2620 struct kvm_memory_slot *memslot;
2622 unsigned long is_dirty = 0;
2623 unsigned long *dirty_bitmap = NULL;
2625 mutex_lock(&kvm->slots_lock);
2628 if (log->slot >= KVM_MEMORY_SLOTS)
2631 memslot = &kvm->memslots->memslots[log->slot];
2633 if (!memslot->dirty_bitmap)
2636 n = kvm_dirty_bitmap_bytes(memslot);
2639 dirty_bitmap = vmalloc(n);
2642 memset(dirty_bitmap, 0, n);
2644 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2645 is_dirty = memslot->dirty_bitmap[i];
2647 /* If nothing is dirty, don't bother messing with page tables. */
2649 struct kvm_memslots *slots, *old_slots;
2651 spin_lock(&kvm->mmu_lock);
2652 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2653 spin_unlock(&kvm->mmu_lock);
2655 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2659 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2660 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2662 old_slots = kvm->memslots;
2663 rcu_assign_pointer(kvm->memslots, slots);
2664 synchronize_srcu_expedited(&kvm->srcu);
2665 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2670 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2673 vfree(dirty_bitmap);
2675 mutex_unlock(&kvm->slots_lock);
2679 long kvm_arch_vm_ioctl(struct file *filp,
2680 unsigned int ioctl, unsigned long arg)
2682 struct kvm *kvm = filp->private_data;
2683 void __user *argp = (void __user *)arg;
2686 * This union makes it completely explicit to gcc-3.x
2687 * that these two variables' stack usage should be
2688 * combined, not added together.
2691 struct kvm_pit_state ps;
2692 struct kvm_pit_state2 ps2;
2693 struct kvm_memory_alias alias;
2694 struct kvm_pit_config pit_config;
2698 case KVM_SET_TSS_ADDR:
2699 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2703 case KVM_SET_IDENTITY_MAP_ADDR: {
2707 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2709 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2714 case KVM_SET_MEMORY_REGION: {
2715 struct kvm_memory_region kvm_mem;
2716 struct kvm_userspace_memory_region kvm_userspace_mem;
2719 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2721 kvm_userspace_mem.slot = kvm_mem.slot;
2722 kvm_userspace_mem.flags = kvm_mem.flags;
2723 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2724 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2725 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2730 case KVM_SET_NR_MMU_PAGES:
2731 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2735 case KVM_GET_NR_MMU_PAGES:
2736 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2738 case KVM_SET_MEMORY_ALIAS:
2740 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2742 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2746 case KVM_CREATE_IRQCHIP: {
2747 struct kvm_pic *vpic;
2749 mutex_lock(&kvm->lock);
2752 goto create_irqchip_unlock;
2754 vpic = kvm_create_pic(kvm);
2756 r = kvm_ioapic_init(kvm);
2758 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2761 goto create_irqchip_unlock;
2764 goto create_irqchip_unlock;
2766 kvm->arch.vpic = vpic;
2768 r = kvm_setup_default_irq_routing(kvm);
2770 mutex_lock(&kvm->irq_lock);
2771 kvm_ioapic_destroy(kvm);
2772 kvm_destroy_pic(kvm);
2773 mutex_unlock(&kvm->irq_lock);
2775 create_irqchip_unlock:
2776 mutex_unlock(&kvm->lock);
2779 case KVM_CREATE_PIT:
2780 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2782 case KVM_CREATE_PIT2:
2784 if (copy_from_user(&u.pit_config, argp,
2785 sizeof(struct kvm_pit_config)))
2788 mutex_lock(&kvm->slots_lock);
2791 goto create_pit_unlock;
2793 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2797 mutex_unlock(&kvm->slots_lock);
2799 case KVM_IRQ_LINE_STATUS:
2800 case KVM_IRQ_LINE: {
2801 struct kvm_irq_level irq_event;
2804 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2806 if (irqchip_in_kernel(kvm)) {
2808 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2809 irq_event.irq, irq_event.level);
2810 if (ioctl == KVM_IRQ_LINE_STATUS) {
2811 irq_event.status = status;
2812 if (copy_to_user(argp, &irq_event,
2820 case KVM_GET_IRQCHIP: {
2821 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2822 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2828 if (copy_from_user(chip, argp, sizeof *chip))
2829 goto get_irqchip_out;
2831 if (!irqchip_in_kernel(kvm))
2832 goto get_irqchip_out;
2833 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2835 goto get_irqchip_out;
2837 if (copy_to_user(argp, chip, sizeof *chip))
2838 goto get_irqchip_out;
2846 case KVM_SET_IRQCHIP: {
2847 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2848 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2854 if (copy_from_user(chip, argp, sizeof *chip))
2855 goto set_irqchip_out;
2857 if (!irqchip_in_kernel(kvm))
2858 goto set_irqchip_out;
2859 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2861 goto set_irqchip_out;
2871 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2874 if (!kvm->arch.vpit)
2876 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2880 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2887 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2890 if (!kvm->arch.vpit)
2892 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2898 case KVM_GET_PIT2: {
2900 if (!kvm->arch.vpit)
2902 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2906 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2911 case KVM_SET_PIT2: {
2913 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2916 if (!kvm->arch.vpit)
2918 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2924 case KVM_REINJECT_CONTROL: {
2925 struct kvm_reinject_control control;
2927 if (copy_from_user(&control, argp, sizeof(control)))
2929 r = kvm_vm_ioctl_reinject(kvm, &control);
2935 case KVM_XEN_HVM_CONFIG: {
2937 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2938 sizeof(struct kvm_xen_hvm_config)))
2941 if (kvm->arch.xen_hvm_config.flags)
2946 case KVM_SET_CLOCK: {
2947 struct timespec now;
2948 struct kvm_clock_data user_ns;
2953 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2962 now_ns = timespec_to_ns(&now);
2963 delta = user_ns.clock - now_ns;
2964 kvm->arch.kvmclock_offset = delta;
2967 case KVM_GET_CLOCK: {
2968 struct timespec now;
2969 struct kvm_clock_data user_ns;
2973 now_ns = timespec_to_ns(&now);
2974 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2978 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2991 static void kvm_init_msr_list(void)
2996 /* skip the first msrs in the list. KVM-specific */
2997 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2998 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3001 msrs_to_save[j] = msrs_to_save[i];
3004 num_msrs_to_save = j;
3007 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3010 if (vcpu->arch.apic &&
3011 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3014 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3017 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3019 if (vcpu->arch.apic &&
3020 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3023 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3026 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3028 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3029 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3032 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3034 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3035 access |= PFERR_FETCH_MASK;
3036 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3039 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3041 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3042 access |= PFERR_WRITE_MASK;
3043 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3046 /* uses this to access any guest's mapped memory without checking CPL */
3047 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3049 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3052 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3053 struct kvm_vcpu *vcpu, u32 access,
3057 int r = X86EMUL_CONTINUE;
3060 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3061 unsigned offset = addr & (PAGE_SIZE-1);
3062 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3065 if (gpa == UNMAPPED_GVA) {
3066 r = X86EMUL_PROPAGATE_FAULT;
3069 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3071 r = X86EMUL_UNHANDLEABLE;
3083 /* used for instruction fetching */
3084 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3085 struct kvm_vcpu *vcpu, u32 *error)
3087 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3088 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3089 access | PFERR_FETCH_MASK, error);
3092 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3093 struct kvm_vcpu *vcpu, u32 *error)
3095 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3096 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3100 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3101 struct kvm_vcpu *vcpu, u32 *error)
3103 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3106 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
3107 struct kvm_vcpu *vcpu, u32 *error)
3110 int r = X86EMUL_CONTINUE;
3113 gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
3114 unsigned offset = addr & (PAGE_SIZE-1);
3115 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3118 if (gpa == UNMAPPED_GVA) {
3119 r = X86EMUL_PROPAGATE_FAULT;
3122 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3124 r = X86EMUL_UNHANDLEABLE;
3137 static int emulator_read_emulated(unsigned long addr,
3140 struct kvm_vcpu *vcpu)
3145 if (vcpu->mmio_read_completed) {
3146 memcpy(val, vcpu->mmio_data, bytes);
3147 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3148 vcpu->mmio_phys_addr, *(u64 *)val);
3149 vcpu->mmio_read_completed = 0;
3150 return X86EMUL_CONTINUE;
3153 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3155 if (gpa == UNMAPPED_GVA) {
3156 kvm_inject_page_fault(vcpu, addr, error_code);
3157 return X86EMUL_PROPAGATE_FAULT;
3160 /* For APIC access vmexit */
3161 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3164 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3165 == X86EMUL_CONTINUE)
3166 return X86EMUL_CONTINUE;
3170 * Is this MMIO handled locally?
3172 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3173 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3174 return X86EMUL_CONTINUE;
3177 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3179 vcpu->mmio_needed = 1;
3180 vcpu->mmio_phys_addr = gpa;
3181 vcpu->mmio_size = bytes;
3182 vcpu->mmio_is_write = 0;
3184 return X86EMUL_UNHANDLEABLE;
3187 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3188 const void *val, int bytes)
3192 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3195 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3199 static int emulator_write_emulated_onepage(unsigned long addr,
3202 struct kvm_vcpu *vcpu)
3207 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3209 if (gpa == UNMAPPED_GVA) {
3210 kvm_inject_page_fault(vcpu, addr, error_code);
3211 return X86EMUL_PROPAGATE_FAULT;
3214 /* For APIC access vmexit */
3215 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3218 if (emulator_write_phys(vcpu, gpa, val, bytes))
3219 return X86EMUL_CONTINUE;
3222 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3224 * Is this MMIO handled locally?
3226 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3227 return X86EMUL_CONTINUE;
3229 vcpu->mmio_needed = 1;
3230 vcpu->mmio_phys_addr = gpa;
3231 vcpu->mmio_size = bytes;
3232 vcpu->mmio_is_write = 1;
3233 memcpy(vcpu->mmio_data, val, bytes);
3235 return X86EMUL_CONTINUE;
3238 int emulator_write_emulated(unsigned long addr,
3241 struct kvm_vcpu *vcpu)
3243 /* Crossing a page boundary? */
3244 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3247 now = -addr & ~PAGE_MASK;
3248 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3249 if (rc != X86EMUL_CONTINUE)
3255 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3257 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3259 static int emulator_cmpxchg_emulated(unsigned long addr,
3263 struct kvm_vcpu *vcpu)
3265 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3266 #ifndef CONFIG_X86_64
3267 /* guests cmpxchg8b have to be emulated atomically */
3274 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3276 if (gpa == UNMAPPED_GVA ||
3277 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3280 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3285 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3287 kaddr = kmap_atomic(page, KM_USER0);
3288 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
3289 kunmap_atomic(kaddr, KM_USER0);
3290 kvm_release_page_dirty(page);
3295 return emulator_write_emulated(addr, new, bytes, vcpu);
3298 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3300 return kvm_x86_ops->get_segment_base(vcpu, seg);
3303 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3305 kvm_mmu_invlpg(vcpu, address);
3306 return X86EMUL_CONTINUE;
3309 int emulate_clts(struct kvm_vcpu *vcpu)
3311 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3312 kvm_x86_ops->fpu_activate(vcpu);
3313 return X86EMUL_CONTINUE;
3316 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3318 return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
3321 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3323 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3325 return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
3328 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3331 unsigned long rip = kvm_rip_read(vcpu);
3332 unsigned long rip_linear;
3334 if (!printk_ratelimit())
3337 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3339 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3341 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3342 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3344 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3346 static struct x86_emulate_ops emulate_ops = {
3347 .read_std = kvm_read_guest_virt_system,
3348 .fetch = kvm_fetch_guest_virt,
3349 .read_emulated = emulator_read_emulated,
3350 .write_emulated = emulator_write_emulated,
3351 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3354 static void cache_all_regs(struct kvm_vcpu *vcpu)
3356 kvm_register_read(vcpu, VCPU_REGS_RAX);
3357 kvm_register_read(vcpu, VCPU_REGS_RSP);
3358 kvm_register_read(vcpu, VCPU_REGS_RIP);
3359 vcpu->arch.regs_dirty = ~0;
3362 int emulate_instruction(struct kvm_vcpu *vcpu,
3368 struct decode_cache *c;
3369 struct kvm_run *run = vcpu->run;
3371 kvm_clear_exception_queue(vcpu);
3372 vcpu->arch.mmio_fault_cr2 = cr2;
3374 * TODO: fix emulate.c to use guest_read/write_register
3375 * instead of direct ->regs accesses, can save hundred cycles
3376 * on Intel for instructions that don't read/change RSP, for
3379 cache_all_regs(vcpu);
3381 vcpu->mmio_is_write = 0;
3382 vcpu->arch.pio.string = 0;
3384 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3386 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3388 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3389 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3390 vcpu->arch.emulate_ctxt.mode =
3391 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3392 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3393 ? X86EMUL_MODE_VM86 : cs_l
3394 ? X86EMUL_MODE_PROT64 : cs_db
3395 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3397 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3399 /* Only allow emulation of specific instructions on #UD
3400 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3401 c = &vcpu->arch.emulate_ctxt.decode;
3402 if (emulation_type & EMULTYPE_TRAP_UD) {
3404 return EMULATE_FAIL;
3406 case 0x01: /* VMMCALL */
3407 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3408 return EMULATE_FAIL;
3410 case 0x34: /* sysenter */
3411 case 0x35: /* sysexit */
3412 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3413 return EMULATE_FAIL;
3415 case 0x05: /* syscall */
3416 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3417 return EMULATE_FAIL;
3420 return EMULATE_FAIL;
3423 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3424 return EMULATE_FAIL;
3427 ++vcpu->stat.insn_emulation;
3429 ++vcpu->stat.insn_emulation_fail;
3430 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3431 return EMULATE_DONE;
3432 return EMULATE_FAIL;
3436 if (emulation_type & EMULTYPE_SKIP) {
3437 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3438 return EMULATE_DONE;
3441 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3442 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3445 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3447 if (vcpu->arch.pio.string)
3448 return EMULATE_DO_MMIO;
3450 if ((r || vcpu->mmio_is_write) && run) {
3451 run->exit_reason = KVM_EXIT_MMIO;
3452 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3453 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3454 run->mmio.len = vcpu->mmio_size;
3455 run->mmio.is_write = vcpu->mmio_is_write;
3459 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3460 return EMULATE_DONE;
3461 if (!vcpu->mmio_needed) {
3462 kvm_report_emulation_failure(vcpu, "mmio");
3463 return EMULATE_FAIL;
3465 return EMULATE_DO_MMIO;
3468 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3470 if (vcpu->mmio_is_write) {
3471 vcpu->mmio_needed = 0;
3472 return EMULATE_DO_MMIO;
3475 return EMULATE_DONE;
3477 EXPORT_SYMBOL_GPL(emulate_instruction);
3479 static int pio_copy_data(struct kvm_vcpu *vcpu)
3481 void *p = vcpu->arch.pio_data;
3482 gva_t q = vcpu->arch.pio.guest_gva;
3487 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3488 if (vcpu->arch.pio.in)
3489 ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
3491 ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
3493 if (ret == X86EMUL_PROPAGATE_FAULT)
3494 kvm_inject_page_fault(vcpu, q, error_code);
3499 int complete_pio(struct kvm_vcpu *vcpu)
3501 struct kvm_pio_request *io = &vcpu->arch.pio;
3508 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3509 memcpy(&val, vcpu->arch.pio_data, io->size);
3510 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3514 r = pio_copy_data(vcpu);
3521 delta *= io->cur_count;
3523 * The size of the register should really depend on
3524 * current address size.
3526 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3528 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3534 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3536 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3538 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3540 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3544 io->count -= io->cur_count;
3550 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3552 /* TODO: String I/O for in kernel device */
3555 if (vcpu->arch.pio.in)
3556 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3557 vcpu->arch.pio.size, pd);
3559 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3560 vcpu->arch.pio.port, vcpu->arch.pio.size,
3565 static int pio_string_write(struct kvm_vcpu *vcpu)
3567 struct kvm_pio_request *io = &vcpu->arch.pio;
3568 void *pd = vcpu->arch.pio_data;
3571 for (i = 0; i < io->cur_count; i++) {
3572 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3573 io->port, io->size, pd)) {
3582 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3586 trace_kvm_pio(!in, port, size, 1);
3588 vcpu->run->exit_reason = KVM_EXIT_IO;
3589 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3590 vcpu->run->io.size = vcpu->arch.pio.size = size;
3591 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3592 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3593 vcpu->run->io.port = vcpu->arch.pio.port = port;
3594 vcpu->arch.pio.in = in;
3595 vcpu->arch.pio.string = 0;
3596 vcpu->arch.pio.down = 0;
3597 vcpu->arch.pio.rep = 0;
3599 if (!vcpu->arch.pio.in) {
3600 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3601 memcpy(vcpu->arch.pio_data, &val, 4);
3604 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3610 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3612 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3613 int size, unsigned long count, int down,
3614 gva_t address, int rep, unsigned port)
3616 unsigned now, in_page;
3619 trace_kvm_pio(!in, port, size, count);
3621 vcpu->run->exit_reason = KVM_EXIT_IO;
3622 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3623 vcpu->run->io.size = vcpu->arch.pio.size = size;
3624 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3625 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3626 vcpu->run->io.port = vcpu->arch.pio.port = port;
3627 vcpu->arch.pio.in = in;
3628 vcpu->arch.pio.string = 1;
3629 vcpu->arch.pio.down = down;
3630 vcpu->arch.pio.rep = rep;
3633 kvm_x86_ops->skip_emulated_instruction(vcpu);
3638 in_page = PAGE_SIZE - offset_in_page(address);
3640 in_page = offset_in_page(address) + size;
3641 now = min(count, (unsigned long)in_page / size);
3646 * String I/O in reverse. Yuck. Kill the guest, fix later.
3648 pr_unimpl(vcpu, "guest string pio down\n");
3649 kvm_inject_gp(vcpu, 0);
3652 vcpu->run->io.count = now;
3653 vcpu->arch.pio.cur_count = now;
3655 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3656 kvm_x86_ops->skip_emulated_instruction(vcpu);
3658 vcpu->arch.pio.guest_gva = address;
3660 if (!vcpu->arch.pio.in) {
3661 /* string PIO write */
3662 ret = pio_copy_data(vcpu);
3663 if (ret == X86EMUL_PROPAGATE_FAULT)
3665 if (ret == 0 && !pio_string_write(vcpu)) {
3667 if (vcpu->arch.pio.count == 0)
3671 /* no string PIO read support yet */
3675 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3677 static void bounce_off(void *info)
3682 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3685 struct cpufreq_freqs *freq = data;
3687 struct kvm_vcpu *vcpu;
3688 int i, send_ipi = 0;
3690 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3692 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3694 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3696 spin_lock(&kvm_lock);
3697 list_for_each_entry(kvm, &vm_list, vm_list) {
3698 kvm_for_each_vcpu(i, vcpu, kvm) {
3699 if (vcpu->cpu != freq->cpu)
3701 if (!kvm_request_guest_time_update(vcpu))
3703 if (vcpu->cpu != smp_processor_id())
3707 spin_unlock(&kvm_lock);
3709 if (freq->old < freq->new && send_ipi) {
3711 * We upscale the frequency. Must make the guest
3712 * doesn't see old kvmclock values while running with
3713 * the new frequency, otherwise we risk the guest sees
3714 * time go backwards.
3716 * In case we update the frequency for another cpu
3717 * (which might be in guest context) send an interrupt
3718 * to kick the cpu out of guest context. Next time
3719 * guest context is entered kvmclock will be updated,
3720 * so the guest will not see stale values.
3722 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3727 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3728 .notifier_call = kvmclock_cpufreq_notifier
3731 static void kvm_timer_init(void)
3735 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3736 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3737 CPUFREQ_TRANSITION_NOTIFIER);
3738 for_each_online_cpu(cpu) {
3739 unsigned long khz = cpufreq_get(cpu);
3742 per_cpu(cpu_tsc_khz, cpu) = khz;
3745 for_each_possible_cpu(cpu)
3746 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3750 int kvm_arch_init(void *opaque)
3753 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3756 printk(KERN_ERR "kvm: already loaded the other module\n");
3761 if (!ops->cpu_has_kvm_support()) {
3762 printk(KERN_ERR "kvm: no hardware support\n");
3766 if (ops->disabled_by_bios()) {
3767 printk(KERN_ERR "kvm: disabled by bios\n");
3772 r = kvm_mmu_module_init();
3776 kvm_init_msr_list();
3779 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3780 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3781 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3782 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3792 void kvm_arch_exit(void)
3794 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3795 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3796 CPUFREQ_TRANSITION_NOTIFIER);
3798 kvm_mmu_module_exit();
3801 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3803 ++vcpu->stat.halt_exits;
3804 if (irqchip_in_kernel(vcpu->kvm)) {
3805 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3808 vcpu->run->exit_reason = KVM_EXIT_HLT;
3812 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3814 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3817 if (is_long_mode(vcpu))
3820 return a0 | ((gpa_t)a1 << 32);
3823 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
3825 u64 param, ingpa, outgpa, ret;
3826 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
3827 bool fast, longmode;
3831 * hypercall generates UD from non zero cpl and real mode
3834 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
3835 kvm_queue_exception(vcpu, UD_VECTOR);
3839 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3840 longmode = is_long_mode(vcpu) && cs_l == 1;
3843 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
3844 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
3845 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
3846 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
3847 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
3848 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
3850 #ifdef CONFIG_X86_64
3852 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
3853 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
3854 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
3858 code = param & 0xffff;
3859 fast = (param >> 16) & 0x1;
3860 rep_cnt = (param >> 32) & 0xfff;
3861 rep_idx = (param >> 48) & 0xfff;
3863 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
3866 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
3867 kvm_vcpu_on_spin(vcpu);
3870 res = HV_STATUS_INVALID_HYPERCALL_CODE;
3874 ret = res | (((u64)rep_done & 0xfff) << 32);
3876 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3878 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
3879 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
3885 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3887 unsigned long nr, a0, a1, a2, a3, ret;
3890 if (kvm_hv_hypercall_enabled(vcpu->kvm))
3891 return kvm_hv_hypercall(vcpu);
3893 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3894 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3895 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3896 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3897 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3899 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3901 if (!is_long_mode(vcpu)) {
3909 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3915 case KVM_HC_VAPIC_POLL_IRQ:
3919 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3926 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3927 ++vcpu->stat.hypercalls;
3930 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3932 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3934 char instruction[3];
3935 unsigned long rip = kvm_rip_read(vcpu);
3938 * Blow out the MMU to ensure that no other VCPU has an active mapping
3939 * to ensure that the updated hypercall appears atomically across all
3942 kvm_mmu_zap_all(vcpu->kvm);
3944 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3946 return emulator_write_emulated(rip, instruction, 3, vcpu);
3949 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3951 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3954 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3956 struct descriptor_table dt = { limit, base };
3958 kvm_x86_ops->set_gdt(vcpu, &dt);
3961 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3963 struct descriptor_table dt = { limit, base };
3965 kvm_x86_ops->set_idt(vcpu, &dt);
3968 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3969 unsigned long *rflags)
3971 kvm_lmsw(vcpu, msw);
3972 *rflags = kvm_get_rflags(vcpu);
3975 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3977 unsigned long value;
3981 value = kvm_read_cr0(vcpu);
3984 value = vcpu->arch.cr2;
3987 value = vcpu->arch.cr3;
3990 value = kvm_read_cr4(vcpu);
3993 value = kvm_get_cr8(vcpu);
3996 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4003 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
4004 unsigned long *rflags)
4008 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4009 *rflags = kvm_get_rflags(vcpu);
4012 vcpu->arch.cr2 = val;
4015 kvm_set_cr3(vcpu, val);
4018 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4021 kvm_set_cr8(vcpu, val & 0xfUL);
4024 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4028 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4030 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4031 int j, nent = vcpu->arch.cpuid_nent;
4033 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4034 /* when no next entry is found, the current entry[i] is reselected */
4035 for (j = i + 1; ; j = (j + 1) % nent) {
4036 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4037 if (ej->function == e->function) {
4038 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4042 return 0; /* silence gcc, even though control never reaches here */
4045 /* find an entry with matching function, matching index (if needed), and that
4046 * should be read next (if it's stateful) */
4047 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4048 u32 function, u32 index)
4050 if (e->function != function)
4052 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4054 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4055 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4060 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4061 u32 function, u32 index)
4064 struct kvm_cpuid_entry2 *best = NULL;
4066 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4067 struct kvm_cpuid_entry2 *e;
4069 e = &vcpu->arch.cpuid_entries[i];
4070 if (is_matching_cpuid_entry(e, function, index)) {
4071 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4072 move_to_next_stateful_cpuid_entry(vcpu, i);
4077 * Both basic or both extended?
4079 if (((e->function ^ function) & 0x80000000) == 0)
4080 if (!best || e->function > best->function)
4085 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4087 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4089 struct kvm_cpuid_entry2 *best;
4091 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4093 return best->eax & 0xff;
4097 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4099 u32 function, index;
4100 struct kvm_cpuid_entry2 *best;
4102 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4103 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4104 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4105 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4106 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4107 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4108 best = kvm_find_cpuid_entry(vcpu, function, index);
4110 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4111 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4112 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4113 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4115 kvm_x86_ops->skip_emulated_instruction(vcpu);
4116 trace_kvm_cpuid(function,
4117 kvm_register_read(vcpu, VCPU_REGS_RAX),
4118 kvm_register_read(vcpu, VCPU_REGS_RBX),
4119 kvm_register_read(vcpu, VCPU_REGS_RCX),
4120 kvm_register_read(vcpu, VCPU_REGS_RDX));
4122 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4125 * Check if userspace requested an interrupt window, and that the
4126 * interrupt window is open.
4128 * No need to exit to userspace if we already have an interrupt queued.
4130 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4132 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4133 vcpu->run->request_interrupt_window &&
4134 kvm_arch_interrupt_allowed(vcpu));
4137 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4139 struct kvm_run *kvm_run = vcpu->run;
4141 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4142 kvm_run->cr8 = kvm_get_cr8(vcpu);
4143 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4144 if (irqchip_in_kernel(vcpu->kvm))
4145 kvm_run->ready_for_interrupt_injection = 1;
4147 kvm_run->ready_for_interrupt_injection =
4148 kvm_arch_interrupt_allowed(vcpu) &&
4149 !kvm_cpu_has_interrupt(vcpu) &&
4150 !kvm_event_needs_reinjection(vcpu);
4153 static void vapic_enter(struct kvm_vcpu *vcpu)
4155 struct kvm_lapic *apic = vcpu->arch.apic;
4158 if (!apic || !apic->vapic_addr)
4161 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4163 vcpu->arch.apic->vapic_page = page;
4166 static void vapic_exit(struct kvm_vcpu *vcpu)
4168 struct kvm_lapic *apic = vcpu->arch.apic;
4171 if (!apic || !apic->vapic_addr)
4174 idx = srcu_read_lock(&vcpu->kvm->srcu);
4175 kvm_release_page_dirty(apic->vapic_page);
4176 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4177 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4180 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4184 if (!kvm_x86_ops->update_cr8_intercept)
4187 if (!vcpu->arch.apic)
4190 if (!vcpu->arch.apic->vapic_addr)
4191 max_irr = kvm_lapic_find_highest_irr(vcpu);
4198 tpr = kvm_lapic_get_cr8(vcpu);
4200 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4203 static void inject_pending_event(struct kvm_vcpu *vcpu)
4205 /* try to reinject previous events if any */
4206 if (vcpu->arch.exception.pending) {
4207 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4208 vcpu->arch.exception.has_error_code,
4209 vcpu->arch.exception.error_code);
4213 if (vcpu->arch.nmi_injected) {
4214 kvm_x86_ops->set_nmi(vcpu);
4218 if (vcpu->arch.interrupt.pending) {
4219 kvm_x86_ops->set_irq(vcpu);
4223 /* try to inject new event if pending */
4224 if (vcpu->arch.nmi_pending) {
4225 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4226 vcpu->arch.nmi_pending = false;
4227 vcpu->arch.nmi_injected = true;
4228 kvm_x86_ops->set_nmi(vcpu);
4230 } else if (kvm_cpu_has_interrupt(vcpu)) {
4231 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4232 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4234 kvm_x86_ops->set_irq(vcpu);
4239 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4242 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4243 vcpu->run->request_interrupt_window;
4246 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4247 kvm_mmu_unload(vcpu);
4249 r = kvm_mmu_reload(vcpu);
4253 if (vcpu->requests) {
4254 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4255 __kvm_migrate_timers(vcpu);
4256 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4257 kvm_write_guest_time(vcpu);
4258 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4259 kvm_mmu_sync_roots(vcpu);
4260 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4261 kvm_x86_ops->tlb_flush(vcpu);
4262 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4264 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4268 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4269 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4273 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4274 vcpu->fpu_active = 0;
4275 kvm_x86_ops->fpu_deactivate(vcpu);
4281 kvm_x86_ops->prepare_guest_switch(vcpu);
4282 if (vcpu->fpu_active)
4283 kvm_load_guest_fpu(vcpu);
4285 local_irq_disable();
4287 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4288 smp_mb__after_clear_bit();
4290 if (vcpu->requests || need_resched() || signal_pending(current)) {
4291 set_bit(KVM_REQ_KICK, &vcpu->requests);
4298 inject_pending_event(vcpu);
4300 /* enable NMI/IRQ window open exits if needed */
4301 if (vcpu->arch.nmi_pending)
4302 kvm_x86_ops->enable_nmi_window(vcpu);
4303 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4304 kvm_x86_ops->enable_irq_window(vcpu);
4306 if (kvm_lapic_enabled(vcpu)) {
4307 update_cr8_intercept(vcpu);
4308 kvm_lapic_sync_to_vapic(vcpu);
4311 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4315 if (unlikely(vcpu->arch.switch_db_regs)) {
4317 set_debugreg(vcpu->arch.eff_db[0], 0);
4318 set_debugreg(vcpu->arch.eff_db[1], 1);
4319 set_debugreg(vcpu->arch.eff_db[2], 2);
4320 set_debugreg(vcpu->arch.eff_db[3], 3);
4323 trace_kvm_entry(vcpu->vcpu_id);
4324 kvm_x86_ops->run(vcpu);
4327 * If the guest has used debug registers, at least dr7
4328 * will be disabled while returning to the host.
4329 * If we don't have active breakpoints in the host, we don't
4330 * care about the messed up debug address registers. But if
4331 * we have some of them active, restore the old state.
4333 if (hw_breakpoint_active())
4334 hw_breakpoint_restore();
4336 set_bit(KVM_REQ_KICK, &vcpu->requests);
4342 * We must have an instruction between local_irq_enable() and
4343 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4344 * the interrupt shadow. The stat.exits increment will do nicely.
4345 * But we need to prevent reordering, hence this barrier():
4353 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4356 * Profile KVM exit RIPs:
4358 if (unlikely(prof_on == KVM_PROFILING)) {
4359 unsigned long rip = kvm_rip_read(vcpu);
4360 profile_hit(KVM_PROFILING, (void *)rip);
4364 kvm_lapic_sync_from_vapic(vcpu);
4366 r = kvm_x86_ops->handle_exit(vcpu);
4372 static int __vcpu_run(struct kvm_vcpu *vcpu)
4375 struct kvm *kvm = vcpu->kvm;
4377 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4378 pr_debug("vcpu %d received sipi with vector # %x\n",
4379 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4380 kvm_lapic_reset(vcpu);
4381 r = kvm_arch_vcpu_reset(vcpu);
4384 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4387 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4392 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4393 r = vcpu_enter_guest(vcpu);
4395 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4396 kvm_vcpu_block(vcpu);
4397 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4398 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4400 switch(vcpu->arch.mp_state) {
4401 case KVM_MP_STATE_HALTED:
4402 vcpu->arch.mp_state =
4403 KVM_MP_STATE_RUNNABLE;
4404 case KVM_MP_STATE_RUNNABLE:
4406 case KVM_MP_STATE_SIPI_RECEIVED:
4417 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4418 if (kvm_cpu_has_pending_timer(vcpu))
4419 kvm_inject_pending_timer_irqs(vcpu);
4421 if (dm_request_for_irq_injection(vcpu)) {
4423 vcpu->run->exit_reason = KVM_EXIT_INTR;
4424 ++vcpu->stat.request_irq_exits;
4426 if (signal_pending(current)) {
4428 vcpu->run->exit_reason = KVM_EXIT_INTR;
4429 ++vcpu->stat.signal_exits;
4431 if (need_resched()) {
4432 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4434 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4438 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4439 post_kvm_run_save(vcpu);
4446 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4453 if (vcpu->sigset_active)
4454 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4456 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4457 kvm_vcpu_block(vcpu);
4458 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4463 /* re-sync apic's tpr */
4464 if (!irqchip_in_kernel(vcpu->kvm))
4465 kvm_set_cr8(vcpu, kvm_run->cr8);
4467 if (vcpu->arch.pio.cur_count) {
4468 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4469 r = complete_pio(vcpu);
4470 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4474 if (vcpu->mmio_needed) {
4475 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4476 vcpu->mmio_read_completed = 1;
4477 vcpu->mmio_needed = 0;
4479 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4480 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4481 EMULTYPE_NO_DECODE);
4482 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4483 if (r == EMULATE_DO_MMIO) {
4485 * Read-modify-write. Back to userspace.
4491 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4492 kvm_register_write(vcpu, VCPU_REGS_RAX,
4493 kvm_run->hypercall.ret);
4495 r = __vcpu_run(vcpu);
4498 if (vcpu->sigset_active)
4499 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4505 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4509 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4510 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4511 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4512 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4513 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4514 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4515 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4516 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4517 #ifdef CONFIG_X86_64
4518 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4519 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4520 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4521 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4522 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4523 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4524 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4525 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4528 regs->rip = kvm_rip_read(vcpu);
4529 regs->rflags = kvm_get_rflags(vcpu);
4536 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4540 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4541 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4542 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4543 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4544 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4545 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4546 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4547 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4548 #ifdef CONFIG_X86_64
4549 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4550 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4551 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4552 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4553 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4554 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4555 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4556 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4559 kvm_rip_write(vcpu, regs->rip);
4560 kvm_set_rflags(vcpu, regs->rflags);
4562 vcpu->arch.exception.pending = false;
4569 void kvm_get_segment(struct kvm_vcpu *vcpu,
4570 struct kvm_segment *var, int seg)
4572 kvm_x86_ops->get_segment(vcpu, var, seg);
4575 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4577 struct kvm_segment cs;
4579 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4583 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4585 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4586 struct kvm_sregs *sregs)
4588 struct descriptor_table dt;
4592 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4593 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4594 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4595 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4596 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4597 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4599 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4600 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4602 kvm_x86_ops->get_idt(vcpu, &dt);
4603 sregs->idt.limit = dt.limit;
4604 sregs->idt.base = dt.base;
4605 kvm_x86_ops->get_gdt(vcpu, &dt);
4606 sregs->gdt.limit = dt.limit;
4607 sregs->gdt.base = dt.base;
4609 sregs->cr0 = kvm_read_cr0(vcpu);
4610 sregs->cr2 = vcpu->arch.cr2;
4611 sregs->cr3 = vcpu->arch.cr3;
4612 sregs->cr4 = kvm_read_cr4(vcpu);
4613 sregs->cr8 = kvm_get_cr8(vcpu);
4614 sregs->efer = vcpu->arch.efer;
4615 sregs->apic_base = kvm_get_apic_base(vcpu);
4617 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4619 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4620 set_bit(vcpu->arch.interrupt.nr,
4621 (unsigned long *)sregs->interrupt_bitmap);
4628 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4629 struct kvm_mp_state *mp_state)
4632 mp_state->mp_state = vcpu->arch.mp_state;
4637 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4638 struct kvm_mp_state *mp_state)
4641 vcpu->arch.mp_state = mp_state->mp_state;
4646 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4647 struct kvm_segment *var, int seg)
4649 kvm_x86_ops->set_segment(vcpu, var, seg);
4652 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4653 struct kvm_segment *kvm_desct)
4655 kvm_desct->base = get_desc_base(seg_desc);
4656 kvm_desct->limit = get_desc_limit(seg_desc);
4658 kvm_desct->limit <<= 12;
4659 kvm_desct->limit |= 0xfff;
4661 kvm_desct->selector = selector;
4662 kvm_desct->type = seg_desc->type;
4663 kvm_desct->present = seg_desc->p;
4664 kvm_desct->dpl = seg_desc->dpl;
4665 kvm_desct->db = seg_desc->d;
4666 kvm_desct->s = seg_desc->s;
4667 kvm_desct->l = seg_desc->l;
4668 kvm_desct->g = seg_desc->g;
4669 kvm_desct->avl = seg_desc->avl;
4671 kvm_desct->unusable = 1;
4673 kvm_desct->unusable = 0;
4674 kvm_desct->padding = 0;
4677 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4679 struct descriptor_table *dtable)
4681 if (selector & 1 << 2) {
4682 struct kvm_segment kvm_seg;
4684 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4686 if (kvm_seg.unusable)
4689 dtable->limit = kvm_seg.limit;
4690 dtable->base = kvm_seg.base;
4693 kvm_x86_ops->get_gdt(vcpu, dtable);
4696 /* allowed just for 8 bytes segments */
4697 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4698 struct desc_struct *seg_desc)
4700 struct descriptor_table dtable;
4701 u16 index = selector >> 3;
4706 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4708 if (dtable.limit < index * 8 + 7) {
4709 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4710 return X86EMUL_PROPAGATE_FAULT;
4712 addr = dtable.base + index * 8;
4713 ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc),
4715 if (ret == X86EMUL_PROPAGATE_FAULT)
4716 kvm_inject_page_fault(vcpu, addr, err);
4721 /* allowed just for 8 bytes segments */
4722 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4723 struct desc_struct *seg_desc)
4725 struct descriptor_table dtable;
4726 u16 index = selector >> 3;
4728 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4730 if (dtable.limit < index * 8 + 7)
4732 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
4735 static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
4736 struct desc_struct *seg_desc)
4738 u32 base_addr = get_desc_base(seg_desc);
4740 return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
4743 static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
4744 struct desc_struct *seg_desc)
4746 u32 base_addr = get_desc_base(seg_desc);
4748 return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
4751 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4753 struct kvm_segment kvm_seg;
4755 kvm_get_segment(vcpu, &kvm_seg, seg);
4756 return kvm_seg.selector;
4759 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4761 struct kvm_segment segvar = {
4762 .base = selector << 4,
4764 .selector = selector,
4775 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4776 return X86EMUL_CONTINUE;
4779 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4781 return (seg != VCPU_SREG_LDTR) &&
4782 (seg != VCPU_SREG_TR) &&
4783 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4786 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
4788 struct kvm_segment kvm_seg;
4789 struct desc_struct seg_desc;
4791 unsigned err_vec = GP_VECTOR;
4793 bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
4796 if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu))
4797 return kvm_load_realmode_segment(vcpu, selector, seg);
4799 /* NULL selector is not valid for TR, CS and SS */
4800 if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
4804 /* TR should be in GDT only */
4805 if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
4808 ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
4812 seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
4814 if (null_selector) { /* for NULL selector skip all following checks */
4815 kvm_seg.unusable = 1;
4819 err_code = selector & 0xfffc;
4820 err_vec = GP_VECTOR;
4822 /* can't load system descriptor into segment selecor */
4823 if (seg <= VCPU_SREG_GS && !kvm_seg.s)
4826 if (!kvm_seg.present) {
4827 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
4833 cpl = kvm_x86_ops->get_cpl(vcpu);
4838 * segment is not a writable data segment or segment
4839 * selector's RPL != CPL or segment selector's RPL != CPL
4841 if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
4845 if (!(kvm_seg.type & 8))
4848 if (kvm_seg.type & 4) {
4854 if (rpl > cpl || dpl != cpl)
4857 /* CS(RPL) <- CPL */
4858 selector = (selector & 0xfffc) | cpl;
4861 if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
4864 case VCPU_SREG_LDTR:
4865 if (kvm_seg.s || kvm_seg.type != 2)
4868 default: /* DS, ES, FS, or GS */
4870 * segment is not a data or readable code segment or
4871 * ((segment is a data or nonconforming code segment)
4872 * and (both RPL and CPL > DPL))
4874 if ((kvm_seg.type & 0xa) == 0x8 ||
4875 (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
4880 if (!kvm_seg.unusable && kvm_seg.s) {
4881 /* mark segment as accessed */
4884 save_guest_segment_descriptor(vcpu, selector, &seg_desc);
4887 kvm_set_segment(vcpu, &kvm_seg, seg);
4888 return X86EMUL_CONTINUE;
4890 kvm_queue_exception_e(vcpu, err_vec, err_code);
4891 return X86EMUL_PROPAGATE_FAULT;
4894 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4895 struct tss_segment_32 *tss)
4897 tss->cr3 = vcpu->arch.cr3;
4898 tss->eip = kvm_rip_read(vcpu);
4899 tss->eflags = kvm_get_rflags(vcpu);
4900 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4901 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4902 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4903 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4904 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4905 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4906 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4907 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4908 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4909 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4910 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4911 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4912 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4913 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4914 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4917 static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
4919 struct kvm_segment kvm_seg;
4920 kvm_get_segment(vcpu, &kvm_seg, seg);
4921 kvm_seg.selector = sel;
4922 kvm_set_segment(vcpu, &kvm_seg, seg);
4925 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4926 struct tss_segment_32 *tss)
4928 kvm_set_cr3(vcpu, tss->cr3);
4930 kvm_rip_write(vcpu, tss->eip);
4931 kvm_set_rflags(vcpu, tss->eflags | 2);
4933 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4934 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4935 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4936 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4937 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4938 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4939 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4940 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4943 * SDM says that segment selectors are loaded before segment
4946 kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
4947 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
4948 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
4949 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
4950 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
4951 kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
4952 kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
4955 * Now load segment descriptors. If fault happenes at this stage
4956 * it is handled in a context of new task
4958 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
4961 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
4964 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
4967 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
4970 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
4973 if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
4976 if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
4981 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4982 struct tss_segment_16 *tss)
4984 tss->ip = kvm_rip_read(vcpu);
4985 tss->flag = kvm_get_rflags(vcpu);
4986 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4987 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4988 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4989 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4990 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4991 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4992 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4993 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4995 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4996 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4997 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4998 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4999 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
5002 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
5003 struct tss_segment_16 *tss)
5005 kvm_rip_write(vcpu, tss->ip);
5006 kvm_set_rflags(vcpu, tss->flag | 2);
5007 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
5008 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
5009 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
5010 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
5011 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
5012 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
5013 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
5014 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
5017 * SDM says that segment selectors are loaded before segment
5020 kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
5021 kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
5022 kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
5023 kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
5024 kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
5027 * Now load segment descriptors. If fault happenes at this stage
5028 * it is handled in a context of new task
5030 if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
5033 if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
5036 if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
5039 if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
5042 if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
5047 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
5048 u16 old_tss_sel, u32 old_tss_base,
5049 struct desc_struct *nseg_desc)
5051 struct tss_segment_16 tss_segment_16;
5054 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5055 sizeof tss_segment_16))
5058 save_state_to_tss16(vcpu, &tss_segment_16);
5060 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
5061 sizeof tss_segment_16))
5064 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5065 &tss_segment_16, sizeof tss_segment_16))
5068 if (old_tss_sel != 0xffff) {
5069 tss_segment_16.prev_task_link = old_tss_sel;
5071 if (kvm_write_guest(vcpu->kvm,
5072 get_tss_base_addr_write(vcpu, nseg_desc),
5073 &tss_segment_16.prev_task_link,
5074 sizeof tss_segment_16.prev_task_link))
5078 if (load_state_from_tss16(vcpu, &tss_segment_16))
5086 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
5087 u16 old_tss_sel, u32 old_tss_base,
5088 struct desc_struct *nseg_desc)
5090 struct tss_segment_32 tss_segment_32;
5093 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5094 sizeof tss_segment_32))
5097 save_state_to_tss32(vcpu, &tss_segment_32);
5099 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
5100 sizeof tss_segment_32))
5103 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
5104 &tss_segment_32, sizeof tss_segment_32))
5107 if (old_tss_sel != 0xffff) {
5108 tss_segment_32.prev_task_link = old_tss_sel;
5110 if (kvm_write_guest(vcpu->kvm,
5111 get_tss_base_addr_write(vcpu, nseg_desc),
5112 &tss_segment_32.prev_task_link,
5113 sizeof tss_segment_32.prev_task_link))
5117 if (load_state_from_tss32(vcpu, &tss_segment_32))
5125 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
5127 struct kvm_segment tr_seg;
5128 struct desc_struct cseg_desc;
5129 struct desc_struct nseg_desc;
5131 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
5132 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
5135 old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
5137 /* FIXME: Handle errors. Failure to read either TSS or their
5138 * descriptors should generate a pagefault.
5140 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
5143 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
5146 if (reason != TASK_SWITCH_IRET) {
5149 cpl = kvm_x86_ops->get_cpl(vcpu);
5150 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
5151 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
5156 desc_limit = get_desc_limit(&nseg_desc);
5158 ((desc_limit < 0x67 && (nseg_desc.type & 8)) ||
5159 desc_limit < 0x2b)) {
5160 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
5164 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
5165 cseg_desc.type &= ~(1 << 1); //clear the B flag
5166 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
5169 if (reason == TASK_SWITCH_IRET) {
5170 u32 eflags = kvm_get_rflags(vcpu);
5171 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
5174 /* set back link to prev task only if NT bit is set in eflags
5175 note that old_tss_sel is not used afetr this point */
5176 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
5177 old_tss_sel = 0xffff;
5179 if (nseg_desc.type & 8)
5180 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
5181 old_tss_base, &nseg_desc);
5183 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
5184 old_tss_base, &nseg_desc);
5186 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
5187 u32 eflags = kvm_get_rflags(vcpu);
5188 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
5191 if (reason != TASK_SWITCH_IRET) {
5192 nseg_desc.type |= (1 << 1);
5193 save_guest_segment_descriptor(vcpu, tss_selector,
5197 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
5198 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
5200 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
5204 EXPORT_SYMBOL_GPL(kvm_task_switch);
5206 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5207 struct kvm_sregs *sregs)
5209 int mmu_reset_needed = 0;
5210 int pending_vec, max_bits;
5211 struct descriptor_table dt;
5215 dt.limit = sregs->idt.limit;
5216 dt.base = sregs->idt.base;
5217 kvm_x86_ops->set_idt(vcpu, &dt);
5218 dt.limit = sregs->gdt.limit;
5219 dt.base = sregs->gdt.base;
5220 kvm_x86_ops->set_gdt(vcpu, &dt);
5222 vcpu->arch.cr2 = sregs->cr2;
5223 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5224 vcpu->arch.cr3 = sregs->cr3;
5226 kvm_set_cr8(vcpu, sregs->cr8);
5228 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5229 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5230 kvm_set_apic_base(vcpu, sregs->apic_base);
5232 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5233 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5234 vcpu->arch.cr0 = sregs->cr0;
5236 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5237 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5238 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5239 load_pdptrs(vcpu, vcpu->arch.cr3);
5240 mmu_reset_needed = 1;
5243 if (mmu_reset_needed)
5244 kvm_mmu_reset_context(vcpu);
5246 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5247 pending_vec = find_first_bit(
5248 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5249 if (pending_vec < max_bits) {
5250 kvm_queue_interrupt(vcpu, pending_vec, false);
5251 pr_debug("Set back pending irq %d\n", pending_vec);
5252 if (irqchip_in_kernel(vcpu->kvm))
5253 kvm_pic_clear_isr_ack(vcpu->kvm);
5256 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5257 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5258 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5259 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5260 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5261 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5263 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5264 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5266 update_cr8_intercept(vcpu);
5268 /* Older userspace won't unhalt the vcpu on reset. */
5269 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5270 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5272 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5279 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5280 struct kvm_guest_debug *dbg)
5282 unsigned long rflags;
5287 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5289 if (vcpu->arch.exception.pending)
5291 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5292 kvm_queue_exception(vcpu, DB_VECTOR);
5294 kvm_queue_exception(vcpu, BP_VECTOR);
5298 * Read rflags as long as potentially injected trace flags are still
5301 rflags = kvm_get_rflags(vcpu);
5303 vcpu->guest_debug = dbg->control;
5304 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5305 vcpu->guest_debug = 0;
5307 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5308 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5309 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5310 vcpu->arch.switch_db_regs =
5311 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5313 for (i = 0; i < KVM_NR_DB_REGS; i++)
5314 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5315 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5318 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5319 vcpu->arch.singlestep_cs =
5320 get_segment_selector(vcpu, VCPU_SREG_CS);
5321 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
5325 * Trigger an rflags update that will inject or remove the trace
5328 kvm_set_rflags(vcpu, rflags);
5330 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5341 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5342 * we have asm/x86/processor.h
5353 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5354 #ifdef CONFIG_X86_64
5355 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5357 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5362 * Translate a guest virtual address to a guest physical address.
5364 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5365 struct kvm_translation *tr)
5367 unsigned long vaddr = tr->linear_address;
5372 idx = srcu_read_lock(&vcpu->kvm->srcu);
5373 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5374 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5375 tr->physical_address = gpa;
5376 tr->valid = gpa != UNMAPPED_GVA;
5384 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5386 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5390 memcpy(fpu->fpr, fxsave->st_space, 128);
5391 fpu->fcw = fxsave->cwd;
5392 fpu->fsw = fxsave->swd;
5393 fpu->ftwx = fxsave->twd;
5394 fpu->last_opcode = fxsave->fop;
5395 fpu->last_ip = fxsave->rip;
5396 fpu->last_dp = fxsave->rdp;
5397 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5404 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5406 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5410 memcpy(fxsave->st_space, fpu->fpr, 128);
5411 fxsave->cwd = fpu->fcw;
5412 fxsave->swd = fpu->fsw;
5413 fxsave->twd = fpu->ftwx;
5414 fxsave->fop = fpu->last_opcode;
5415 fxsave->rip = fpu->last_ip;
5416 fxsave->rdp = fpu->last_dp;
5417 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5424 void fx_init(struct kvm_vcpu *vcpu)
5426 unsigned after_mxcsr_mask;
5429 * Touch the fpu the first time in non atomic context as if
5430 * this is the first fpu instruction the exception handler
5431 * will fire before the instruction returns and it'll have to
5432 * allocate ram with GFP_KERNEL.
5435 kvm_fx_save(&vcpu->arch.host_fx_image);
5437 /* Initialize guest FPU by resetting ours and saving into guest's */
5439 kvm_fx_save(&vcpu->arch.host_fx_image);
5441 kvm_fx_save(&vcpu->arch.guest_fx_image);
5442 kvm_fx_restore(&vcpu->arch.host_fx_image);
5445 vcpu->arch.cr0 |= X86_CR0_ET;
5446 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5447 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5448 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5449 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5451 EXPORT_SYMBOL_GPL(fx_init);
5453 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5455 if (vcpu->guest_fpu_loaded)
5458 vcpu->guest_fpu_loaded = 1;
5459 kvm_fx_save(&vcpu->arch.host_fx_image);
5460 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5464 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5466 if (!vcpu->guest_fpu_loaded)
5469 vcpu->guest_fpu_loaded = 0;
5470 kvm_fx_save(&vcpu->arch.guest_fx_image);
5471 kvm_fx_restore(&vcpu->arch.host_fx_image);
5472 ++vcpu->stat.fpu_reload;
5473 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5477 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5479 if (vcpu->arch.time_page) {
5480 kvm_release_page_dirty(vcpu->arch.time_page);
5481 vcpu->arch.time_page = NULL;
5484 kvm_x86_ops->vcpu_free(vcpu);
5487 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5490 return kvm_x86_ops->vcpu_create(kvm, id);
5493 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5497 /* We do fxsave: this must be aligned. */
5498 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5500 vcpu->arch.mtrr_state.have_fixed = 1;
5502 r = kvm_arch_vcpu_reset(vcpu);
5504 r = kvm_mmu_setup(vcpu);
5511 kvm_x86_ops->vcpu_free(vcpu);
5515 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5518 kvm_mmu_unload(vcpu);
5521 kvm_x86_ops->vcpu_free(vcpu);
5524 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5526 vcpu->arch.nmi_pending = false;
5527 vcpu->arch.nmi_injected = false;
5529 vcpu->arch.switch_db_regs = 0;
5530 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5531 vcpu->arch.dr6 = DR6_FIXED_1;
5532 vcpu->arch.dr7 = DR7_FIXED_1;
5534 return kvm_x86_ops->vcpu_reset(vcpu);
5537 int kvm_arch_hardware_enable(void *garbage)
5540 * Since this may be called from a hotplug notifcation,
5541 * we can't get the CPU frequency directly.
5543 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5544 int cpu = raw_smp_processor_id();
5545 per_cpu(cpu_tsc_khz, cpu) = 0;
5548 kvm_shared_msr_cpu_online();
5550 return kvm_x86_ops->hardware_enable(garbage);
5553 void kvm_arch_hardware_disable(void *garbage)
5555 kvm_x86_ops->hardware_disable(garbage);
5556 drop_user_return_notifiers(garbage);
5559 int kvm_arch_hardware_setup(void)
5561 return kvm_x86_ops->hardware_setup();
5564 void kvm_arch_hardware_unsetup(void)
5566 kvm_x86_ops->hardware_unsetup();
5569 void kvm_arch_check_processor_compat(void *rtn)
5571 kvm_x86_ops->check_processor_compatibility(rtn);
5574 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5580 BUG_ON(vcpu->kvm == NULL);
5583 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5584 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5585 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5587 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5589 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5594 vcpu->arch.pio_data = page_address(page);
5596 r = kvm_mmu_create(vcpu);
5598 goto fail_free_pio_data;
5600 if (irqchip_in_kernel(kvm)) {
5601 r = kvm_create_lapic(vcpu);
5603 goto fail_mmu_destroy;
5606 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5608 if (!vcpu->arch.mce_banks) {
5610 goto fail_free_lapic;
5612 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5616 kvm_free_lapic(vcpu);
5618 kvm_mmu_destroy(vcpu);
5620 free_page((unsigned long)vcpu->arch.pio_data);
5625 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5629 kfree(vcpu->arch.mce_banks);
5630 kvm_free_lapic(vcpu);
5631 idx = srcu_read_lock(&vcpu->kvm->srcu);
5632 kvm_mmu_destroy(vcpu);
5633 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5634 free_page((unsigned long)vcpu->arch.pio_data);
5637 struct kvm *kvm_arch_create_vm(void)
5639 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5642 return ERR_PTR(-ENOMEM);
5644 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5645 if (!kvm->arch.aliases) {
5647 return ERR_PTR(-ENOMEM);
5650 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5651 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5653 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5654 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5656 rdtscll(kvm->arch.vm_init_tsc);
5661 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5664 kvm_mmu_unload(vcpu);
5668 static void kvm_free_vcpus(struct kvm *kvm)
5671 struct kvm_vcpu *vcpu;
5674 * Unpin any mmu pages first.
5676 kvm_for_each_vcpu(i, vcpu, kvm)
5677 kvm_unload_vcpu_mmu(vcpu);
5678 kvm_for_each_vcpu(i, vcpu, kvm)
5679 kvm_arch_vcpu_free(vcpu);
5681 mutex_lock(&kvm->lock);
5682 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5683 kvm->vcpus[i] = NULL;
5685 atomic_set(&kvm->online_vcpus, 0);
5686 mutex_unlock(&kvm->lock);
5689 void kvm_arch_sync_events(struct kvm *kvm)
5691 kvm_free_all_assigned_devices(kvm);
5694 void kvm_arch_destroy_vm(struct kvm *kvm)
5696 kvm_iommu_unmap_guest(kvm);
5698 kfree(kvm->arch.vpic);
5699 kfree(kvm->arch.vioapic);
5700 kvm_free_vcpus(kvm);
5701 kvm_free_physmem(kvm);
5702 if (kvm->arch.apic_access_page)
5703 put_page(kvm->arch.apic_access_page);
5704 if (kvm->arch.ept_identity_pagetable)
5705 put_page(kvm->arch.ept_identity_pagetable);
5706 cleanup_srcu_struct(&kvm->srcu);
5707 kfree(kvm->arch.aliases);
5711 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5712 struct kvm_memory_slot *memslot,
5713 struct kvm_memory_slot old,
5714 struct kvm_userspace_memory_region *mem,
5717 int npages = memslot->npages;
5719 /*To keep backward compatibility with older userspace,
5720 *x86 needs to hanlde !user_alloc case.
5723 if (npages && !old.rmap) {
5724 unsigned long userspace_addr;
5726 down_write(¤t->mm->mmap_sem);
5727 userspace_addr = do_mmap(NULL, 0,
5729 PROT_READ | PROT_WRITE,
5730 MAP_PRIVATE | MAP_ANONYMOUS,
5732 up_write(¤t->mm->mmap_sem);
5734 if (IS_ERR((void *)userspace_addr))
5735 return PTR_ERR((void *)userspace_addr);
5737 memslot->userspace_addr = userspace_addr;
5745 void kvm_arch_commit_memory_region(struct kvm *kvm,
5746 struct kvm_userspace_memory_region *mem,
5747 struct kvm_memory_slot old,
5751 int npages = mem->memory_size >> PAGE_SHIFT;
5753 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5756 down_write(¤t->mm->mmap_sem);
5757 ret = do_munmap(current->mm, old.userspace_addr,
5758 old.npages * PAGE_SIZE);
5759 up_write(¤t->mm->mmap_sem);
5762 "kvm_vm_ioctl_set_memory_region: "
5763 "failed to munmap memory\n");
5766 spin_lock(&kvm->mmu_lock);
5767 if (!kvm->arch.n_requested_mmu_pages) {
5768 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5769 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5772 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5773 spin_unlock(&kvm->mmu_lock);
5776 void kvm_arch_flush_shadow(struct kvm *kvm)
5778 kvm_mmu_zap_all(kvm);
5779 kvm_reload_remote_mmus(kvm);
5782 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5784 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5785 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5786 || vcpu->arch.nmi_pending ||
5787 (kvm_arch_interrupt_allowed(vcpu) &&
5788 kvm_cpu_has_interrupt(vcpu));
5791 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5794 int cpu = vcpu->cpu;
5796 if (waitqueue_active(&vcpu->wq)) {
5797 wake_up_interruptible(&vcpu->wq);
5798 ++vcpu->stat.halt_wakeup;
5802 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5803 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5804 smp_send_reschedule(cpu);
5808 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5810 return kvm_x86_ops->interrupt_allowed(vcpu);
5813 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5815 unsigned long rflags;
5817 rflags = kvm_x86_ops->get_rflags(vcpu);
5818 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5819 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5822 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5824 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5826 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5827 vcpu->arch.singlestep_cs ==
5828 get_segment_selector(vcpu, VCPU_SREG_CS) &&
5829 vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5830 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5831 kvm_x86_ops->set_rflags(vcpu, rflags);
5833 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);