Merge branch 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[pandora-kernel.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
60
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS                                               \
63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS                                               \
67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
70                           | X86_CR4_OSXSAVE \
71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
72
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
74
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
77
78 /* EFER defaults:
79  * - enable syscall per default because its emulated by KVM
80  * - enable LME and LMA per default on 64 bit KVM
81  */
82 #ifdef CONFIG_X86_64
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
84 #else
85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
86 #endif
87
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
90
91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
93                                     struct kvm_cpuid_entry2 __user *entries);
94
95 struct kvm_x86_ops *kvm_x86_ops;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
97
98 int ignore_msrs = 0;
99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
100
101 #define KVM_NR_SHARED_MSRS 16
102
103 struct kvm_shared_msrs_global {
104         int nr;
105         u32 msrs[KVM_NR_SHARED_MSRS];
106 };
107
108 struct kvm_shared_msrs {
109         struct user_return_notifier urn;
110         bool registered;
111         struct kvm_shared_msr_values {
112                 u64 host;
113                 u64 curr;
114         } values[KVM_NR_SHARED_MSRS];
115 };
116
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
119
120 struct kvm_stats_debugfs_item debugfs_entries[] = {
121         { "pf_fixed", VCPU_STAT(pf_fixed) },
122         { "pf_guest", VCPU_STAT(pf_guest) },
123         { "tlb_flush", VCPU_STAT(tlb_flush) },
124         { "invlpg", VCPU_STAT(invlpg) },
125         { "exits", VCPU_STAT(exits) },
126         { "io_exits", VCPU_STAT(io_exits) },
127         { "mmio_exits", VCPU_STAT(mmio_exits) },
128         { "signal_exits", VCPU_STAT(signal_exits) },
129         { "irq_window", VCPU_STAT(irq_window_exits) },
130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
131         { "halt_exits", VCPU_STAT(halt_exits) },
132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
133         { "hypercalls", VCPU_STAT(hypercalls) },
134         { "request_irq", VCPU_STAT(request_irq_exits) },
135         { "irq_exits", VCPU_STAT(irq_exits) },
136         { "host_state_reload", VCPU_STAT(host_state_reload) },
137         { "efer_reload", VCPU_STAT(efer_reload) },
138         { "fpu_reload", VCPU_STAT(fpu_reload) },
139         { "insn_emulation", VCPU_STAT(insn_emulation) },
140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
141         { "irq_injections", VCPU_STAT(irq_injections) },
142         { "nmi_injections", VCPU_STAT(nmi_injections) },
143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
147         { "mmu_flooded", VM_STAT(mmu_flooded) },
148         { "mmu_recycled", VM_STAT(mmu_recycled) },
149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
150         { "mmu_unsync", VM_STAT(mmu_unsync) },
151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
152         { "largepages", VM_STAT(lpages) },
153         { NULL }
154 };
155
156 u64 __read_mostly host_xcr0;
157
158 static inline u32 bit(int bitno)
159 {
160         return 1 << (bitno & 31);
161 }
162
163 static void kvm_on_user_return(struct user_return_notifier *urn)
164 {
165         unsigned slot;
166         struct kvm_shared_msrs *locals
167                 = container_of(urn, struct kvm_shared_msrs, urn);
168         struct kvm_shared_msr_values *values;
169
170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
171                 values = &locals->values[slot];
172                 if (values->host != values->curr) {
173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
174                         values->curr = values->host;
175                 }
176         }
177         locals->registered = false;
178         user_return_notifier_unregister(urn);
179 }
180
181 static void shared_msr_update(unsigned slot, u32 msr)
182 {
183         struct kvm_shared_msrs *smsr;
184         u64 value;
185
186         smsr = &__get_cpu_var(shared_msrs);
187         /* only read, and nobody should modify it at this time,
188          * so don't need lock */
189         if (slot >= shared_msrs_global.nr) {
190                 printk(KERN_ERR "kvm: invalid MSR slot!");
191                 return;
192         }
193         rdmsrl_safe(msr, &value);
194         smsr->values[slot].host = value;
195         smsr->values[slot].curr = value;
196 }
197
198 void kvm_define_shared_msr(unsigned slot, u32 msr)
199 {
200         if (slot >= shared_msrs_global.nr)
201                 shared_msrs_global.nr = slot + 1;
202         shared_msrs_global.msrs[slot] = msr;
203         /* we need ensured the shared_msr_global have been updated */
204         smp_wmb();
205 }
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
207
208 static void kvm_shared_msr_cpu_online(void)
209 {
210         unsigned i;
211
212         for (i = 0; i < shared_msrs_global.nr; ++i)
213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
214 }
215
216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
217 {
218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
219
220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
221                 return;
222         smsr->values[slot].curr = value;
223         wrmsrl(shared_msrs_global.msrs[slot], value);
224         if (!smsr->registered) {
225                 smsr->urn.on_user_return = kvm_on_user_return;
226                 user_return_notifier_register(&smsr->urn);
227                 smsr->registered = true;
228         }
229 }
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
231
232 static void drop_user_return_notifiers(void *ignore)
233 {
234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
235
236         if (smsr->registered)
237                 kvm_on_user_return(&smsr->urn);
238 }
239
240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
241 {
242         if (irqchip_in_kernel(vcpu->kvm))
243                 return vcpu->arch.apic_base;
244         else
245                 return vcpu->arch.apic_base;
246 }
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
248
249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
250 {
251         /* TODO: reserve bits check */
252         if (irqchip_in_kernel(vcpu->kvm))
253                 kvm_lapic_set_base(vcpu, data);
254         else
255                 vcpu->arch.apic_base = data;
256 }
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
258
259 #define EXCPT_BENIGN            0
260 #define EXCPT_CONTRIBUTORY      1
261 #define EXCPT_PF                2
262
263 static int exception_class(int vector)
264 {
265         switch (vector) {
266         case PF_VECTOR:
267                 return EXCPT_PF;
268         case DE_VECTOR:
269         case TS_VECTOR:
270         case NP_VECTOR:
271         case SS_VECTOR:
272         case GP_VECTOR:
273                 return EXCPT_CONTRIBUTORY;
274         default:
275                 break;
276         }
277         return EXCPT_BENIGN;
278 }
279
280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
281                 unsigned nr, bool has_error, u32 error_code,
282                 bool reinject)
283 {
284         u32 prev_nr;
285         int class1, class2;
286
287         kvm_make_request(KVM_REQ_EVENT, vcpu);
288
289         if (!vcpu->arch.exception.pending) {
290         queue:
291                 vcpu->arch.exception.pending = true;
292                 vcpu->arch.exception.has_error_code = has_error;
293                 vcpu->arch.exception.nr = nr;
294                 vcpu->arch.exception.error_code = error_code;
295                 vcpu->arch.exception.reinject = reinject;
296                 return;
297         }
298
299         /* to check exception */
300         prev_nr = vcpu->arch.exception.nr;
301         if (prev_nr == DF_VECTOR) {
302                 /* triple fault -> shutdown */
303                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
304                 return;
305         }
306         class1 = exception_class(prev_nr);
307         class2 = exception_class(nr);
308         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
309                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
310                 /* generate double fault per SDM Table 5-5 */
311                 vcpu->arch.exception.pending = true;
312                 vcpu->arch.exception.has_error_code = true;
313                 vcpu->arch.exception.nr = DF_VECTOR;
314                 vcpu->arch.exception.error_code = 0;
315         } else
316                 /* replace previous exception with a new one in a hope
317                    that instruction re-execution will regenerate lost
318                    exception */
319                 goto queue;
320 }
321
322 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
323 {
324         kvm_multiple_exception(vcpu, nr, false, 0, false);
325 }
326 EXPORT_SYMBOL_GPL(kvm_queue_exception);
327
328 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
329 {
330         kvm_multiple_exception(vcpu, nr, false, 0, true);
331 }
332 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
333
334 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
335 {
336         unsigned error_code = vcpu->arch.fault.error_code;
337
338         ++vcpu->stat.pf_guest;
339         vcpu->arch.cr2 = vcpu->arch.fault.address;
340         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
341 }
342
343 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
344 {
345         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
346                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
347         else
348                 vcpu->arch.mmu.inject_page_fault(vcpu);
349
350         vcpu->arch.fault.nested = false;
351 }
352
353 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
354 {
355         kvm_make_request(KVM_REQ_EVENT, vcpu);
356         vcpu->arch.nmi_pending = 1;
357 }
358 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
359
360 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
361 {
362         kvm_multiple_exception(vcpu, nr, true, error_code, false);
363 }
364 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
365
366 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
367 {
368         kvm_multiple_exception(vcpu, nr, true, error_code, true);
369 }
370 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
371
372 /*
373  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
374  * a #GP and return false.
375  */
376 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
377 {
378         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
379                 return true;
380         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
381         return false;
382 }
383 EXPORT_SYMBOL_GPL(kvm_require_cpl);
384
385 /*
386  * This function will be used to read from the physical memory of the currently
387  * running guest. The difference to kvm_read_guest_page is that this function
388  * can read from guest physical or from the guest's guest physical memory.
389  */
390 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
391                             gfn_t ngfn, void *data, int offset, int len,
392                             u32 access)
393 {
394         gfn_t real_gfn;
395         gpa_t ngpa;
396
397         ngpa     = gfn_to_gpa(ngfn);
398         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
399         if (real_gfn == UNMAPPED_GVA)
400                 return -EFAULT;
401
402         real_gfn = gpa_to_gfn(real_gfn);
403
404         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
405 }
406 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
407
408 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
409                                void *data, int offset, int len, u32 access)
410 {
411         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
412                                        data, offset, len, access);
413 }
414
415 /*
416  * Load the pae pdptrs.  Return true is they are all valid.
417  */
418 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
419 {
420         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
421         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
422         int i;
423         int ret;
424         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
425
426         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
427                                       offset * sizeof(u64), sizeof(pdpte),
428                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
429         if (ret < 0) {
430                 ret = 0;
431                 goto out;
432         }
433         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
434                 if (is_present_gpte(pdpte[i]) &&
435                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
436                         ret = 0;
437                         goto out;
438                 }
439         }
440         ret = 1;
441
442         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
443         __set_bit(VCPU_EXREG_PDPTR,
444                   (unsigned long *)&vcpu->arch.regs_avail);
445         __set_bit(VCPU_EXREG_PDPTR,
446                   (unsigned long *)&vcpu->arch.regs_dirty);
447 out:
448
449         return ret;
450 }
451 EXPORT_SYMBOL_GPL(load_pdptrs);
452
453 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
454 {
455         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
456         bool changed = true;
457         int offset;
458         gfn_t gfn;
459         int r;
460
461         if (is_long_mode(vcpu) || !is_pae(vcpu))
462                 return false;
463
464         if (!test_bit(VCPU_EXREG_PDPTR,
465                       (unsigned long *)&vcpu->arch.regs_avail))
466                 return true;
467
468         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
469         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
470         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
471                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
472         if (r < 0)
473                 goto out;
474         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
475 out:
476
477         return changed;
478 }
479
480 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
481 {
482         unsigned long old_cr0 = kvm_read_cr0(vcpu);
483         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
484                                     X86_CR0_CD | X86_CR0_NW;
485
486         cr0 |= X86_CR0_ET;
487
488 #ifdef CONFIG_X86_64
489         if (cr0 & 0xffffffff00000000UL)
490                 return 1;
491 #endif
492
493         cr0 &= ~CR0_RESERVED_BITS;
494
495         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
496                 return 1;
497
498         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
499                 return 1;
500
501         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
502 #ifdef CONFIG_X86_64
503                 if ((vcpu->arch.efer & EFER_LME)) {
504                         int cs_db, cs_l;
505
506                         if (!is_pae(vcpu))
507                                 return 1;
508                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
509                         if (cs_l)
510                                 return 1;
511                 } else
512 #endif
513                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
514                                                  vcpu->arch.cr3))
515                         return 1;
516         }
517
518         kvm_x86_ops->set_cr0(vcpu, cr0);
519
520         if ((cr0 ^ old_cr0) & update_bits)
521                 kvm_mmu_reset_context(vcpu);
522         return 0;
523 }
524 EXPORT_SYMBOL_GPL(kvm_set_cr0);
525
526 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
527 {
528         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
529 }
530 EXPORT_SYMBOL_GPL(kvm_lmsw);
531
532 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
533 {
534         u64 xcr0;
535
536         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
537         if (index != XCR_XFEATURE_ENABLED_MASK)
538                 return 1;
539         xcr0 = xcr;
540         if (kvm_x86_ops->get_cpl(vcpu) != 0)
541                 return 1;
542         if (!(xcr0 & XSTATE_FP))
543                 return 1;
544         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
545                 return 1;
546         if (xcr0 & ~host_xcr0)
547                 return 1;
548         vcpu->arch.xcr0 = xcr0;
549         vcpu->guest_xcr0_loaded = 0;
550         return 0;
551 }
552
553 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
554 {
555         if (__kvm_set_xcr(vcpu, index, xcr)) {
556                 kvm_inject_gp(vcpu, 0);
557                 return 1;
558         }
559         return 0;
560 }
561 EXPORT_SYMBOL_GPL(kvm_set_xcr);
562
563 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
564 {
565         struct kvm_cpuid_entry2 *best;
566
567         best = kvm_find_cpuid_entry(vcpu, 1, 0);
568         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
569 }
570
571 static void update_cpuid(struct kvm_vcpu *vcpu)
572 {
573         struct kvm_cpuid_entry2 *best;
574
575         best = kvm_find_cpuid_entry(vcpu, 1, 0);
576         if (!best)
577                 return;
578
579         /* Update OSXSAVE bit */
580         if (cpu_has_xsave && best->function == 0x1) {
581                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
582                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
583                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
584         }
585 }
586
587 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
588 {
589         unsigned long old_cr4 = kvm_read_cr4(vcpu);
590         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
591
592         if (cr4 & CR4_RESERVED_BITS)
593                 return 1;
594
595         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
596                 return 1;
597
598         if (is_long_mode(vcpu)) {
599                 if (!(cr4 & X86_CR4_PAE))
600                         return 1;
601         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
602                    && ((cr4 ^ old_cr4) & pdptr_bits)
603                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
604                 return 1;
605
606         if (cr4 & X86_CR4_VMXE)
607                 return 1;
608
609         kvm_x86_ops->set_cr4(vcpu, cr4);
610
611         if ((cr4 ^ old_cr4) & pdptr_bits)
612                 kvm_mmu_reset_context(vcpu);
613
614         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
615                 update_cpuid(vcpu);
616
617         return 0;
618 }
619 EXPORT_SYMBOL_GPL(kvm_set_cr4);
620
621 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
622 {
623         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
624                 kvm_mmu_sync_roots(vcpu);
625                 kvm_mmu_flush_tlb(vcpu);
626                 return 0;
627         }
628
629         if (is_long_mode(vcpu)) {
630                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
631                         return 1;
632         } else {
633                 if (is_pae(vcpu)) {
634                         if (cr3 & CR3_PAE_RESERVED_BITS)
635                                 return 1;
636                         if (is_paging(vcpu) &&
637                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
638                                 return 1;
639                 }
640                 /*
641                  * We don't check reserved bits in nonpae mode, because
642                  * this isn't enforced, and VMware depends on this.
643                  */
644         }
645
646         /*
647          * Does the new cr3 value map to physical memory? (Note, we
648          * catch an invalid cr3 even in real-mode, because it would
649          * cause trouble later on when we turn on paging anyway.)
650          *
651          * A real CPU would silently accept an invalid cr3 and would
652          * attempt to use it - with largely undefined (and often hard
653          * to debug) behavior on the guest side.
654          */
655         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
656                 return 1;
657         vcpu->arch.cr3 = cr3;
658         vcpu->arch.mmu.new_cr3(vcpu);
659         return 0;
660 }
661 EXPORT_SYMBOL_GPL(kvm_set_cr3);
662
663 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
664 {
665         if (cr8 & CR8_RESERVED_BITS)
666                 return 1;
667         if (irqchip_in_kernel(vcpu->kvm))
668                 kvm_lapic_set_tpr(vcpu, cr8);
669         else
670                 vcpu->arch.cr8 = cr8;
671         return 0;
672 }
673
674 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
675 {
676         if (__kvm_set_cr8(vcpu, cr8))
677                 kvm_inject_gp(vcpu, 0);
678 }
679 EXPORT_SYMBOL_GPL(kvm_set_cr8);
680
681 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
682 {
683         if (irqchip_in_kernel(vcpu->kvm))
684                 return kvm_lapic_get_cr8(vcpu);
685         else
686                 return vcpu->arch.cr8;
687 }
688 EXPORT_SYMBOL_GPL(kvm_get_cr8);
689
690 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
691 {
692         switch (dr) {
693         case 0 ... 3:
694                 vcpu->arch.db[dr] = val;
695                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
696                         vcpu->arch.eff_db[dr] = val;
697                 break;
698         case 4:
699                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
700                         return 1; /* #UD */
701                 /* fall through */
702         case 6:
703                 if (val & 0xffffffff00000000ULL)
704                         return -1; /* #GP */
705                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
706                 break;
707         case 5:
708                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
709                         return 1; /* #UD */
710                 /* fall through */
711         default: /* 7 */
712                 if (val & 0xffffffff00000000ULL)
713                         return -1; /* #GP */
714                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
715                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
716                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
717                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
718                 }
719                 break;
720         }
721
722         return 0;
723 }
724
725 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
726 {
727         int res;
728
729         res = __kvm_set_dr(vcpu, dr, val);
730         if (res > 0)
731                 kvm_queue_exception(vcpu, UD_VECTOR);
732         else if (res < 0)
733                 kvm_inject_gp(vcpu, 0);
734
735         return res;
736 }
737 EXPORT_SYMBOL_GPL(kvm_set_dr);
738
739 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
740 {
741         switch (dr) {
742         case 0 ... 3:
743                 *val = vcpu->arch.db[dr];
744                 break;
745         case 4:
746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
747                         return 1;
748                 /* fall through */
749         case 6:
750                 *val = vcpu->arch.dr6;
751                 break;
752         case 5:
753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
754                         return 1;
755                 /* fall through */
756         default: /* 7 */
757                 *val = vcpu->arch.dr7;
758                 break;
759         }
760
761         return 0;
762 }
763
764 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
765 {
766         if (_kvm_get_dr(vcpu, dr, val)) {
767                 kvm_queue_exception(vcpu, UD_VECTOR);
768                 return 1;
769         }
770         return 0;
771 }
772 EXPORT_SYMBOL_GPL(kvm_get_dr);
773
774 /*
775  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
776  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
777  *
778  * This list is modified at module load time to reflect the
779  * capabilities of the host cpu. This capabilities test skips MSRs that are
780  * kvm-specific. Those are put in the beginning of the list.
781  */
782
783 #define KVM_SAVE_MSRS_BEGIN     7
784 static u32 msrs_to_save[] = {
785         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
786         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
787         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
788         HV_X64_MSR_APIC_ASSIST_PAGE,
789         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
790         MSR_STAR,
791 #ifdef CONFIG_X86_64
792         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
793 #endif
794         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
795 };
796
797 static unsigned num_msrs_to_save;
798
799 static u32 emulated_msrs[] = {
800         MSR_IA32_MISC_ENABLE,
801         MSR_IA32_MCG_STATUS,
802         MSR_IA32_MCG_CTL,
803 };
804
805 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
806 {
807         u64 old_efer = vcpu->arch.efer;
808
809         if (efer & efer_reserved_bits)
810                 return 1;
811
812         if (is_paging(vcpu)
813             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
814                 return 1;
815
816         if (efer & EFER_FFXSR) {
817                 struct kvm_cpuid_entry2 *feat;
818
819                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
820                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
821                         return 1;
822         }
823
824         if (efer & EFER_SVME) {
825                 struct kvm_cpuid_entry2 *feat;
826
827                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
828                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
829                         return 1;
830         }
831
832         efer &= ~EFER_LMA;
833         efer |= vcpu->arch.efer & EFER_LMA;
834
835         kvm_x86_ops->set_efer(vcpu, efer);
836
837         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
838         kvm_mmu_reset_context(vcpu);
839
840         /* Update reserved bits */
841         if ((efer ^ old_efer) & EFER_NX)
842                 kvm_mmu_reset_context(vcpu);
843
844         return 0;
845 }
846
847 void kvm_enable_efer_bits(u64 mask)
848 {
849        efer_reserved_bits &= ~mask;
850 }
851 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
852
853
854 /*
855  * Writes msr value into into the appropriate "register".
856  * Returns 0 on success, non-0 otherwise.
857  * Assumes vcpu_load() was already called.
858  */
859 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
860 {
861         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
862 }
863
864 /*
865  * Adapt set_msr() to msr_io()'s calling convention
866  */
867 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
868 {
869         return kvm_set_msr(vcpu, index, *data);
870 }
871
872 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
873 {
874         int version;
875         int r;
876         struct pvclock_wall_clock wc;
877         struct timespec boot;
878
879         if (!wall_clock)
880                 return;
881
882         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
883         if (r)
884                 return;
885
886         if (version & 1)
887                 ++version;  /* first time write, random junk */
888
889         ++version;
890
891         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
892
893         /*
894          * The guest calculates current wall clock time by adding
895          * system time (updated by kvm_guest_time_update below) to the
896          * wall clock specified here.  guest system time equals host
897          * system time for us, thus we must fill in host boot time here.
898          */
899         getboottime(&boot);
900
901         wc.sec = boot.tv_sec;
902         wc.nsec = boot.tv_nsec;
903         wc.version = version;
904
905         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
906
907         version++;
908         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
909 }
910
911 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
912 {
913         uint32_t quotient, remainder;
914
915         /* Don't try to replace with do_div(), this one calculates
916          * "(dividend << 32) / divisor" */
917         __asm__ ( "divl %4"
918                   : "=a" (quotient), "=d" (remainder)
919                   : "0" (0), "1" (dividend), "r" (divisor) );
920         return quotient;
921 }
922
923 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
924                                s8 *pshift, u32 *pmultiplier)
925 {
926         uint64_t scaled64;
927         int32_t  shift = 0;
928         uint64_t tps64;
929         uint32_t tps32;
930
931         tps64 = base_khz * 1000LL;
932         scaled64 = scaled_khz * 1000LL;
933         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
934                 tps64 >>= 1;
935                 shift--;
936         }
937
938         tps32 = (uint32_t)tps64;
939         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
940                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
941                         scaled64 >>= 1;
942                 else
943                         tps32 <<= 1;
944                 shift++;
945         }
946
947         *pshift = shift;
948         *pmultiplier = div_frac(scaled64, tps32);
949
950         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
951                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
952 }
953
954 static inline u64 get_kernel_ns(void)
955 {
956         struct timespec ts;
957
958         WARN_ON(preemptible());
959         ktime_get_ts(&ts);
960         monotonic_to_bootbased(&ts);
961         return timespec_to_ns(&ts);
962 }
963
964 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
965 unsigned long max_tsc_khz;
966
967 static inline int kvm_tsc_changes_freq(void)
968 {
969         int cpu = get_cpu();
970         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
971                   cpufreq_quick_get(cpu) != 0;
972         put_cpu();
973         return ret;
974 }
975
976 static inline u64 nsec_to_cycles(u64 nsec)
977 {
978         u64 ret;
979
980         WARN_ON(preemptible());
981         if (kvm_tsc_changes_freq())
982                 printk_once(KERN_WARNING
983                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
984         ret = nsec * __get_cpu_var(cpu_tsc_khz);
985         do_div(ret, USEC_PER_SEC);
986         return ret;
987 }
988
989 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
990 {
991         /* Compute a scale to convert nanoseconds in TSC cycles */
992         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
993                            &kvm->arch.virtual_tsc_shift,
994                            &kvm->arch.virtual_tsc_mult);
995         kvm->arch.virtual_tsc_khz = this_tsc_khz;
996 }
997
998 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
999 {
1000         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1001                                       vcpu->kvm->arch.virtual_tsc_mult,
1002                                       vcpu->kvm->arch.virtual_tsc_shift);
1003         tsc += vcpu->arch.last_tsc_write;
1004         return tsc;
1005 }
1006
1007 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1008 {
1009         struct kvm *kvm = vcpu->kvm;
1010         u64 offset, ns, elapsed;
1011         unsigned long flags;
1012         s64 sdiff;
1013
1014         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1015         offset = data - native_read_tsc();
1016         ns = get_kernel_ns();
1017         elapsed = ns - kvm->arch.last_tsc_nsec;
1018         sdiff = data - kvm->arch.last_tsc_write;
1019         if (sdiff < 0)
1020                 sdiff = -sdiff;
1021
1022         /*
1023          * Special case: close write to TSC within 5 seconds of
1024          * another CPU is interpreted as an attempt to synchronize
1025          * The 5 seconds is to accomodate host load / swapping as
1026          * well as any reset of TSC during the boot process.
1027          *
1028          * In that case, for a reliable TSC, we can match TSC offsets,
1029          * or make a best guest using elapsed value.
1030          */
1031         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1032             elapsed < 5ULL * NSEC_PER_SEC) {
1033                 if (!check_tsc_unstable()) {
1034                         offset = kvm->arch.last_tsc_offset;
1035                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1036                 } else {
1037                         u64 delta = nsec_to_cycles(elapsed);
1038                         offset += delta;
1039                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1040                 }
1041                 ns = kvm->arch.last_tsc_nsec;
1042         }
1043         kvm->arch.last_tsc_nsec = ns;
1044         kvm->arch.last_tsc_write = data;
1045         kvm->arch.last_tsc_offset = offset;
1046         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1047         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1048
1049         /* Reset of TSC must disable overshoot protection below */
1050         vcpu->arch.hv_clock.tsc_timestamp = 0;
1051         vcpu->arch.last_tsc_write = data;
1052         vcpu->arch.last_tsc_nsec = ns;
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1055
1056 static int kvm_guest_time_update(struct kvm_vcpu *v)
1057 {
1058         unsigned long flags;
1059         struct kvm_vcpu_arch *vcpu = &v->arch;
1060         void *shared_kaddr;
1061         unsigned long this_tsc_khz;
1062         s64 kernel_ns, max_kernel_ns;
1063         u64 tsc_timestamp;
1064
1065         /* Keep irq disabled to prevent changes to the clock */
1066         local_irq_save(flags);
1067         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1068         kernel_ns = get_kernel_ns();
1069         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1070
1071         if (unlikely(this_tsc_khz == 0)) {
1072                 local_irq_restore(flags);
1073                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1074                 return 1;
1075         }
1076
1077         /*
1078          * We may have to catch up the TSC to match elapsed wall clock
1079          * time for two reasons, even if kvmclock is used.
1080          *   1) CPU could have been running below the maximum TSC rate
1081          *   2) Broken TSC compensation resets the base at each VCPU
1082          *      entry to avoid unknown leaps of TSC even when running
1083          *      again on the same CPU.  This may cause apparent elapsed
1084          *      time to disappear, and the guest to stand still or run
1085          *      very slowly.
1086          */
1087         if (vcpu->tsc_catchup) {
1088                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1089                 if (tsc > tsc_timestamp) {
1090                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1091                         tsc_timestamp = tsc;
1092                 }
1093         }
1094
1095         local_irq_restore(flags);
1096
1097         if (!vcpu->time_page)
1098                 return 0;
1099
1100         /*
1101          * Time as measured by the TSC may go backwards when resetting the base
1102          * tsc_timestamp.  The reason for this is that the TSC resolution is
1103          * higher than the resolution of the other clock scales.  Thus, many
1104          * possible measurments of the TSC correspond to one measurement of any
1105          * other clock, and so a spread of values is possible.  This is not a
1106          * problem for the computation of the nanosecond clock; with TSC rates
1107          * around 1GHZ, there can only be a few cycles which correspond to one
1108          * nanosecond value, and any path through this code will inevitably
1109          * take longer than that.  However, with the kernel_ns value itself,
1110          * the precision may be much lower, down to HZ granularity.  If the
1111          * first sampling of TSC against kernel_ns ends in the low part of the
1112          * range, and the second in the high end of the range, we can get:
1113          *
1114          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1115          *
1116          * As the sampling errors potentially range in the thousands of cycles,
1117          * it is possible such a time value has already been observed by the
1118          * guest.  To protect against this, we must compute the system time as
1119          * observed by the guest and ensure the new system time is greater.
1120          */
1121         max_kernel_ns = 0;
1122         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1123                 max_kernel_ns = vcpu->last_guest_tsc -
1124                                 vcpu->hv_clock.tsc_timestamp;
1125                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1126                                     vcpu->hv_clock.tsc_to_system_mul,
1127                                     vcpu->hv_clock.tsc_shift);
1128                 max_kernel_ns += vcpu->last_kernel_ns;
1129         }
1130
1131         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1132                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1133                                    &vcpu->hv_clock.tsc_shift,
1134                                    &vcpu->hv_clock.tsc_to_system_mul);
1135                 vcpu->hw_tsc_khz = this_tsc_khz;
1136         }
1137
1138         if (max_kernel_ns > kernel_ns)
1139                 kernel_ns = max_kernel_ns;
1140
1141         /* With all the info we got, fill in the values */
1142         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1143         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1144         vcpu->last_kernel_ns = kernel_ns;
1145         vcpu->last_guest_tsc = tsc_timestamp;
1146         vcpu->hv_clock.flags = 0;
1147
1148         /*
1149          * The interface expects us to write an even number signaling that the
1150          * update is finished. Since the guest won't see the intermediate
1151          * state, we just increase by 2 at the end.
1152          */
1153         vcpu->hv_clock.version += 2;
1154
1155         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1156
1157         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1158                sizeof(vcpu->hv_clock));
1159
1160         kunmap_atomic(shared_kaddr, KM_USER0);
1161
1162         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1163         return 0;
1164 }
1165
1166 static bool msr_mtrr_valid(unsigned msr)
1167 {
1168         switch (msr) {
1169         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1170         case MSR_MTRRfix64K_00000:
1171         case MSR_MTRRfix16K_80000:
1172         case MSR_MTRRfix16K_A0000:
1173         case MSR_MTRRfix4K_C0000:
1174         case MSR_MTRRfix4K_C8000:
1175         case MSR_MTRRfix4K_D0000:
1176         case MSR_MTRRfix4K_D8000:
1177         case MSR_MTRRfix4K_E0000:
1178         case MSR_MTRRfix4K_E8000:
1179         case MSR_MTRRfix4K_F0000:
1180         case MSR_MTRRfix4K_F8000:
1181         case MSR_MTRRdefType:
1182         case MSR_IA32_CR_PAT:
1183                 return true;
1184         case 0x2f8:
1185                 return true;
1186         }
1187         return false;
1188 }
1189
1190 static bool valid_pat_type(unsigned t)
1191 {
1192         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1193 }
1194
1195 static bool valid_mtrr_type(unsigned t)
1196 {
1197         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1198 }
1199
1200 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1201 {
1202         int i;
1203
1204         if (!msr_mtrr_valid(msr))
1205                 return false;
1206
1207         if (msr == MSR_IA32_CR_PAT) {
1208                 for (i = 0; i < 8; i++)
1209                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1210                                 return false;
1211                 return true;
1212         } else if (msr == MSR_MTRRdefType) {
1213                 if (data & ~0xcff)
1214                         return false;
1215                 return valid_mtrr_type(data & 0xff);
1216         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1217                 for (i = 0; i < 8 ; i++)
1218                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1219                                 return false;
1220                 return true;
1221         }
1222
1223         /* variable MTRRs */
1224         return valid_mtrr_type(data & 0xff);
1225 }
1226
1227 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1228 {
1229         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1230
1231         if (!mtrr_valid(vcpu, msr, data))
1232                 return 1;
1233
1234         if (msr == MSR_MTRRdefType) {
1235                 vcpu->arch.mtrr_state.def_type = data;
1236                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1237         } else if (msr == MSR_MTRRfix64K_00000)
1238                 p[0] = data;
1239         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1240                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1241         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1242                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1243         else if (msr == MSR_IA32_CR_PAT)
1244                 vcpu->arch.pat = data;
1245         else {  /* Variable MTRRs */
1246                 int idx, is_mtrr_mask;
1247                 u64 *pt;
1248
1249                 idx = (msr - 0x200) / 2;
1250                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1251                 if (!is_mtrr_mask)
1252                         pt =
1253                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1254                 else
1255                         pt =
1256                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1257                 *pt = data;
1258         }
1259
1260         kvm_mmu_reset_context(vcpu);
1261         return 0;
1262 }
1263
1264 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1265 {
1266         u64 mcg_cap = vcpu->arch.mcg_cap;
1267         unsigned bank_num = mcg_cap & 0xff;
1268
1269         switch (msr) {
1270         case MSR_IA32_MCG_STATUS:
1271                 vcpu->arch.mcg_status = data;
1272                 break;
1273         case MSR_IA32_MCG_CTL:
1274                 if (!(mcg_cap & MCG_CTL_P))
1275                         return 1;
1276                 if (data != 0 && data != ~(u64)0)
1277                         return -1;
1278                 vcpu->arch.mcg_ctl = data;
1279                 break;
1280         default:
1281                 if (msr >= MSR_IA32_MC0_CTL &&
1282                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1283                         u32 offset = msr - MSR_IA32_MC0_CTL;
1284                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1285                          * some Linux kernels though clear bit 10 in bank 4 to
1286                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1287                          * this to avoid an uncatched #GP in the guest
1288                          */
1289                         if ((offset & 0x3) == 0 &&
1290                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1291                                 return -1;
1292                         vcpu->arch.mce_banks[offset] = data;
1293                         break;
1294                 }
1295                 return 1;
1296         }
1297         return 0;
1298 }
1299
1300 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1301 {
1302         struct kvm *kvm = vcpu->kvm;
1303         int lm = is_long_mode(vcpu);
1304         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1305                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1306         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1307                 : kvm->arch.xen_hvm_config.blob_size_32;
1308         u32 page_num = data & ~PAGE_MASK;
1309         u64 page_addr = data & PAGE_MASK;
1310         u8 *page;
1311         int r;
1312
1313         r = -E2BIG;
1314         if (page_num >= blob_size)
1315                 goto out;
1316         r = -ENOMEM;
1317         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1318         if (!page)
1319                 goto out;
1320         r = -EFAULT;
1321         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1322                 goto out_free;
1323         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1324                 goto out_free;
1325         r = 0;
1326 out_free:
1327         kfree(page);
1328 out:
1329         return r;
1330 }
1331
1332 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1333 {
1334         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1335 }
1336
1337 static bool kvm_hv_msr_partition_wide(u32 msr)
1338 {
1339         bool r = false;
1340         switch (msr) {
1341         case HV_X64_MSR_GUEST_OS_ID:
1342         case HV_X64_MSR_HYPERCALL:
1343                 r = true;
1344                 break;
1345         }
1346
1347         return r;
1348 }
1349
1350 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1351 {
1352         struct kvm *kvm = vcpu->kvm;
1353
1354         switch (msr) {
1355         case HV_X64_MSR_GUEST_OS_ID:
1356                 kvm->arch.hv_guest_os_id = data;
1357                 /* setting guest os id to zero disables hypercall page */
1358                 if (!kvm->arch.hv_guest_os_id)
1359                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1360                 break;
1361         case HV_X64_MSR_HYPERCALL: {
1362                 u64 gfn;
1363                 unsigned long addr;
1364                 u8 instructions[4];
1365
1366                 /* if guest os id is not set hypercall should remain disabled */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         break;
1369                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1370                         kvm->arch.hv_hypercall = data;
1371                         break;
1372                 }
1373                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1374                 addr = gfn_to_hva(kvm, gfn);
1375                 if (kvm_is_error_hva(addr))
1376                         return 1;
1377                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1378                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1379                 if (copy_to_user((void __user *)addr, instructions, 4))
1380                         return 1;
1381                 kvm->arch.hv_hypercall = data;
1382                 break;
1383         }
1384         default:
1385                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1386                           "data 0x%llx\n", msr, data);
1387                 return 1;
1388         }
1389         return 0;
1390 }
1391
1392 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1393 {
1394         switch (msr) {
1395         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1396                 unsigned long addr;
1397
1398                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1399                         vcpu->arch.hv_vapic = data;
1400                         break;
1401                 }
1402                 addr = gfn_to_hva(vcpu->kvm, data >>
1403                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1404                 if (kvm_is_error_hva(addr))
1405                         return 1;
1406                 if (clear_user((void __user *)addr, PAGE_SIZE))
1407                         return 1;
1408                 vcpu->arch.hv_vapic = data;
1409                 break;
1410         }
1411         case HV_X64_MSR_EOI:
1412                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1413         case HV_X64_MSR_ICR:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1415         case HV_X64_MSR_TPR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422
1423         return 0;
1424 }
1425
1426 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1427 {
1428         switch (msr) {
1429         case MSR_EFER:
1430                 return set_efer(vcpu, data);
1431         case MSR_K7_HWCR:
1432                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1433                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1434                 if (data != 0) {
1435                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1436                                 data);
1437                         return 1;
1438                 }
1439                 break;
1440         case MSR_FAM10H_MMIO_CONF_BASE:
1441                 if (data != 0) {
1442                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1443                                 "0x%llx\n", data);
1444                         return 1;
1445                 }
1446                 break;
1447         case MSR_AMD64_NB_CFG:
1448                 break;
1449         case MSR_IA32_DEBUGCTLMSR:
1450                 if (!data) {
1451                         /* We support the non-activated case already */
1452                         break;
1453                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1454                         /* Values other than LBR and BTF are vendor-specific,
1455                            thus reserved and should throw a #GP */
1456                         return 1;
1457                 }
1458                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1459                         __func__, data);
1460                 break;
1461         case MSR_IA32_UCODE_REV:
1462         case MSR_IA32_UCODE_WRITE:
1463         case MSR_VM_HSAVE_PA:
1464         case MSR_AMD64_PATCH_LOADER:
1465                 break;
1466         case 0x200 ... 0x2ff:
1467                 return set_msr_mtrr(vcpu, msr, data);
1468         case MSR_IA32_APICBASE:
1469                 kvm_set_apic_base(vcpu, data);
1470                 break;
1471         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1472                 return kvm_x2apic_msr_write(vcpu, msr, data);
1473         case MSR_IA32_MISC_ENABLE:
1474                 vcpu->arch.ia32_misc_enable_msr = data;
1475                 break;
1476         case MSR_KVM_WALL_CLOCK_NEW:
1477         case MSR_KVM_WALL_CLOCK:
1478                 vcpu->kvm->arch.wall_clock = data;
1479                 kvm_write_wall_clock(vcpu->kvm, data);
1480                 break;
1481         case MSR_KVM_SYSTEM_TIME_NEW:
1482         case MSR_KVM_SYSTEM_TIME: {
1483                 if (vcpu->arch.time_page) {
1484                         kvm_release_page_dirty(vcpu->arch.time_page);
1485                         vcpu->arch.time_page = NULL;
1486                 }
1487
1488                 vcpu->arch.time = data;
1489                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1490
1491                 /* we verify if the enable bit is set... */
1492                 if (!(data & 1))
1493                         break;
1494
1495                 /* ...but clean it before doing the actual write */
1496                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1497
1498                 vcpu->arch.time_page =
1499                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1500
1501                 if (is_error_page(vcpu->arch.time_page)) {
1502                         kvm_release_page_clean(vcpu->arch.time_page);
1503                         vcpu->arch.time_page = NULL;
1504                 }
1505                 break;
1506         }
1507         case MSR_IA32_MCG_CTL:
1508         case MSR_IA32_MCG_STATUS:
1509         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1510                 return set_msr_mce(vcpu, msr, data);
1511
1512         /* Performance counters are not protected by a CPUID bit,
1513          * so we should check all of them in the generic path for the sake of
1514          * cross vendor migration.
1515          * Writing a zero into the event select MSRs disables them,
1516          * which we perfectly emulate ;-). Any other value should be at least
1517          * reported, some guests depend on them.
1518          */
1519         case MSR_P6_EVNTSEL0:
1520         case MSR_P6_EVNTSEL1:
1521         case MSR_K7_EVNTSEL0:
1522         case MSR_K7_EVNTSEL1:
1523         case MSR_K7_EVNTSEL2:
1524         case MSR_K7_EVNTSEL3:
1525                 if (data != 0)
1526                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1527                                 "0x%x data 0x%llx\n", msr, data);
1528                 break;
1529         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1530          * so we ignore writes to make it happy.
1531          */
1532         case MSR_P6_PERFCTR0:
1533         case MSR_P6_PERFCTR1:
1534         case MSR_K7_PERFCTR0:
1535         case MSR_K7_PERFCTR1:
1536         case MSR_K7_PERFCTR2:
1537         case MSR_K7_PERFCTR3:
1538                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1539                         "0x%x data 0x%llx\n", msr, data);
1540                 break;
1541         case MSR_K7_CLK_CTL:
1542                 /*
1543                  * Ignore all writes to this no longer documented MSR.
1544                  * Writes are only relevant for old K7 processors,
1545                  * all pre-dating SVM, but a recommended workaround from
1546                  * AMD for these chips. It is possible to speicify the
1547                  * affected processor models on the command line, hence
1548                  * the need to ignore the workaround.
1549                  */
1550                 break;
1551         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1552                 if (kvm_hv_msr_partition_wide(msr)) {
1553                         int r;
1554                         mutex_lock(&vcpu->kvm->lock);
1555                         r = set_msr_hyperv_pw(vcpu, msr, data);
1556                         mutex_unlock(&vcpu->kvm->lock);
1557                         return r;
1558                 } else
1559                         return set_msr_hyperv(vcpu, msr, data);
1560                 break;
1561         default:
1562                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1563                         return xen_hvm_config(vcpu, data);
1564                 if (!ignore_msrs) {
1565                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1566                                 msr, data);
1567                         return 1;
1568                 } else {
1569                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1570                                 msr, data);
1571                         break;
1572                 }
1573         }
1574         return 0;
1575 }
1576 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1577
1578
1579 /*
1580  * Reads an msr value (of 'msr_index') into 'pdata'.
1581  * Returns 0 on success, non-0 otherwise.
1582  * Assumes vcpu_load() was already called.
1583  */
1584 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1585 {
1586         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1587 }
1588
1589 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1590 {
1591         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1592
1593         if (!msr_mtrr_valid(msr))
1594                 return 1;
1595
1596         if (msr == MSR_MTRRdefType)
1597                 *pdata = vcpu->arch.mtrr_state.def_type +
1598                          (vcpu->arch.mtrr_state.enabled << 10);
1599         else if (msr == MSR_MTRRfix64K_00000)
1600                 *pdata = p[0];
1601         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1602                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1603         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1604                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1605         else if (msr == MSR_IA32_CR_PAT)
1606                 *pdata = vcpu->arch.pat;
1607         else {  /* Variable MTRRs */
1608                 int idx, is_mtrr_mask;
1609                 u64 *pt;
1610
1611                 idx = (msr - 0x200) / 2;
1612                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1613                 if (!is_mtrr_mask)
1614                         pt =
1615                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1616                 else
1617                         pt =
1618                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1619                 *pdata = *pt;
1620         }
1621
1622         return 0;
1623 }
1624
1625 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1626 {
1627         u64 data;
1628         u64 mcg_cap = vcpu->arch.mcg_cap;
1629         unsigned bank_num = mcg_cap & 0xff;
1630
1631         switch (msr) {
1632         case MSR_IA32_P5_MC_ADDR:
1633         case MSR_IA32_P5_MC_TYPE:
1634                 data = 0;
1635                 break;
1636         case MSR_IA32_MCG_CAP:
1637                 data = vcpu->arch.mcg_cap;
1638                 break;
1639         case MSR_IA32_MCG_CTL:
1640                 if (!(mcg_cap & MCG_CTL_P))
1641                         return 1;
1642                 data = vcpu->arch.mcg_ctl;
1643                 break;
1644         case MSR_IA32_MCG_STATUS:
1645                 data = vcpu->arch.mcg_status;
1646                 break;
1647         default:
1648                 if (msr >= MSR_IA32_MC0_CTL &&
1649                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1650                         u32 offset = msr - MSR_IA32_MC0_CTL;
1651                         data = vcpu->arch.mce_banks[offset];
1652                         break;
1653                 }
1654                 return 1;
1655         }
1656         *pdata = data;
1657         return 0;
1658 }
1659
1660 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1661 {
1662         u64 data = 0;
1663         struct kvm *kvm = vcpu->kvm;
1664
1665         switch (msr) {
1666         case HV_X64_MSR_GUEST_OS_ID:
1667                 data = kvm->arch.hv_guest_os_id;
1668                 break;
1669         case HV_X64_MSR_HYPERCALL:
1670                 data = kvm->arch.hv_hypercall;
1671                 break;
1672         default:
1673                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1674                 return 1;
1675         }
1676
1677         *pdata = data;
1678         return 0;
1679 }
1680
1681 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1682 {
1683         u64 data = 0;
1684
1685         switch (msr) {
1686         case HV_X64_MSR_VP_INDEX: {
1687                 int r;
1688                 struct kvm_vcpu *v;
1689                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1690                         if (v == vcpu)
1691                                 data = r;
1692                 break;
1693         }
1694         case HV_X64_MSR_EOI:
1695                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1696         case HV_X64_MSR_ICR:
1697                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1698         case HV_X64_MSR_TPR:
1699                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1700         default:
1701                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1702                 return 1;
1703         }
1704         *pdata = data;
1705         return 0;
1706 }
1707
1708 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1709 {
1710         u64 data;
1711
1712         switch (msr) {
1713         case MSR_IA32_PLATFORM_ID:
1714         case MSR_IA32_UCODE_REV:
1715         case MSR_IA32_EBL_CR_POWERON:
1716         case MSR_IA32_DEBUGCTLMSR:
1717         case MSR_IA32_LASTBRANCHFROMIP:
1718         case MSR_IA32_LASTBRANCHTOIP:
1719         case MSR_IA32_LASTINTFROMIP:
1720         case MSR_IA32_LASTINTTOIP:
1721         case MSR_K8_SYSCFG:
1722         case MSR_K7_HWCR:
1723         case MSR_VM_HSAVE_PA:
1724         case MSR_P6_PERFCTR0:
1725         case MSR_P6_PERFCTR1:
1726         case MSR_P6_EVNTSEL0:
1727         case MSR_P6_EVNTSEL1:
1728         case MSR_K7_EVNTSEL0:
1729         case MSR_K7_PERFCTR0:
1730         case MSR_K8_INT_PENDING_MSG:
1731         case MSR_AMD64_NB_CFG:
1732         case MSR_FAM10H_MMIO_CONF_BASE:
1733                 data = 0;
1734                 break;
1735         case MSR_MTRRcap:
1736                 data = 0x500 | KVM_NR_VAR_MTRR;
1737                 break;
1738         case 0x200 ... 0x2ff:
1739                 return get_msr_mtrr(vcpu, msr, pdata);
1740         case 0xcd: /* fsb frequency */
1741                 data = 3;
1742                 break;
1743                 /*
1744                  * MSR_EBC_FREQUENCY_ID
1745                  * Conservative value valid for even the basic CPU models.
1746                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1747                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1748                  * and 266MHz for model 3, or 4. Set Core Clock
1749                  * Frequency to System Bus Frequency Ratio to 1 (bits
1750                  * 31:24) even though these are only valid for CPU
1751                  * models > 2, however guests may end up dividing or
1752                  * multiplying by zero otherwise.
1753                  */
1754         case MSR_EBC_FREQUENCY_ID:
1755                 data = 1 << 24;
1756                 break;
1757         case MSR_IA32_APICBASE:
1758                 data = kvm_get_apic_base(vcpu);
1759                 break;
1760         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1761                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1762                 break;
1763         case MSR_IA32_MISC_ENABLE:
1764                 data = vcpu->arch.ia32_misc_enable_msr;
1765                 break;
1766         case MSR_IA32_PERF_STATUS:
1767                 /* TSC increment by tick */
1768                 data = 1000ULL;
1769                 /* CPU multiplier */
1770                 data |= (((uint64_t)4ULL) << 40);
1771                 break;
1772         case MSR_EFER:
1773                 data = vcpu->arch.efer;
1774                 break;
1775         case MSR_KVM_WALL_CLOCK:
1776         case MSR_KVM_WALL_CLOCK_NEW:
1777                 data = vcpu->kvm->arch.wall_clock;
1778                 break;
1779         case MSR_KVM_SYSTEM_TIME:
1780         case MSR_KVM_SYSTEM_TIME_NEW:
1781                 data = vcpu->arch.time;
1782                 break;
1783         case MSR_IA32_P5_MC_ADDR:
1784         case MSR_IA32_P5_MC_TYPE:
1785         case MSR_IA32_MCG_CAP:
1786         case MSR_IA32_MCG_CTL:
1787         case MSR_IA32_MCG_STATUS:
1788         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1789                 return get_msr_mce(vcpu, msr, pdata);
1790         case MSR_K7_CLK_CTL:
1791                 /*
1792                  * Provide expected ramp-up count for K7. All other
1793                  * are set to zero, indicating minimum divisors for
1794                  * every field.
1795                  *
1796                  * This prevents guest kernels on AMD host with CPU
1797                  * type 6, model 8 and higher from exploding due to
1798                  * the rdmsr failing.
1799                  */
1800                 data = 0x20000000;
1801                 break;
1802         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1803                 if (kvm_hv_msr_partition_wide(msr)) {
1804                         int r;
1805                         mutex_lock(&vcpu->kvm->lock);
1806                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1807                         mutex_unlock(&vcpu->kvm->lock);
1808                         return r;
1809                 } else
1810                         return get_msr_hyperv(vcpu, msr, pdata);
1811                 break;
1812         default:
1813                 if (!ignore_msrs) {
1814                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1815                         return 1;
1816                 } else {
1817                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1818                         data = 0;
1819                 }
1820                 break;
1821         }
1822         *pdata = data;
1823         return 0;
1824 }
1825 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1826
1827 /*
1828  * Read or write a bunch of msrs. All parameters are kernel addresses.
1829  *
1830  * @return number of msrs set successfully.
1831  */
1832 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1833                     struct kvm_msr_entry *entries,
1834                     int (*do_msr)(struct kvm_vcpu *vcpu,
1835                                   unsigned index, u64 *data))
1836 {
1837         int i, idx;
1838
1839         idx = srcu_read_lock(&vcpu->kvm->srcu);
1840         for (i = 0; i < msrs->nmsrs; ++i)
1841                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1842                         break;
1843         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1844
1845         return i;
1846 }
1847
1848 /*
1849  * Read or write a bunch of msrs. Parameters are user addresses.
1850  *
1851  * @return number of msrs set successfully.
1852  */
1853 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1854                   int (*do_msr)(struct kvm_vcpu *vcpu,
1855                                 unsigned index, u64 *data),
1856                   int writeback)
1857 {
1858         struct kvm_msrs msrs;
1859         struct kvm_msr_entry *entries;
1860         int r, n;
1861         unsigned size;
1862
1863         r = -EFAULT;
1864         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1865                 goto out;
1866
1867         r = -E2BIG;
1868         if (msrs.nmsrs >= MAX_IO_MSRS)
1869                 goto out;
1870
1871         r = -ENOMEM;
1872         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1873         entries = kmalloc(size, GFP_KERNEL);
1874         if (!entries)
1875                 goto out;
1876
1877         r = -EFAULT;
1878         if (copy_from_user(entries, user_msrs->entries, size))
1879                 goto out_free;
1880
1881         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1882         if (r < 0)
1883                 goto out_free;
1884
1885         r = -EFAULT;
1886         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1887                 goto out_free;
1888
1889         r = n;
1890
1891 out_free:
1892         kfree(entries);
1893 out:
1894         return r;
1895 }
1896
1897 int kvm_dev_ioctl_check_extension(long ext)
1898 {
1899         int r;
1900
1901         switch (ext) {
1902         case KVM_CAP_IRQCHIP:
1903         case KVM_CAP_HLT:
1904         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1905         case KVM_CAP_SET_TSS_ADDR:
1906         case KVM_CAP_EXT_CPUID:
1907         case KVM_CAP_CLOCKSOURCE:
1908         case KVM_CAP_PIT:
1909         case KVM_CAP_NOP_IO_DELAY:
1910         case KVM_CAP_MP_STATE:
1911         case KVM_CAP_SYNC_MMU:
1912         case KVM_CAP_REINJECT_CONTROL:
1913         case KVM_CAP_IRQ_INJECT_STATUS:
1914         case KVM_CAP_ASSIGN_DEV_IRQ:
1915         case KVM_CAP_IRQFD:
1916         case KVM_CAP_IOEVENTFD:
1917         case KVM_CAP_PIT2:
1918         case KVM_CAP_PIT_STATE2:
1919         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1920         case KVM_CAP_XEN_HVM:
1921         case KVM_CAP_ADJUST_CLOCK:
1922         case KVM_CAP_VCPU_EVENTS:
1923         case KVM_CAP_HYPERV:
1924         case KVM_CAP_HYPERV_VAPIC:
1925         case KVM_CAP_HYPERV_SPIN:
1926         case KVM_CAP_PCI_SEGMENT:
1927         case KVM_CAP_DEBUGREGS:
1928         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1929         case KVM_CAP_XSAVE:
1930                 r = 1;
1931                 break;
1932         case KVM_CAP_COALESCED_MMIO:
1933                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1934                 break;
1935         case KVM_CAP_VAPIC:
1936                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1937                 break;
1938         case KVM_CAP_NR_VCPUS:
1939                 r = KVM_MAX_VCPUS;
1940                 break;
1941         case KVM_CAP_NR_MEMSLOTS:
1942                 r = KVM_MEMORY_SLOTS;
1943                 break;
1944         case KVM_CAP_PV_MMU:    /* obsolete */
1945                 r = 0;
1946                 break;
1947         case KVM_CAP_IOMMU:
1948                 r = iommu_found();
1949                 break;
1950         case KVM_CAP_MCE:
1951                 r = KVM_MAX_MCE_BANKS;
1952                 break;
1953         case KVM_CAP_XCRS:
1954                 r = cpu_has_xsave;
1955                 break;
1956         default:
1957                 r = 0;
1958                 break;
1959         }
1960         return r;
1961
1962 }
1963
1964 long kvm_arch_dev_ioctl(struct file *filp,
1965                         unsigned int ioctl, unsigned long arg)
1966 {
1967         void __user *argp = (void __user *)arg;
1968         long r;
1969
1970         switch (ioctl) {
1971         case KVM_GET_MSR_INDEX_LIST: {
1972                 struct kvm_msr_list __user *user_msr_list = argp;
1973                 struct kvm_msr_list msr_list;
1974                 unsigned n;
1975
1976                 r = -EFAULT;
1977                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1978                         goto out;
1979                 n = msr_list.nmsrs;
1980                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1981                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1982                         goto out;
1983                 r = -E2BIG;
1984                 if (n < msr_list.nmsrs)
1985                         goto out;
1986                 r = -EFAULT;
1987                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1988                                  num_msrs_to_save * sizeof(u32)))
1989                         goto out;
1990                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1991                                  &emulated_msrs,
1992                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1993                         goto out;
1994                 r = 0;
1995                 break;
1996         }
1997         case KVM_GET_SUPPORTED_CPUID: {
1998                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1999                 struct kvm_cpuid2 cpuid;
2000
2001                 r = -EFAULT;
2002                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2003                         goto out;
2004                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2005                                                       cpuid_arg->entries);
2006                 if (r)
2007                         goto out;
2008
2009                 r = -EFAULT;
2010                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2011                         goto out;
2012                 r = 0;
2013                 break;
2014         }
2015         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2016                 u64 mce_cap;
2017
2018                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2019                 r = -EFAULT;
2020                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2021                         goto out;
2022                 r = 0;
2023                 break;
2024         }
2025         default:
2026                 r = -EINVAL;
2027         }
2028 out:
2029         return r;
2030 }
2031
2032 static void wbinvd_ipi(void *garbage)
2033 {
2034         wbinvd();
2035 }
2036
2037 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2038 {
2039         return vcpu->kvm->arch.iommu_domain &&
2040                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2041 }
2042
2043 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2044 {
2045         /* Address WBINVD may be executed by guest */
2046         if (need_emulate_wbinvd(vcpu)) {
2047                 if (kvm_x86_ops->has_wbinvd_exit())
2048                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2049                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2050                         smp_call_function_single(vcpu->cpu,
2051                                         wbinvd_ipi, NULL, 1);
2052         }
2053
2054         kvm_x86_ops->vcpu_load(vcpu, cpu);
2055         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2056                 /* Make sure TSC doesn't go backwards */
2057                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2058                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2059                 if (tsc_delta < 0)
2060                         mark_tsc_unstable("KVM discovered backwards TSC");
2061                 if (check_tsc_unstable()) {
2062                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2063                         vcpu->arch.tsc_catchup = 1;
2064                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2065                 }
2066                 if (vcpu->cpu != cpu)
2067                         kvm_migrate_timers(vcpu);
2068                 vcpu->cpu = cpu;
2069         }
2070 }
2071
2072 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2073 {
2074         kvm_x86_ops->vcpu_put(vcpu);
2075         kvm_put_guest_fpu(vcpu);
2076         vcpu->arch.last_host_tsc = native_read_tsc();
2077 }
2078
2079 static int is_efer_nx(void)
2080 {
2081         unsigned long long efer = 0;
2082
2083         rdmsrl_safe(MSR_EFER, &efer);
2084         return efer & EFER_NX;
2085 }
2086
2087 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2088 {
2089         int i;
2090         struct kvm_cpuid_entry2 *e, *entry;
2091
2092         entry = NULL;
2093         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2094                 e = &vcpu->arch.cpuid_entries[i];
2095                 if (e->function == 0x80000001) {
2096                         entry = e;
2097                         break;
2098                 }
2099         }
2100         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2101                 entry->edx &= ~(1 << 20);
2102                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2103         }
2104 }
2105
2106 /* when an old userspace process fills a new kernel module */
2107 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2108                                     struct kvm_cpuid *cpuid,
2109                                     struct kvm_cpuid_entry __user *entries)
2110 {
2111         int r, i;
2112         struct kvm_cpuid_entry *cpuid_entries;
2113
2114         r = -E2BIG;
2115         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2116                 goto out;
2117         r = -ENOMEM;
2118         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2119         if (!cpuid_entries)
2120                 goto out;
2121         r = -EFAULT;
2122         if (copy_from_user(cpuid_entries, entries,
2123                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2124                 goto out_free;
2125         for (i = 0; i < cpuid->nent; i++) {
2126                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2127                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2128                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2129                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2130                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2131                 vcpu->arch.cpuid_entries[i].index = 0;
2132                 vcpu->arch.cpuid_entries[i].flags = 0;
2133                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2134                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2135                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2136         }
2137         vcpu->arch.cpuid_nent = cpuid->nent;
2138         cpuid_fix_nx_cap(vcpu);
2139         r = 0;
2140         kvm_apic_set_version(vcpu);
2141         kvm_x86_ops->cpuid_update(vcpu);
2142         update_cpuid(vcpu);
2143
2144 out_free:
2145         vfree(cpuid_entries);
2146 out:
2147         return r;
2148 }
2149
2150 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2151                                      struct kvm_cpuid2 *cpuid,
2152                                      struct kvm_cpuid_entry2 __user *entries)
2153 {
2154         int r;
2155
2156         r = -E2BIG;
2157         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2158                 goto out;
2159         r = -EFAULT;
2160         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2161                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2162                 goto out;
2163         vcpu->arch.cpuid_nent = cpuid->nent;
2164         kvm_apic_set_version(vcpu);
2165         kvm_x86_ops->cpuid_update(vcpu);
2166         update_cpuid(vcpu);
2167         return 0;
2168
2169 out:
2170         return r;
2171 }
2172
2173 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2174                                      struct kvm_cpuid2 *cpuid,
2175                                      struct kvm_cpuid_entry2 __user *entries)
2176 {
2177         int r;
2178
2179         r = -E2BIG;
2180         if (cpuid->nent < vcpu->arch.cpuid_nent)
2181                 goto out;
2182         r = -EFAULT;
2183         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2184                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2185                 goto out;
2186         return 0;
2187
2188 out:
2189         cpuid->nent = vcpu->arch.cpuid_nent;
2190         return r;
2191 }
2192
2193 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2194                            u32 index)
2195 {
2196         entry->function = function;
2197         entry->index = index;
2198         cpuid_count(entry->function, entry->index,
2199                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2200         entry->flags = 0;
2201 }
2202
2203 #define F(x) bit(X86_FEATURE_##x)
2204
2205 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2206                          u32 index, int *nent, int maxnent)
2207 {
2208         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2209 #ifdef CONFIG_X86_64
2210         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2211                                 ? F(GBPAGES) : 0;
2212         unsigned f_lm = F(LM);
2213 #else
2214         unsigned f_gbpages = 0;
2215         unsigned f_lm = 0;
2216 #endif
2217         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2218
2219         /* cpuid 1.edx */
2220         const u32 kvm_supported_word0_x86_features =
2221                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2222                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2223                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2224                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2225                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2226                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2227                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2228                 0 /* HTT, TM, Reserved, PBE */;
2229         /* cpuid 0x80000001.edx */
2230         const u32 kvm_supported_word1_x86_features =
2231                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2232                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2233                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2234                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2235                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2236                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2237                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2238                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2239         /* cpuid 1.ecx */
2240         const u32 kvm_supported_word4_x86_features =
2241                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2242                 0 /* DS-CPL, VMX, SMX, EST */ |
2243                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2244                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2245                 0 /* Reserved, DCA */ | F(XMM4_1) |
2246                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2247                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2248                 F(F16C);
2249         /* cpuid 0x80000001.ecx */
2250         const u32 kvm_supported_word6_x86_features =
2251                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2252                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2253                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2254                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2255
2256         /* all calls to cpuid_count() should be made on the same cpu */
2257         get_cpu();
2258         do_cpuid_1_ent(entry, function, index);
2259         ++*nent;
2260
2261         switch (function) {
2262         case 0:
2263                 entry->eax = min(entry->eax, (u32)0xd);
2264                 break;
2265         case 1:
2266                 entry->edx &= kvm_supported_word0_x86_features;
2267                 entry->ecx &= kvm_supported_word4_x86_features;
2268                 /* we support x2apic emulation even if host does not support
2269                  * it since we emulate x2apic in software */
2270                 entry->ecx |= F(X2APIC);
2271                 break;
2272         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2273          * may return different values. This forces us to get_cpu() before
2274          * issuing the first command, and also to emulate this annoying behavior
2275          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2276         case 2: {
2277                 int t, times = entry->eax & 0xff;
2278
2279                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2280                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2281                 for (t = 1; t < times && *nent < maxnent; ++t) {
2282                         do_cpuid_1_ent(&entry[t], function, 0);
2283                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2284                         ++*nent;
2285                 }
2286                 break;
2287         }
2288         /* function 4 and 0xb have additional index. */
2289         case 4: {
2290                 int i, cache_type;
2291
2292                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2293                 /* read more entries until cache_type is zero */
2294                 for (i = 1; *nent < maxnent; ++i) {
2295                         cache_type = entry[i - 1].eax & 0x1f;
2296                         if (!cache_type)
2297                                 break;
2298                         do_cpuid_1_ent(&entry[i], function, i);
2299                         entry[i].flags |=
2300                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2301                         ++*nent;
2302                 }
2303                 break;
2304         }
2305         case 0xb: {
2306                 int i, level_type;
2307
2308                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2309                 /* read more entries until level_type is zero */
2310                 for (i = 1; *nent < maxnent; ++i) {
2311                         level_type = entry[i - 1].ecx & 0xff00;
2312                         if (!level_type)
2313                                 break;
2314                         do_cpuid_1_ent(&entry[i], function, i);
2315                         entry[i].flags |=
2316                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2317                         ++*nent;
2318                 }
2319                 break;
2320         }
2321         case 0xd: {
2322                 int i;
2323
2324                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2325                 for (i = 1; *nent < maxnent; ++i) {
2326                         if (entry[i - 1].eax == 0 && i != 2)
2327                                 break;
2328                         do_cpuid_1_ent(&entry[i], function, i);
2329                         entry[i].flags |=
2330                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2331                         ++*nent;
2332                 }
2333                 break;
2334         }
2335         case KVM_CPUID_SIGNATURE: {
2336                 char signature[12] = "KVMKVMKVM\0\0";
2337                 u32 *sigptr = (u32 *)signature;
2338                 entry->eax = 0;
2339                 entry->ebx = sigptr[0];
2340                 entry->ecx = sigptr[1];
2341                 entry->edx = sigptr[2];
2342                 break;
2343         }
2344         case KVM_CPUID_FEATURES:
2345                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2346                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2347                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2348                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2349                 entry->ebx = 0;
2350                 entry->ecx = 0;
2351                 entry->edx = 0;
2352                 break;
2353         case 0x80000000:
2354                 entry->eax = min(entry->eax, 0x8000001a);
2355                 break;
2356         case 0x80000001:
2357                 entry->edx &= kvm_supported_word1_x86_features;
2358                 entry->ecx &= kvm_supported_word6_x86_features;
2359                 break;
2360         }
2361
2362         kvm_x86_ops->set_supported_cpuid(function, entry);
2363
2364         put_cpu();
2365 }
2366
2367 #undef F
2368
2369 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2370                                      struct kvm_cpuid_entry2 __user *entries)
2371 {
2372         struct kvm_cpuid_entry2 *cpuid_entries;
2373         int limit, nent = 0, r = -E2BIG;
2374         u32 func;
2375
2376         if (cpuid->nent < 1)
2377                 goto out;
2378         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2379                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2380         r = -ENOMEM;
2381         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2382         if (!cpuid_entries)
2383                 goto out;
2384
2385         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2386         limit = cpuid_entries[0].eax;
2387         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2388                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2389                              &nent, cpuid->nent);
2390         r = -E2BIG;
2391         if (nent >= cpuid->nent)
2392                 goto out_free;
2393
2394         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2395         limit = cpuid_entries[nent - 1].eax;
2396         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2397                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2398                              &nent, cpuid->nent);
2399
2400
2401
2402         r = -E2BIG;
2403         if (nent >= cpuid->nent)
2404                 goto out_free;
2405
2406         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2407                      cpuid->nent);
2408
2409         r = -E2BIG;
2410         if (nent >= cpuid->nent)
2411                 goto out_free;
2412
2413         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2414                      cpuid->nent);
2415
2416         r = -E2BIG;
2417         if (nent >= cpuid->nent)
2418                 goto out_free;
2419
2420         r = -EFAULT;
2421         if (copy_to_user(entries, cpuid_entries,
2422                          nent * sizeof(struct kvm_cpuid_entry2)))
2423                 goto out_free;
2424         cpuid->nent = nent;
2425         r = 0;
2426
2427 out_free:
2428         vfree(cpuid_entries);
2429 out:
2430         return r;
2431 }
2432
2433 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2434                                     struct kvm_lapic_state *s)
2435 {
2436         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2437
2438         return 0;
2439 }
2440
2441 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2442                                     struct kvm_lapic_state *s)
2443 {
2444         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2445         kvm_apic_post_state_restore(vcpu);
2446         update_cr8_intercept(vcpu);
2447
2448         return 0;
2449 }
2450
2451 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2452                                     struct kvm_interrupt *irq)
2453 {
2454         if (irq->irq < 0 || irq->irq >= 256)
2455                 return -EINVAL;
2456         if (irqchip_in_kernel(vcpu->kvm))
2457                 return -ENXIO;
2458
2459         kvm_queue_interrupt(vcpu, irq->irq, false);
2460         kvm_make_request(KVM_REQ_EVENT, vcpu);
2461
2462         return 0;
2463 }
2464
2465 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2466 {
2467         kvm_inject_nmi(vcpu);
2468
2469         return 0;
2470 }
2471
2472 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2473                                            struct kvm_tpr_access_ctl *tac)
2474 {
2475         if (tac->flags)
2476                 return -EINVAL;
2477         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2478         return 0;
2479 }
2480
2481 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2482                                         u64 mcg_cap)
2483 {
2484         int r;
2485         unsigned bank_num = mcg_cap & 0xff, bank;
2486
2487         r = -EINVAL;
2488         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2489                 goto out;
2490         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2491                 goto out;
2492         r = 0;
2493         vcpu->arch.mcg_cap = mcg_cap;
2494         /* Init IA32_MCG_CTL to all 1s */
2495         if (mcg_cap & MCG_CTL_P)
2496                 vcpu->arch.mcg_ctl = ~(u64)0;
2497         /* Init IA32_MCi_CTL to all 1s */
2498         for (bank = 0; bank < bank_num; bank++)
2499                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2500 out:
2501         return r;
2502 }
2503
2504 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2505                                       struct kvm_x86_mce *mce)
2506 {
2507         u64 mcg_cap = vcpu->arch.mcg_cap;
2508         unsigned bank_num = mcg_cap & 0xff;
2509         u64 *banks = vcpu->arch.mce_banks;
2510
2511         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2512                 return -EINVAL;
2513         /*
2514          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2515          * reporting is disabled
2516          */
2517         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2518             vcpu->arch.mcg_ctl != ~(u64)0)
2519                 return 0;
2520         banks += 4 * mce->bank;
2521         /*
2522          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2523          * reporting is disabled for the bank
2524          */
2525         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2526                 return 0;
2527         if (mce->status & MCI_STATUS_UC) {
2528                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2529                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2530                         printk(KERN_DEBUG "kvm: set_mce: "
2531                                "injects mce exception while "
2532                                "previous one is in progress!\n");
2533                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2534                         return 0;
2535                 }
2536                 if (banks[1] & MCI_STATUS_VAL)
2537                         mce->status |= MCI_STATUS_OVER;
2538                 banks[2] = mce->addr;
2539                 banks[3] = mce->misc;
2540                 vcpu->arch.mcg_status = mce->mcg_status;
2541                 banks[1] = mce->status;
2542                 kvm_queue_exception(vcpu, MC_VECTOR);
2543         } else if (!(banks[1] & MCI_STATUS_VAL)
2544                    || !(banks[1] & MCI_STATUS_UC)) {
2545                 if (banks[1] & MCI_STATUS_VAL)
2546                         mce->status |= MCI_STATUS_OVER;
2547                 banks[2] = mce->addr;
2548                 banks[3] = mce->misc;
2549                 banks[1] = mce->status;
2550         } else
2551                 banks[1] |= MCI_STATUS_OVER;
2552         return 0;
2553 }
2554
2555 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2556                                                struct kvm_vcpu_events *events)
2557 {
2558         events->exception.injected =
2559                 vcpu->arch.exception.pending &&
2560                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2561         events->exception.nr = vcpu->arch.exception.nr;
2562         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2563         events->exception.error_code = vcpu->arch.exception.error_code;
2564
2565         events->interrupt.injected =
2566                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2567         events->interrupt.nr = vcpu->arch.interrupt.nr;
2568         events->interrupt.soft = 0;
2569         events->interrupt.shadow =
2570                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2571                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2572
2573         events->nmi.injected = vcpu->arch.nmi_injected;
2574         events->nmi.pending = vcpu->arch.nmi_pending;
2575         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2576
2577         events->sipi_vector = vcpu->arch.sipi_vector;
2578
2579         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2580                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2581                          | KVM_VCPUEVENT_VALID_SHADOW);
2582 }
2583
2584 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2585                                               struct kvm_vcpu_events *events)
2586 {
2587         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2588                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2589                               | KVM_VCPUEVENT_VALID_SHADOW))
2590                 return -EINVAL;
2591
2592         vcpu->arch.exception.pending = events->exception.injected;
2593         vcpu->arch.exception.nr = events->exception.nr;
2594         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2595         vcpu->arch.exception.error_code = events->exception.error_code;
2596
2597         vcpu->arch.interrupt.pending = events->interrupt.injected;
2598         vcpu->arch.interrupt.nr = events->interrupt.nr;
2599         vcpu->arch.interrupt.soft = events->interrupt.soft;
2600         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2601                 kvm_pic_clear_isr_ack(vcpu->kvm);
2602         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2603                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2604                                                   events->interrupt.shadow);
2605
2606         vcpu->arch.nmi_injected = events->nmi.injected;
2607         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2608                 vcpu->arch.nmi_pending = events->nmi.pending;
2609         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2610
2611         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2612                 vcpu->arch.sipi_vector = events->sipi_vector;
2613
2614         kvm_make_request(KVM_REQ_EVENT, vcpu);
2615
2616         return 0;
2617 }
2618
2619 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2620                                              struct kvm_debugregs *dbgregs)
2621 {
2622         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2623         dbgregs->dr6 = vcpu->arch.dr6;
2624         dbgregs->dr7 = vcpu->arch.dr7;
2625         dbgregs->flags = 0;
2626 }
2627
2628 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2629                                             struct kvm_debugregs *dbgregs)
2630 {
2631         if (dbgregs->flags)
2632                 return -EINVAL;
2633
2634         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2635         vcpu->arch.dr6 = dbgregs->dr6;
2636         vcpu->arch.dr7 = dbgregs->dr7;
2637
2638         return 0;
2639 }
2640
2641 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2642                                          struct kvm_xsave *guest_xsave)
2643 {
2644         if (cpu_has_xsave)
2645                 memcpy(guest_xsave->region,
2646                         &vcpu->arch.guest_fpu.state->xsave,
2647                         xstate_size);
2648         else {
2649                 memcpy(guest_xsave->region,
2650                         &vcpu->arch.guest_fpu.state->fxsave,
2651                         sizeof(struct i387_fxsave_struct));
2652                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2653                         XSTATE_FPSSE;
2654         }
2655 }
2656
2657 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2658                                         struct kvm_xsave *guest_xsave)
2659 {
2660         u64 xstate_bv =
2661                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2662
2663         if (cpu_has_xsave)
2664                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2665                         guest_xsave->region, xstate_size);
2666         else {
2667                 if (xstate_bv & ~XSTATE_FPSSE)
2668                         return -EINVAL;
2669                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2670                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2671         }
2672         return 0;
2673 }
2674
2675 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2676                                         struct kvm_xcrs *guest_xcrs)
2677 {
2678         if (!cpu_has_xsave) {
2679                 guest_xcrs->nr_xcrs = 0;
2680                 return;
2681         }
2682
2683         guest_xcrs->nr_xcrs = 1;
2684         guest_xcrs->flags = 0;
2685         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2686         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2687 }
2688
2689 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2690                                        struct kvm_xcrs *guest_xcrs)
2691 {
2692         int i, r = 0;
2693
2694         if (!cpu_has_xsave)
2695                 return -EINVAL;
2696
2697         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2698                 return -EINVAL;
2699
2700         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2701                 /* Only support XCR0 currently */
2702                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2703                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2704                                 guest_xcrs->xcrs[0].value);
2705                         break;
2706                 }
2707         if (r)
2708                 r = -EINVAL;
2709         return r;
2710 }
2711
2712 long kvm_arch_vcpu_ioctl(struct file *filp,
2713                          unsigned int ioctl, unsigned long arg)
2714 {
2715         struct kvm_vcpu *vcpu = filp->private_data;
2716         void __user *argp = (void __user *)arg;
2717         int r;
2718         union {
2719                 struct kvm_lapic_state *lapic;
2720                 struct kvm_xsave *xsave;
2721                 struct kvm_xcrs *xcrs;
2722                 void *buffer;
2723         } u;
2724
2725         u.buffer = NULL;
2726         switch (ioctl) {
2727         case KVM_GET_LAPIC: {
2728                 r = -EINVAL;
2729                 if (!vcpu->arch.apic)
2730                         goto out;
2731                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2732
2733                 r = -ENOMEM;
2734                 if (!u.lapic)
2735                         goto out;
2736                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2737                 if (r)
2738                         goto out;
2739                 r = -EFAULT;
2740                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2741                         goto out;
2742                 r = 0;
2743                 break;
2744         }
2745         case KVM_SET_LAPIC: {
2746                 r = -EINVAL;
2747                 if (!vcpu->arch.apic)
2748                         goto out;
2749                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2750                 r = -ENOMEM;
2751                 if (!u.lapic)
2752                         goto out;
2753                 r = -EFAULT;
2754                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2755                         goto out;
2756                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2757                 if (r)
2758                         goto out;
2759                 r = 0;
2760                 break;
2761         }
2762         case KVM_INTERRUPT: {
2763                 struct kvm_interrupt irq;
2764
2765                 r = -EFAULT;
2766                 if (copy_from_user(&irq, argp, sizeof irq))
2767                         goto out;
2768                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2769                 if (r)
2770                         goto out;
2771                 r = 0;
2772                 break;
2773         }
2774         case KVM_NMI: {
2775                 r = kvm_vcpu_ioctl_nmi(vcpu);
2776                 if (r)
2777                         goto out;
2778                 r = 0;
2779                 break;
2780         }
2781         case KVM_SET_CPUID: {
2782                 struct kvm_cpuid __user *cpuid_arg = argp;
2783                 struct kvm_cpuid cpuid;
2784
2785                 r = -EFAULT;
2786                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2787                         goto out;
2788                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2789                 if (r)
2790                         goto out;
2791                 break;
2792         }
2793         case KVM_SET_CPUID2: {
2794                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2795                 struct kvm_cpuid2 cpuid;
2796
2797                 r = -EFAULT;
2798                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2799                         goto out;
2800                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2801                                               cpuid_arg->entries);
2802                 if (r)
2803                         goto out;
2804                 break;
2805         }
2806         case KVM_GET_CPUID2: {
2807                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2808                 struct kvm_cpuid2 cpuid;
2809
2810                 r = -EFAULT;
2811                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2812                         goto out;
2813                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2814                                               cpuid_arg->entries);
2815                 if (r)
2816                         goto out;
2817                 r = -EFAULT;
2818                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2819                         goto out;
2820                 r = 0;
2821                 break;
2822         }
2823         case KVM_GET_MSRS:
2824                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2825                 break;
2826         case KVM_SET_MSRS:
2827                 r = msr_io(vcpu, argp, do_set_msr, 0);
2828                 break;
2829         case KVM_TPR_ACCESS_REPORTING: {
2830                 struct kvm_tpr_access_ctl tac;
2831
2832                 r = -EFAULT;
2833                 if (copy_from_user(&tac, argp, sizeof tac))
2834                         goto out;
2835                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2836                 if (r)
2837                         goto out;
2838                 r = -EFAULT;
2839                 if (copy_to_user(argp, &tac, sizeof tac))
2840                         goto out;
2841                 r = 0;
2842                 break;
2843         };
2844         case KVM_SET_VAPIC_ADDR: {
2845                 struct kvm_vapic_addr va;
2846
2847                 r = -EINVAL;
2848                 if (!irqchip_in_kernel(vcpu->kvm))
2849                         goto out;
2850                 r = -EFAULT;
2851                 if (copy_from_user(&va, argp, sizeof va))
2852                         goto out;
2853                 r = 0;
2854                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2855                 break;
2856         }
2857         case KVM_X86_SETUP_MCE: {
2858                 u64 mcg_cap;
2859
2860                 r = -EFAULT;
2861                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2862                         goto out;
2863                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2864                 break;
2865         }
2866         case KVM_X86_SET_MCE: {
2867                 struct kvm_x86_mce mce;
2868
2869                 r = -EFAULT;
2870                 if (copy_from_user(&mce, argp, sizeof mce))
2871                         goto out;
2872                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2873                 break;
2874         }
2875         case KVM_GET_VCPU_EVENTS: {
2876                 struct kvm_vcpu_events events;
2877
2878                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2879
2880                 r = -EFAULT;
2881                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2882                         break;
2883                 r = 0;
2884                 break;
2885         }
2886         case KVM_SET_VCPU_EVENTS: {
2887                 struct kvm_vcpu_events events;
2888
2889                 r = -EFAULT;
2890                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2891                         break;
2892
2893                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2894                 break;
2895         }
2896         case KVM_GET_DEBUGREGS: {
2897                 struct kvm_debugregs dbgregs;
2898
2899                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2900
2901                 r = -EFAULT;
2902                 if (copy_to_user(argp, &dbgregs,
2903                                  sizeof(struct kvm_debugregs)))
2904                         break;
2905                 r = 0;
2906                 break;
2907         }
2908         case KVM_SET_DEBUGREGS: {
2909                 struct kvm_debugregs dbgregs;
2910
2911                 r = -EFAULT;
2912                 if (copy_from_user(&dbgregs, argp,
2913                                    sizeof(struct kvm_debugregs)))
2914                         break;
2915
2916                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2917                 break;
2918         }
2919         case KVM_GET_XSAVE: {
2920                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2921                 r = -ENOMEM;
2922                 if (!u.xsave)
2923                         break;
2924
2925                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2926
2927                 r = -EFAULT;
2928                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2929                         break;
2930                 r = 0;
2931                 break;
2932         }
2933         case KVM_SET_XSAVE: {
2934                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2935                 r = -ENOMEM;
2936                 if (!u.xsave)
2937                         break;
2938
2939                 r = -EFAULT;
2940                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2941                         break;
2942
2943                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2944                 break;
2945         }
2946         case KVM_GET_XCRS: {
2947                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2948                 r = -ENOMEM;
2949                 if (!u.xcrs)
2950                         break;
2951
2952                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2953
2954                 r = -EFAULT;
2955                 if (copy_to_user(argp, u.xcrs,
2956                                  sizeof(struct kvm_xcrs)))
2957                         break;
2958                 r = 0;
2959                 break;
2960         }
2961         case KVM_SET_XCRS: {
2962                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2963                 r = -ENOMEM;
2964                 if (!u.xcrs)
2965                         break;
2966
2967                 r = -EFAULT;
2968                 if (copy_from_user(u.xcrs, argp,
2969                                    sizeof(struct kvm_xcrs)))
2970                         break;
2971
2972                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2973                 break;
2974         }
2975         default:
2976                 r = -EINVAL;
2977         }
2978 out:
2979         kfree(u.buffer);
2980         return r;
2981 }
2982
2983 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2984 {
2985         int ret;
2986
2987         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2988                 return -1;
2989         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2990         return ret;
2991 }
2992
2993 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2994                                               u64 ident_addr)
2995 {
2996         kvm->arch.ept_identity_map_addr = ident_addr;
2997         return 0;
2998 }
2999
3000 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3001                                           u32 kvm_nr_mmu_pages)
3002 {
3003         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3004                 return -EINVAL;
3005
3006         mutex_lock(&kvm->slots_lock);
3007         spin_lock(&kvm->mmu_lock);
3008
3009         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3010         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3011
3012         spin_unlock(&kvm->mmu_lock);
3013         mutex_unlock(&kvm->slots_lock);
3014         return 0;
3015 }
3016
3017 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3018 {
3019         return kvm->arch.n_max_mmu_pages;
3020 }
3021
3022 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3023 {
3024         int r;
3025
3026         r = 0;
3027         switch (chip->chip_id) {
3028         case KVM_IRQCHIP_PIC_MASTER:
3029                 memcpy(&chip->chip.pic,
3030                         &pic_irqchip(kvm)->pics[0],
3031                         sizeof(struct kvm_pic_state));
3032                 break;
3033         case KVM_IRQCHIP_PIC_SLAVE:
3034                 memcpy(&chip->chip.pic,
3035                         &pic_irqchip(kvm)->pics[1],
3036                         sizeof(struct kvm_pic_state));
3037                 break;
3038         case KVM_IRQCHIP_IOAPIC:
3039                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3040                 break;
3041         default:
3042                 r = -EINVAL;
3043                 break;
3044         }
3045         return r;
3046 }
3047
3048 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3049 {
3050         int r;
3051
3052         r = 0;
3053         switch (chip->chip_id) {
3054         case KVM_IRQCHIP_PIC_MASTER:
3055                 spin_lock(&pic_irqchip(kvm)->lock);
3056                 memcpy(&pic_irqchip(kvm)->pics[0],
3057                         &chip->chip.pic,
3058                         sizeof(struct kvm_pic_state));
3059                 spin_unlock(&pic_irqchip(kvm)->lock);
3060                 break;
3061         case KVM_IRQCHIP_PIC_SLAVE:
3062                 spin_lock(&pic_irqchip(kvm)->lock);
3063                 memcpy(&pic_irqchip(kvm)->pics[1],
3064                         &chip->chip.pic,
3065                         sizeof(struct kvm_pic_state));
3066                 spin_unlock(&pic_irqchip(kvm)->lock);
3067                 break;
3068         case KVM_IRQCHIP_IOAPIC:
3069                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3070                 break;
3071         default:
3072                 r = -EINVAL;
3073                 break;
3074         }
3075         kvm_pic_update_irq(pic_irqchip(kvm));
3076         return r;
3077 }
3078
3079 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3080 {
3081         int r = 0;
3082
3083         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3084         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3085         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3086         return r;
3087 }
3088
3089 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3090 {
3091         int r = 0;
3092
3093         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3094         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3095         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3096         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3097         return r;
3098 }
3099
3100 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3101 {
3102         int r = 0;
3103
3104         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3105         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3106                 sizeof(ps->channels));
3107         ps->flags = kvm->arch.vpit->pit_state.flags;
3108         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3109         return r;
3110 }
3111
3112 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3113 {
3114         int r = 0, start = 0;
3115         u32 prev_legacy, cur_legacy;
3116         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3117         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3118         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3119         if (!prev_legacy && cur_legacy)
3120                 start = 1;
3121         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3122                sizeof(kvm->arch.vpit->pit_state.channels));
3123         kvm->arch.vpit->pit_state.flags = ps->flags;
3124         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3125         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3126         return r;
3127 }
3128
3129 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3130                                  struct kvm_reinject_control *control)
3131 {
3132         if (!kvm->arch.vpit)
3133                 return -ENXIO;
3134         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3135         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3136         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3137         return 0;
3138 }
3139
3140 /*
3141  * Get (and clear) the dirty memory log for a memory slot.
3142  */
3143 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3144                                       struct kvm_dirty_log *log)
3145 {
3146         int r, i;
3147         struct kvm_memory_slot *memslot;
3148         unsigned long n;
3149         unsigned long is_dirty = 0;
3150
3151         mutex_lock(&kvm->slots_lock);
3152
3153         r = -EINVAL;
3154         if (log->slot >= KVM_MEMORY_SLOTS)
3155                 goto out;
3156
3157         memslot = &kvm->memslots->memslots[log->slot];
3158         r = -ENOENT;
3159         if (!memslot->dirty_bitmap)
3160                 goto out;
3161
3162         n = kvm_dirty_bitmap_bytes(memslot);
3163
3164         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3165                 is_dirty = memslot->dirty_bitmap[i];
3166
3167         /* If nothing is dirty, don't bother messing with page tables. */
3168         if (is_dirty) {
3169                 struct kvm_memslots *slots, *old_slots;
3170                 unsigned long *dirty_bitmap;
3171
3172                 spin_lock(&kvm->mmu_lock);
3173                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3174                 spin_unlock(&kvm->mmu_lock);
3175
3176                 r = -ENOMEM;
3177                 dirty_bitmap = vmalloc(n);
3178                 if (!dirty_bitmap)
3179                         goto out;
3180                 memset(dirty_bitmap, 0, n);
3181
3182                 r = -ENOMEM;
3183                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3184                 if (!slots) {
3185                         vfree(dirty_bitmap);
3186                         goto out;
3187                 }
3188                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3189                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3190
3191                 old_slots = kvm->memslots;
3192                 rcu_assign_pointer(kvm->memslots, slots);
3193                 synchronize_srcu_expedited(&kvm->srcu);
3194                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3195                 kfree(old_slots);
3196
3197                 r = -EFAULT;
3198                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3199                         vfree(dirty_bitmap);
3200                         goto out;
3201                 }
3202                 vfree(dirty_bitmap);
3203         } else {
3204                 r = -EFAULT;
3205                 if (clear_user(log->dirty_bitmap, n))
3206                         goto out;
3207         }
3208
3209         r = 0;
3210 out:
3211         mutex_unlock(&kvm->slots_lock);
3212         return r;
3213 }
3214
3215 long kvm_arch_vm_ioctl(struct file *filp,
3216                        unsigned int ioctl, unsigned long arg)
3217 {
3218         struct kvm *kvm = filp->private_data;
3219         void __user *argp = (void __user *)arg;
3220         int r = -ENOTTY;
3221         /*
3222          *&