Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt...
[pandora-kernel.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35
36 #include <asm/page.h>
37 #include <asm/cmpxchg.h>
38 #include <asm/io.h>
39 #include <asm/vmx.h>
40
41 /*
42  * When setting this variable to true it enables Two-Dimensional-Paging
43  * where the hardware walks 2 page tables:
44  * 1. the guest-virtual to guest-physical
45  * 2. while doing 1. it walks guest-physical to host-physical
46  * If the hardware supports that we don't need to do shadow paging.
47  */
48 bool tdp_enabled = false;
49
50 #undef MMU_DEBUG
51
52 #undef AUDIT
53
54 #ifdef AUDIT
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 #else
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #endif
59
60 #ifdef MMU_DEBUG
61
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65 #else
66
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
69
70 #endif
71
72 #if defined(MMU_DEBUG) || defined(AUDIT)
73 static int dbg = 0;
74 module_param(dbg, bool, 0644);
75 #endif
76
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
79
80 #ifndef MMU_DEBUG
81 #define ASSERT(x) do { } while (0)
82 #else
83 #define ASSERT(x)                                                       \
84         if (!(x)) {                                                     \
85                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
86                        __FILE__, __LINE__, #x);                         \
87         }
88 #endif
89
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #undef TRACE_INCLUDE_FILE
152 #define CREATE_TRACE_POINTS
153 #include "mmutrace.h"
154
155 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156
157 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158
159 struct kvm_rmap_desc {
160         u64 *sptes[RMAP_EXT];
161         struct kvm_rmap_desc *more;
162 };
163
164 struct kvm_shadow_walk_iterator {
165         u64 addr;
166         hpa_t shadow_addr;
167         int level;
168         u64 *sptep;
169         unsigned index;
170 };
171
172 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
173         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
174              shadow_walk_okay(&(_walker));                      \
175              shadow_walk_next(&(_walker)))
176
177
178 struct kvm_unsync_walk {
179         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
180 };
181
182 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
183
184 static struct kmem_cache *pte_chain_cache;
185 static struct kmem_cache *rmap_desc_cache;
186 static struct kmem_cache *mmu_page_header_cache;
187
188 static u64 __read_mostly shadow_trap_nonpresent_pte;
189 static u64 __read_mostly shadow_notrap_nonpresent_pte;
190 static u64 __read_mostly shadow_base_present_pte;
191 static u64 __read_mostly shadow_nx_mask;
192 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
193 static u64 __read_mostly shadow_user_mask;
194 static u64 __read_mostly shadow_accessed_mask;
195 static u64 __read_mostly shadow_dirty_mask;
196
197 static inline u64 rsvd_bits(int s, int e)
198 {
199         return ((1ULL << (e - s + 1)) - 1) << s;
200 }
201
202 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
203 {
204         shadow_trap_nonpresent_pte = trap_pte;
205         shadow_notrap_nonpresent_pte = notrap_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
208
209 void kvm_mmu_set_base_ptes(u64 base_pte)
210 {
211         shadow_base_present_pte = base_pte;
212 }
213 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
214
215 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
216                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
217 {
218         shadow_user_mask = user_mask;
219         shadow_accessed_mask = accessed_mask;
220         shadow_dirty_mask = dirty_mask;
221         shadow_nx_mask = nx_mask;
222         shadow_x_mask = x_mask;
223 }
224 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
225
226 static int is_write_protection(struct kvm_vcpu *vcpu)
227 {
228         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
229 }
230
231 static int is_cpuid_PSE36(void)
232 {
233         return 1;
234 }
235
236 static int is_nx(struct kvm_vcpu *vcpu)
237 {
238         return vcpu->arch.efer & EFER_NX;
239 }
240
241 static int is_shadow_present_pte(u64 pte)
242 {
243         return pte != shadow_trap_nonpresent_pte
244                 && pte != shadow_notrap_nonpresent_pte;
245 }
246
247 static int is_large_pte(u64 pte)
248 {
249         return pte & PT_PAGE_SIZE_MASK;
250 }
251
252 static int is_writable_pte(unsigned long pte)
253 {
254         return pte & PT_WRITABLE_MASK;
255 }
256
257 static int is_dirty_gpte(unsigned long pte)
258 {
259         return pte & PT_DIRTY_MASK;
260 }
261
262 static int is_rmap_spte(u64 pte)
263 {
264         return is_shadow_present_pte(pte);
265 }
266
267 static int is_last_spte(u64 pte, int level)
268 {
269         if (level == PT_PAGE_TABLE_LEVEL)
270                 return 1;
271         if (is_large_pte(pte))
272                 return 1;
273         return 0;
274 }
275
276 static pfn_t spte_to_pfn(u64 pte)
277 {
278         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
279 }
280
281 static gfn_t pse36_gfn_delta(u32 gpte)
282 {
283         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
284
285         return (gpte & PT32_DIR_PSE36_MASK) << shift;
286 }
287
288 static void __set_spte(u64 *sptep, u64 spte)
289 {
290 #ifdef CONFIG_X86_64
291         set_64bit((unsigned long *)sptep, spte);
292 #else
293         set_64bit((unsigned long long *)sptep, spte);
294 #endif
295 }
296
297 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
298                                   struct kmem_cache *base_cache, int min)
299 {
300         void *obj;
301
302         if (cache->nobjs >= min)
303                 return 0;
304         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
305                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
306                 if (!obj)
307                         return -ENOMEM;
308                 cache->objects[cache->nobjs++] = obj;
309         }
310         return 0;
311 }
312
313 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
314 {
315         while (mc->nobjs)
316                 kfree(mc->objects[--mc->nobjs]);
317 }
318
319 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
320                                        int min)
321 {
322         struct page *page;
323
324         if (cache->nobjs >= min)
325                 return 0;
326         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327                 page = alloc_page(GFP_KERNEL);
328                 if (!page)
329                         return -ENOMEM;
330                 set_page_private(page, 0);
331                 cache->objects[cache->nobjs++] = page_address(page);
332         }
333         return 0;
334 }
335
336 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
337 {
338         while (mc->nobjs)
339                 free_page((unsigned long)mc->objects[--mc->nobjs]);
340 }
341
342 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
343 {
344         int r;
345
346         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
347                                    pte_chain_cache, 4);
348         if (r)
349                 goto out;
350         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
351                                    rmap_desc_cache, 4);
352         if (r)
353                 goto out;
354         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
355         if (r)
356                 goto out;
357         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
358                                    mmu_page_header_cache, 4);
359 out:
360         return r;
361 }
362
363 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
364 {
365         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
366         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
367         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
368         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
369 }
370
371 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
372                                     size_t size)
373 {
374         void *p;
375
376         BUG_ON(!mc->nobjs);
377         p = mc->objects[--mc->nobjs];
378         return p;
379 }
380
381 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
382 {
383         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
384                                       sizeof(struct kvm_pte_chain));
385 }
386
387 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
388 {
389         kfree(pc);
390 }
391
392 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
393 {
394         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
395                                       sizeof(struct kvm_rmap_desc));
396 }
397
398 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
399 {
400         kfree(rd);
401 }
402
403 /*
404  * Return the pointer to the largepage write count for a given
405  * gfn, handling slots that are not large page aligned.
406  */
407 static int *slot_largepage_idx(gfn_t gfn,
408                                struct kvm_memory_slot *slot,
409                                int level)
410 {
411         unsigned long idx;
412
413         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
414               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
415         return &slot->lpage_info[level - 2][idx].write_count;
416 }
417
418 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
419 {
420         struct kvm_memory_slot *slot;
421         int *write_count;
422         int i;
423
424         gfn = unalias_gfn(kvm, gfn);
425
426         slot = gfn_to_memslot_unaliased(kvm, gfn);
427         for (i = PT_DIRECTORY_LEVEL;
428              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
429                 write_count   = slot_largepage_idx(gfn, slot, i);
430                 *write_count += 1;
431         }
432 }
433
434 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
435 {
436         struct kvm_memory_slot *slot;
437         int *write_count;
438         int i;
439
440         gfn = unalias_gfn(kvm, gfn);
441         for (i = PT_DIRECTORY_LEVEL;
442              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
443                 slot          = gfn_to_memslot_unaliased(kvm, gfn);
444                 write_count   = slot_largepage_idx(gfn, slot, i);
445                 *write_count -= 1;
446                 WARN_ON(*write_count < 0);
447         }
448 }
449
450 static int has_wrprotected_page(struct kvm *kvm,
451                                 gfn_t gfn,
452                                 int level)
453 {
454         struct kvm_memory_slot *slot;
455         int *largepage_idx;
456
457         gfn = unalias_gfn(kvm, gfn);
458         slot = gfn_to_memslot_unaliased(kvm, gfn);
459         if (slot) {
460                 largepage_idx = slot_largepage_idx(gfn, slot, level);
461                 return *largepage_idx;
462         }
463
464         return 1;
465 }
466
467 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
468 {
469         unsigned long page_size;
470         int i, ret = 0;
471
472         page_size = kvm_host_page_size(kvm, gfn);
473
474         for (i = PT_PAGE_TABLE_LEVEL;
475              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
476                 if (page_size >= KVM_HPAGE_SIZE(i))
477                         ret = i;
478                 else
479                         break;
480         }
481
482         return ret;
483 }
484
485 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
486 {
487         struct kvm_memory_slot *slot;
488         int host_level, level, max_level;
489
490         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
491         if (slot && slot->dirty_bitmap)
492                 return PT_PAGE_TABLE_LEVEL;
493
494         host_level = host_mapping_level(vcpu->kvm, large_gfn);
495
496         if (host_level == PT_PAGE_TABLE_LEVEL)
497                 return host_level;
498
499         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
500                 kvm_x86_ops->get_lpage_level() : host_level;
501
502         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
503                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
504                         break;
505
506         return level - 1;
507 }
508
509 /*
510  * Take gfn and return the reverse mapping to it.
511  * Note: gfn must be unaliased before this function get called
512  */
513
514 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
515 {
516         struct kvm_memory_slot *slot;
517         unsigned long idx;
518
519         slot = gfn_to_memslot(kvm, gfn);
520         if (likely(level == PT_PAGE_TABLE_LEVEL))
521                 return &slot->rmap[gfn - slot->base_gfn];
522
523         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
524                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
525
526         return &slot->lpage_info[level - 2][idx].rmap_pde;
527 }
528
529 /*
530  * Reverse mapping data structures:
531  *
532  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
533  * that points to page_address(page).
534  *
535  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
536  * containing more mappings.
537  *
538  * Returns the number of rmap entries before the spte was added or zero if
539  * the spte was not added.
540  *
541  */
542 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
543 {
544         struct kvm_mmu_page *sp;
545         struct kvm_rmap_desc *desc;
546         unsigned long *rmapp;
547         int i, count = 0;
548
549         if (!is_rmap_spte(*spte))
550                 return count;
551         gfn = unalias_gfn(vcpu->kvm, gfn);
552         sp = page_header(__pa(spte));
553         sp->gfns[spte - sp->spt] = gfn;
554         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
555         if (!*rmapp) {
556                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
557                 *rmapp = (unsigned long)spte;
558         } else if (!(*rmapp & 1)) {
559                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
560                 desc = mmu_alloc_rmap_desc(vcpu);
561                 desc->sptes[0] = (u64 *)*rmapp;
562                 desc->sptes[1] = spte;
563                 *rmapp = (unsigned long)desc | 1;
564         } else {
565                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
566                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
567                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
568                         desc = desc->more;
569                         count += RMAP_EXT;
570                 }
571                 if (desc->sptes[RMAP_EXT-1]) {
572                         desc->more = mmu_alloc_rmap_desc(vcpu);
573                         desc = desc->more;
574                 }
575                 for (i = 0; desc->sptes[i]; ++i)
576                         ;
577                 desc->sptes[i] = spte;
578         }
579         return count;
580 }
581
582 static void rmap_desc_remove_entry(unsigned long *rmapp,
583                                    struct kvm_rmap_desc *desc,
584                                    int i,
585                                    struct kvm_rmap_desc *prev_desc)
586 {
587         int j;
588
589         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
590                 ;
591         desc->sptes[i] = desc->sptes[j];
592         desc->sptes[j] = NULL;
593         if (j != 0)
594                 return;
595         if (!prev_desc && !desc->more)
596                 *rmapp = (unsigned long)desc->sptes[0];
597         else
598                 if (prev_desc)
599                         prev_desc->more = desc->more;
600                 else
601                         *rmapp = (unsigned long)desc->more | 1;
602         mmu_free_rmap_desc(desc);
603 }
604
605 static void rmap_remove(struct kvm *kvm, u64 *spte)
606 {
607         struct kvm_rmap_desc *desc;
608         struct kvm_rmap_desc *prev_desc;
609         struct kvm_mmu_page *sp;
610         pfn_t pfn;
611         unsigned long *rmapp;
612         int i;
613
614         if (!is_rmap_spte(*spte))
615                 return;
616         sp = page_header(__pa(spte));
617         pfn = spte_to_pfn(*spte);
618         if (*spte & shadow_accessed_mask)
619                 kvm_set_pfn_accessed(pfn);
620         if (is_writable_pte(*spte))
621                 kvm_set_pfn_dirty(pfn);
622         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
623         if (!*rmapp) {
624                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
625                 BUG();
626         } else if (!(*rmapp & 1)) {
627                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
628                 if ((u64 *)*rmapp != spte) {
629                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
630                                spte, *spte);
631                         BUG();
632                 }
633                 *rmapp = 0;
634         } else {
635                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
636                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
637                 prev_desc = NULL;
638                 while (desc) {
639                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
640                                 if (desc->sptes[i] == spte) {
641                                         rmap_desc_remove_entry(rmapp,
642                                                                desc, i,
643                                                                prev_desc);
644                                         return;
645                                 }
646                         prev_desc = desc;
647                         desc = desc->more;
648                 }
649                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
650                 BUG();
651         }
652 }
653
654 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
655 {
656         struct kvm_rmap_desc *desc;
657         struct kvm_rmap_desc *prev_desc;
658         u64 *prev_spte;
659         int i;
660
661         if (!*rmapp)
662                 return NULL;
663         else if (!(*rmapp & 1)) {
664                 if (!spte)
665                         return (u64 *)*rmapp;
666                 return NULL;
667         }
668         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
669         prev_desc = NULL;
670         prev_spte = NULL;
671         while (desc) {
672                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
673                         if (prev_spte == spte)
674                                 return desc->sptes[i];
675                         prev_spte = desc->sptes[i];
676                 }
677                 desc = desc->more;
678         }
679         return NULL;
680 }
681
682 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
683 {
684         unsigned long *rmapp;
685         u64 *spte;
686         int i, write_protected = 0;
687
688         gfn = unalias_gfn(kvm, gfn);
689         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
690
691         spte = rmap_next(kvm, rmapp, NULL);
692         while (spte) {
693                 BUG_ON(!spte);
694                 BUG_ON(!(*spte & PT_PRESENT_MASK));
695                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
696                 if (is_writable_pte(*spte)) {
697                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
698                         write_protected = 1;
699                 }
700                 spte = rmap_next(kvm, rmapp, spte);
701         }
702         if (write_protected) {
703                 pfn_t pfn;
704
705                 spte = rmap_next(kvm, rmapp, NULL);
706                 pfn = spte_to_pfn(*spte);
707                 kvm_set_pfn_dirty(pfn);
708         }
709
710         /* check for huge page mappings */
711         for (i = PT_DIRECTORY_LEVEL;
712              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
713                 rmapp = gfn_to_rmap(kvm, gfn, i);
714                 spte = rmap_next(kvm, rmapp, NULL);
715                 while (spte) {
716                         BUG_ON(!spte);
717                         BUG_ON(!(*spte & PT_PRESENT_MASK));
718                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
719                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
720                         if (is_writable_pte(*spte)) {
721                                 rmap_remove(kvm, spte);
722                                 --kvm->stat.lpages;
723                                 __set_spte(spte, shadow_trap_nonpresent_pte);
724                                 spte = NULL;
725                                 write_protected = 1;
726                         }
727                         spte = rmap_next(kvm, rmapp, spte);
728                 }
729         }
730
731         return write_protected;
732 }
733
734 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
735                            unsigned long data)
736 {
737         u64 *spte;
738         int need_tlb_flush = 0;
739
740         while ((spte = rmap_next(kvm, rmapp, NULL))) {
741                 BUG_ON(!(*spte & PT_PRESENT_MASK));
742                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
743                 rmap_remove(kvm, spte);
744                 __set_spte(spte, shadow_trap_nonpresent_pte);
745                 need_tlb_flush = 1;
746         }
747         return need_tlb_flush;
748 }
749
750 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
751                              unsigned long data)
752 {
753         int need_flush = 0;
754         u64 *spte, new_spte;
755         pte_t *ptep = (pte_t *)data;
756         pfn_t new_pfn;
757
758         WARN_ON(pte_huge(*ptep));
759         new_pfn = pte_pfn(*ptep);
760         spte = rmap_next(kvm, rmapp, NULL);
761         while (spte) {
762                 BUG_ON(!is_shadow_present_pte(*spte));
763                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
764                 need_flush = 1;
765                 if (pte_write(*ptep)) {
766                         rmap_remove(kvm, spte);
767                         __set_spte(spte, shadow_trap_nonpresent_pte);
768                         spte = rmap_next(kvm, rmapp, NULL);
769                 } else {
770                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
771                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
772
773                         new_spte &= ~PT_WRITABLE_MASK;
774                         new_spte &= ~SPTE_HOST_WRITEABLE;
775                         if (is_writable_pte(*spte))
776                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
777                         __set_spte(spte, new_spte);
778                         spte = rmap_next(kvm, rmapp, spte);
779                 }
780         }
781         if (need_flush)
782                 kvm_flush_remote_tlbs(kvm);
783
784         return 0;
785 }
786
787 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
788                           unsigned long data,
789                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
790                                          unsigned long data))
791 {
792         int i, j;
793         int ret;
794         int retval = 0;
795         struct kvm_memslots *slots;
796
797         slots = rcu_dereference(kvm->memslots);
798
799         for (i = 0; i < slots->nmemslots; i++) {
800                 struct kvm_memory_slot *memslot = &slots->memslots[i];
801                 unsigned long start = memslot->userspace_addr;
802                 unsigned long end;
803
804                 end = start + (memslot->npages << PAGE_SHIFT);
805                 if (hva >= start && hva < end) {
806                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
807
808                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
809
810                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
811                                 int idx = gfn_offset;
812                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
813                                 ret |= handler(kvm,
814                                         &memslot->lpage_info[j][idx].rmap_pde,
815                                         data);
816                         }
817                         trace_kvm_age_page(hva, memslot, ret);
818                         retval |= ret;
819                 }
820         }
821
822         return retval;
823 }
824
825 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
826 {
827         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
828 }
829
830 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
831 {
832         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
833 }
834
835 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
836                          unsigned long data)
837 {
838         u64 *spte;
839         int young = 0;
840
841         /*
842          * Emulate the accessed bit for EPT, by checking if this page has
843          * an EPT mapping, and clearing it if it does. On the next access,
844          * a new EPT mapping will be established.
845          * This has some overhead, but not as much as the cost of swapping
846          * out actively used pages or breaking up actively used hugepages.
847          */
848         if (!shadow_accessed_mask)
849                 return kvm_unmap_rmapp(kvm, rmapp, data);
850
851         spte = rmap_next(kvm, rmapp, NULL);
852         while (spte) {
853                 int _young;
854                 u64 _spte = *spte;
855                 BUG_ON(!(_spte & PT_PRESENT_MASK));
856                 _young = _spte & PT_ACCESSED_MASK;
857                 if (_young) {
858                         young = 1;
859                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
860                 }
861                 spte = rmap_next(kvm, rmapp, spte);
862         }
863         return young;
864 }
865
866 #define RMAP_RECYCLE_THRESHOLD 1000
867
868 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
869 {
870         unsigned long *rmapp;
871         struct kvm_mmu_page *sp;
872
873         sp = page_header(__pa(spte));
874
875         gfn = unalias_gfn(vcpu->kvm, gfn);
876         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
877
878         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
879         kvm_flush_remote_tlbs(vcpu->kvm);
880 }
881
882 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
883 {
884         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
885 }
886
887 #ifdef MMU_DEBUG
888 static int is_empty_shadow_page(u64 *spt)
889 {
890         u64 *pos;
891         u64 *end;
892
893         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
894                 if (is_shadow_present_pte(*pos)) {
895                         printk(KERN_ERR "%s: %p %llx\n", __func__,
896                                pos, *pos);
897                         return 0;
898                 }
899         return 1;
900 }
901 #endif
902
903 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
904 {
905         ASSERT(is_empty_shadow_page(sp->spt));
906         list_del(&sp->link);
907         __free_page(virt_to_page(sp->spt));
908         __free_page(virt_to_page(sp->gfns));
909         kfree(sp);
910         ++kvm->arch.n_free_mmu_pages;
911 }
912
913 static unsigned kvm_page_table_hashfn(gfn_t gfn)
914 {
915         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
916 }
917
918 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
919                                                u64 *parent_pte)
920 {
921         struct kvm_mmu_page *sp;
922
923         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
924         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
925         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
926         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
927         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
928         INIT_LIST_HEAD(&sp->oos_link);
929         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
930         sp->multimapped = 0;
931         sp->parent_pte = parent_pte;
932         --vcpu->kvm->arch.n_free_mmu_pages;
933         return sp;
934 }
935
936 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
937                                     struct kvm_mmu_page *sp, u64 *parent_pte)
938 {
939         struct kvm_pte_chain *pte_chain;
940         struct hlist_node *node;
941         int i;
942
943         if (!parent_pte)
944                 return;
945         if (!sp->multimapped) {
946                 u64 *old = sp->parent_pte;
947
948                 if (!old) {
949                         sp->parent_pte = parent_pte;
950                         return;
951                 }
952                 sp->multimapped = 1;
953                 pte_chain = mmu_alloc_pte_chain(vcpu);
954                 INIT_HLIST_HEAD(&sp->parent_ptes);
955                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
956                 pte_chain->parent_ptes[0] = old;
957         }
958         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
959                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
960                         continue;
961                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
962                         if (!pte_chain->parent_ptes[i]) {
963                                 pte_chain->parent_ptes[i] = parent_pte;
964                                 return;
965                         }
966         }
967         pte_chain = mmu_alloc_pte_chain(vcpu);
968         BUG_ON(!pte_chain);
969         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
970         pte_chain->parent_ptes[0] = parent_pte;
971 }
972
973 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
974                                        u64 *parent_pte)
975 {
976         struct kvm_pte_chain *pte_chain;
977         struct hlist_node *node;
978         int i;
979
980         if (!sp->multimapped) {
981                 BUG_ON(sp->parent_pte != parent_pte);
982                 sp->parent_pte = NULL;
983                 return;
984         }
985         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
986                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
987                         if (!pte_chain->parent_ptes[i])
988                                 break;
989                         if (pte_chain->parent_ptes[i] != parent_pte)
990                                 continue;
991                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
992                                 && pte_chain->parent_ptes[i + 1]) {
993                                 pte_chain->parent_ptes[i]
994                                         = pte_chain->parent_ptes[i + 1];
995                                 ++i;
996                         }
997                         pte_chain->parent_ptes[i] = NULL;
998                         if (i == 0) {
999                                 hlist_del(&pte_chain->link);
1000                                 mmu_free_pte_chain(pte_chain);
1001                                 if (hlist_empty(&sp->parent_ptes)) {
1002                                         sp->multimapped = 0;
1003                                         sp->parent_pte = NULL;
1004                                 }
1005                         }
1006                         return;
1007                 }
1008         BUG();
1009 }
1010
1011
1012 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1013                             mmu_parent_walk_fn fn)
1014 {
1015         struct kvm_pte_chain *pte_chain;
1016         struct hlist_node *node;
1017         struct kvm_mmu_page *parent_sp;
1018         int i;
1019
1020         if (!sp->multimapped && sp->parent_pte) {
1021                 parent_sp = page_header(__pa(sp->parent_pte));
1022                 fn(vcpu, parent_sp);
1023                 mmu_parent_walk(vcpu, parent_sp, fn);
1024                 return;
1025         }
1026         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1027                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1028                         if (!pte_chain->parent_ptes[i])
1029                                 break;
1030                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1031                         fn(vcpu, parent_sp);
1032                         mmu_parent_walk(vcpu, parent_sp, fn);
1033                 }
1034 }
1035
1036 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1037 {
1038         unsigned int index;
1039         struct kvm_mmu_page *sp = page_header(__pa(spte));
1040
1041         index = spte - sp->spt;
1042         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1043                 sp->unsync_children++;
1044         WARN_ON(!sp->unsync_children);
1045 }
1046
1047 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1048 {
1049         struct kvm_pte_chain *pte_chain;
1050         struct hlist_node *node;
1051         int i;
1052
1053         if (!sp->parent_pte)
1054                 return;
1055
1056         if (!sp->multimapped) {
1057                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1058                 return;
1059         }
1060
1061         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1062                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1063                         if (!pte_chain->parent_ptes[i])
1064                                 break;
1065                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1066                 }
1067 }
1068
1069 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1070 {
1071         kvm_mmu_update_parents_unsync(sp);
1072         return 1;
1073 }
1074
1075 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1076                                         struct kvm_mmu_page *sp)
1077 {
1078         mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1079         kvm_mmu_update_parents_unsync(sp);
1080 }
1081
1082 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1083                                     struct kvm_mmu_page *sp)
1084 {
1085         int i;
1086
1087         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1088                 sp->spt[i] = shadow_trap_nonpresent_pte;
1089 }
1090
1091 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1092                                struct kvm_mmu_page *sp)
1093 {
1094         return 1;
1095 }
1096
1097 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1098 {
1099 }
1100
1101 #define KVM_PAGE_ARRAY_NR 16
1102
1103 struct kvm_mmu_pages {
1104         struct mmu_page_and_offset {
1105                 struct kvm_mmu_page *sp;
1106                 unsigned int idx;
1107         } page[KVM_PAGE_ARRAY_NR];
1108         unsigned int nr;
1109 };
1110
1111 #define for_each_unsync_children(bitmap, idx)           \
1112         for (idx = find_first_bit(bitmap, 512);         \
1113              idx < 512;                                 \
1114              idx = find_next_bit(bitmap, 512, idx+1))
1115
1116 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1117                          int idx)
1118 {
1119         int i;
1120
1121         if (sp->unsync)
1122                 for (i=0; i < pvec->nr; i++)
1123                         if (pvec->page[i].sp == sp)
1124                                 return 0;
1125
1126         pvec->page[pvec->nr].sp = sp;
1127         pvec->page[pvec->nr].idx = idx;
1128         pvec->nr++;
1129         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1130 }
1131
1132 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1133                            struct kvm_mmu_pages *pvec)
1134 {
1135         int i, ret, nr_unsync_leaf = 0;
1136
1137         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1138                 u64 ent = sp->spt[i];
1139
1140                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1141                         struct kvm_mmu_page *child;
1142                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1143
1144                         if (child->unsync_children) {
1145                                 if (mmu_pages_add(pvec, child, i))
1146                                         return -ENOSPC;
1147
1148                                 ret = __mmu_unsync_walk(child, pvec);
1149                                 if (!ret)
1150                                         __clear_bit(i, sp->unsync_child_bitmap);
1151                                 else if (ret > 0)
1152                                         nr_unsync_leaf += ret;
1153                                 else
1154                                         return ret;
1155                         }
1156
1157                         if (child->unsync) {
1158                                 nr_unsync_leaf++;
1159                                 if (mmu_pages_add(pvec, child, i))
1160                                         return -ENOSPC;
1161                         }
1162                 }
1163         }
1164
1165         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1166                 sp->unsync_children = 0;
1167
1168         return nr_unsync_leaf;
1169 }
1170
1171 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1172                            struct kvm_mmu_pages *pvec)
1173 {
1174         if (!sp->unsync_children)
1175                 return 0;
1176
1177         mmu_pages_add(pvec, sp, 0);
1178         return __mmu_unsync_walk(sp, pvec);
1179 }
1180
1181 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1182 {
1183         unsigned index;
1184         struct hlist_head *bucket;
1185         struct kvm_mmu_page *sp;
1186         struct hlist_node *node;
1187
1188         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1189         index = kvm_page_table_hashfn(gfn);
1190         bucket = &kvm->arch.mmu_page_hash[index];
1191         hlist_for_each_entry(sp, node, bucket, hash_link)
1192                 if (sp->gfn == gfn && !sp->role.direct
1193                     && !sp->role.invalid) {
1194                         pgprintk("%s: found role %x\n",
1195                                  __func__, sp->role.word);
1196                         return sp;
1197                 }
1198         return NULL;
1199 }
1200
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1202 {
1203         WARN_ON(!sp->unsync);
1204         sp->unsync = 0;
1205         --kvm->stat.mmu_unsync;
1206 }
1207
1208 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1209
1210 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1211 {
1212         if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1213                 kvm_mmu_zap_page(vcpu->kvm, sp);
1214                 return 1;
1215         }
1216
1217         trace_kvm_mmu_sync_page(sp);
1218         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1219                 kvm_flush_remote_tlbs(vcpu->kvm);
1220         kvm_unlink_unsync_page(vcpu->kvm, sp);
1221         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1222                 kvm_mmu_zap_page(vcpu->kvm, sp);
1223                 return 1;
1224         }
1225
1226         kvm_mmu_flush_tlb(vcpu);
1227         return 0;
1228 }
1229
1230 struct mmu_page_path {
1231         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1232         unsigned int idx[PT64_ROOT_LEVEL-1];
1233 };
1234
1235 #define for_each_sp(pvec, sp, parents, i)                       \
1236                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1237                         sp = pvec.page[i].sp;                   \
1238                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1239                         i = mmu_pages_next(&pvec, &parents, i))
1240
1241 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1242                           struct mmu_page_path *parents,
1243                           int i)
1244 {
1245         int n;
1246
1247         for (n = i+1; n < pvec->nr; n++) {
1248                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1249
1250                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1251                         parents->idx[0] = pvec->page[n].idx;
1252                         return n;
1253                 }
1254
1255                 parents->parent[sp->role.level-2] = sp;
1256                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1257         }
1258
1259         return n;
1260 }
1261
1262 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1263 {
1264         struct kvm_mmu_page *sp;
1265         unsigned int level = 0;
1266
1267         do {
1268                 unsigned int idx = parents->idx[level];
1269
1270                 sp = parents->parent[level];
1271                 if (!sp)
1272                         return;
1273
1274                 --sp->unsync_children;
1275                 WARN_ON((int)sp->unsync_children < 0);
1276                 __clear_bit(idx, sp->unsync_child_bitmap);
1277                 level++;
1278         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1279 }
1280
1281 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1282                                struct mmu_page_path *parents,
1283                                struct kvm_mmu_pages *pvec)
1284 {
1285         parents->parent[parent->role.level-1] = NULL;
1286         pvec->nr = 0;
1287 }
1288
1289 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1290                               struct kvm_mmu_page *parent)
1291 {
1292         int i;
1293         struct kvm_mmu_page *sp;
1294         struct mmu_page_path parents;
1295         struct kvm_mmu_pages pages;
1296
1297         kvm_mmu_pages_init(parent, &parents, &pages);
1298         while (mmu_unsync_walk(parent, &pages)) {
1299                 int protected = 0;
1300
1301                 for_each_sp(pages, sp, parents, i)
1302                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1303
1304                 if (protected)
1305                         kvm_flush_remote_tlbs(vcpu->kvm);
1306
1307                 for_each_sp(pages, sp, parents, i) {
1308                         kvm_sync_page(vcpu, sp);
1309                         mmu_pages_clear_parents(&parents);
1310                 }
1311                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1312                 kvm_mmu_pages_init(parent, &parents, &pages);
1313         }
1314 }
1315
1316 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1317                                              gfn_t gfn,
1318                                              gva_t gaddr,
1319                                              unsigned level,
1320                                              int direct,
1321                                              unsigned access,
1322                                              u64 *parent_pte)
1323 {
1324         union kvm_mmu_page_role role;
1325         unsigned index;
1326         unsigned quadrant;
1327         struct hlist_head *bucket;
1328         struct kvm_mmu_page *sp;
1329         struct hlist_node *node, *tmp;
1330
1331         role = vcpu->arch.mmu.base_role;
1332         role.level = level;
1333         role.direct = direct;
1334         role.access = access;
1335         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1336                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1337                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1338                 role.quadrant = quadrant;
1339         }
1340         index = kvm_page_table_hashfn(gfn);
1341         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1342         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1343                 if (sp->gfn == gfn) {
1344                         if (sp->unsync)
1345                                 if (kvm_sync_page(vcpu, sp))
1346                                         continue;
1347
1348                         if (sp->role.word != role.word)
1349                                 continue;
1350
1351                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1352                         if (sp->unsync_children) {
1353                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1354                                 kvm_mmu_mark_parents_unsync(vcpu, sp);
1355                         }
1356                         trace_kvm_mmu_get_page(sp, false);
1357                         return sp;
1358                 }
1359         ++vcpu->kvm->stat.mmu_cache_miss;
1360         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1361         if (!sp)
1362                 return sp;
1363         sp->gfn = gfn;
1364         sp->role = role;
1365         hlist_add_head(&sp->hash_link, bucket);
1366         if (!direct) {
1367                 if (rmap_write_protect(vcpu->kvm, gfn))
1368                         kvm_flush_remote_tlbs(vcpu->kvm);
1369                 account_shadowed(vcpu->kvm, gfn);
1370         }
1371         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1372                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1373         else
1374                 nonpaging_prefetch_page(vcpu, sp);
1375         trace_kvm_mmu_get_page(sp, true);
1376         return sp;
1377 }
1378
1379 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1380                              struct kvm_vcpu *vcpu, u64 addr)
1381 {
1382         iterator->addr = addr;
1383         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1384         iterator->level = vcpu->arch.mmu.shadow_root_level;
1385         if (iterator->level == PT32E_ROOT_LEVEL) {
1386                 iterator->shadow_addr
1387                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1388                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1389                 --iterator->level;
1390                 if (!iterator->shadow_addr)
1391                         iterator->level = 0;
1392         }
1393 }
1394
1395 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1396 {
1397         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1398                 return false;
1399
1400         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1401                 if (is_large_pte(*iterator->sptep))
1402                         return false;
1403
1404         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1405         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1406         return true;
1407 }
1408
1409 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1410 {
1411         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1412         --iterator->level;
1413 }
1414
1415 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1416                                          struct kvm_mmu_page *sp)
1417 {
1418         unsigned i;
1419         u64 *pt;
1420         u64 ent;
1421
1422         pt = sp->spt;
1423
1424         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1425                 ent = pt[i];
1426
1427                 if (is_shadow_present_pte(ent)) {
1428                         if (!is_last_spte(ent, sp->role.level)) {
1429                                 ent &= PT64_BASE_ADDR_MASK;
1430                                 mmu_page_remove_parent_pte(page_header(ent),
1431                                                            &pt[i]);
1432                         } else {
1433                                 if (is_large_pte(ent))
1434                                         --kvm->stat.lpages;
1435                                 rmap_remove(kvm, &pt[i]);
1436                         }
1437                 }
1438                 pt[i] = shadow_trap_nonpresent_pte;
1439         }
1440 }
1441
1442 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1443 {
1444         mmu_page_remove_parent_pte(sp, parent_pte);
1445 }
1446
1447 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1448 {
1449         int i;
1450         struct kvm_vcpu *vcpu;
1451
1452         kvm_for_each_vcpu(i, vcpu, kvm)
1453                 vcpu->arch.last_pte_updated = NULL;
1454 }
1455
1456 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1457 {
1458         u64 *parent_pte;
1459
1460         while (sp->multimapped || sp->parent_pte) {
1461                 if (!sp->multimapped)
1462                         parent_pte = sp->parent_pte;
1463                 else {
1464                         struct kvm_pte_chain *chain;
1465
1466                         chain = container_of(sp->parent_ptes.first,
1467                                              struct kvm_pte_chain, link);
1468                         parent_pte = chain->parent_ptes[0];
1469                 }
1470                 BUG_ON(!parent_pte);
1471                 kvm_mmu_put_page(sp, parent_pte);
1472                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1473         }
1474 }
1475
1476 static int mmu_zap_unsync_children(struct kvm *kvm,
1477                                    struct kvm_mmu_page *parent)
1478 {
1479         int i, zapped = 0;
1480         struct mmu_page_path parents;
1481         struct kvm_mmu_pages pages;
1482
1483         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1484                 return 0;
1485
1486         kvm_mmu_pages_init(parent, &parents, &pages);
1487         while (mmu_unsync_walk(parent, &pages)) {
1488                 struct kvm_mmu_page *sp;
1489
1490                 for_each_sp(pages, sp, parents, i) {
1491                         kvm_mmu_zap_page(kvm, sp);
1492                         mmu_pages_clear_parents(&parents);
1493                 }
1494                 zapped += pages.nr;
1495                 kvm_mmu_pages_init(parent, &parents, &pages);
1496         }
1497
1498         return zapped;
1499 }
1500
1501 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1502 {
1503         int ret;
1504
1505         trace_kvm_mmu_zap_page(sp);
1506         ++kvm->stat.mmu_shadow_zapped;
1507         ret = mmu_zap_unsync_children(kvm, sp);
1508         kvm_mmu_page_unlink_children(kvm, sp);
1509         kvm_mmu_unlink_parents(kvm, sp);
1510         kvm_flush_remote_tlbs(kvm);
1511         if (!sp->role.invalid && !sp->role.direct)
1512                 unaccount_shadowed(kvm, sp->gfn);
1513         if (sp->unsync)
1514                 kvm_unlink_unsync_page(kvm, sp);
1515         if (!sp->root_count) {
1516                 hlist_del(&sp->hash_link);
1517                 kvm_mmu_free_page(kvm, sp);
1518         } else {
1519                 sp->role.invalid = 1;
1520                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1521                 kvm_reload_remote_mmus(kvm);
1522         }
1523         kvm_mmu_reset_last_pte_updated(kvm);
1524         return ret;
1525 }
1526
1527 /*
1528  * Changing the number of mmu pages allocated to the vm
1529  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1530  */
1531 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1532 {
1533         int used_pages;
1534
1535         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1536         used_pages = max(0, used_pages);
1537
1538         /*
1539          * If we set the number of mmu pages to be smaller be than the
1540          * number of actived pages , we must to free some mmu pages before we
1541          * change the value
1542          */
1543
1544         if (used_pages > kvm_nr_mmu_pages) {
1545                 while (used_pages > kvm_nr_mmu_pages) {
1546                         struct kvm_mmu_page *page;
1547
1548                         page = container_of(kvm->arch.active_mmu_pages.prev,
1549                                             struct kvm_mmu_page, link);
1550                         kvm_mmu_zap_page(kvm, page);
1551                         used_pages--;
1552                 }
1553                 kvm->arch.n_free_mmu_pages = 0;
1554         }
1555         else
1556                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1557                                          - kvm->arch.n_alloc_mmu_pages;
1558
1559         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1560 }
1561
1562 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1563 {
1564         unsigned index;
1565         struct hlist_head *bucket;
1566         struct kvm_mmu_page *sp;
1567         struct hlist_node *node, *n;
1568         int r;
1569
1570         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1571         r = 0;
1572         index = kvm_page_table_hashfn(gfn);
1573         bucket = &kvm->arch.mmu_page_hash[index];
1574         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1575                 if (sp->gfn == gfn && !sp->role.direct) {
1576                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1577                                  sp->role.word);
1578                         r = 1;
1579                         if (kvm_mmu_zap_page(kvm, sp))
1580                                 n = bucket->first;
1581                 }
1582         return r;
1583 }
1584
1585 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1586 {
1587         unsigned index;
1588         struct hlist_head *bucket;
1589         struct kvm_mmu_page *sp;
1590         struct hlist_node *node, *nn;
1591
1592         index = kvm_page_table_hashfn(gfn);
1593         bucket = &kvm->arch.mmu_page_hash[index];
1594         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1595                 if (sp->gfn == gfn && !sp->role.direct
1596                     && !sp->role.invalid) {
1597                         pgprintk("%s: zap %lx %x\n",
1598                                  __func__, gfn, sp->role.word);
1599                         kvm_mmu_zap_page(kvm, sp);
1600                 }
1601         }
1602 }
1603
1604 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1605 {
1606         int slot = memslot_id(kvm, gfn);
1607         struct kvm_mmu_page *sp = page_header(__pa(pte));
1608
1609         __set_bit(slot, sp->slot_bitmap);
1610 }
1611
1612 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1613 {
1614         int i;
1615         u64 *pt = sp->spt;
1616
1617         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1618                 return;
1619
1620         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1621                 if (pt[i] == shadow_notrap_nonpresent_pte)
1622                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1623         }
1624 }
1625
1626 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1627 {
1628         struct page *page;
1629
1630         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1631
1632         if (gpa == UNMAPPED_GVA)
1633                 return NULL;
1634
1635         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1636
1637         return page;
1638 }
1639
1640 /*
1641  * The function is based on mtrr_type_lookup() in
1642  * arch/x86/kernel/cpu/mtrr/generic.c
1643  */
1644 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1645                          u64 start, u64 end)
1646 {
1647         int i;
1648         u64 base, mask;
1649         u8 prev_match, curr_match;
1650         int num_var_ranges = KVM_NR_VAR_MTRR;
1651
1652         if (!mtrr_state->enabled)
1653                 return 0xFF;
1654
1655         /* Make end inclusive end, instead of exclusive */
1656         end--;
1657
1658         /* Look in fixed ranges. Just return the type as per start */
1659         if (mtrr_state->have_fixed && (start < 0x100000)) {
1660                 int idx;
1661
1662                 if (start < 0x80000) {
1663                         idx = 0;
1664                         idx += (start >> 16);
1665                         return mtrr_state->fixed_ranges[idx];
1666                 } else if (start < 0xC0000) {
1667                         idx = 1 * 8;
1668                         idx += ((start - 0x80000) >> 14);
1669                         return mtrr_state->fixed_ranges[idx];
1670                 } else if (start < 0x1000000) {
1671                         idx = 3 * 8;
1672                         idx += ((start - 0xC0000) >> 12);
1673                         return mtrr_state->fixed_ranges[idx];
1674                 }
1675         }
1676
1677         /*
1678          * Look in variable ranges
1679          * Look of multiple ranges matching this address and pick type
1680          * as per MTRR precedence
1681          */
1682         if (!(mtrr_state->enabled & 2))
1683                 return mtrr_state->def_type;
1684
1685         prev_match = 0xFF;
1686         for (i = 0; i < num_var_ranges; ++i) {
1687                 unsigned short start_state, end_state;
1688
1689                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1690                         continue;
1691
1692                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1693                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1694                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1695                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1696
1697                 start_state = ((start & mask) == (base & mask));
1698                 end_state = ((end & mask) == (base & mask));
1699                 if (start_state != end_state)
1700                         return 0xFE;
1701
1702                 if ((start & mask) != (base & mask))
1703                         continue;
1704
1705                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1706                 if (prev_match == 0xFF) {
1707                         prev_match = curr_match;
1708                         continue;
1709                 }
1710
1711                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1712                     curr_match == MTRR_TYPE_UNCACHABLE)
1713                         return MTRR_TYPE_UNCACHABLE;
1714
1715                 if ((prev_match == MTRR_TYPE_WRBACK &&
1716                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1717                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1718                      curr_match == MTRR_TYPE_WRBACK)) {
1719                         prev_match = MTRR_TYPE_WRTHROUGH;
1720                         curr_match = MTRR_TYPE_WRTHROUGH;
1721                 }
1722
1723                 if (prev_match != curr_match)
1724                         return MTRR_TYPE_UNCACHABLE;
1725         }
1726
1727         if (prev_match != 0xFF)
1728                 return prev_match;
1729
1730         return mtrr_state->def_type;
1731 }
1732
1733 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1734 {
1735         u8 mtrr;
1736
1737         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1738                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1739         if (mtrr == 0xfe || mtrr == 0xff)
1740                 mtrr = MTRR_TYPE_WRBACK;
1741         return mtrr;
1742 }
1743 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1744
1745 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1746 {
1747         unsigned index;
1748         struct hlist_head *bucket;
1749         struct kvm_mmu_page *s;
1750         struct hlist_node *node, *n;
1751
1752         trace_kvm_mmu_unsync_page(sp);
1753         index = kvm_page_table_hashfn(sp->gfn);
1754         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1755         /* don't unsync if pagetable is shadowed with multiple roles */
1756         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1757                 if (s->gfn != sp->gfn || s->role.direct)
1758                         continue;
1759                 if (s->role.word != sp->role.word)
1760                         return 1;
1761         }
1762         ++vcpu->kvm->stat.mmu_unsync;
1763         sp->unsync = 1;
1764
1765         kvm_mmu_mark_parents_unsync(vcpu, sp);
1766
1767         mmu_convert_notrap(sp);
1768         return 0;
1769 }
1770
1771 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1772                                   bool can_unsync)
1773 {
1774         struct kvm_mmu_page *shadow;
1775
1776         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1777         if (shadow) {
1778                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1779                         return 1;
1780                 if (shadow->unsync)
1781                         return 0;
1782                 if (can_unsync && oos_shadow)
1783                         return kvm_unsync_page(vcpu, shadow);
1784                 return 1;
1785         }
1786         return 0;
1787 }
1788
1789 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1790                     unsigned pte_access, int user_fault,
1791                     int write_fault, int dirty, int level,
1792                     gfn_t gfn, pfn_t pfn, bool speculative,
1793                     bool can_unsync, bool reset_host_protection)
1794 {
1795         u64 spte;
1796         int ret = 0;
1797
1798         /*
1799          * We don't set the accessed bit, since we sometimes want to see
1800          * whether the guest actually used the pte (in order to detect
1801          * demand paging).
1802          */
1803         spte = shadow_base_present_pte | shadow_dirty_mask;
1804         if (!speculative)
1805                 spte |= shadow_accessed_mask;
1806         if (!dirty)
1807                 pte_access &= ~ACC_WRITE_MASK;
1808         if (pte_access & ACC_EXEC_MASK)
1809                 spte |= shadow_x_mask;
1810         else
1811                 spte |= shadow_nx_mask;
1812         if (pte_access & ACC_USER_MASK)
1813                 spte |= shadow_user_mask;
1814         if (level > PT_PAGE_TABLE_LEVEL)
1815                 spte |= PT_PAGE_SIZE_MASK;
1816         if (tdp_enabled)
1817                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1818                         kvm_is_mmio_pfn(pfn));
1819
1820         if (reset_host_protection)
1821                 spte |= SPTE_HOST_WRITEABLE;
1822
1823         spte |= (u64)pfn << PAGE_SHIFT;
1824
1825         if ((pte_access & ACC_WRITE_MASK)
1826             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1827
1828                 if (level > PT_PAGE_TABLE_LEVEL &&
1829                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1830                         ret = 1;
1831                         spte = shadow_trap_nonpresent_pte;
1832                         goto set_pte;
1833                 }
1834
1835                 spte |= PT_WRITABLE_MASK;
1836
1837                 /*
1838                  * Optimization: for pte sync, if spte was writable the hash
1839                  * lookup is unnecessary (and expensive). Write protection
1840                  * is responsibility of mmu_get_page / kvm_sync_page.
1841                  * Same reasoning can be applied to dirty page accounting.
1842                  */
1843                 if (!can_unsync && is_writable_pte(*sptep))
1844                         goto set_pte;
1845
1846                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1847                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1848                                  __func__, gfn);
1849                         ret = 1;
1850                         pte_access &= ~ACC_WRITE_MASK;
1851                         if (is_writable_pte(spte))
1852                                 spte &= ~PT_WRITABLE_MASK;
1853                 }
1854         }
1855
1856         if (pte_access & ACC_WRITE_MASK)
1857                 mark_page_dirty(vcpu->kvm, gfn);
1858
1859 set_pte:
1860         __set_spte(sptep, spte);
1861         return ret;
1862 }
1863
1864 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1865                          unsigned pt_access, unsigned pte_access,
1866                          int user_fault, int write_fault, int dirty,
1867                          int *ptwrite, int level, gfn_t gfn,
1868                          pfn_t pfn, bool speculative,
1869                          bool reset_host_protection)
1870 {
1871         int was_rmapped = 0;
1872         int was_writable = is_writable_pte(*sptep);
1873         int rmap_count;
1874
1875         pgprintk("%s: spte %llx access %x write_fault %d"
1876                  " user_fault %d gfn %lx\n",
1877                  __func__, *sptep, pt_access,
1878                  write_fault, user_fault, gfn);
1879
1880         if (is_rmap_spte(*sptep)) {
1881                 /*
1882                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1883                  * the parent of the now unreachable PTE.
1884                  */
1885                 if (level > PT_PAGE_TABLE_LEVEL &&
1886                     !is_large_pte(*sptep)) {
1887                         struct kvm_mmu_page *child;
1888                         u64 pte = *sptep;
1889
1890                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1891                         mmu_page_remove_parent_pte(child, sptep);
1892                 } else if (pfn != spte_to_pfn(*sptep)) {
1893                         pgprintk("hfn old %lx new %lx\n",
1894                                  spte_to_pfn(*sptep), pfn);
1895                         rmap_remove(vcpu->kvm, sptep);
1896                 } else
1897                         was_rmapped = 1;
1898         }
1899
1900         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1901                       dirty, level, gfn, pfn, speculative, true,
1902                       reset_host_protection)) {
1903                 if (write_fault)
1904                         *ptwrite = 1;
1905                 kvm_x86_ops->tlb_flush(vcpu);
1906         }
1907
1908         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1909         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1910                  is_large_pte(*sptep)? "2MB" : "4kB",
1911                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1912                  *sptep, sptep);
1913         if (!was_rmapped && is_large_pte(*sptep))
1914                 ++vcpu->kvm->stat.lpages;
1915
1916         page_header_update_slot(vcpu->kvm, sptep, gfn);
1917         if (!was_rmapped) {
1918                 rmap_count = rmap_add(vcpu, sptep, gfn);
1919                 kvm_release_pfn_clean(pfn);
1920                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1921                         rmap_recycle(vcpu, sptep, gfn);
1922         } else {
1923                 if (was_writable)
1924                         kvm_release_pfn_dirty(pfn);
1925                 else
1926                         kvm_release_pfn_clean(pfn);
1927         }
1928         if (speculative) {
1929                 vcpu->arch.last_pte_updated = sptep;
1930                 vcpu->arch.last_pte_gfn = gfn;
1931         }
1932 }
1933
1934 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1935 {
1936 }
1937
1938 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1939                         int level, gfn_t gfn, pfn_t pfn)
1940 {
1941         struct kvm_shadow_walk_iterator iterator;
1942         struct kvm_mmu_page *sp;
1943         int pt_write = 0;
1944         gfn_t pseudo_gfn;
1945
1946         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1947                 if (iterator.level == level) {
1948                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1949                                      0, write, 1, &pt_write,
1950                                      level, gfn, pfn, false, true);
1951                         ++vcpu->stat.pf_fixed;
1952                         break;
1953                 }
1954
1955                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1956                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1957                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1958                                               iterator.level - 1,
1959                                               1, ACC_ALL, iterator.sptep);
1960                         if (!sp) {
1961                                 pgprintk("nonpaging_map: ENOMEM\n");
1962                                 kvm_release_pfn_clean(pfn);
1963                                 return -ENOMEM;
1964                         }
1965
1966                         __set_spte(iterator.sptep,
1967                                    __pa(sp->spt)
1968                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1969                                    | shadow_user_mask | shadow_x_mask);
1970                 }
1971         }
1972         return pt_write;
1973 }
1974
1975 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1976 {
1977         int r;
1978         int level;
1979         pfn_t pfn;
1980         unsigned long mmu_seq;
1981
1982         level = mapping_level(vcpu, gfn);
1983
1984         /*
1985          * This path builds a PAE pagetable - so we can map 2mb pages at
1986          * maximum. Therefore check if the level is larger than that.
1987          */
1988         if (level > PT_DIRECTORY_LEVEL)
1989                 level = PT_DIRECTORY_LEVEL;
1990
1991         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1992
1993         mmu_seq = vcpu->kvm->mmu_notifier_seq;
1994         smp_rmb();
1995         pfn = gfn_to_pfn(vcpu->kvm, gfn);
1996
1997         /* mmio */
1998         if (is_error_pfn(pfn)) {
1999                 kvm_release_pfn_clean(pfn);
2000                 return 1;
2001         }
2002
2003         spin_lock(&vcpu->kvm->mmu_lock);
2004         if (mmu_notifier_retry(vcpu, mmu_seq))
2005                 goto out_unlock;
2006         kvm_mmu_free_some_pages(vcpu);
2007         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2008         spin_unlock(&vcpu->kvm->mmu_lock);
2009
2010
2011         return r;
2012
2013 out_unlock:
2014         spin_unlock(&vcpu->kvm->mmu_lock);
2015         kvm_release_pfn_clean(pfn);
2016         return 0;
2017 }
2018
2019
2020 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2021 {
2022         int i;
2023         struct kvm_mmu_page *sp;
2024
2025         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2026                 return;
2027         spin_lock(&vcpu->kvm->mmu_lock);
2028         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2029                 hpa_t root = vcpu->arch.mmu.root_hpa;
2030
2031                 sp = page_header(root);
2032                 --sp->root_count;
2033                 if (!sp->root_count && sp->role.invalid)
2034                         kvm_mmu_zap_page(vcpu->kvm, sp);
2035                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2036                 spin_unlock(&vcpu->kvm->mmu_lock);
2037                 return;
2038         }
2039         for (i = 0; i < 4; ++i) {
2040                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2041
2042                 if (root) {
2043                         root &= PT64_BASE_ADDR_MASK;
2044                         sp = page_header(root);
2045                         --sp->root_count;
2046                         if (!sp->root_count && sp->role.invalid)
2047                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2048                 }
2049                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2050         }
2051         spin_unlock(&vcpu->kvm->mmu_lock);
2052         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2053 }
2054
2055 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2056 {
2057         int ret = 0;
2058
2059         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2060                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2061                 ret = 1;
2062         }
2063
2064         return ret;
2065 }
2066
2067 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2068 {
2069         int i;
2070         gfn_t root_gfn;
2071         struct kvm_mmu_page *sp;
2072         int direct = 0;
2073         u64 pdptr;
2074
2075         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2076
2077         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2078                 hpa_t root = vcpu->arch.mmu.root_hpa;
2079
2080                 ASSERT(!VALID_PAGE(root));
2081                 if (tdp_enabled)
2082                         direct = 1;
2083                 if (mmu_check_root(vcpu, root_gfn))
2084                         return 1;
2085                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2086                                       PT64_ROOT_LEVEL, direct,
2087                                       ACC_ALL, NULL);
2088                 root = __pa(sp->spt);
2089                 ++sp->root_count;
2090                 vcpu->arch.mmu.root_hpa = root;
2091                 return 0;
2092         }
2093         direct = !is_paging(vcpu);
2094         if (tdp_enabled)
2095                 direct = 1;
2096         for (i = 0; i < 4; ++i) {
2097                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2098
2099                 ASSERT(!VALID_PAGE(root));
2100                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2101                         pdptr = kvm_pdptr_read(vcpu, i);
2102                         if (!is_present_gpte(pdptr)) {
2103                                 vcpu->arch.mmu.pae_root[i] = 0;
2104                                 continue;
2105                         }
2106                         root_gfn = pdptr >> PAGE_SHIFT;
2107                 } else if (vcpu->arch.mmu.root_level == 0)
2108                         root_gfn = 0;
2109                 if (mmu_check_root(vcpu, root_gfn))
2110                         return 1;
2111                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2112                                       PT32_ROOT_LEVEL, direct,
2113                                       ACC_ALL, NULL);
2114                 root = __pa(sp->spt);
2115                 ++sp->root_count;
2116                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2117         }
2118         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2119         return 0;
2120 }
2121
2122 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2123 {
2124         int i;
2125         struct kvm_mmu_page *sp;
2126
2127         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2128                 return;
2129         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2130                 hpa_t root = vcpu->arch.mmu.root_hpa;
2131                 sp = page_header(root);
2132                 mmu_sync_children(vcpu, sp);
2133                 return;
2134         }
2135         for (i = 0; i < 4; ++i) {
2136                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2137
2138                 if (root && VALID_PAGE(root)) {
2139                         root &= PT64_BASE_ADDR_MASK;
2140                         sp = page_header(root);
2141                         mmu_sync_children(vcpu, sp);
2142                 }
2143         }
2144 }
2145
2146 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2147 {
2148         spin_lock(&vcpu->kvm->mmu_lock);
2149         mmu_sync_roots(vcpu);
2150         spin_unlock(&vcpu->kvm->mmu_lock);
2151 }
2152
2153 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2154                                   u32 access, u32 *error)
2155 {
2156         if (error)
2157                 *error = 0;
2158         return vaddr;
2159 }
2160
2161 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2162                                 u32 error_code)
2163 {
2164         gfn_t gfn;
2165         int r;
2166
2167         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2168         r = mmu_topup_memory_caches(vcpu);
2169         if (r)
2170                 return r;
2171
2172         ASSERT(vcpu);
2173         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2174
2175         gfn = gva >> PAGE_SHIFT;
2176
2177         return nonpaging_map(vcpu, gva & PAGE_MASK,
2178                              error_code & PFERR_WRITE_MASK, gfn);
2179 }
2180
2181 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2182                                 u32 error_code)
2183 {
2184         pfn_t pfn;
2185         int r;
2186         int level;
2187         gfn_t gfn = gpa >> PAGE_SHIFT;
2188         unsigned long mmu_seq;
2189
2190         ASSERT(vcpu);
2191         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2192
2193         r = mmu_topup_memory_caches(vcpu);
2194         if (r)
2195                 return r;
2196
2197         level = mapping_level(vcpu, gfn);
2198
2199         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2200
2201         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2202         smp_rmb();
2203         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2204         if (is_error_pfn(pfn)) {
2205                 kvm_release_pfn_clean(pfn);
2206                 return 1;
2207         }
2208         spin_lock(&vcpu->kvm->mmu_lock);
2209         if (mmu_notifier_retry(vcpu, mmu_seq))
2210                 goto out_unlock;
2211         kvm_mmu_free_some_pages(vcpu);
2212         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2213                          level, gfn, pfn);
2214         spin_unlock(&vcpu->kvm->mmu_lock);
2215
2216         return r;
2217
2218 out_unlock:
2219         spin_unlock(&vcpu->kvm->mmu_lock);
2220         kvm_release_pfn_clean(pfn);
2221         return 0;
2222 }
2223
2224 static void nonpaging_free(struct kvm_vcpu *vcpu)
2225 {
2226         mmu_free_roots(vcpu);
2227 }
2228
2229 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2230 {
2231         struct kvm_mmu *context = &vcpu->arch.mmu;
2232
2233         context->new_cr3 = nonpaging_new_cr3;
2234         context->page_fault = nonpaging_page_fault;
2235         context->gva_to_gpa = nonpaging_gva_to_gpa;
2236         context->free = nonpaging_free;
2237         context->prefetch_page = nonpaging_prefetch_page;
2238         context->sync_page = nonpaging_sync_page;
2239         context->invlpg = nonpaging_invlpg;
2240         context->root_level = 0;
2241         context->shadow_root_level = PT32E_ROOT_LEVEL;
2242         context->root_hpa = INVALID_PAGE;
2243         return 0;
2244 }
2245
2246 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2247 {
2248         ++vcpu->stat.tlb_flush;
2249         kvm_x86_ops->tlb_flush(vcpu);
2250 }
2251
2252 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2253 {
2254         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2255         mmu_free_roots(vcpu);
2256 }
2257
2258 static void inject_page_fault(struct kvm_vcpu *vcpu,
2259                               u64 addr,
2260                               u32 err_code)
2261 {
2262         kvm_inject_page_fault(vcpu, addr, err_code);
2263 }
2264
2265 static void paging_free(struct kvm_vcpu *vcpu)
2266 {
2267         nonpaging_free(vcpu);
2268 }
2269
2270 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2271 {
2272         int bit7;
2273
2274         bit7 = (gpte >> 7) & 1;
2275         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2276 }
2277
2278 #define PTTYPE 64
2279 #include "paging_tmpl.h"
2280 #undef PTTYPE
2281
2282 #define PTTYPE 32
2283 #include "paging_tmpl.h"
2284 #undef PTTYPE
2285
2286 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2287 {
2288         struct kvm_mmu *context = &vcpu->arch.mmu;
2289         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2290         u64 exb_bit_rsvd = 0;
2291
2292         if (!is_nx(vcpu))
2293                 exb_bit_rsvd = rsvd_bits(63, 63);
2294         switch (level) {
2295         case PT32_ROOT_LEVEL:
2296                 /* no rsvd bits for 2 level 4K page table entries */
2297                 context->rsvd_bits_mask[0][1] = 0;
2298                 context->rsvd_bits_mask[0][0] = 0;
2299                 if (is_cpuid_PSE36())
2300                         /* 36bits PSE 4MB page */
2301                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2302                 else
2303                         /* 32 bits PSE 4MB page */
2304                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2305                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2306                 break;
2307         case PT32E_ROOT_LEVEL:
2308                 context->rsvd_bits_mask[0][2] =
2309                         rsvd_bits(maxphyaddr, 63) |
2310                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2311                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2312                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2313                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2314                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2315                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2316                         rsvd_bits(maxphyaddr, 62) |
2317                         rsvd_bits(13, 20);              /* large page */
2318                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2319                 break;
2320         case PT64_ROOT_LEVEL:
2321                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2322                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2323                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2324                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2325                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2326                         rsvd_bits(maxphyaddr, 51);
2327                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2328                         rsvd_bits(maxphyaddr, 51);
2329                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2330                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2331                         rsvd_bits(maxphyaddr, 51) |
2332                         rsvd_bits(13, 29);
2333                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2334                         rsvd_bits(maxphyaddr, 51) |
2335                         rsvd_bits(13, 20);              /* large page */
2336                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2337                 break;
2338         }
2339 }
2340
2341 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2342 {
2343         struct kvm_mmu *context = &vcpu->arch.mmu;
2344
2345         ASSERT(is_pae(vcpu));
2346         context->new_cr3 = paging_new_cr3;
2347         context->page_fault = paging64_page_fault;
2348         context->gva_to_gpa = paging64_gva_to_gpa;
2349         context->prefetch_page = paging64_prefetch_page;
2350         context->sync_page = paging64_sync_page;
2351         context->invlpg = paging64_invlpg;
2352         context->free = paging_free;
2353         context->root_level = level;
2354         context->shadow_root_level = level;
2355         context->root_hpa = INVALID_PAGE;
2356         return 0;
2357 }
2358
2359 static int paging64_init_context(struct kvm_vcpu *vcpu)
2360 {
2361         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2362         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2363 }
2364
2365 static int paging32_init_context(struct kvm_vcpu *vcpu)
2366 {
2367         struct kvm_mmu *context = &vcpu->arch.mmu;
2368
2369         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2370         context->new_cr3 = paging_new_cr3;
2371         context->page_fault = paging32_page_fault;
2372         context->gva_to_gpa = paging32_gva_to_gpa;
2373         context->free = paging_free;
2374         context->prefetch_page = paging32_prefetch_page;
2375         context->sync_page = paging32_sync_page;
2376         context->invlpg = paging32_invlpg;
2377         context->root_level = PT32_ROOT_LEVEL;
2378         context->shadow_root_level = PT32E_ROOT_LEVEL;
2379         context->root_hpa = INVALID_PAGE;
2380         return 0;
2381 }
2382
2383 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2384 {
2385         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2386         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2387 }
2388
2389 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2390 {
2391         struct kvm_mmu *context = &vcpu->arch.mmu;
2392
2393         context->new_cr3 = nonpaging_new_cr3;
2394         context->page_fault = tdp_page_fault;
2395         context->free = nonpaging_free;
2396         context->prefetch_page = nonpaging_prefetch_page;
2397         context->sync_page = nonpaging_sync_page;
2398         context->invlpg = nonpaging_invlpg;
2399         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2400         context->root_hpa = INVALID_PAGE;
2401
2402         if (!is_paging(vcpu)) {
2403                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2404                 context->root_level = 0;
2405         } else if (is_long_mode(vcpu)) {
2406                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2407                 context->gva_to_gpa = paging64_gva_to_gpa;
2408                 context->root_level = PT64_ROOT_LEVEL;
2409         } else if (is_pae(vcpu)) {
2410                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2411                 context->gva_to_gpa = paging64_gva_to_gpa;
2412                 context->root_level = PT32E_ROOT_LEVEL;
2413         } else {
2414                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2415                 context->gva_to_gpa = paging32_gva_to_gpa;
2416                 context->root_level = PT32_ROOT_LEVEL;
2417         }
2418
2419         return 0;
2420 }
2421
2422 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2423 {
2424         int r;
2425
2426         ASSERT(vcpu);
2427         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2428
2429         if (!is_paging(vcpu))
2430                 r = nonpaging_init_context(vcpu);
2431         else if (is_long_mode(vcpu))
2432                 r = paging64_init_context(vcpu);
2433         else if (is_pae(vcpu))
2434                 r = paging32E_init_context(vcpu);
2435         else
2436                 r = paging32_init_context(vcpu);
2437
2438         vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2439
2440         return r;
2441 }
2442
2443 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2444 {
2445         vcpu->arch.update_pte.pfn = bad_pfn;
2446
2447         if (tdp_enabled)
2448                 return init_kvm_tdp_mmu(vcpu);
2449         else
2450                 return init_kvm_softmmu(vcpu);
2451 }
2452
2453 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2454 {
2455         ASSERT(vcpu);
2456         if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2457                 vcpu->arch.mmu.free(vcpu);
2458                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2459         }
2460 }
2461
2462 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2463 {
2464         destroy_kvm_mmu(vcpu);
2465         return init_kvm_mmu(vcpu);
2466 }
2467 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2468
2469 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2470 {
2471         int r;
2472
2473         r = mmu_topup_memory_caches(vcpu);
2474         if (r)
2475                 goto out;
2476         spin_lock(&vcpu->kvm->mmu_lock);
2477         kvm_mmu_free_some_pages(vcpu);
2478         r = mmu_alloc_roots(vcpu);
2479         mmu_sync_roots(vcpu);
2480         spin_unlock(&vcpu->kvm->mmu_lock);
2481         if (r)
2482                 goto out;
2483         /* set_cr3() should ensure TLB has been flushed */
2484         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2485 out:
2486         return r;
2487 }
2488 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2489
2490 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2491 {
2492         mmu_free_roots(vcpu);
2493 }
2494
2495 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2496                                   struct kvm_mmu_page *sp,
2497                                   u64 *spte)
2498 {
2499         u64 pte;
2500         struct kvm_mmu_page *child;
2501
2502         pte = *spte;
2503         if (is_shadow_present_pte(pte)) {
2504                 if (is_last_spte(pte, sp->role.level))
2505                         rmap_remove(vcpu->kvm, spte);
2506                 else {
2507                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2508                         mmu_page_remove_parent_pte(child, spte);
2509                 }
2510         }
2511         __set_spte(spte, shadow_trap_nonpresent_pte);
2512         if (is_large_pte(pte))
2513                 --vcpu->kvm->stat.lpages;
2514 }
2515
2516 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2517                                   struct kvm_mmu_page *sp,
2518                                   u64 *spte,
2519                                   const void *new)
2520 {
2521         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2522                 ++vcpu->kvm->stat.mmu_pde_zapped;
2523                 return;
2524         }
2525
2526         ++vcpu->kvm->stat.mmu_pte_updated;
2527         if (sp->role.glevels == PT32_ROOT_LEVEL)
2528                 paging32_update_pte(vcpu, sp, spte, new);
2529         else
2530                 paging64_update_pte(vcpu, sp, spte, new);
2531 }
2532
2533 static bool need_remote_flush(u64 old, u64 new)
2534 {
2535         if (!is_shadow_present_pte(old))
2536                 return false;
2537         if (!is_shadow_present_pte(new))
2538                 return true;
2539         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2540                 return true;
2541         old ^= PT64_NX_MASK;
2542         new ^= PT64_NX_MASK;
2543         return (old & ~new & PT64_PERM_MASK) != 0;
2544 }
2545
2546 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2547 {
2548         if (need_remote_flush(old, new))
2549                 kvm_flush_remote_tlbs(vcpu->kvm);
2550         else
2551                 kvm_mmu_flush_tlb(vcpu);
2552 }
2553
2554 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2555 {
2556         u64 *spte = vcpu->arch.last_pte_updated;
2557
2558         return !!(spte && (*spte & shadow_accessed_mask));
2559 }
2560
2561 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2562                                           const u8 *new, int bytes)
2563 {
2564         gfn_t gfn;
2565         int r;
2566         u64 gpte = 0;
2567         pfn_t pfn;
2568
2569         if (bytes != 4 && bytes != 8)
2570                 return;
2571
2572         /*
2573          * Assume that the pte write on a page table of the same type
2574          * as the current vcpu paging mode.  This is nearly always true
2575          * (might be false while changing modes).  Note it is verified later
2576          * by update_pte().
2577          */
2578         if (is_pae(vcpu)) {
2579                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2580                 if ((bytes == 4) && (gpa % 4 == 0)) {
2581                         r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2582                         if (r)
2583                                 return;
2584                         memcpy((void *)&gpte + (gpa % 8), new, 4);
2585                 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2586                         memcpy((void *)&gpte, new, 8);
2587                 }
2588         } else {
2589                 if ((bytes == 4) && (gpa % 4 == 0))
2590                         memcpy((void *)&gpte, new, 4);
2591         }
2592         if (!is_present_gpte(gpte))
2593                 return;
2594         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2595
2596         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2597         smp_rmb();
2598         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2599
2600         if (is_error_pfn(pfn)) {
2601                 kvm_release_pfn_clean(pfn);
2602                 return;
2603         }
2604         vcpu->arch.update_pte.gfn = gfn;
2605         vcpu->arch.update_pte.pfn = pfn;
2606 }
2607
2608 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2609 {
2610         u64 *spte = vcpu->arch.last_pte_updated;
2611
2612         if (spte
2613             && vcpu->arch.last_pte_gfn == gfn
2614             && shadow_accessed_mask
2615             && !(*spte & shadow_accessed_mask)
2616             && is_shadow_present_pte(*spte))
2617                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2618 }
2619
2620 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2621                        const u8 *new, int bytes,
2622                        bool guest_initiated)
2623 {
2624         gfn_t gfn = gpa >> PAGE_SHIFT;
2625         struct kvm_mmu_page *sp;
2626         struct hlist_node *node, *n;
2627         struct hlist_head *bucket;
2628         unsigned index;
2629         u64 entry, gentry;
2630         u64 *spte;
2631         unsigned offset = offset_in_page(gpa);
2632         unsigned pte_size;
2633         unsigned page_offset;
2634         unsigned misaligned;
2635         unsigned quadrant;
2636         int level;
2637         int flooded = 0;
2638         int npte;
2639         int r;
2640
2641         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2642         mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2643         spin_lock(&vcpu->kvm->mmu_lock);
2644         kvm_mmu_access_page(vcpu, gfn);
2645         kvm_mmu_free_some_pages(vcpu);
2646         ++vcpu->kvm->stat.mmu_pte_write;
2647         kvm_mmu_audit(vcpu, "pre pte write");
2648         if (guest_initiated) {
2649                 if (gfn == vcpu->arch.last_pt_write_gfn
2650                     && !last_updated_pte_accessed(vcpu)) {
2651                         ++vcpu->arch.last_pt_write_count;
2652                         if (vcpu->arch.last_pt_write_count >= 3)
2653                                 flooded = 1;
2654                 } else {
2655                         vcpu->arch.last_pt_write_gfn = gfn;
2656                         vcpu->arch.last_pt_write_count = 1;
2657                         vcpu->arch.last_pte_updated = NULL;
2658                 }
2659         }
2660         index = kvm_page_table_hashfn(gfn);
2661         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2662         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2663                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2664                         continue;
2665                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2666                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2667                 misaligned |= bytes < 4;
2668                 if (misaligned || flooded) {
2669                         /*
2670                          * Misaligned accesses are too much trouble to fix
2671                          * up; also, they usually indicate a page is not used
2672                          * as a page table.
2673                          *
2674                          * If we're seeing too many writes to a page,
2675                          * it may no longer be a page table, or we may be
2676                          * forking, in which case it is better to unmap the
2677                          * page.
2678                          */
2679                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2680                                  gpa, bytes, sp->role.word);
2681                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2682                                 n = bucket->first;
2683                         ++vcpu->kvm->stat.mmu_flooded;
2684                         continue;
2685                 }
2686                 page_offset = offset;
2687                 level = sp->role.level;
2688                 npte = 1;
2689                 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2690                         page_offset <<= 1;      /* 32->64 */
2691                         /*
2692                          * A 32-bit pde maps 4MB while the shadow pdes map
2693                          * only 2MB.  So we need to double the offset again
2694                          * and zap two pdes instead of one.
2695                          */
2696                         if (level == PT32_ROOT_LEVEL) {
2697                                 page_offset &= ~7; /* kill rounding error */
2698                                 page_offset <<= 1;
2699                                 npte = 2;
2700                         }
2701                         quadrant = page_offset >> PAGE_SHIFT;
2702                         page_offset &= ~PAGE_MASK;
2703                         if (quadrant != sp->role.quadrant)
2704                                 continue;
2705                 }
2706                 spte = &sp->spt[page_offset / sizeof(*spte)];
2707                 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2708                         gentry = 0;
2709                         r = kvm_read_guest_atomic(vcpu->kvm,
2710                                                   gpa & ~(u64)(pte_size - 1),
2711                                                   &gentry, pte_size);
2712                         new = (const void *)&gentry;
2713                         if (r < 0)
2714                                 new = NULL;
2715                 }
2716                 while (npte--) {
2717                         entry = *spte;
2718                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2719                         if (new)
2720                                 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2721                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2722                         ++spte;
2723                 }
2724         }
2725         kvm_mmu_audit(vcpu, "post pte write");
2726         spin_unlock(&vcpu->kvm->mmu_lock);
2727         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2728                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2729                 vcpu->arch.update_pte.pfn = bad_pfn;
2730         }
2731 }
2732
2733 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2734 {
2735         gpa_t gpa;
2736         int r;
2737
2738         if (tdp_enabled)
2739                 return 0;
2740
2741         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2742
2743         spin_lock(&vcpu->kvm->mmu_lock);
2744         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2745         spin_unlock(&vcpu->kvm->mmu_lock);
2746         return r;
2747 }
2748 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2749
2750 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2751 {
2752         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2753                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2754                 struct kvm_mmu_page *sp;
2755
2756                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2757                                   struct kvm_mmu_page, link);
2758                 kvm_mmu_zap_page(vcpu->kvm, sp);
2759                 ++vcpu->kvm->stat.mmu_recycled;
2760         }
2761 }
2762
2763 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2764 {
2765         int r;
2766         enum emulation_result er;
2767
2768         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2769         if (r < 0)
2770                 goto out;
2771
2772         if (!r) {
2773                 r = 1;
2774                 goto out;
2775         }
2776
2777         r = mmu_topup_memory_caches(vcpu);
2778         if (r)
2779                 goto out;
2780
2781         er = emulate_instruction(vcpu, cr2, error_code, 0);
2782
2783         switch (er) {
2784         case EMULATE_DONE:
2785                 return 1;
2786         case EMULATE_DO_MMIO:
2787                 ++vcpu->stat.mmio_exits;
2788                 return 0;
2789         case EMULATE_FAIL:
2790                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2791                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2792                 vcpu->run->internal.ndata = 0;
2793                 return 0;
2794         default:
2795                 BUG();
2796         }
2797 out:
2798         return r;
2799 }
2800 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2801
2802 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2803 {
2804         vcpu->arch.mmu.invlpg(vcpu, gva);
2805         kvm_mmu_flush_tlb(vcpu);
2806         ++vcpu->stat.invlpg;
2807 }
2808 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2809
2810 void kvm_enable_tdp(void)
2811 {
2812         tdp_enabled = true;
2813 }
2814 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2815
2816 void kvm_disable_tdp(void)
2817 {
2818         tdp_enabled = false;
2819 }
2820 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2821
2822 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2823 {
2824         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2825 }
2826
2827 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2828 {
2829         struct page *page;
2830         int i;
2831
2832         ASSERT(vcpu);
2833
2834         /*
2835          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2836          * Therefore we need to allocate shadow page tables in the first
2837          * 4GB of memory, which happens to fit the DMA32 zone.
2838          */
2839         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2840         if (!page)
2841                 return -ENOMEM;
2842
2843         vcpu->arch.mmu.pae_root = page_address(page);
2844         for (i = 0; i < 4; ++i)
2845                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2846
2847         return 0;
2848 }
2849
2850 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2851 {
2852         ASSERT(vcpu);
2853         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2854
2855         return alloc_mmu_pages(vcpu);
2856 }
2857
2858 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2859 {
2860         ASSERT(vcpu);
2861         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2862
2863         return init_kvm_mmu(vcpu);
2864 }
2865
2866 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2867 {
2868         ASSERT(vcpu);
2869
2870         destroy_kvm_mmu(vcpu);
2871         free_mmu_pages(vcpu);
2872         mmu_free_memory_caches(vcpu);
2873 }
2874
2875 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2876 {
2877         struct kvm_mmu_page *sp;
2878
2879         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2880                 int i;
2881                 u64 *pt;
2882
2883                 if (!test_bit(slot, sp->slot_bitmap))
2884                         continue;
2885
2886                 pt = sp->spt;
2887                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2888                         /* avoid RMW */
2889                         if (pt[i] & PT_WRITABLE_MASK)
2890                                 pt[i] &= ~PT_WRITABLE_MASK;
2891         }
2892         kvm_flush_remote_tlbs(kvm);
2893 }
2894
2895 void kvm_mmu_zap_all(struct kvm *kvm)
2896 {
2897         struct kvm_mmu_page *sp, *node;
2898
2899         spin_lock(&kvm->mmu_lock);
2900         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2901                 if (kvm_mmu_zap_page(kvm, sp))
2902                         node = container_of(kvm->arch.active_mmu_pages.next,
2903                                             struct kvm_mmu_page, link);
2904         spin_unlock(&kvm->mmu_lock);
2905
2906         kvm_flush_remote_tlbs(kvm);
2907 }
2908
2909 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2910 {
2911         struct kvm_mmu_page *page;
2912
2913         page = container_of(kvm->arch.active_mmu_pages.prev,
2914                             struct kvm_mmu_page, link);
2915         kvm_mmu_zap_page(kvm, page);
2916 }
2917
2918 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2919 {
2920         struct kvm *kvm;
2921         struct kvm *kvm_freed = NULL;
2922         int cache_count = 0;
2923
2924         spin_lock(&kvm_lock);
2925
2926         list_for_each_entry(kvm, &vm_list, vm_list) {
2927                 int npages, idx;
2928
2929                 idx = srcu_read_lock(&kvm->srcu);
2930                 spin_lock(&kvm->mmu_lock);
2931                 npages = kvm->arch.n_alloc_mmu_pages -
2932                          kvm->arch.n_free_mmu_pages;
2933                 cache_count += npages;
2934                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2935                         kvm_mmu_remove_one_alloc_mmu_page(kvm);
2936                         cache_count--;
2937                         kvm_freed = kvm;
2938                 }
2939                 nr_to_scan--;
2940
2941                 spin_unlock(&kvm->mmu_lock);
2942                 srcu_read_unlock(&kvm->srcu, idx);
2943         }
2944         if (kvm_freed)
2945                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2946
2947         spin_unlock(&kvm_lock);
2948
2949         return cache_count;
2950 }
2951
2952 static struct shrinker mmu_shrinker = {
2953         .shrink = mmu_shrink,
2954         .seeks = DEFAULT_SEEKS * 10,
2955 };
2956
2957 static void mmu_destroy_caches(void)
2958 {
2959         if (pte_chain_cache)
2960                 kmem_cache_destroy(pte_chain_cache);
2961         if (rmap_desc_cache)
2962                 kmem_cache_destroy(rmap_desc_cache);
2963         if (mmu_page_header_cache)
2964                 kmem_cache_destroy(mmu_page_header_cache);
2965 }
2966
2967 void kvm_mmu_module_exit(void)
2968 {
2969         mmu_destroy_caches();
2970         unregister_shrinker(&mmu_shrinker);
2971 }
2972
2973 int kvm_mmu_module_init(void)
2974 {
2975         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2976                                             sizeof(struct kvm_pte_chain),
2977                                             0, 0, NULL);
2978         if (!pte_chain_cache)
2979                 goto nomem;
2980         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2981                                             sizeof(struct kvm_rmap_desc),
2982                                             0, 0, NULL);
2983         if (!rmap_desc_cache)
2984                 goto nomem;
2985
2986         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2987                                                   sizeof(struct kvm_mmu_page),
2988                                                   0, 0, NULL);
2989         if (!mmu_page_header_cache)
2990                 goto nomem;
2991
2992         register_shrinker(&mmu_shrinker);
2993
2994         return 0;
2995
2996 nomem:
2997         mmu_destroy_caches();
2998         return -ENOMEM;
2999 }
3000
3001 /*
3002  * Caculate mmu pages needed for kvm.
3003  */
3004 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3005 {
3006         int i;
3007         unsigned int nr_mmu_pages;
3008         unsigned int  nr_pages = 0;
3009         struct kvm_memslots *slots;
3010
3011         slots = rcu_dereference(kvm->memslots);
3012         for (i = 0; i < slots->nmemslots; i++)
3013                 nr_pages += slots->memslots[i].npages;
3014
3015         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3016         nr_mmu_pages = max(nr_mmu_pages,
3017                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3018
3019         return nr_mmu_pages;
3020 }
3021
3022 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3023                                 unsigned len)
3024 {
3025         if (len > buffer->len)
3026                 return NULL;
3027         return buffer->ptr;
3028 }
3029
3030 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3031                                 unsigned len)
3032 {
3033         void *ret;
3034
3035         ret = pv_mmu_peek_buffer(buffer, len);
3036         if (!ret)
3037                 return ret;
3038         buffer->ptr += len;
3039         buffer->len -= len;
3040         buffer->processed += len;
3041         return ret;
3042 }
3043
3044 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3045                              gpa_t addr, gpa_t value)
3046 {
3047         int bytes = 8;
3048         int r;
3049
3050         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3051                 bytes = 4;
3052
3053         r = mmu_topup_memory_caches(vcpu);
3054         if (r)
3055                 return r;
3056
3057         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3058                 return -EFAULT;
3059
3060         return 1;
3061 }
3062
3063 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3064 {
3065         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3066         return 1;
3067 }
3068
3069 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3070 {
3071         spin_lock(&vcpu->kvm->mmu_lock);
3072         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3073         spin_unlock(&vcpu->kvm->mmu_lock);
3074         return 1;
3075 }
3076
3077 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3078                              struct kvm_pv_mmu_op_buffer *buffer)
3079 {
3080         struct kvm_mmu_op_header *header;
3081
3082         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3083         if (!header)
3084                 return 0;
3085         switch (header->op) {
3086         case KVM_MMU_OP_WRITE_PTE: {
3087                 struct kvm_mmu_op_write_pte *wpte;
3088
3089                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3090                 if (!wpte)
3091                         return 0;
3092                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3093                                         wpte->pte_val);
3094         }
3095         case KVM_MMU_OP_FLUSH_TLB: {
3096                 struct kvm_mmu_op_flush_tlb *ftlb;
3097
3098                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3099                 if (!ftlb)
3100                         return 0;
3101                 return kvm_pv_mmu_flush_tlb(vcpu);
3102         }
3103         case KVM_MMU_OP_RELEASE_PT: {
3104                 struct kvm_mmu_op_release_pt *rpt;
3105
3106                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3107                 if (!rpt)
3108                         return 0;
3109                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3110         }
3111         default: return 0;
3112         }
3113 }
3114
3115 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3116                   gpa_t addr, unsigned long *ret)
3117 {
3118         int r;
3119         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3120
3121         buffer->ptr = buffer->buf;
3122         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3123         buffer->processed = 0;
3124
3125         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3126         if (r)
3127                 goto out;
3128
3129         while (buffer->len) {
3130                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3131                 if (r < 0)
3132                         goto out;
3133                 if (r == 0)
3134                         break;
3135         }
3136
3137         r = 1;
3138 out:
3139         *ret = buffer->processed;
3140         return r;
3141 }
3142
3143 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3144 {
3145         struct kvm_shadow_walk_iterator iterator;
3146         int nr_sptes = 0;
3147
3148         spin_lock(&vcpu->kvm->mmu_lock);
3149         for_each_shadow_entry(vcpu, addr, iterator) {
3150                 sptes[iterator.level-1] = *iterator.sptep;
3151                 nr_sptes++;
3152                 if (!is_shadow_present_pte(*iterator.sptep))
3153                         break;
3154         }
3155         spin_unlock(&vcpu->kvm->mmu_lock);
3156
3157         return nr_sptes;
3158 }
3159 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3160
3161 #ifdef AUDIT
3162
3163 static const char *audit_msg;
3164
3165 static gva_t canonicalize(gva_t gva)
3166 {
3167 #ifdef CONFIG_X86_64
3168         gva = (long long)(gva << 16) >> 16;
3169 #endif
3170         return gva;
3171 }
3172
3173
3174 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3175                                  u64 *sptep);
3176
3177 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3178                             inspect_spte_fn fn)
3179 {
3180         int i;
3181
3182         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3183                 u64 ent = sp->spt[i];
3184
3185                 if (is_shadow_present_pte(ent)) {
3186                         if (!is_last_spte(ent, sp->role.level)) {
3187                                 struct kvm_mmu_page *child;
3188                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3189                                 __mmu_spte_walk(kvm, child, fn);
3190                         } else
3191                                 fn(kvm, sp, &sp->spt[i]);
3192                 }
3193         }
3194 }
3195
3196 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3197 {
3198         int i;
3199         struct kvm_mmu_page *sp;
3200
3201         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3202                 return;
3203         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3204                 hpa_t root = vcpu->arch.mmu.root_hpa;
3205                 sp = page_header(root);
3206                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3207                 return;
3208         }
3209         for (i = 0; i < 4; ++i) {
3210                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3211
3212                 if (root && VALID_PAGE(root)) {
3213                         root &= PT64_BASE_ADDR_MASK;
3214                         sp = page_header(root);
3215                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3216                 }
3217         }
3218         return;
3219 }
3220
3221 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3222                                 gva_t va, int level)
3223 {
3224         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3225         int i;
3226         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3227
3228         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3229                 u64 ent = pt[i];
3230
3231                 if (ent == shadow_trap_nonpresent_pte)
3232                         continue;
3233
3234                 va = canonicalize(va);
3235                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3236                         audit_mappings_page(vcpu, ent, va, level - 1);
3237                 else {
3238                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3239                         gfn_t gfn = gpa >> PAGE_SHIFT;
3240                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3241                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3242
3243                         if (is_error_pfn(pfn)) {
3244                                 kvm_release_pfn_clean(pfn);
3245                                 continue;
3246                         }
3247
3248                         if (is_shadow_present_pte(ent)
3249                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3250                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3251                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3252                                        audit_msg, vcpu->arch.mmu.root_level,
3253                                        va, gpa, hpa, ent,
3254                                        is_shadow_present_pte(ent));
3255                         else if (ent == shadow_notrap_nonpresent_pte
3256                                  && !is_error_hpa(hpa))
3257                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3258                                        " valid guest gva %lx\n", audit_msg, va);
3259                         kvm_release_pfn_clean(pfn);
3260
3261                 }
3262         }
3263 }
3264
3265 static void audit_mappings(struct kvm_vcpu *vcpu)
3266 {
3267         unsigned i;
3268
3269         if (vcpu->arch.mmu.root_level == 4)
3270                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3271         else
3272                 for (i = 0; i < 4; ++i)
3273                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3274                                 audit_mappings_page(vcpu,
3275                                                     vcpu->arch.mmu.pae_root[i],
3276                                                     i << 30,
3277                                                     2);
3278 }
3279
3280 static int count_rmaps(struct kvm_vcpu *vcpu)
3281 {
3282         int nmaps = 0;
3283         int i, j, k, idx;
3284
3285         idx = srcu_read_lock(&kvm->srcu);
3286         slots = rcu_dereference(kvm->memslots);
3287         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3288                 struct kvm_memory_slot *m = &slots->memslots[i];
3289                 struct kvm_rmap_desc *d;
3290
3291                 for (j = 0; j < m->npages; ++j) {
3292                         unsigned long *rmapp = &m->rmap[j];
3293
3294                         if (!*rmapp)
3295                                 continue;
3296                         if (!(*rmapp & 1)) {
3297                                 ++nmaps;
3298                                 continue;
3299                         }
3300                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3301                         while (d) {
3302                                 for (k = 0; k < RMAP_EXT; ++k)
3303                                         if (d->sptes[k])
3304                                                 ++nmaps;
3305                                         else
3306                                                 break;
3307                                 d = d->more;
3308                         }
3309                 }
3310         }
3311         srcu_read_unlock(&kvm->srcu, idx);
3312         return nmaps;
3313 }
3314
3315 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3316 {
3317         unsigned long *rmapp;
3318         struct kvm_mmu_page *rev_sp;
3319         gfn_t gfn;
3320
3321         if (*sptep & PT_WRITABLE_MASK) {
3322                 rev_sp = page_header(__pa(sptep));
3323                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3324
3325                 if (!gfn_to_memslot(kvm, gfn)) {
3326                         if (!printk_ratelimit())
3327                                 return;
3328                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3329                                          audit_msg, gfn);
3330                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3331                                         audit_msg, sptep - rev_sp->spt,
3332                                         rev_sp->gfn);
3333                         dump_stack();
3334                         return;
3335                 }
3336
3337                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3338                                     is_large_pte(*sptep));
3339                 if (!*rmapp) {
3340                         if (!printk_ratelimit())
3341                                 return;
3342                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3343                                          audit_msg, *sptep);
3344                         dump_stack();
3345                 }
3346         }
3347
3348 }
3349
3350 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3351 {
3352         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3353 }
3354
3355 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3356 {
3357         struct kvm_mmu_page *sp;
3358         int i;
3359
3360         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3361                 u64 *pt = sp->spt;
3362
3363                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3364                         continue;
3365
3366                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3367                         u64 ent = pt[i];
3368
3369                         if (!(ent & PT_PRESENT_MASK))
3370                                 continue;
3371                         if (!(ent & PT_WRITABLE_MASK))
3372                                 continue;
3373                         inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3374                 }
3375         }
3376         return;
3377 }
3378
3379 static void audit_rmap(struct kvm_vcpu *vcpu)
3380 {
3381         check_writable_mappings_rmap(vcpu);
3382         count_rmaps(vcpu);
3383 }
3384
3385 static void audit_write_protection(struct kvm_vcpu *vcpu)
3386 {
3387         struct kvm_mmu_page *sp;
3388         struct kvm_memory_slot *slot;
3389         unsigned long *rmapp;
3390         u64 *spte;
3391         gfn_t gfn;
3392
3393         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3394                 if (sp->role.direct)
3395                         continue;
3396                 if (sp->unsync)
3397                         continue;
3398
3399                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3400                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3401                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3402
3403                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3404                 while (spte) {
3405                         if (*spte & PT_WRITABLE_MASK)
3406                                 printk(KERN_ERR "%s: (%s) shadow page has "
3407                                 "writable mappings: gfn %lx role %x\n",
3408                                __func__, audit_msg, sp->gfn,
3409                                sp->role.word);
3410                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3411                 }
3412         }
3413 }
3414
3415 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3416 {
3417         int olddbg = dbg;
3418
3419         dbg = 0;
3420         audit_msg = msg;
3421         audit_rmap(vcpu);
3422         audit_write_protection(vcpu);
3423         if (strcmp("pre pte write", audit_msg) != 0)
3424                 audit_mappings(vcpu);
3425         audit_writable_sptes_have_rmaps(vcpu);
3426         dbg = olddbg;
3427 }
3428
3429 #endif