2 * 8253/8254 interval timer emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
8 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
10 * Permission is hereby granted, free of charge, to any person obtaining a copy
11 * of this software and associated documentation files (the "Software"), to deal
12 * in the Software without restriction, including without limitation the rights
13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 * copies of the Software, and to permit persons to whom the Software is
15 * furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 * Sheng Yang <sheng.yang@intel.com>
30 * Based on QEMU and Xen.
33 #define pr_fmt(fmt) "pit: " fmt
35 #include <linux/kvm_host.h>
36 #include <linux/slab.h>
37 #include <linux/workqueue.h>
44 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
46 #define mod_64(x, y) ((x) % (y))
49 #define RW_STATE_LSB 1
50 #define RW_STATE_MSB 2
51 #define RW_STATE_WORD0 3
52 #define RW_STATE_WORD1 4
54 /* Compute with 96 bit intermediate result: (a*b)/c */
55 static u64 muldiv64(u64 a, u32 b, u32 c)
66 rl = (u64)u.l.low * (u64)b;
67 rh = (u64)u.l.high * (u64)b;
69 res.l.high = div64_u64(rh, c);
70 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
74 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
76 struct kvm_kpit_channel_state *c =
77 &kvm->arch.vpit->pit_state.channels[channel];
79 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
85 /* XXX: just disable/enable counting */
91 /* Restart counting on rising edge. */
93 c->count_load_time = ktime_get();
100 static int pit_get_gate(struct kvm *kvm, int channel)
102 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
104 return kvm->arch.vpit->pit_state.channels[channel].gate;
107 static s64 __kpit_elapsed(struct kvm *kvm)
111 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
113 if (!ps->pit_timer.period)
117 * The Counter does not stop when it reaches zero. In
118 * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
119 * the highest count, either FFFF hex for binary counting
120 * or 9999 for BCD counting, and continues counting.
121 * Modes 2 and 3 are periodic; the Counter reloads
122 * itself with the initial count and continues counting
125 remaining = hrtimer_get_remaining(&ps->pit_timer.timer);
126 elapsed = ps->pit_timer.period - ktime_to_ns(remaining);
127 elapsed = mod_64(elapsed, ps->pit_timer.period);
132 static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
136 return __kpit_elapsed(kvm);
138 return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141 static int pit_get_count(struct kvm *kvm, int channel)
143 struct kvm_kpit_channel_state *c =
144 &kvm->arch.vpit->pit_state.channels[channel];
148 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
150 t = kpit_elapsed(kvm, c, channel);
151 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
158 counter = (c->count - d) & 0xffff;
161 /* XXX: may be incorrect for odd counts */
162 counter = c->count - (mod_64((2 * d), c->count));
165 counter = c->count - mod_64(d, c->count);
171 static int pit_get_out(struct kvm *kvm, int channel)
173 struct kvm_kpit_channel_state *c =
174 &kvm->arch.vpit->pit_state.channels[channel];
178 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
180 t = kpit_elapsed(kvm, c, channel);
181 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
186 out = (d >= c->count);
189 out = (d < c->count);
192 out = ((mod_64(d, c->count) == 0) && (d != 0));
195 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
199 out = (d == c->count);
206 static void pit_latch_count(struct kvm *kvm, int channel)
208 struct kvm_kpit_channel_state *c =
209 &kvm->arch.vpit->pit_state.channels[channel];
211 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
213 if (!c->count_latched) {
214 c->latched_count = pit_get_count(kvm, channel);
215 c->count_latched = c->rw_mode;
219 static void pit_latch_status(struct kvm *kvm, int channel)
221 struct kvm_kpit_channel_state *c =
222 &kvm->arch.vpit->pit_state.channels[channel];
224 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
226 if (!c->status_latched) {
227 /* TODO: Return NULL COUNT (bit 6). */
228 c->status = ((pit_get_out(kvm, channel) << 7) |
232 c->status_latched = 1;
236 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
238 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
242 spin_lock(&ps->inject_lock);
243 value = atomic_dec_return(&ps->pit_timer.pending);
245 /* spurious acks can be generated if, for example, the
246 * PIC is being reset. Handle it gracefully here
248 atomic_inc(&ps->pit_timer.pending);
249 else if (value > 0 && ps->pit_timer.reinject)
250 /* in this case, we had multiple outstanding pit interrupts
251 * that we needed to inject. Reinject
253 queue_work(ps->pit->wq, &ps->pit->expired);
255 spin_unlock(&ps->inject_lock);
258 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
260 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
261 struct hrtimer *timer;
263 if (!kvm_vcpu_is_bsp(vcpu) || !pit)
266 timer = &pit->pit_state.pit_timer.timer;
267 mutex_lock(&pit->pit_state.lock);
268 if (hrtimer_cancel(timer))
269 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
270 mutex_unlock(&pit->pit_state.lock);
273 static void destroy_pit_timer(struct kvm_pit *pit)
275 hrtimer_cancel(&pit->pit_state.pit_timer.timer);
276 cancel_work_sync(&pit->expired);
279 static bool kpit_is_periodic(struct kvm_timer *ktimer)
281 struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state,
283 return ps->is_periodic;
286 static struct kvm_timer_ops kpit_ops = {
287 .is_periodic = kpit_is_periodic,
290 static void pit_do_work(struct work_struct *work)
292 struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
293 struct kvm *kvm = pit->kvm;
294 struct kvm_vcpu *vcpu;
296 struct kvm_kpit_state *ps = &pit->pit_state;
299 /* Try to inject pending interrupts when
300 * last one has been acked.
302 spin_lock(&ps->inject_lock);
303 if (!ps->pit_timer.reinject)
305 else if (ps->irq_ack) {
309 spin_unlock(&ps->inject_lock);
311 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
312 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
315 * Provides NMI watchdog support via Virtual Wire mode.
316 * The route is: PIT -> PIC -> LVT0 in NMI mode.
318 * Note: Our Virtual Wire implementation is simplified, only
319 * propagating PIT interrupts to all VCPUs when they have set
320 * LVT0 to NMI delivery. Other PIC interrupts are just sent to
321 * VCPU0, and only if its LVT0 is in EXTINT mode.
323 if (atomic_read(&kvm->arch.vapics_in_nmi_mode) > 0)
324 kvm_for_each_vcpu(i, vcpu, kvm)
325 kvm_apic_nmi_wd_deliver(vcpu);
329 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
331 struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
332 struct kvm_pit *pt = ktimer->kvm->arch.vpit;
334 if (ktimer->reinject)
335 atomic_inc(&ktimer->pending);
337 queue_work(pt->wq, &pt->expired);
339 if (ktimer->t_ops->is_periodic(ktimer)) {
340 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
341 return HRTIMER_RESTART;
343 return HRTIMER_NORESTART;
346 static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
348 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
349 struct kvm_timer *pt = &ps->pit_timer;
352 if (!irqchip_in_kernel(kvm))
355 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
357 pr_debug("create pit timer, interval is %llu nsec\n", interval);
359 /* TODO The new value only affected after the retriggered */
360 hrtimer_cancel(&pt->timer);
361 cancel_work_sync(&ps->pit->expired);
362 pt->period = interval;
363 ps->is_periodic = is_period;
365 pt->timer.function = pit_timer_fn;
366 pt->t_ops = &kpit_ops;
367 pt->kvm = ps->pit->kvm;
369 atomic_set(&pt->pending, 0);
373 * Do not allow the guest to program periodic timers with small
374 * interval, since the hrtimers are not throttled by the host
377 if (ps->is_periodic) {
378 s64 min_period = min_timer_period_us * 1000LL;
380 if (pt->period < min_period) {
382 "kvm: requested %lld ns "
383 "i8254 timer period limited to %lld ns\n",
384 pt->period, min_period);
385 pt->period = min_period;
389 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
393 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
395 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
397 WARN_ON(!mutex_is_locked(&ps->lock));
399 pr_debug("load_count val is %d, channel is %d\n", val, channel);
402 * The largest possible initial count is 0; this is equivalent
403 * to 216 for binary counting and 104 for BCD counting.
408 ps->channels[channel].count = val;
411 ps->channels[channel].count_load_time = ktime_get();
415 /* Two types of timer
416 * mode 1 is one shot, mode 2 is period, otherwise del timer */
417 switch (ps->channels[0].mode) {
420 /* FIXME: enhance mode 4 precision */
422 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
423 create_pit_timer(kvm, val, 0);
428 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
429 create_pit_timer(kvm, val, 1);
433 destroy_pit_timer(kvm->arch.vpit);
437 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
440 if (hpet_legacy_start) {
441 /* save existing mode for later reenablement */
442 WARN_ON(channel != 0);
443 saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
444 kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
445 pit_load_count(kvm, channel, val);
446 kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
448 pit_load_count(kvm, channel, val);
452 static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
454 return container_of(dev, struct kvm_pit, dev);
457 static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
459 return container_of(dev, struct kvm_pit, speaker_dev);
462 static inline int pit_in_range(gpa_t addr)
464 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
465 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
468 static int pit_ioport_write(struct kvm_io_device *this,
469 gpa_t addr, int len, const void *data)
471 struct kvm_pit *pit = dev_to_pit(this);
472 struct kvm_kpit_state *pit_state = &pit->pit_state;
473 struct kvm *kvm = pit->kvm;
475 struct kvm_kpit_channel_state *s;
476 u32 val = *(u32 *) data;
477 if (!pit_in_range(addr))
481 addr &= KVM_PIT_CHANNEL_MASK;
483 mutex_lock(&pit_state->lock);
486 pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
487 (unsigned int)addr, len, val);
492 /* Read-Back Command. */
493 for (channel = 0; channel < 3; channel++) {
494 s = &pit_state->channels[channel];
495 if (val & (2 << channel)) {
497 pit_latch_count(kvm, channel);
499 pit_latch_status(kvm, channel);
503 /* Select Counter <channel>. */
504 s = &pit_state->channels[channel];
505 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
507 pit_latch_count(kvm, channel);
510 s->read_state = access;
511 s->write_state = access;
512 s->mode = (val >> 1) & 7;
520 s = &pit_state->channels[addr];
521 switch (s->write_state) {
524 pit_load_count(kvm, addr, val);
527 pit_load_count(kvm, addr, val << 8);
530 s->write_latch = val;
531 s->write_state = RW_STATE_WORD1;
534 pit_load_count(kvm, addr, s->write_latch | (val << 8));
535 s->write_state = RW_STATE_WORD0;
540 mutex_unlock(&pit_state->lock);
544 static int pit_ioport_read(struct kvm_io_device *this,
545 gpa_t addr, int len, void *data)
547 struct kvm_pit *pit = dev_to_pit(this);
548 struct kvm_kpit_state *pit_state = &pit->pit_state;
549 struct kvm *kvm = pit->kvm;
551 struct kvm_kpit_channel_state *s;
552 if (!pit_in_range(addr))
555 addr &= KVM_PIT_CHANNEL_MASK;
559 s = &pit_state->channels[addr];
561 mutex_lock(&pit_state->lock);
563 if (s->status_latched) {
564 s->status_latched = 0;
566 } else if (s->count_latched) {
567 switch (s->count_latched) {
570 ret = s->latched_count & 0xff;
571 s->count_latched = 0;
574 ret = s->latched_count >> 8;
575 s->count_latched = 0;
578 ret = s->latched_count & 0xff;
579 s->count_latched = RW_STATE_MSB;
583 switch (s->read_state) {
586 count = pit_get_count(kvm, addr);
590 count = pit_get_count(kvm, addr);
591 ret = (count >> 8) & 0xff;
594 count = pit_get_count(kvm, addr);
596 s->read_state = RW_STATE_WORD1;
599 count = pit_get_count(kvm, addr);
600 ret = (count >> 8) & 0xff;
601 s->read_state = RW_STATE_WORD0;
606 if (len > sizeof(ret))
608 memcpy(data, (char *)&ret, len);
610 mutex_unlock(&pit_state->lock);
614 static int speaker_ioport_write(struct kvm_io_device *this,
615 gpa_t addr, int len, const void *data)
617 struct kvm_pit *pit = speaker_to_pit(this);
618 struct kvm_kpit_state *pit_state = &pit->pit_state;
619 struct kvm *kvm = pit->kvm;
620 u32 val = *(u32 *) data;
621 if (addr != KVM_SPEAKER_BASE_ADDRESS)
624 mutex_lock(&pit_state->lock);
625 pit_state->speaker_data_on = (val >> 1) & 1;
626 pit_set_gate(kvm, 2, val & 1);
627 mutex_unlock(&pit_state->lock);
631 static int speaker_ioport_read(struct kvm_io_device *this,
632 gpa_t addr, int len, void *data)
634 struct kvm_pit *pit = speaker_to_pit(this);
635 struct kvm_kpit_state *pit_state = &pit->pit_state;
636 struct kvm *kvm = pit->kvm;
637 unsigned int refresh_clock;
639 if (addr != KVM_SPEAKER_BASE_ADDRESS)
642 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
643 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
645 mutex_lock(&pit_state->lock);
646 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
647 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
648 if (len > sizeof(ret))
650 memcpy(data, (char *)&ret, len);
651 mutex_unlock(&pit_state->lock);
655 void kvm_pit_reset(struct kvm_pit *pit)
658 struct kvm_kpit_channel_state *c;
660 mutex_lock(&pit->pit_state.lock);
661 pit->pit_state.flags = 0;
662 for (i = 0; i < 3; i++) {
663 c = &pit->pit_state.channels[i];
666 pit_load_count(pit->kvm, i, 0);
668 mutex_unlock(&pit->pit_state.lock);
670 atomic_set(&pit->pit_state.pit_timer.pending, 0);
671 pit->pit_state.irq_ack = 1;
674 static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
676 struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
679 atomic_set(&pit->pit_state.pit_timer.pending, 0);
680 pit->pit_state.irq_ack = 1;
684 static const struct kvm_io_device_ops pit_dev_ops = {
685 .read = pit_ioport_read,
686 .write = pit_ioport_write,
689 static const struct kvm_io_device_ops speaker_dev_ops = {
690 .read = speaker_ioport_read,
691 .write = speaker_ioport_write,
694 /* Caller must hold slots_lock */
695 struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
698 struct kvm_kpit_state *pit_state;
701 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
705 pit->irq_source_id = kvm_request_irq_source_id(kvm);
706 if (pit->irq_source_id < 0) {
711 mutex_init(&pit->pit_state.lock);
712 mutex_lock(&pit->pit_state.lock);
713 spin_lock_init(&pit->pit_state.inject_lock);
715 pit->wq = create_singlethread_workqueue("kvm-pit-wq");
717 mutex_unlock(&pit->pit_state.lock);
718 kvm_free_irq_source_id(kvm, pit->irq_source_id);
722 INIT_WORK(&pit->expired, pit_do_work);
724 kvm->arch.vpit = pit;
727 pit_state = &pit->pit_state;
728 pit_state->pit = pit;
729 hrtimer_init(&pit_state->pit_timer.timer,
730 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
731 pit_state->irq_ack_notifier.gsi = 0;
732 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
733 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
734 pit_state->pit_timer.reinject = true;
735 mutex_unlock(&pit->pit_state.lock);
739 pit->mask_notifier.func = pit_mask_notifer;
740 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
742 kvm_iodevice_init(&pit->dev, &pit_dev_ops);
743 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
744 KVM_PIT_MEM_LENGTH, &pit->dev);
748 if (flags & KVM_PIT_SPEAKER_DUMMY) {
749 kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
750 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
751 KVM_SPEAKER_BASE_ADDRESS, 4,
754 goto fail_unregister;
760 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
763 kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
764 kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
765 kvm_free_irq_source_id(kvm, pit->irq_source_id);
766 destroy_workqueue(pit->wq);
771 void kvm_free_pit(struct kvm *kvm)
773 struct hrtimer *timer;
775 if (kvm->arch.vpit) {
776 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
777 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
778 &kvm->arch.vpit->speaker_dev);
779 kvm_unregister_irq_mask_notifier(kvm, 0,
780 &kvm->arch.vpit->mask_notifier);
781 kvm_unregister_irq_ack_notifier(kvm,
782 &kvm->arch.vpit->pit_state.irq_ack_notifier);
783 mutex_lock(&kvm->arch.vpit->pit_state.lock);
784 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
785 hrtimer_cancel(timer);
786 cancel_work_sync(&kvm->arch.vpit->expired);
787 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
788 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
789 destroy_workqueue(kvm->arch.vpit->wq);
790 kfree(kvm->arch.vpit);