arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/user.h>
  20
  21 #ifdef CONFIG_X86_64
  22 # include <asm/sigcontext32.h>
  23 # include <asm/user32.h>
  24 #else
  25 # define save_i387_xstate_ia32          save_i387_xstate
  26 # define restore_i387_xstate_ia32       restore_i387_xstate
  27 # define _fpstate_ia32          _fpstate
  28 # define _xstate_ia32           _xstate
  29 # define sig_xstate_ia32_size   sig_xstate_size
  30 # define fx_sw_reserved_ia32    fx_sw_reserved
  31 # define user_i387_ia32_struct  user_i387_struct
  32 # define user32_fxsr_struct     user_fxsr_struct
  33 #endif
  34
  35 #ifdef CONFIG_MATH_EMULATION
  36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  37 #else
  38 # define HAVE_HWFP              1
  39 #endif
  40
  41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  42 unsigned int xstate_size;
  43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  45
  46 void __cpuinit mxcsr_feature_mask_init(void)
  47 {
  48         unsigned long mask = 0;
  49
  50         clts();
  51         if (cpu_has_fxsr) {
  52                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  53                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  54                 mask = fx_scratch.mxcsr_mask;
  55                 if (mask == 0)
  56                         mask = 0x0000ffbf;
  57         }
  58         mxcsr_feature_mask &= mask;
  59         stts();
  60 }
  61
  62 void __cpuinit init_thread_xstate(void)
  63 {
  64         if (!HAVE_HWFP) {
  65                 xstate_size = sizeof(struct i387_soft_struct);
  66                 return;
  67         }
  68
  69         if (cpu_has_xsave) {
  70                 xsave_cntxt_init();
  71                 return;
  72         }
  73
  74         if (cpu_has_fxsr)
  75                 xstate_size = sizeof(struct i387_fxsave_struct);
  76 #ifdef CONFIG_X86_32
  77         else
  78                 xstate_size = sizeof(struct i387_fsave_struct);
  79 #endif
  80 }
  81
  82 #ifdef CONFIG_X86_64
  83 /*
  84  * Called at bootup to set up the initial FPU state that is later cloned
  85  * into all processes.
  86  */
  87 void __cpuinit fpu_init(void)
  88 {
  89         unsigned long oldcr0 = read_cr0();
  90
  91         set_in_cr4(X86_CR4_OSFXSR);
  92         set_in_cr4(X86_CR4_OSXMMEXCPT);
  93
  94         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  95
  96         /*
  97          * Boot processor to setup the FP and extended state context info.
  98          */
  99         if (!smp_processor_id())
 100                 init_thread_xstate();
 101         xsave_init();
 102
 103         mxcsr_feature_mask_init();
 104         /* clean state in init */
 105         current_thread_info()->status = 0;
 106         clear_used_math();
 107 }
 108 #endif  /* CONFIG_X86_64 */
 109
 110 static void fpu_finit(struct fpu *fpu)
 111 {
 112 #ifdef CONFIG_X86_32
 113         if (!HAVE_HWFP) {
 114                 finit_soft_fpu(&fpu->state->soft);
 115                 return;
 116         }
 117 #endif
 118
 119         if (cpu_has_fxsr) {
 120                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 121
 122                 memset(fx, 0, xstate_size);
 123                 fx->cwd = 0x37f;
 124                 if (cpu_has_xmm)
 125                         fx->mxcsr = MXCSR_DEFAULT;
 126         } else {
 127                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 128                 memset(fp, 0, xstate_size);
 129                 fp->cwd = 0xffff037fu;
 130                 fp->swd = 0xffff0000u;
 131                 fp->twd = 0xffffffffu;
 132                 fp->fos = 0xffff0000u;
 133         }
 134 }
 135
 136 /*
 137  * The _current_ task is using the FPU for the first time
 138  * so initialize it and set the mxcsr to its default
 139  * value at reset if we support XMM instructions and then
 140  * remeber the current task has used the FPU.
 141  */
 142 int init_fpu(struct task_struct *tsk)
 143 {
 144         int ret;
 145
 146         if (tsk_used_math(tsk)) {
 147                 if (HAVE_HWFP && tsk == current)
 148                         unlazy_fpu(tsk);
 149                 return 0;
 150         }
 151
 152         /*
 153          * Memory allocation at the first usage of the FPU and other state.
 154          */
 155         ret = fpu_alloc(&tsk->thread.fpu);
 156         if (ret)
 157                 return ret;
 158
 159         fpu_finit(&tsk->thread.fpu);
 160
 161         set_stopped_child_used_math(tsk);
 162         return 0;
 163 }
 164
 165 /*
 166  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 167  * as the "regset->n" for the xstate regset will be updated based on the feature
 168  * capabilites supported by the xsave.
 169  */
 170 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 171 {
 172         return tsk_used_math(target) ? regset->n : 0;
 173 }
 174
 175 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 176 {
 177         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 178 }
 179
 180 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 181                 unsigned int pos, unsigned int count,
 182                 void *kbuf, void __user *ubuf)
 183 {
 184         int ret;
 185
 186         if (!cpu_has_fxsr)
 187                 return -ENODEV;
 188
 189         ret = init_fpu(target);
 190         if (ret)
 191                 return ret;
 192
 193         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 194                                    &target->thread.fpu.state->fxsave, 0, -1);
 195 }
 196
 197 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 198                 unsigned int pos, unsigned int count,
 199                 const void *kbuf, const void __user *ubuf)
 200 {
 201         int ret;
 202
 203         if (!cpu_has_fxsr)
 204                 return -ENODEV;
 205
 206         ret = init_fpu(target);
 207         if (ret)
 208                 return ret;
 209
 210         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 211                                  &target->thread.fpu.state->fxsave, 0, -1);
 212
 213         /*
 214          * mxcsr reserved bits must be masked to zero for security reasons.
 215          */
 216         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 217
 218         /*
 219          * update the header bits in the xsave header, indicating the
 220          * presence of FP and SSE state.
 221          */
 222         if (cpu_has_xsave)
 223                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 224
 225         return ret;
 226 }
 227
 228 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 229                 unsigned int pos, unsigned int count,
 230                 void *kbuf, void __user *ubuf)
 231 {
 232         int ret;
 233
 234         if (!cpu_has_xsave)
 235                 return -ENODEV;
 236
 237         ret = init_fpu(target);
 238         if (ret)
 239                 return ret;
 240
 241         /*
 242          * Copy the 48bytes defined by the software first into the xstate
 243          * memory layout in the thread struct, so that we can copy the entire
 244          * xstateregs to the user using one user_regset_copyout().
 245          */
 246         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 247                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 248
 249         /*
 250          * Copy the xstate memory layout.
 251          */
 252         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 253                                   &target->thread.fpu.state->xsave, 0, -1);
 254         return ret;
 255 }
 256
 257 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 258                   unsigned int pos, unsigned int count,
 259                   const void *kbuf, const void __user *ubuf)
 260 {
 261         int ret;
 262         struct xsave_hdr_struct *xsave_hdr;
 263
 264         if (!cpu_has_xsave)
 265                 return -ENODEV;
 266
 267         ret = init_fpu(target);
 268         if (ret)
 269                 return ret;
 270
 271         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 272                                  &target->thread.fpu.state->xsave, 0, -1);
 273
 274         /*
 275          * mxcsr reserved bits must be masked to zero for security reasons.
 276          */
 277         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 278
 279         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 280
 281         xsave_hdr->xstate_bv &= pcntxt_mask;
 282         /*
 283          * These bits must be zero.
 284          */
 285         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 286
 287         return ret;
 288 }
 289
 290 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 291
 292 /*
 293  * FPU tag word conversions.
 294  */
 295
 296 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 297 {
 298         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 299
 300         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 301         tmp = ~twd;
 302         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 303         /* and move the valid bits to the lower byte. */
 304         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 305         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 306         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 307
 308         return tmp;
 309 }
 310
 311 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 312 #define FP_EXP_TAG_VALID        0
 313 #define FP_EXP_TAG_ZERO         1
 314 #define FP_EXP_TAG_SPECIAL      2
 315 #define FP_EXP_TAG_EMPTY        3
 316
 317 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 318 {
 319         struct _fpxreg *st;
 320         u32 tos = (fxsave->swd >> 11) & 7;
 321         u32 twd = (unsigned long) fxsave->twd;
 322         u32 tag;
 323         u32 ret = 0xffff0000u;
 324         int i;
 325
 326         for (i = 0; i < 8; i++, twd >>= 1) {
 327                 if (twd & 0x1) {
 328                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 329
 330                         switch (st->exponent & 0x7fff) {
 331                         case 0x7fff:
 332                                 tag = FP_EXP_TAG_SPECIAL;
 333                                 break;
 334                         case 0x0000:
 335                                 if (!st->significand[0] &&
 336                                     !st->significand[1] &&
 337                                     !st->significand[2] &&
 338                                     !st->significand[3])
 339                                         tag = FP_EXP_TAG_ZERO;
 340                                 else
 341                                         tag = FP_EXP_TAG_SPECIAL;
 342                                 break;
 343                         default:
 344                                 if (st->significand[3] & 0x8000)
 345                                         tag = FP_EXP_TAG_VALID;
 346                                 else
 347                                         tag = FP_EXP_TAG_SPECIAL;
 348                                 break;
 349                         }
 350                 } else {
 351                         tag = FP_EXP_TAG_EMPTY;
 352                 }
 353                 ret |= tag << (2 * i);
 354         }
 355         return ret;
 356 }
 357
 358 /*
 359  * FXSR floating point environment conversions.
 360  */
 361
 362 static void
 363 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 364 {
 365         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 366         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 367         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 368         int i;
 369
 370         env->cwd = fxsave->cwd | 0xffff0000u;
 371         env->swd = fxsave->swd | 0xffff0000u;
 372         env->twd = twd_fxsr_to_i387(fxsave);
 373
 374 #ifdef CONFIG_X86_64
 375         env->fip = fxsave->rip;
 376         env->foo = fxsave->rdp;
 377         if (tsk == current) {
 378                 /*
 379                  * should be actually ds/cs at fpu exception time, but
 380                  * that information is not available in 64bit mode.
 381                  */
 382                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 383                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 384         } else {
 385                 struct pt_regs *regs = task_pt_regs(tsk);
 386
 387                 env->fos = 0xffff0000 | tsk->thread.ds;
 388                 env->fcs = regs->cs;
 389         }
 390 #else
 391         env->fip = fxsave->fip;
 392         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 393         env->foo = fxsave->foo;
 394         env->fos = fxsave->fos;
 395 #endif
 396
 397         for (i = 0; i < 8; ++i)
 398                 memcpy(&to[i], &from[i], sizeof(to[0]));
 399 }
 400
 401 static void convert_to_fxsr(struct task_struct *tsk,
 402                             const struct user_i387_ia32_struct *env)
 403
 404 {
 405         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 406         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 407         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 408         int i;
 409
 410         fxsave->cwd = env->cwd;
 411         fxsave->swd = env->swd;
 412         fxsave->twd = twd_i387_to_fxsr(env->twd);
 413         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 414 #ifdef CONFIG_X86_64
 415         fxsave->rip = env->fip;
 416         fxsave->rdp = env->foo;
 417         /* cs and ds ignored */
 418 #else
 419         fxsave->fip = env->fip;
 420         fxsave->fcs = (env->fcs & 0xffff);
 421         fxsave->foo = env->foo;
 422         fxsave->fos = env->fos;
 423 #endif
 424
 425         for (i = 0; i < 8; ++i)
 426                 memcpy(&to[i], &from[i], sizeof(from[0]));
 427 }
 428
 429 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 430                unsigned int pos, unsigned int count,
 431                void *kbuf, void __user *ubuf)
 432 {
 433         struct user_i387_ia32_struct env;
 434         int ret;
 435
 436         ret = init_fpu(target);
 437         if (ret)
 438                 return ret;
 439
 440         if (!HAVE_HWFP)
 441                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 442
 443         if (!cpu_has_fxsr) {
 444                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 445                                            &target->thread.fpu.state->fsave, 0,
 446                                            -1);
 447         }
 448
 449         if (kbuf && pos == 0 && count == sizeof(env)) {
 450                 convert_from_fxsr(kbuf, target);
 451                 return 0;
 452         }
 453
 454         convert_from_fxsr(&env, target);
 455
 456         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 457 }
 458
 459 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 460                unsigned int pos, unsigned int count,
 461                const void *kbuf, const void __user *ubuf)
 462 {
 463         struct user_i387_ia32_struct env;
 464         int ret;
 465
 466         ret = init_fpu(target);
 467         if (ret)
 468                 return ret;
 469
 470         if (!HAVE_HWFP)
 471                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 472
 473         if (!cpu_has_fxsr) {
 474                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 475                                           &target->thread.fpu.state->fsave, 0, -1);
 476         }
 477
 478         if (pos > 0 || count < sizeof(env))
 479                 convert_from_fxsr(&env, target);
 480
 481         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 482         if (!ret)
 483                 convert_to_fxsr(target, &env);
 484
 485         /*
 486          * update the header bit in the xsave header, indicating the
 487          * presence of FP.
 488          */
 489         if (cpu_has_xsave)
 490                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 491         return ret;
 492 }
 493
 494 /*
 495  * Signal frame handlers.
 496  */
 497
 498 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 499 {
 500         struct task_struct *tsk = current;
 501         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
 502
 503         fp->status = fp->swd;
 504         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 505                 return -1;
 506         return 1;
 507 }
 508
 509 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 510 {
 511         struct task_struct *tsk = current;
 512         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
 513         struct user_i387_ia32_struct env;
 514         int err = 0;
 515
 516         convert_from_fxsr(&env, tsk);
 517         if (__copy_to_user(buf, &env, sizeof(env)))
 518                 return -1;
 519
 520         err |= __put_user(fx->swd, &buf->status);
 521         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 522         if (err)
 523                 return -1;
 524
 525         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 526                 return -1;
 527         return 1;
 528 }
 529
 530 static int save_i387_xsave(void __user *buf)
 531 {
 532         struct task_struct *tsk = current;
 533         struct _fpstate_ia32 __user *fx = buf;
 534         int err = 0;
 535
 536         /*
 537          * For legacy compatible, we always set FP/SSE bits in the bit
 538          * vector while saving the state to the user context.
 539          * This will enable us capturing any changes(during sigreturn) to
 540          * the FP/SSE bits by the legacy applications which don't touch
 541          * xstate_bv in the xsave header.
 542          *
 543          * xsave aware applications can change the xstate_bv in the xsave
 544          * header as well as change any contents in the memory layout.
 545          * xrestore as part of sigreturn will capture all the changes.
 546          */
 547         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 548
 549         if (save_i387_fxsave(fx) < 0)
 550                 return -1;
 551
 552         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 553                              sizeof(struct _fpx_sw_bytes));
 554         err |= __put_user(FP_XSTATE_MAGIC2,
 555                           (__u32 __user *) (buf + sig_xstate_ia32_size
 556                                             - FP_XSTATE_MAGIC2_SIZE));
 557         if (err)
 558                 return -1;
 559
 560         return 1;
 561 }
 562
 563 int save_i387_xstate_ia32(void __user *buf)
 564 {
 565         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 566         struct task_struct *tsk = current;
 567
 568         if (!used_math())
 569                 return 0;
 570
 571         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 572                 return -EACCES;
 573         /*
 574          * This will cause a "finit" to be triggered by the next
 575          * attempted FPU operation by the 'current' process.
 576          */
 577         clear_used_math();
 578
 579         if (!HAVE_HWFP) {
 580                 return fpregs_soft_get(current, NULL,
 581                                        0, sizeof(struct user_i387_ia32_struct),
 582                                        NULL, fp) ? -1 : 1;
 583         }
 584
 585         unlazy_fpu(tsk);
 586
 587         if (cpu_has_xsave)
 588                 return save_i387_xsave(fp);
 589         if (cpu_has_fxsr)
 590                 return save_i387_fxsave(fp);
 591         else
 592                 return save_i387_fsave(fp);
 593 }
 594
 595 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 596 {
 597         struct task_struct *tsk = current;
 598
 599         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
 600                                 sizeof(struct i387_fsave_struct));
 601 }
 602
 603 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 604                                unsigned int size)
 605 {
 606         struct task_struct *tsk = current;
 607         struct user_i387_ia32_struct env;
 608         int err;
 609
 610         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
 611                                size);
 612         /* mxcsr reserved bits must be masked to zero for security reasons */
 613         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 614         if (err || __copy_from_user(&env, buf, sizeof(env)))
 615                 return 1;
 616         convert_to_fxsr(tsk, &env);
 617
 618         return 0;
 619 }
 620
 621 static int restore_i387_xsave(void __user *buf)
 622 {
 623         struct _fpx_sw_bytes fx_sw_user;
 624         struct _fpstate_ia32 __user *fx_user =
 625                         ((struct _fpstate_ia32 __user *) buf);
 626         struct i387_fxsave_struct __user *fx =
 627                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 628         struct xsave_hdr_struct *xsave_hdr =
 629                                 &current->thread.fpu.state->xsave.xsave_hdr;
 630         u64 mask;
 631         int err;
 632
 633         if (check_for_xstate(fx, buf, &fx_sw_user))
 634                 goto fx_only;
 635
 636         mask = fx_sw_user.xstate_bv;
 637
 638         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 639
 640         xsave_hdr->xstate_bv &= pcntxt_mask;
 641         /*
 642          * These bits must be zero.
 643          */
 644         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 645
 646         /*
 647          * Init the state that is not present in the memory layout
 648          * and enabled by the OS.
 649          */
 650         mask = ~(pcntxt_mask & ~mask);
 651         xsave_hdr->xstate_bv &= mask;
 652
 653         return err;
 654 fx_only:
 655         /*
 656          * Couldn't find the extended state information in the memory
 657          * layout. Restore the FP/SSE and init the other extended state
 658          * enabled by the OS.
 659          */
 660         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 661         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 662 }
 663
 664 int restore_i387_xstate_ia32(void __user *buf)
 665 {
 666         int err;
 667         struct task_struct *tsk = current;
 668         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 669
 670         if (HAVE_HWFP)
 671                 clear_fpu(tsk);
 672
 673         if (!buf) {
 674                 if (used_math()) {
 675                         clear_fpu(tsk);
 676                         clear_used_math();
 677                 }
 678
 679                 return 0;
 680         } else
 681                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 682                         return -EACCES;
 683
 684         if (!used_math()) {
 685                 err = init_fpu(tsk);
 686                 if (err)
 687                         return err;
 688         }
 689
 690         if (HAVE_HWFP) {
 691                 if (cpu_has_xsave)
 692                         err = restore_i387_xsave(buf);
 693                 else if (cpu_has_fxsr)
 694                         err = restore_i387_fxsave(fp, sizeof(struct
 695                                                            i387_fxsave_struct));
 696                 else
 697                         err = restore_i387_fsave(fp);
 698         } else {
 699                 err = fpregs_soft_set(current, NULL,
 700                                       0, sizeof(struct user_i387_ia32_struct),
 701                                       NULL, fp) != 0;
 702         }
 703         set_used_math();
 704
 705         return err;
 706 }
 707
 708 /*
 709  * FPU state for core dumps.
 710  * This is only used for a.out dumps now.
 711  * It is declared generically using elf_fpregset_t (which is
 712  * struct user_i387_struct) but is in fact only used for 32-bit
 713  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 714  */
 715 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 716 {
 717         struct task_struct *tsk = current;
 718         int fpvalid;
 719
 720         fpvalid = !!used_math();
 721         if (fpvalid)
 722                 fpvalid = !fpregs_get(tsk, NULL,
 723                                       0, sizeof(struct user_i387_ia32_struct),
 724                                       fpu, NULL);
 725
 726         return fpvalid;
 727 }
 728 EXPORT_SYMBOL(dump_fpu);
 729
 730 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */