1 /* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
12 #include <linux/pci.h>
13 #include <linux/acpi.h>
14 #include <linux/pci_ids.h>
15 #include <asm/pci-direct.h>
17 #include <asm/io_apic.h>
19 #include <asm/iommu.h>
22 static void __init fix_hypertransport_config(int num, int slot, int func)
26 * we found a hypertransport bus
27 * make sure that we are broadcasting
28 * interrupts to all cpus on the ht bus
29 * if we're using extended apic ids
31 htcfg = read_pci_config(num, slot, func, 0x68);
32 if (htcfg & (1 << 18)) {
33 printk(KERN_INFO "Detected use of extended apic ids "
34 "on hypertransport bus\n");
35 if ((htcfg & (1 << 17)) == 0) {
36 printk(KERN_INFO "Enabling hypertransport extended "
37 "apic interrupt broadcast\n");
38 printk(KERN_INFO "Note this is a bios bug, "
39 "please contact your hw vendor\n");
41 write_pci_config(num, slot, func, 0x68, htcfg);
48 static void __init via_bugs(int num, int slot, int func)
50 #ifdef CONFIG_GART_IOMMU
51 if ((max_pfn > MAX_DMA32_PFN || force_iommu) &&
52 !gart_iommu_aperture_allowed) {
54 "Looks like a VIA chipset. Disabling IOMMU."
55 " Override with iommu=allowed\n");
56 gart_iommu_aperture_disabled = 1;
62 #ifdef CONFIG_X86_IO_APIC
64 static int __init nvidia_hpet_check(struct acpi_table_header *header)
68 #endif /* CONFIG_X86_IO_APIC */
69 #endif /* CONFIG_ACPI */
71 static void __init nvidia_bugs(int num, int slot, int func)
74 #ifdef CONFIG_X86_IO_APIC
76 * Only applies to Nvidia root ports (bus 0) and not to
77 * Nvidia graphics cards with PCI ports on secondary buses.
83 * All timer overrides on Nvidia are
84 * wrong unless HPET is enabled.
85 * Unfortunately that's not true on many Asus boards.
86 * We don't know yet how to detect this automatically, but
87 * at least allow a command line override.
89 if (acpi_use_timer_override)
92 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
93 acpi_skip_timer_override = 1;
94 printk(KERN_INFO "Nvidia board "
95 "detected. Ignoring ACPI "
97 printk(KERN_INFO "If you got timer trouble "
98 "try acpi_use_timer_override\n");
102 /* RED-PEN skip them on mptables too? */
106 #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
107 static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
112 b = read_pci_config_byte(num, slot, func, 0xac);
114 write_pci_config_byte(num, slot, func, 0xac, b);
116 d = read_pci_config(num, slot, func, 0x70);
118 write_pci_config(num, slot, func, 0x70, d);
120 d = read_pci_config(num, slot, func, 0x8);
125 static void __init ati_bugs(int num, int slot, int func)
130 if (acpi_use_timer_override)
133 d = ati_ixp4x0_rev(num, slot, func);
135 acpi_skip_timer_override = 1;
137 /* check for IRQ0 interrupt swap */
138 outb(0x72, 0xcd6); b = inb(0xcd7);
140 acpi_skip_timer_override = 1;
143 if (acpi_skip_timer_override) {
144 printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
145 printk(KERN_INFO "Ignoring ACPI timer override.\n");
146 printk(KERN_INFO "If you got timer trouble "
147 "try acpi_use_timer_override\n");
151 static u32 __init ati_sbx00_rev(int num, int slot, int func)
155 d = read_pci_config(num, slot, func, 0x8);
161 static void __init ati_bugs_contd(int num, int slot, int func)
165 rev = ati_sbx00_rev(num, slot, func);
167 acpi_fix_pin2_polarity = 1;
170 * SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
171 * SB700: revisions 0x39, 0x3a, ...
172 * SB800: revisions 0x40, 0x41, ...
177 if (acpi_use_timer_override)
180 /* check for IRQ0 interrupt swap */
181 d = read_pci_config(num, slot, func, 0x64);
183 acpi_skip_timer_override = 1;
185 if (acpi_skip_timer_override) {
186 printk(KERN_INFO "SB600 revision 0x%x\n", rev);
187 printk(KERN_INFO "Ignoring ACPI timer override.\n");
188 printk(KERN_INFO "If you got timer trouble "
189 "try acpi_use_timer_override\n");
193 static void __init ati_bugs(int num, int slot, int func)
197 static void __init ati_bugs_contd(int num, int slot, int func)
202 #define QFLAG_APPLY_ONCE 0x1
203 #define QFLAG_APPLIED 0x2
204 #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
211 void (*f)(int num, int slot, int func);
215 * Only works for devices on the root bus. If you add any devices
216 * not on bus 0 readd another loop level in early_quirks(). But
217 * be careful because at least the Nvidia quirk here relies on
218 * only matching on bus 0.
220 static struct chipset early_qrk[] __initdata = {
221 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
222 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
223 { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
224 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
225 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
226 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
227 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
228 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
229 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
230 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
235 * check_dev_quirk - apply early quirks to a given PCI device
238 * @func: PCI function
240 * Check the vendor & device ID against the early quirks table.
242 * If the device is single function, let early_quirks() know so we don't
243 * poke at this device again.
245 static int __init check_dev_quirk(int num, int slot, int func)
253 class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
256 return -1; /* no class, treat as single function */
258 vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
260 device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
262 for (i = 0; early_qrk[i].f != NULL; i++) {
263 if (((early_qrk[i].vendor == PCI_ANY_ID) ||
264 (early_qrk[i].vendor == vendor)) &&
265 ((early_qrk[i].device == PCI_ANY_ID) ||
266 (early_qrk[i].device == device)) &&
267 (!((early_qrk[i].class ^ class) &
268 early_qrk[i].class_mask))) {
269 if ((early_qrk[i].flags &
270 QFLAG_DONE) != QFLAG_DONE)
271 early_qrk[i].f(num, slot, func);
272 early_qrk[i].flags |= QFLAG_APPLIED;
276 type = read_pci_config_byte(num, slot, func,
284 void __init early_quirks(void)
288 if (!early_pci_allowed())
291 /* Poor man's PCI discovery */
292 /* Only scan the root bus */
293 for (slot = 0; slot < 32; slot++)
294 for (func = 0; func < 8; func++) {
295 /* Only probe function 0 on single fn devices */
296 if (check_dev_quirk(0, slot, func))