pandora: defconfig: update
[pandora-kernel.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c
1 /*
2  * Thermal throttle event support code (such as syslog messaging and rate
3  * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
4  *
5  * This allows consistent reporting of CPU thermal throttle events.
6  *
7  * Maintains a counter in /sys that keeps track of the number of thermal
8  * events, such that the user knows how bad the thermal problem might be
9  * (since the logging to syslog and mcelog is rate limited).
10  *
11  * Author: Dmitriy Zavin (dmitriyz@google.com)
12  *
13  * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
14  *          Inspired by Ross Biro's and Al Borchers' counter code.
15  */
16 #include <linux/interrupt.h>
17 #include <linux/notifier.h>
18 #include <linux/jiffies.h>
19 #include <linux/kernel.h>
20 #include <linux/percpu.h>
21 #include <linux/export.h>
22 #include <linux/sysdev.h>
23 #include <linux/types.h>
24 #include <linux/init.h>
25 #include <linux/smp.h>
26 #include <linux/cpu.h>
27
28 #include <asm/processor.h>
29 #include <asm/system.h>
30 #include <asm/apic.h>
31 #include <asm/idle.h>
32 #include <asm/mce.h>
33 #include <asm/msr.h>
34
35 /* How long to wait between reporting thermal events */
36 #define CHECK_INTERVAL          (300 * HZ)
37
38 #define THERMAL_THROTTLING_EVENT        0
39 #define POWER_LIMIT_EVENT               1
40
41 /*
42  * Current thermal event state:
43  */
44 struct _thermal_state {
45         bool                    new_event;
46         int                     event;
47         u64                     next_check;
48         unsigned long           count;
49         unsigned long           last_count;
50 };
51
52 struct thermal_state {
53         struct _thermal_state core_throttle;
54         struct _thermal_state core_power_limit;
55         struct _thermal_state package_throttle;
56         struct _thermal_state package_power_limit;
57         struct _thermal_state core_thresh0;
58         struct _thermal_state core_thresh1;
59 };
60
61 /* Callback to handle core threshold interrupts */
62 int (*platform_thermal_notify)(__u64 msr_val);
63 EXPORT_SYMBOL(platform_thermal_notify);
64
65 static DEFINE_PER_CPU(struct thermal_state, thermal_state);
66
67 static atomic_t therm_throt_en  = ATOMIC_INIT(0);
68
69 static u32 lvtthmr_init __read_mostly;
70
71 #ifdef CONFIG_SYSFS
72 #define define_therm_throt_sysdev_one_ro(_name)                         \
73         static SYSDEV_ATTR(_name, 0444,                                 \
74                            therm_throt_sysdev_show_##_name,             \
75                                    NULL)                                \
76
77 #define define_therm_throt_sysdev_show_func(event, name)                \
78                                                                         \
79 static ssize_t therm_throt_sysdev_show_##event##_##name(                \
80                         struct sys_device *dev,                         \
81                         struct sysdev_attribute *attr,                  \
82                         char *buf)                                      \
83 {                                                                       \
84         unsigned int cpu = dev->id;                                     \
85         ssize_t ret;                                                    \
86                                                                         \
87         preempt_disable();      /* CPU hotplug */                       \
88         if (cpu_online(cpu)) {                                          \
89                 ret = sprintf(buf, "%lu\n",                             \
90                               per_cpu(thermal_state, cpu).event.name);  \
91         } else                                                          \
92                 ret = 0;                                                \
93         preempt_enable();                                               \
94                                                                         \
95         return ret;                                                     \
96 }
97
98 define_therm_throt_sysdev_show_func(core_throttle, count);
99 define_therm_throt_sysdev_one_ro(core_throttle_count);
100
101 define_therm_throt_sysdev_show_func(core_power_limit, count);
102 define_therm_throt_sysdev_one_ro(core_power_limit_count);
103
104 define_therm_throt_sysdev_show_func(package_throttle, count);
105 define_therm_throt_sysdev_one_ro(package_throttle_count);
106
107 define_therm_throt_sysdev_show_func(package_power_limit, count);
108 define_therm_throt_sysdev_one_ro(package_power_limit_count);
109
110 static struct attribute *thermal_throttle_attrs[] = {
111         &attr_core_throttle_count.attr,
112         NULL
113 };
114
115 static struct attribute_group thermal_attr_group = {
116         .attrs  = thermal_throttle_attrs,
117         .name   = "thermal_throttle"
118 };
119 #endif /* CONFIG_SYSFS */
120
121 #define CORE_LEVEL      0
122 #define PACKAGE_LEVEL   1
123
124 /***
125  * therm_throt_process - Process thermal throttling event from interrupt
126  * @curr: Whether the condition is current or not (boolean), since the
127  *        thermal interrupt normally gets called both when the thermal
128  *        event begins and once the event has ended.
129  *
130  * This function is called by the thermal interrupt after the
131  * IRQ has been acknowledged.
132  *
133  * It will take care of rate limiting and printing messages to the syslog.
134  *
135  * Returns: 0 : Event should NOT be further logged, i.e. still in
136  *              "timeout" from previous log message.
137  *          1 : Event should be logged further, and a message has been
138  *              printed to the syslog.
139  */
140 static int therm_throt_process(bool new_event, int event, int level)
141 {
142         struct _thermal_state *state;
143         unsigned int this_cpu = smp_processor_id();
144         bool old_event;
145         u64 now;
146         struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
147
148         now = get_jiffies_64();
149         if (level == CORE_LEVEL) {
150                 if (event == THERMAL_THROTTLING_EVENT)
151                         state = &pstate->core_throttle;
152                 else if (event == POWER_LIMIT_EVENT)
153                         state = &pstate->core_power_limit;
154                 else
155                          return 0;
156         } else if (level == PACKAGE_LEVEL) {
157                 if (event == THERMAL_THROTTLING_EVENT)
158                         state = &pstate->package_throttle;
159                 else if (event == POWER_LIMIT_EVENT)
160                         state = &pstate->package_power_limit;
161                 else
162                         return 0;
163         } else
164                 return 0;
165
166         old_event = state->new_event;
167         state->new_event = new_event;
168
169         if (new_event)
170                 state->count++;
171
172         if (time_before64(now, state->next_check) &&
173                         state->count != state->last_count)
174                 return 0;
175
176         state->next_check = now + CHECK_INTERVAL;
177         state->last_count = state->count;
178
179         /* if we just entered the thermal event */
180         if (new_event) {
181                 if (event == THERMAL_THROTTLING_EVENT)
182                         printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
183                                 this_cpu,
184                                 level == CORE_LEVEL ? "Core" : "Package",
185                                 state->count);
186                 else
187                         printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
188                                 this_cpu,
189                                 level == CORE_LEVEL ? "Core" : "Package",
190                                 state->count);
191                 return 1;
192         }
193         if (old_event) {
194                 if (event == THERMAL_THROTTLING_EVENT)
195                         printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
196                                 this_cpu,
197                                 level == CORE_LEVEL ? "Core" : "Package");
198                 else
199                         printk(KERN_INFO "CPU%d: %s power limit normal\n",
200                                 this_cpu,
201                                 level == CORE_LEVEL ? "Core" : "Package");
202                 return 1;
203         }
204
205         return 0;
206 }
207
208 static int thresh_event_valid(int event)
209 {
210         struct _thermal_state *state;
211         unsigned int this_cpu = smp_processor_id();
212         struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
213         u64 now = get_jiffies_64();
214
215         state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;
216
217         if (time_before64(now, state->next_check))
218                 return 0;
219
220         state->next_check = now + CHECK_INTERVAL;
221         return 1;
222 }
223
224 #ifdef CONFIG_SYSFS
225 /* Add/Remove thermal_throttle interface for CPU device: */
226 static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
227                                 unsigned int cpu)
228 {
229         int err;
230         struct cpuinfo_x86 *c = &cpu_data(cpu);
231
232         err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
233         if (err)
234                 return err;
235
236         if (cpu_has(c, X86_FEATURE_PLN))
237                 err = sysfs_add_file_to_group(&sys_dev->kobj,
238                                               &attr_core_power_limit_count.attr,
239                                               thermal_attr_group.name);
240         if (cpu_has(c, X86_FEATURE_PTS)) {
241                 err = sysfs_add_file_to_group(&sys_dev->kobj,
242                                               &attr_package_throttle_count.attr,
243                                               thermal_attr_group.name);
244                 if (cpu_has(c, X86_FEATURE_PLN))
245                         err = sysfs_add_file_to_group(&sys_dev->kobj,
246                                         &attr_package_power_limit_count.attr,
247                                         thermal_attr_group.name);
248         }
249
250         return err;
251 }
252
253 static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
254 {
255         sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
256 }
257
258 /* Mutex protecting device creation against CPU hotplug: */
259 static DEFINE_MUTEX(therm_cpu_lock);
260
261 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
262 static __cpuinit int
263 thermal_throttle_cpu_callback(struct notifier_block *nfb,
264                               unsigned long action,
265                               void *hcpu)
266 {
267         unsigned int cpu = (unsigned long)hcpu;
268         struct sys_device *sys_dev;
269         int err = 0;
270
271         sys_dev = get_cpu_sysdev(cpu);
272
273         switch (action) {
274         case CPU_UP_PREPARE:
275         case CPU_UP_PREPARE_FROZEN:
276                 mutex_lock(&therm_cpu_lock);
277                 err = thermal_throttle_add_dev(sys_dev, cpu);
278                 mutex_unlock(&therm_cpu_lock);
279                 WARN_ON(err);
280                 break;
281         case CPU_UP_CANCELED:
282         case CPU_UP_CANCELED_FROZEN:
283         case CPU_DEAD:
284         case CPU_DEAD_FROZEN:
285                 mutex_lock(&therm_cpu_lock);
286                 thermal_throttle_remove_dev(sys_dev);
287                 mutex_unlock(&therm_cpu_lock);
288                 break;
289         }
290         return notifier_from_errno(err);
291 }
292
293 static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
294 {
295         .notifier_call = thermal_throttle_cpu_callback,
296 };
297
298 static __init int thermal_throttle_init_device(void)
299 {
300         unsigned int cpu = 0;
301         int err;
302
303         if (!atomic_read(&therm_throt_en))
304                 return 0;
305
306         register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
307
308 #ifdef CONFIG_HOTPLUG_CPU
309         mutex_lock(&therm_cpu_lock);
310 #endif
311         /* connect live CPUs to sysfs */
312         for_each_online_cpu(cpu) {
313                 err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
314                 WARN_ON(err);
315         }
316 #ifdef CONFIG_HOTPLUG_CPU
317         mutex_unlock(&therm_cpu_lock);
318 #endif
319
320         return 0;
321 }
322 device_initcall(thermal_throttle_init_device);
323
324 #endif /* CONFIG_SYSFS */
325
326 static void notify_thresholds(__u64 msr_val)
327 {
328         /* check whether the interrupt handler is defined;
329          * otherwise simply return
330          */
331         if (!platform_thermal_notify)
332                 return;
333
334         /* lower threshold reached */
335         if ((msr_val & THERM_LOG_THRESHOLD0) && thresh_event_valid(0))
336                 platform_thermal_notify(msr_val);
337         /* higher threshold reached */
338         if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
339                 platform_thermal_notify(msr_val);
340 }
341
342 /* Thermal transition interrupt handler */
343 static void intel_thermal_interrupt(void)
344 {
345         __u64 msr_val;
346
347         rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
348
349         /* Check for violation of core thermal thresholds*/
350         notify_thresholds(msr_val);
351
352         if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
353                                 THERMAL_THROTTLING_EVENT,
354                                 CORE_LEVEL) != 0)
355                 mce_log_therm_throt_event(msr_val);
356
357         if (this_cpu_has(X86_FEATURE_PLN))
358                 therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
359                                         POWER_LIMIT_EVENT,
360                                         CORE_LEVEL);
361
362         if (this_cpu_has(X86_FEATURE_PTS)) {
363                 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
364                 therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
365                                         THERMAL_THROTTLING_EVENT,
366                                         PACKAGE_LEVEL);
367                 if (this_cpu_has(X86_FEATURE_PLN))
368                         therm_throt_process(msr_val &
369                                         PACKAGE_THERM_STATUS_POWER_LIMIT,
370                                         POWER_LIMIT_EVENT,
371                                         PACKAGE_LEVEL);
372         }
373 }
374
375 static void unexpected_thermal_interrupt(void)
376 {
377         printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
378                         smp_processor_id());
379 }
380
381 static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
382
383 asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
384 {
385         exit_idle();
386         irq_enter();
387         inc_irq_stat(irq_thermal_count);
388         smp_thermal_vector();
389         irq_exit();
390         /* Ack only at the end to avoid potential reentry */
391         ack_APIC_irq();
392 }
393
394 /* Thermal monitoring depends on APIC, ACPI and clock modulation */
395 static int intel_thermal_supported(struct cpuinfo_x86 *c)
396 {
397         if (!cpu_has_apic)
398                 return 0;
399         if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
400                 return 0;
401         return 1;
402 }
403
404 void __init mcheck_intel_therm_init(void)
405 {
406         /*
407          * This function is only called on boot CPU. Save the init thermal
408          * LVT value on BSP and use that value to restore APs' thermal LVT
409          * entry BIOS programmed later
410          */
411         if (intel_thermal_supported(&boot_cpu_data))
412                 lvtthmr_init = apic_read(APIC_LVTTHMR);
413 }
414
415 void intel_init_thermal(struct cpuinfo_x86 *c)
416 {
417         unsigned int cpu = smp_processor_id();
418         int tm2 = 0;
419         u32 l, h;
420
421         if (!intel_thermal_supported(c))
422                 return;
423
424         /*
425          * First check if its enabled already, in which case there might
426          * be some SMM goo which handles it, so we can't even put a handler
427          * since it might be delivered via SMI already:
428          */
429         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
430
431         h = lvtthmr_init;
432         /*
433          * The initial value of thermal LVT entries on all APs always reads
434          * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
435          * sequence to them and LVT registers are reset to 0s except for
436          * the mask bits which are set to 1s when APs receive INIT IPI.
437          * If BIOS takes over the thermal interrupt and sets its interrupt
438          * delivery mode to SMI (not fixed), it restores the value that the
439          * BIOS has programmed on AP based on BSP's info we saved since BIOS
440          * is always setting the same value for all threads/cores.
441          */
442         if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
443                 apic_write(APIC_LVTTHMR, lvtthmr_init);
444
445
446         if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
447                 printk(KERN_DEBUG
448                        "CPU%d: Thermal monitoring handled by SMI\n", cpu);
449                 return;
450         }
451
452         /* Check whether a vector already exists */
453         if (h & APIC_VECTOR_MASK) {
454                 printk(KERN_DEBUG
455                        "CPU%d: Thermal LVT vector (%#x) already installed\n",
456                        cpu, (h & APIC_VECTOR_MASK));
457                 return;
458         }
459
460         /* early Pentium M models use different method for enabling TM2 */
461         if (cpu_has(c, X86_FEATURE_TM2)) {
462                 if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
463                         rdmsr(MSR_THERM2_CTL, l, h);
464                         if (l & MSR_THERM2_CTL_TM_SELECT)
465                                 tm2 = 1;
466                 } else if (l & MSR_IA32_MISC_ENABLE_TM2)
467                         tm2 = 1;
468         }
469
470         /* We'll mask the thermal vector in the lapic till we're ready: */
471         h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
472         apic_write(APIC_LVTTHMR, h);
473
474         rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
475         if (cpu_has(c, X86_FEATURE_PLN))
476                 wrmsr(MSR_IA32_THERM_INTERRUPT,
477                       l | (THERM_INT_LOW_ENABLE
478                         | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
479         else
480                 wrmsr(MSR_IA32_THERM_INTERRUPT,
481                       l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
482
483         if (cpu_has(c, X86_FEATURE_PTS)) {
484                 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
485                 if (cpu_has(c, X86_FEATURE_PLN))
486                         wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
487                               l | (PACKAGE_THERM_INT_LOW_ENABLE
488                                 | PACKAGE_THERM_INT_HIGH_ENABLE
489                                 | PACKAGE_THERM_INT_PLN_ENABLE), h);
490                 else
491                         wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
492                               l | (PACKAGE_THERM_INT_LOW_ENABLE
493                                 | PACKAGE_THERM_INT_HIGH_ENABLE), h);
494         }
495
496         smp_thermal_vector = intel_thermal_interrupt;
497
498         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
499         wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
500
501         /* Unmask the thermal vector: */
502         l = apic_read(APIC_LVTTHMR);
503         apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
504
505         printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
506                        tm2 ? "TM2" : "TM1");
507
508         /* enable thermal throttle processing */
509         atomic_set(&therm_throt_en, 1);
510 }