arch/x86/kernel/apic/numaq_32.c

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
   6  *
   7  * All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  17  * NON INFRINGEMENT.  See the GNU General Public License for more
  18  * details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  *
  24  * Send feedback to <gone@us.ibm.com>
  25  */
  26 #include <linux/nodemask.h>
  27 #include <linux/topology.h>
  28 #include <linux/bootmem.h>
  29 #include <linux/threads.h>
  30 #include <linux/cpumask.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mmzone.h>
  33 #include <linux/module.h>
  34 #include <linux/string.h>
  35 #include <linux/init.h>
  36 #include <linux/numa.h>
  37 #include <linux/smp.h>
  38 #include <linux/io.h>
  39 #include <linux/mm.h>
  40
  41 #include <asm/processor.h>
  42 #include <asm/fixmap.h>
  43 #include <asm/mpspec.h>
  44 #include <asm/numaq.h>
  45 #include <asm/setup.h>
  46 #include <asm/apic.h>
  47 #include <asm/e820.h>
  48 #include <asm/ipi.h>
  49
  50 #define MB_TO_PAGES(addr)               ((addr) << (20 - PAGE_SHIFT))
  51
  52 int found_numaq;
  53
  54 /*
  55  * Have to match translation table entries to main table entries by counter
  56  * hence the mpc_record variable .... can't see a less disgusting way of
  57  * doing this ....
  58  */
  59 struct mpc_trans {
  60         unsigned char                   mpc_type;
  61         unsigned char                   trans_len;
  62         unsigned char                   trans_type;
  63         unsigned char                   trans_quad;
  64         unsigned char                   trans_global;
  65         unsigned char                   trans_local;
  66         unsigned short                  trans_reserved;
  67 };
  68
  69 /* x86_quirks member */
  70 static int                              mpc_record;
  71
  72 static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
  73
  74 int                                     mp_bus_id_to_node[MAX_MP_BUSSES];
  75 int                                     mp_bus_id_to_local[MAX_MP_BUSSES];
  76 int                                     quad_local_to_mp_bus_id[NR_CPUS/4][4];
  77
  78
  79 static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
  80 {
  81         struct eachquadmem *eq = scd->eq + node;
  82
  83         node_set_online(node);
  84
  85         /* Convert to pages */
  86         node_start_pfn[node] =
  87                  MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
  88
  89         node_end_pfn[node] =
  90                  MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
  91
  92         e820_register_active_regions(node, node_start_pfn[node],
  93                                                 node_end_pfn[node]);
  94
  95         memory_present(node, node_start_pfn[node], node_end_pfn[node]);
  96
  97         node_remap_size[node] = node_memmap_size_bytes(node,
  98                                         node_start_pfn[node],
  99                                         node_end_pfn[node]);
 100 }
 101
 102 /*
 103  * Function: smp_dump_qct()
 104  *
 105  * Description: gets memory layout from the quad config table.  This
 106  * function also updates node_online_map with the nodes (quads) present.
 107  */
 108 static void __init smp_dump_qct(void)
 109 {
 110         struct sys_cfg_data *scd;
 111         int node;
 112
 113         scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
 114
 115         nodes_clear(node_online_map);
 116         for_each_node(node) {
 117                 if (scd->quads_present31_0 & (1 << node))
 118                         numaq_register_node(node, scd);
 119         }
 120 }
 121
 122 void __cpuinit numaq_tsc_disable(void)
 123 {
 124         if (!found_numaq)
 125                 return;
 126
 127         if (num_online_nodes() > 1) {
 128                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
 129                 setup_clear_cpu_cap(X86_FEATURE_TSC);
 130         }
 131 }
 132
 133 static int __init numaq_pre_time_init(void)
 134 {
 135         numaq_tsc_disable();
 136         return 0;
 137 }
 138
 139 static inline int generate_logical_apicid(int quad, int phys_apicid)
 140 {
 141         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
 142 }
 143
 144 /* x86_quirks member */
 145 static int mpc_apic_id(struct mpc_cpu *m)
 146 {
 147         int quad = translation_table[mpc_record]->trans_quad;
 148         int logical_apicid = generate_logical_apicid(quad, m->apicid);
 149
 150         printk(KERN_DEBUG
 151                 "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
 152                  m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
 153                 (m->cpufeature & CPU_MODEL_MASK) >> 4,
 154                  m->apicver, quad, logical_apicid);
 155
 156         return logical_apicid;
 157 }
 158
 159 /* x86_quirks member */
 160 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
 161 {
 162         int quad = translation_table[mpc_record]->trans_quad;
 163         int local = translation_table[mpc_record]->trans_local;
 164
 165         mp_bus_id_to_node[m->busid] = quad;
 166         mp_bus_id_to_local[m->busid] = local;
 167
 168         printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
 169 }
 170
 171 /* x86_quirks member */
 172 static void mpc_oem_pci_bus(struct mpc_bus *m)
 173 {
 174         int quad = translation_table[mpc_record]->trans_quad;
 175         int local = translation_table[mpc_record]->trans_local;
 176
 177         quad_local_to_mp_bus_id[quad][local] = m->busid;
 178 }
 179
 180 static void __init MP_translation_info(struct mpc_trans *m)
 181 {
 182         printk(KERN_INFO
 183             "Translation: record %d, type %d, quad %d, global %d, local %d\n",
 184                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
 185                m->trans_local);
 186
 187         if (mpc_record >= MAX_MPC_ENTRY)
 188                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
 189         else
 190                 translation_table[mpc_record] = m; /* stash this for later */
 191
 192         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
 193                 node_set_online(m->trans_quad);
 194 }
 195
 196 static int __init mpf_checksum(unsigned char *mp, int len)
 197 {
 198         int sum = 0;
 199
 200         while (len--)
 201                 sum += *mp++;
 202
 203         return sum & 0xFF;
 204 }
 205
 206 /*
 207  * Read/parse the MPC oem tables
 208  */
 209 static void __init
 210  smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
 211 {
 212         int count = sizeof(*oemtable);  /* the header size */
 213         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 214
 215         mpc_record = 0;
 216         printk(KERN_INFO
 217                 "Found an OEM MPC table at %8p - parsing it ... \n", oemtable);
 218
 219         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
 220                 printk(KERN_WARNING
 221                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
 222                        oemtable->signature[0], oemtable->signature[1],
 223                        oemtable->signature[2], oemtable->signature[3]);
 224                 return;
 225         }
 226
 227         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
 228                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
 229                 return;
 230         }
 231
 232         while (count < oemtable->length) {
 233                 switch (*oemptr) {
 234                 case MP_TRANSLATION:
 235                         {
 236                                 struct mpc_trans *m = (void *)oemptr;
 237
 238                                 MP_translation_info(m);
 239                                 oemptr += sizeof(*m);
 240                                 count += sizeof(*m);
 241                                 ++mpc_record;
 242                                 break;
 243                         }
 244                 default:
 245                         printk(KERN_WARNING
 246                                "Unrecognised OEM table entry type! - %d\n",
 247                                (int)*oemptr);
 248                         return;
 249                 }
 250         }
 251 }
 252
 253 static int __init numaq_setup_ioapic_ids(void)
 254 {
 255         /* so can skip it */
 256         return 1;
 257 }
 258
 259 static struct x86_quirks numaq_x86_quirks __initdata = {
 260         .arch_pre_time_init             = numaq_pre_time_init,
 261         .arch_time_init                 = NULL,
 262         .arch_pre_intr_init             = NULL,
 263         .arch_memory_setup              = NULL,
 264         .arch_intr_init                 = NULL,
 265         .arch_trap_init                 = NULL,
 266         .mach_get_smp_config            = NULL,
 267         .mach_find_smp_config           = NULL,
 268         .mpc_record                     = &mpc_record,
 269         .mpc_apic_id                    = mpc_apic_id,
 270         .mpc_oem_bus_info               = mpc_oem_bus_info,
 271         .mpc_oem_pci_bus                = mpc_oem_pci_bus,
 272         .smp_read_mpc_oem               = smp_read_mpc_oem,
 273         .setup_ioapic_ids               = numaq_setup_ioapic_ids,
 274 };
 275
 276 static __init void early_check_numaq(void)
 277 {
 278         /*
 279          * Find possible boot-time SMP configuration:
 280          */
 281         early_find_smp_config();
 282
 283         /*
 284          * get boot-time SMP configuration:
 285          */
 286         if (smp_found_config)
 287                 early_get_smp_config();
 288
 289         if (found_numaq)
 290                 x86_quirks = &numaq_x86_quirks;
 291 }
 292
 293 int __init get_memcfg_numaq(void)
 294 {
 295         early_check_numaq();
 296         if (!found_numaq)
 297                 return 0;
 298         smp_dump_qct();
 299
 300         return 1;
 301 }
 302
 303 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
 304
 305 static inline unsigned int numaq_get_apic_id(unsigned long x)
 306 {
 307         return (x >> 24) & 0x0F;
 308 }
 309
 310 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
 311 {
 312         default_send_IPI_mask_sequence_logical(mask, vector);
 313 }
 314
 315 static inline void numaq_send_IPI_allbutself(int vector)
 316 {
 317         default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
 318 }
 319
 320 static inline void numaq_send_IPI_all(int vector)
 321 {
 322         numaq_send_IPI_mask(cpu_online_mask, vector);
 323 }
 324
 325 #define NUMAQ_TRAMPOLINE_PHYS_LOW       (0x8)
 326 #define NUMAQ_TRAMPOLINE_PHYS_HIGH      (0xa)
 327
 328 /*
 329  * Because we use NMIs rather than the INIT-STARTUP sequence to
 330  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
 331  */
 332 static inline void numaq_smp_callin_clear_local_apic(void)
 333 {
 334         clear_local_APIC();
 335 }
 336
 337 static inline const struct cpumask *numaq_target_cpus(void)
 338 {
 339         return cpu_all_mask;
 340 }
 341
 342 static inline unsigned long
 343 numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
 344 {
 345         return physid_isset(apicid, bitmap);
 346 }
 347
 348 static inline unsigned long numaq_check_apicid_present(int bit)
 349 {
 350         return physid_isset(bit, phys_cpu_present_map);
 351 }
 352
 353 static inline int numaq_apic_id_registered(void)
 354 {
 355         return 1;
 356 }
 357
 358 static inline void numaq_init_apic_ldr(void)
 359 {
 360         /* Already done in NUMA-Q firmware */
 361 }
 362
 363 static inline void numaq_setup_apic_routing(void)
 364 {
 365         printk(KERN_INFO
 366                 "Enabling APIC mode:  NUMA-Q.  Using %d I/O APICs\n",
 367                 nr_ioapics);
 368 }
 369
 370 /*
 371  * Skip adding the timer int on secondary nodes, which causes
 372  * a small but painful rift in the time-space continuum.
 373  */
 374 static inline int numaq_multi_timer_check(int apic, int irq)
 375 {
 376         return apic != 0 && irq == 0;
 377 }
 378
 379 static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
 380 {
 381         /* We don't have a good way to do this yet - hack */
 382         return physids_promote(0xFUL);
 383 }
 384
 385 static inline int numaq_cpu_to_logical_apicid(int cpu)
 386 {
 387         if (cpu >= nr_cpu_ids)
 388                 return BAD_APICID;
 389         return cpu_2_logical_apicid[cpu];
 390 }
 391
 392 /*
 393  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
 394  * cpu to APIC ID relation to properly interact with the intelligent
 395  * mode of the cluster controller.
 396  */
 397 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 398 {
 399         if (mps_cpu < 60)
 400                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
 401         else
 402                 return BAD_APICID;
 403 }
 404
 405 static inline int numaq_apicid_to_node(int logical_apicid)
 406 {
 407         return logical_apicid >> 4;
 408 }
 409
 410 static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 411 {
 412         int node = numaq_apicid_to_node(logical_apicid);
 413         int cpu = __ffs(logical_apicid & 0xf);
 414
 415         return physid_mask_of_physid(cpu + 4*node);
 416 }
 417
 418 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 419 void *xquad_portio;
 420
 421 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
 422 {
 423         return 1;
 424 }
 425
 426 /*
 427  * We use physical apicids here, not logical, so just return the default
 428  * physical broadcast to stop people from breaking us
 429  */
 430 static unsigned int numaq_cpu_mask_to_apicid(const struct cpumask *cpumask)
 431 {
 432         return 0x0F;
 433 }
 434
 435 static inline unsigned int
 436 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 437                              const struct cpumask *andmask)
 438 {
 439         return 0x0F;
 440 }
 441
 442 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 443 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
 444 {
 445         return cpuid_apic >> index_msb;
 446 }
 447
 448 static int
 449 numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 450 {
 451         if (strncmp(oem, "IBM NUMA", 8))
 452                 printk(KERN_ERR "Warning! Not a NUMA-Q system!\n");
 453         else
 454                 found_numaq = 1;
 455
 456         return found_numaq;
 457 }
 458
 459 static int probe_numaq(void)
 460 {
 461         /* already know from get_memcfg_numaq() */
 462         return found_numaq;
 463 }
 464
 465 static void numaq_vector_allocation_domain(int cpu, struct cpumask *retmask)
 466 {
 467         /* Careful. Some cpus do not strictly honor the set of cpus
 468          * specified in the interrupt destination when using lowest
 469          * priority interrupt delivery mode.
 470          *
 471          * In particular there was a hyperthreading cpu observed to
 472          * deliver interrupts to the wrong hyperthread when only one
 473          * hyperthread was specified in the interrupt desitination.
 474          */
 475         cpumask_clear(retmask);
 476         cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
 477 }
 478
 479 static void numaq_setup_portio_remap(void)
 480 {
 481         int num_quads = num_online_nodes();
 482
 483         if (num_quads <= 1)
 484                 return;
 485
 486         printk(KERN_INFO
 487                 "Remapping cross-quad port I/O for %d quads\n", num_quads);
 488
 489         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
 490
 491         printk(KERN_INFO
 492                 "xquad_portio vaddr 0x%08lx, len %08lx\n",
 493                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
 494 }
 495
 496 /* Use __refdata to keep false positive warning calm.   */
 497 struct apic __refdata apic_numaq = {
 498
 499         .name                           = "NUMAQ",
 500         .probe                          = probe_numaq,
 501         .acpi_madt_oem_check            = NULL,
 502         .apic_id_registered             = numaq_apic_id_registered,
 503
 504         .irq_delivery_mode              = dest_LowestPrio,
 505         /* physical delivery on LOCAL quad: */
 506         .irq_dest_mode                  = 0,
 507
 508         .target_cpus                    = numaq_target_cpus,
 509         .disable_esr                    = 1,
 510         .dest_logical                   = APIC_DEST_LOGICAL,
 511         .check_apicid_used              = numaq_check_apicid_used,
 512         .check_apicid_present           = numaq_check_apicid_present,
 513
 514         .vector_allocation_domain       = numaq_vector_allocation_domain,
 515         .init_apic_ldr                  = numaq_init_apic_ldr,
 516
 517         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
 518         .setup_apic_routing             = numaq_setup_apic_routing,
 519         .multi_timer_check              = numaq_multi_timer_check,
 520         .apicid_to_node                 = numaq_apicid_to_node,
 521         .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
 522         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
 523         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
 524         .setup_portio_remap             = numaq_setup_portio_remap,
 525         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
 526         .enable_apic_mode               = NULL,
 527         .phys_pkg_id                    = numaq_phys_pkg_id,
 528         .mps_oem_check                  = numaq_mps_oem_check,
 529
 530         .get_apic_id                    = numaq_get_apic_id,
 531         .set_apic_id                    = NULL,
 532         .apic_id_mask                   = 0x0F << 24,
 533
 534         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
 535         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
 536
 537         .send_IPI_mask                  = numaq_send_IPI_mask,
 538         .send_IPI_mask_allbutself       = NULL,
 539         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
 540         .send_IPI_all                   = numaq_send_IPI_all,
 541         .send_IPI_self                  = default_send_IPI_self,
 542
 543         .wakeup_secondary_cpu           = wakeup_secondary_cpu_via_nmi,
 544         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
 545         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
 546
 547         /* We don't do anything here because we use NMI's to boot instead */
 548         .wait_for_init_deassert         = NULL,
 549
 550         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
 551         .inquire_remote_apic            = NULL,
 552
 553         .read                           = native_apic_mem_read,
 554         .write                          = native_apic_mem_write,
 555         .icr_read                       = native_apic_icr_read,
 556         .icr_write                      = native_apic_icr_write,
 557         .wait_icr_idle                  = native_apic_wait_icr_idle,
 558         .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 559 };