x86-32, mm: Add an initial page table for core bootstrapping
[pandora-kernel.git] / arch / x86 / include / asm / paravirt.h
1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4  * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/pgtable_types.h>
8 #include <asm/asm.h>
9
10 #include <asm/paravirt_types.h>
11
12 #ifndef __ASSEMBLY__
13 #include <linux/types.h>
14 #include <linux/cpumask.h>
15
16 static inline int paravirt_enabled(void)
17 {
18         return pv_info.paravirt_enabled;
19 }
20
21 static inline void load_sp0(struct tss_struct *tss,
22                              struct thread_struct *thread)
23 {
24         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
25 }
26
27 /* The paravirtualized CPUID instruction. */
28 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
29                            unsigned int *ecx, unsigned int *edx)
30 {
31         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
32 }
33
34 /*
35  * These special macros can be used to get or set a debugging register
36  */
37 static inline unsigned long paravirt_get_debugreg(int reg)
38 {
39         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
40 }
41 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
42 static inline void set_debugreg(unsigned long val, int reg)
43 {
44         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
45 }
46
47 static inline void clts(void)
48 {
49         PVOP_VCALL0(pv_cpu_ops.clts);
50 }
51
52 static inline unsigned long read_cr0(void)
53 {
54         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
55 }
56
57 static inline void write_cr0(unsigned long x)
58 {
59         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
60 }
61
62 static inline unsigned long read_cr2(void)
63 {
64         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
65 }
66
67 static inline void write_cr2(unsigned long x)
68 {
69         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
70 }
71
72 static inline unsigned long read_cr3(void)
73 {
74         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
75 }
76
77 static inline void write_cr3(unsigned long x)
78 {
79         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
80 }
81
82 static inline unsigned long read_cr4(void)
83 {
84         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
85 }
86 static inline unsigned long read_cr4_safe(void)
87 {
88         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
89 }
90
91 static inline void write_cr4(unsigned long x)
92 {
93         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
94 }
95
96 #ifdef CONFIG_X86_64
97 static inline unsigned long read_cr8(void)
98 {
99         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
100 }
101
102 static inline void write_cr8(unsigned long x)
103 {
104         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
105 }
106 #endif
107
108 static inline void raw_safe_halt(void)
109 {
110         PVOP_VCALL0(pv_irq_ops.safe_halt);
111 }
112
113 static inline void halt(void)
114 {
115         PVOP_VCALL0(pv_irq_ops.safe_halt);
116 }
117
118 static inline void wbinvd(void)
119 {
120         PVOP_VCALL0(pv_cpu_ops.wbinvd);
121 }
122
123 #define get_kernel_rpl()  (pv_info.kernel_rpl)
124
125 static inline u64 paravirt_read_msr(unsigned msr, int *err)
126 {
127         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
128 }
129
130 static inline int paravirt_rdmsr_regs(u32 *regs)
131 {
132         return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
133 }
134
135 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
136 {
137         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
138 }
139
140 static inline int paravirt_wrmsr_regs(u32 *regs)
141 {
142         return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
143 }
144
145 /* These should all do BUG_ON(_err), but our headers are too tangled. */
146 #define rdmsr(msr, val1, val2)                  \
147 do {                                            \
148         int _err;                               \
149         u64 _l = paravirt_read_msr(msr, &_err); \
150         val1 = (u32)_l;                         \
151         val2 = _l >> 32;                        \
152 } while (0)
153
154 #define wrmsr(msr, val1, val2)                  \
155 do {                                            \
156         paravirt_write_msr(msr, val1, val2);    \
157 } while (0)
158
159 #define rdmsrl(msr, val)                        \
160 do {                                            \
161         int _err;                               \
162         val = paravirt_read_msr(msr, &_err);    \
163 } while (0)
164
165 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
166 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
167
168 /* rdmsr with exception handling */
169 #define rdmsr_safe(msr, a, b)                   \
170 ({                                              \
171         int _err;                               \
172         u64 _l = paravirt_read_msr(msr, &_err); \
173         (*a) = (u32)_l;                         \
174         (*b) = _l >> 32;                        \
175         _err;                                   \
176 })
177
178 #define rdmsr_safe_regs(regs)   paravirt_rdmsr_regs(regs)
179 #define wrmsr_safe_regs(regs)   paravirt_wrmsr_regs(regs)
180
181 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
182 {
183         int err;
184
185         *p = paravirt_read_msr(msr, &err);
186         return err;
187 }
188 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
189 {
190         u32 gprs[8] = { 0 };
191         int err;
192
193         gprs[1] = msr;
194         gprs[7] = 0x9c5a203a;
195
196         err = paravirt_rdmsr_regs(gprs);
197
198         *p = gprs[0] | ((u64)gprs[2] << 32);
199
200         return err;
201 }
202
203 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
204 {
205         u32 gprs[8] = { 0 };
206
207         gprs[0] = (u32)val;
208         gprs[1] = msr;
209         gprs[2] = val >> 32;
210         gprs[7] = 0x9c5a203a;
211
212         return paravirt_wrmsr_regs(gprs);
213 }
214
215 static inline u64 paravirt_read_tsc(void)
216 {
217         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
218 }
219
220 #define rdtscl(low)                             \
221 do {                                            \
222         u64 _l = paravirt_read_tsc();           \
223         low = (int)_l;                          \
224 } while (0)
225
226 #define rdtscll(val) (val = paravirt_read_tsc())
227
228 static inline unsigned long long paravirt_sched_clock(void)
229 {
230         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
231 }
232
233 static inline unsigned long long paravirt_read_pmc(int counter)
234 {
235         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
236 }
237
238 #define rdpmc(counter, low, high)               \
239 do {                                            \
240         u64 _l = paravirt_read_pmc(counter);    \
241         low = (u32)_l;                          \
242         high = _l >> 32;                        \
243 } while (0)
244
245 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
246 {
247         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
248 }
249
250 #define rdtscp(low, high, aux)                          \
251 do {                                                    \
252         int __aux;                                      \
253         unsigned long __val = paravirt_rdtscp(&__aux);  \
254         (low) = (u32)__val;                             \
255         (high) = (u32)(__val >> 32);                    \
256         (aux) = __aux;                                  \
257 } while (0)
258
259 #define rdtscpll(val, aux)                              \
260 do {                                                    \
261         unsigned long __aux;                            \
262         val = paravirt_rdtscp(&__aux);                  \
263         (aux) = __aux;                                  \
264 } while (0)
265
266 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
267 {
268         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
269 }
270
271 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
272 {
273         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
274 }
275
276 static inline void load_TR_desc(void)
277 {
278         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
279 }
280 static inline void load_gdt(const struct desc_ptr *dtr)
281 {
282         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
283 }
284 static inline void load_idt(const struct desc_ptr *dtr)
285 {
286         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
287 }
288 static inline void set_ldt(const void *addr, unsigned entries)
289 {
290         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
291 }
292 static inline void store_gdt(struct desc_ptr *dtr)
293 {
294         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
295 }
296 static inline void store_idt(struct desc_ptr *dtr)
297 {
298         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
299 }
300 static inline unsigned long paravirt_store_tr(void)
301 {
302         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
303 }
304 #define store_tr(tr)    ((tr) = paravirt_store_tr())
305 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
306 {
307         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
308 }
309
310 #ifdef CONFIG_X86_64
311 static inline void load_gs_index(unsigned int gs)
312 {
313         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
314 }
315 #endif
316
317 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
318                                    const void *desc)
319 {
320         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
321 }
322
323 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
324                                    void *desc, int type)
325 {
326         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
327 }
328
329 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
330 {
331         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
332 }
333 static inline void set_iopl_mask(unsigned mask)
334 {
335         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
336 }
337
338 /* The paravirtualized I/O functions */
339 static inline void slow_down_io(void)
340 {
341         pv_cpu_ops.io_delay();
342 #ifdef REALLY_SLOW_IO
343         pv_cpu_ops.io_delay();
344         pv_cpu_ops.io_delay();
345         pv_cpu_ops.io_delay();
346 #endif
347 }
348
349 #ifdef CONFIG_SMP
350 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
351                                     unsigned long start_esp)
352 {
353         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
354                     phys_apicid, start_eip, start_esp);
355 }
356 #endif
357
358 static inline void paravirt_activate_mm(struct mm_struct *prev,
359                                         struct mm_struct *next)
360 {
361         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
362 }
363
364 static inline void arch_dup_mmap(struct mm_struct *oldmm,
365                                  struct mm_struct *mm)
366 {
367         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
368 }
369
370 static inline void arch_exit_mmap(struct mm_struct *mm)
371 {
372         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
373 }
374
375 static inline void __flush_tlb(void)
376 {
377         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
378 }
379 static inline void __flush_tlb_global(void)
380 {
381         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
382 }
383 static inline void __flush_tlb_single(unsigned long addr)
384 {
385         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
386 }
387
388 static inline void flush_tlb_others(const struct cpumask *cpumask,
389                                     struct mm_struct *mm,
390                                     unsigned long va)
391 {
392         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
393 }
394
395 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
396 {
397         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
398 }
399
400 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
401 {
402         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
403 }
404
405 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
406 {
407         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
408 }
409 static inline void paravirt_release_pte(unsigned long pfn)
410 {
411         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
412 }
413
414 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
415 {
416         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
417 }
418
419 static inline void paravirt_release_pmd(unsigned long pfn)
420 {
421         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
422 }
423
424 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
425 {
426         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
427 }
428 static inline void paravirt_release_pud(unsigned long pfn)
429 {
430         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
431 }
432
433 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
434                               pte_t *ptep)
435 {
436         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
437 }
438
439 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
440                                     pte_t *ptep)
441 {
442         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
443 }
444
445 static inline pte_t __pte(pteval_t val)
446 {
447         pteval_t ret;
448
449         if (sizeof(pteval_t) > sizeof(long))
450                 ret = PVOP_CALLEE2(pteval_t,
451                                    pv_mmu_ops.make_pte,
452                                    val, (u64)val >> 32);
453         else
454                 ret = PVOP_CALLEE1(pteval_t,
455                                    pv_mmu_ops.make_pte,
456                                    val);
457
458         return (pte_t) { .pte = ret };
459 }
460
461 static inline pteval_t pte_val(pte_t pte)
462 {
463         pteval_t ret;
464
465         if (sizeof(pteval_t) > sizeof(long))
466                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
467                                    pte.pte, (u64)pte.pte >> 32);
468         else
469                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
470                                    pte.pte);
471
472         return ret;
473 }
474
475 static inline pgd_t __pgd(pgdval_t val)
476 {
477         pgdval_t ret;
478
479         if (sizeof(pgdval_t) > sizeof(long))
480                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
481                                    val, (u64)val >> 32);
482         else
483                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
484                                    val);
485
486         return (pgd_t) { ret };
487 }
488
489 static inline pgdval_t pgd_val(pgd_t pgd)
490 {
491         pgdval_t ret;
492
493         if (sizeof(pgdval_t) > sizeof(long))
494                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
495                                     pgd.pgd, (u64)pgd.pgd >> 32);
496         else
497                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
498                                     pgd.pgd);
499
500         return ret;
501 }
502
503 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
504 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
505                                            pte_t *ptep)
506 {
507         pteval_t ret;
508
509         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
510                          mm, addr, ptep);
511
512         return (pte_t) { .pte = ret };
513 }
514
515 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
516                                            pte_t *ptep, pte_t pte)
517 {
518         if (sizeof(pteval_t) > sizeof(long))
519                 /* 5 arg words */
520                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
521         else
522                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
523                             mm, addr, ptep, pte.pte);
524 }
525
526 static inline void set_pte(pte_t *ptep, pte_t pte)
527 {
528         if (sizeof(pteval_t) > sizeof(long))
529                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
530                             pte.pte, (u64)pte.pte >> 32);
531         else
532                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
533                             pte.pte);
534 }
535
536 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
537                               pte_t *ptep, pte_t pte)
538 {
539         if (sizeof(pteval_t) > sizeof(long))
540                 /* 5 arg words */
541                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
542         else
543                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
544 }
545
546 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
547 {
548         pmdval_t val = native_pmd_val(pmd);
549
550         if (sizeof(pmdval_t) > sizeof(long))
551                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
552         else
553                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
554 }
555
556 #if PAGETABLE_LEVELS >= 3
557 static inline pmd_t __pmd(pmdval_t val)
558 {
559         pmdval_t ret;
560
561         if (sizeof(pmdval_t) > sizeof(long))
562                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
563                                    val, (u64)val >> 32);
564         else
565                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
566                                    val);
567
568         return (pmd_t) { ret };
569 }
570
571 static inline pmdval_t pmd_val(pmd_t pmd)
572 {
573         pmdval_t ret;
574
575         if (sizeof(pmdval_t) > sizeof(long))
576                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
577                                     pmd.pmd, (u64)pmd.pmd >> 32);
578         else
579                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
580                                     pmd.pmd);
581
582         return ret;
583 }
584
585 static inline void set_pud(pud_t *pudp, pud_t pud)
586 {
587         pudval_t val = native_pud_val(pud);
588
589         if (sizeof(pudval_t) > sizeof(long))
590                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
591                             val, (u64)val >> 32);
592         else
593                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
594                             val);
595 }
596 #if PAGETABLE_LEVELS == 4
597 static inline pud_t __pud(pudval_t val)
598 {
599         pudval_t ret;
600
601         if (sizeof(pudval_t) > sizeof(long))
602                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
603                                    val, (u64)val >> 32);
604         else
605                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
606                                    val);
607
608         return (pud_t) { ret };
609 }
610
611 static inline pudval_t pud_val(pud_t pud)
612 {
613         pudval_t ret;
614
615         if (sizeof(pudval_t) > sizeof(long))
616                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
617                                     pud.pud, (u64)pud.pud >> 32);
618         else
619                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
620                                     pud.pud);
621
622         return ret;
623 }
624
625 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
626 {
627         pgdval_t val = native_pgd_val(pgd);
628
629         if (sizeof(pgdval_t) > sizeof(long))
630                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
631                             val, (u64)val >> 32);
632         else
633                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
634                             val);
635 }
636
637 static inline void pgd_clear(pgd_t *pgdp)
638 {
639         set_pgd(pgdp, __pgd(0));
640 }
641
642 static inline void pud_clear(pud_t *pudp)
643 {
644         set_pud(pudp, __pud(0));
645 }
646
647 #endif  /* PAGETABLE_LEVELS == 4 */
648
649 #endif  /* PAGETABLE_LEVELS >= 3 */
650
651 #ifdef CONFIG_X86_PAE
652 /* Special-case pte-setting operations for PAE, which can't update a
653    64-bit pte atomically */
654 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
655 {
656         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
657                     pte.pte, pte.pte >> 32);
658 }
659
660 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
661                              pte_t *ptep)
662 {
663         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
664 }
665
666 static inline void pmd_clear(pmd_t *pmdp)
667 {
668         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
669 }
670 #else  /* !CONFIG_X86_PAE */
671 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
672 {
673         set_pte(ptep, pte);
674 }
675
676 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
677                              pte_t *ptep)
678 {
679         set_pte_at(mm, addr, ptep, __pte(0));
680 }
681
682 static inline void pmd_clear(pmd_t *pmdp)
683 {
684         set_pmd(pmdp, __pmd(0));
685 }
686 #endif  /* CONFIG_X86_PAE */
687
688 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
689 static inline void arch_start_context_switch(struct task_struct *prev)
690 {
691         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
692 }
693
694 static inline void arch_end_context_switch(struct task_struct *next)
695 {
696         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
697 }
698
699 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
700 static inline void arch_enter_lazy_mmu_mode(void)
701 {
702         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
703 }
704
705 static inline void arch_leave_lazy_mmu_mode(void)
706 {
707         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
708 }
709
710 void arch_flush_lazy_mmu_mode(void);
711
712 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
713                                 phys_addr_t phys, pgprot_t flags)
714 {
715         pv_mmu_ops.set_fixmap(idx, phys, flags);
716 }
717
718 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
719
720 static inline int arch_spin_is_locked(struct arch_spinlock *lock)
721 {
722         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
723 }
724
725 static inline int arch_spin_is_contended(struct arch_spinlock *lock)
726 {
727         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
728 }
729 #define arch_spin_is_contended  arch_spin_is_contended
730
731 static __always_inline void arch_spin_lock(struct arch_spinlock *lock)
732 {
733         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
734 }
735
736 static __always_inline void arch_spin_lock_flags(struct arch_spinlock *lock,
737                                                   unsigned long flags)
738 {
739         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
740 }
741
742 static __always_inline int arch_spin_trylock(struct arch_spinlock *lock)
743 {
744         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
745 }
746
747 static __always_inline void arch_spin_unlock(struct arch_spinlock *lock)
748 {
749         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
750 }
751
752 #endif
753
754 #ifdef CONFIG_X86_32
755 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
756 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
757
758 /* save and restore all caller-save registers, except return value */
759 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
760 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
761
762 #define PV_FLAGS_ARG "0"
763 #define PV_EXTRA_CLOBBERS
764 #define PV_VEXTRA_CLOBBERS
765 #else
766 /* save and restore all caller-save registers, except return value */
767 #define PV_SAVE_ALL_CALLER_REGS                                         \
768         "push %rcx;"                                                    \
769         "push %rdx;"                                                    \
770         "push %rsi;"                                                    \
771         "push %rdi;"                                                    \
772         "push %r8;"                                                     \
773         "push %r9;"                                                     \
774         "push %r10;"                                                    \
775         "push %r11;"
776 #define PV_RESTORE_ALL_CALLER_REGS                                      \
777         "pop %r11;"                                                     \
778         "pop %r10;"                                                     \
779         "pop %r9;"                                                      \
780         "pop %r8;"                                                      \
781         "pop %rdi;"                                                     \
782         "pop %rsi;"                                                     \
783         "pop %rdx;"                                                     \
784         "pop %rcx;"
785
786 /* We save some registers, but all of them, that's too much. We clobber all
787  * caller saved registers but the argument parameter */
788 #define PV_SAVE_REGS "pushq %%rdi;"
789 #define PV_RESTORE_REGS "popq %%rdi;"
790 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
791 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
792 #define PV_FLAGS_ARG "D"
793 #endif
794
795 /*
796  * Generate a thunk around a function which saves all caller-save
797  * registers except for the return value.  This allows C functions to
798  * be called from assembler code where fewer than normal registers are
799  * available.  It may also help code generation around calls from C
800  * code if the common case doesn't use many registers.
801  *
802  * When a callee is wrapped in a thunk, the caller can assume that all
803  * arg regs and all scratch registers are preserved across the
804  * call. The return value in rax/eax will not be saved, even for void
805  * functions.
806  */
807 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
808         extern typeof(func) __raw_callee_save_##func;                   \
809         static void *__##func##__ __used = func;                        \
810                                                                         \
811         asm(".pushsection .text;"                                       \
812             "__raw_callee_save_" #func ": "                             \
813             PV_SAVE_ALL_CALLER_REGS                                     \
814             "call " #func ";"                                           \
815             PV_RESTORE_ALL_CALLER_REGS                                  \
816             "ret;"                                                      \
817             ".popsection")
818
819 /* Get a reference to a callee-save function */
820 #define PV_CALLEE_SAVE(func)                                            \
821         ((struct paravirt_callee_save) { __raw_callee_save_##func })
822
823 /* Promise that "func" already uses the right calling convention */
824 #define __PV_IS_CALLEE_SAVE(func)                       \
825         ((struct paravirt_callee_save) { func })
826
827 static inline unsigned long __raw_local_save_flags(void)
828 {
829         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
830 }
831
832 static inline void raw_local_irq_restore(unsigned long f)
833 {
834         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
835 }
836
837 static inline void raw_local_irq_disable(void)
838 {
839         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
840 }
841
842 static inline void raw_local_irq_enable(void)
843 {
844         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
845 }
846
847 static inline unsigned long __raw_local_irq_save(void)
848 {
849         unsigned long f;
850
851         f = __raw_local_save_flags();
852         raw_local_irq_disable();
853         return f;
854 }
855
856
857 /* Make sure as little as possible of this mess escapes. */
858 #undef PARAVIRT_CALL
859 #undef __PVOP_CALL
860 #undef __PVOP_VCALL
861 #undef PVOP_VCALL0
862 #undef PVOP_CALL0
863 #undef PVOP_VCALL1
864 #undef PVOP_CALL1
865 #undef PVOP_VCALL2
866 #undef PVOP_CALL2
867 #undef PVOP_VCALL3
868 #undef PVOP_CALL3
869 #undef PVOP_VCALL4
870 #undef PVOP_CALL4
871
872 extern void default_banner(void);
873
874 #else  /* __ASSEMBLY__ */
875
876 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
877 771:;                                           \
878         ops;                                    \
879 772:;                                           \
880         .pushsection .parainstructions,"a";     \
881          .align algn;                           \
882          word 771b;                             \
883          .byte ptype;                           \
884          .byte 772b-771b;                       \
885          .short clobbers;                       \
886         .popsection
887
888
889 #define COND_PUSH(set, mask, reg)                       \
890         .if ((~(set)) & mask); push %reg; .endif
891 #define COND_POP(set, mask, reg)                        \
892         .if ((~(set)) & mask); pop %reg; .endif
893
894 #ifdef CONFIG_X86_64
895
896 #define PV_SAVE_REGS(set)                       \
897         COND_PUSH(set, CLBR_RAX, rax);          \
898         COND_PUSH(set, CLBR_RCX, rcx);          \
899         COND_PUSH(set, CLBR_RDX, rdx);          \
900         COND_PUSH(set, CLBR_RSI, rsi);          \
901         COND_PUSH(set, CLBR_RDI, rdi);          \
902         COND_PUSH(set, CLBR_R8, r8);            \
903         COND_PUSH(set, CLBR_R9, r9);            \
904         COND_PUSH(set, CLBR_R10, r10);          \
905         COND_PUSH(set, CLBR_R11, r11)
906 #define PV_RESTORE_REGS(set)                    \
907         COND_POP(set, CLBR_R11, r11);           \
908         COND_POP(set, CLBR_R10, r10);           \
909         COND_POP(set, CLBR_R9, r9);             \
910         COND_POP(set, CLBR_R8, r8);             \
911         COND_POP(set, CLBR_RDI, rdi);           \
912         COND_POP(set, CLBR_RSI, rsi);           \
913         COND_POP(set, CLBR_RDX, rdx);           \
914         COND_POP(set, CLBR_RCX, rcx);           \
915         COND_POP(set, CLBR_RAX, rax)
916
917 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
918 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
919 #define PARA_INDIRECT(addr)     *addr(%rip)
920 #else
921 #define PV_SAVE_REGS(set)                       \
922         COND_PUSH(set, CLBR_EAX, eax);          \
923         COND_PUSH(set, CLBR_EDI, edi);          \
924         COND_PUSH(set, CLBR_ECX, ecx);          \
925         COND_PUSH(set, CLBR_EDX, edx)
926 #define PV_RESTORE_REGS(set)                    \
927         COND_POP(set, CLBR_EDX, edx);           \
928         COND_POP(set, CLBR_ECX, ecx);           \
929         COND_POP(set, CLBR_EDI, edi);           \
930         COND_POP(set, CLBR_EAX, eax)
931
932 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
933 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
934 #define PARA_INDIRECT(addr)     *%cs:addr
935 #endif
936
937 #define INTERRUPT_RETURN                                                \
938         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
939                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
940
941 #define DISABLE_INTERRUPTS(clobbers)                                    \
942         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
943                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
944                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
945                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
946
947 #define ENABLE_INTERRUPTS(clobbers)                                     \
948         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
949                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
950                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
951                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
952
953 #define USERGS_SYSRET32                                                 \
954         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
955                   CLBR_NONE,                                            \
956                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
957
958 #ifdef CONFIG_X86_32
959 #define GET_CR0_INTO_EAX                                \
960         push %ecx; push %edx;                           \
961         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
962         pop %edx; pop %ecx
963
964 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
965         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
966                   CLBR_NONE,                                            \
967                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
968
969
970 #else   /* !CONFIG_X86_32 */
971
972 /*
973  * If swapgs is used while the userspace stack is still current,
974  * there's no way to call a pvop.  The PV replacement *must* be
975  * inlined, or the swapgs instruction must be trapped and emulated.
976  */
977 #define SWAPGS_UNSAFE_STACK                                             \
978         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
979                   swapgs)
980
981 /*
982  * Note: swapgs is very special, and in practise is either going to be
983  * implemented with a single "swapgs" instruction or something very
984  * special.  Either way, we don't need to save any registers for
985  * it.
986  */
987 #define SWAPGS                                                          \
988         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
989                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
990                  )
991
992 #define GET_CR2_INTO_RCX                                \
993         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
994         movq %rax, %rcx;                                \
995         xorq %rax, %rax;
996
997 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
998         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
999                   CLBR_NONE,                                            \
1000                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1001
1002 #define USERGS_SYSRET64                                                 \
1003         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1004                   CLBR_NONE,                                            \
1005                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1006
1007 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1008         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1009                   CLBR_NONE,                                            \
1010                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1011 #endif  /* CONFIG_X86_32 */
1012
1013 #endif /* __ASSEMBLY__ */
1014 #else  /* CONFIG_PARAVIRT */
1015 # define default_banner x86_init_noop
1016 #endif /* !CONFIG_PARAVIRT */
1017 #endif /* _ASM_X86_PARAVIRT_H */