arch/sparc/kernel/sun4m_smp.c

   1 /* sun4m_smp.c: Sparc SUN4M SMP support.
   2  *
   3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5
   6 #include <asm/head.h>
   7
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/threads.h>
  11 #include <linux/smp.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/init.h>
  15 #include <linux/spinlock.h>
  16 #include <linux/mm.h>
  17 #include <linux/swap.h>
  18 #include <linux/profile.h>
  19 #include <linux/delay.h>
  20
  21 #include <asm/cacheflush.h>
  22 #include <asm/tlbflush.h>
  23 #include <asm/irq_regs.h>
  24
  25 #include <asm/ptrace.h>
  26 #include <asm/atomic.h>
  27
  28 #include <asm/irq.h>
  29 #include <asm/page.h>
  30 #include <asm/pgalloc.h>
  31 #include <asm/pgtable.h>
  32 #include <asm/oplib.h>
  33 #include <asm/cpudata.h>
  34
  35 #include "irq.h"
  36
  37 #define IRQ_CROSS_CALL          15
  38
  39 extern ctxd_t *srmmu_ctx_table_phys;
  40
  41 extern volatile unsigned long cpu_callin_map[NR_CPUS];
  42 extern unsigned char boot_cpu_id;
  43
  44 extern cpumask_t smp_commenced_mask;
  45
  46 extern int __smp4m_processor_id(void);
  47
  48 /*#define SMP_DEBUG*/
  49
  50 #ifdef SMP_DEBUG
  51 #define SMP_PRINTK(x)   printk x
  52 #else
  53 #define SMP_PRINTK(x)
  54 #endif
  55
  56 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  57 {
  58         __asm__ __volatile__("swap [%1], %0\n\t" :
  59                              "=&r" (val), "=&r" (ptr) :
  60                              "0" (val), "1" (ptr));
  61         return val;
  62 }
  63
  64 static void smp_setup_percpu_timer(void);
  65 extern void cpu_probe(void);
  66
  67 void __cpuinit smp4m_callin(void)
  68 {
  69         int cpuid = hard_smp_processor_id();
  70
  71         local_flush_cache_all();
  72         local_flush_tlb_all();
  73
  74         /* Get our local ticker going. */
  75         smp_setup_percpu_timer();
  76
  77         calibrate_delay();
  78         smp_store_cpu_info(cpuid);
  79
  80         local_flush_cache_all();
  81         local_flush_tlb_all();
  82
  83         /*
  84          * Unblock the master CPU _only_ when the scheduler state
  85          * of all secondary CPUs will be up-to-date, so after
  86          * the SMP initialization the master will be just allowed
  87          * to call the scheduler code.
  88          */
  89         /* Allow master to continue. */
  90         swap(&cpu_callin_map[cpuid], 1);
  91
  92         /* XXX: What's up with all the flushes? */
  93         local_flush_cache_all();
  94         local_flush_tlb_all();
  95
  96         cpu_probe();
  97
  98         /* Fix idle thread fields. */
  99         __asm__ __volatile__("ld [%0], %%g6\n\t"
 100                              : : "r" (&current_set[cpuid])
 101                              : "memory" /* paranoid */);
 102
 103         /* Attach to the address space of init_task. */
 104         atomic_inc(&init_mm.mm_count);
 105         current->active_mm = &init_mm;
 106
 107         while (!cpu_isset(cpuid, smp_commenced_mask))
 108                 mb();
 109
 110         local_irq_enable();
 111
 112         cpu_set(cpuid, cpu_online_map);
 113 }
 114
 115 /*
 116  *      Cycle through the processors asking the PROM to start each one.
 117  */
 118
 119 extern struct linux_prom_registers smp_penguin_ctable;
 120 extern unsigned long trapbase_cpu1[];
 121 extern unsigned long trapbase_cpu2[];
 122 extern unsigned long trapbase_cpu3[];
 123
 124 void __init smp4m_boot_cpus(void)
 125 {
 126         smp_setup_percpu_timer();
 127         local_flush_cache_all();
 128 }
 129
 130 int __cpuinit smp4m_boot_one_cpu(int i)
 131 {
 132         extern unsigned long sun4m_cpu_startup;
 133         unsigned long *entry = &sun4m_cpu_startup;
 134         struct task_struct *p;
 135         int timeout;
 136         int cpu_node;
 137
 138         cpu_find_by_mid(i, &cpu_node);
 139
 140         /* Cook up an idler for this guy. */
 141         p = fork_idle(i);
 142         current_set[i] = task_thread_info(p);
 143         /* See trampoline.S for details... */
 144         entry += ((i-1) * 3);
 145
 146         /*
 147          * Initialize the contexts table
 148          * Since the call to prom_startcpu() trashes the structure,
 149          * we need to re-initialize it for each cpu
 150          */
 151         smp_penguin_ctable.which_io = 0;
 152         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 153         smp_penguin_ctable.reg_size = 0;
 154
 155         /* whirrr, whirrr, whirrrrrrrrr... */
 156         printk("Starting CPU %d at %p\n", i, entry);
 157         local_flush_cache_all();
 158         prom_startcpu(cpu_node,
 159                       &smp_penguin_ctable, 0, (char *)entry);
 160
 161         /* wheee... it's going... */
 162         for(timeout = 0; timeout < 10000; timeout++) {
 163                 if(cpu_callin_map[i])
 164                         break;
 165                 udelay(200);
 166         }
 167
 168         if (!(cpu_callin_map[i])) {
 169                 printk("Processor %d is stuck.\n", i);
 170                 return -ENODEV;
 171         }
 172
 173         local_flush_cache_all();
 174         return 0;
 175 }
 176
 177 void __init smp4m_smp_done(void)
 178 {
 179         int i, first;
 180         int *prev;
 181
 182         /* setup cpu list for irq rotation */
 183         first = 0;
 184         prev = &first;
 185         for (i = 0; i < NR_CPUS; i++) {
 186                 if (cpu_online(i)) {
 187                         *prev = i;
 188                         prev = &cpu_data(i).next;
 189                 }
 190         }
 191         *prev = first;
 192         local_flush_cache_all();
 193
 194         /* Free unneeded trap tables */
 195         if (!cpu_isset(1, cpu_present_map)) {
 196                 ClearPageReserved(virt_to_page(trapbase_cpu1));
 197                 init_page_count(virt_to_page(trapbase_cpu1));
 198                 free_page((unsigned long)trapbase_cpu1);
 199                 totalram_pages++;
 200                 num_physpages++;
 201         }
 202         if (!cpu_isset(2, cpu_present_map)) {
 203                 ClearPageReserved(virt_to_page(trapbase_cpu2));
 204                 init_page_count(virt_to_page(trapbase_cpu2));
 205                 free_page((unsigned long)trapbase_cpu2);
 206                 totalram_pages++;
 207                 num_physpages++;
 208         }
 209         if (!cpu_isset(3, cpu_present_map)) {
 210                 ClearPageReserved(virt_to_page(trapbase_cpu3));
 211                 init_page_count(virt_to_page(trapbase_cpu3));
 212                 free_page((unsigned long)trapbase_cpu3);
 213                 totalram_pages++;
 214                 num_physpages++;
 215         }
 216
 217         /* Ok, they are spinning and ready to go. */
 218 }
 219
 220 /* At each hardware IRQ, we get this called to forward IRQ reception
 221  * to the next processor.  The caller must disable the IRQ level being
 222  * serviced globally so that there are no double interrupts received.
 223  *
 224  * XXX See sparc64 irq.c.
 225  */
 226 void smp4m_irq_rotate(int cpu)
 227 {
 228         int next = cpu_data(cpu).next;
 229         if (next != cpu)
 230                 set_irq_udt(next);
 231 }
 232
 233 static struct smp_funcall {
 234         smpfunc_t func;
 235         unsigned long arg1;
 236         unsigned long arg2;
 237         unsigned long arg3;
 238         unsigned long arg4;
 239         unsigned long arg5;
 240         unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
 241         unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
 242 } ccall_info;
 243
 244 static DEFINE_SPINLOCK(cross_call_lock);
 245
 246 /* Cross calls must be serialized, at least currently. */
 247 static void smp4m_cross_call(smpfunc_t func, unsigned long arg1,
 248                              unsigned long arg2, unsigned long arg3,
 249                              unsigned long arg4, unsigned long arg5)
 250 {
 251                 register int ncpus = SUN4M_NCPUS;
 252                 unsigned long flags;
 253
 254                 spin_lock_irqsave(&cross_call_lock, flags);
 255
 256                 /* Init function glue. */
 257                 ccall_info.func = func;
 258                 ccall_info.arg1 = arg1;
 259                 ccall_info.arg2 = arg2;
 260                 ccall_info.arg3 = arg3;
 261                 ccall_info.arg4 = arg4;
 262                 ccall_info.arg5 = arg5;
 263
 264                 /* Init receive/complete mapping, plus fire the IPI's off. */
 265                 {
 266                         cpumask_t mask = cpu_online_map;
 267                         register int i;
 268
 269                         cpu_clear(smp_processor_id(), mask);
 270                         for(i = 0; i < ncpus; i++) {
 271                                 if (cpu_isset(i, mask)) {
 272                                         ccall_info.processors_in[i] = 0;
 273                                         ccall_info.processors_out[i] = 0;
 274                                         set_cpu_int(i, IRQ_CROSS_CALL);
 275                                 } else {
 276                                         ccall_info.processors_in[i] = 1;
 277                                         ccall_info.processors_out[i] = 1;
 278                                 }
 279                         }
 280                 }
 281
 282                 {
 283                         register int i;
 284
 285                         i = 0;
 286                         do {
 287                                 while(!ccall_info.processors_in[i])
 288                                         barrier();
 289                         } while(++i < ncpus);
 290
 291                         i = 0;
 292                         do {
 293                                 while(!ccall_info.processors_out[i])
 294                                         barrier();
 295                         } while(++i < ncpus);
 296                 }
 297
 298                 spin_unlock_irqrestore(&cross_call_lock, flags);
 299 }
 300
 301 /* Running cross calls. */
 302 void smp4m_cross_call_irq(void)
 303 {
 304         int i = smp_processor_id();
 305
 306         ccall_info.processors_in[i] = 1;
 307         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 308                         ccall_info.arg4, ccall_info.arg5);
 309         ccall_info.processors_out[i] = 1;
 310 }
 311
 312 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
 313 {
 314         struct pt_regs *old_regs;
 315         int cpu = smp_processor_id();
 316
 317         old_regs = set_irq_regs(regs);
 318
 319         clear_profile_irq(cpu);
 320
 321         profile_tick(CPU_PROFILING);
 322
 323         if(!--prof_counter(cpu)) {
 324                 int user = user_mode(regs);
 325
 326                 irq_enter();
 327                 update_process_times(user);
 328                 irq_exit();
 329
 330                 prof_counter(cpu) = prof_multiplier(cpu);
 331         }
 332         set_irq_regs(old_regs);
 333 }
 334
 335 extern unsigned int lvl14_resolution;
 336
 337 static void __init smp_setup_percpu_timer(void)
 338 {
 339         int cpu = smp_processor_id();
 340
 341         prof_counter(cpu) = prof_multiplier(cpu) = 1;
 342         load_profile_irq(cpu, lvl14_resolution);
 343
 344         if(cpu == boot_cpu_id)
 345                 enable_pil_irq(14);
 346 }
 347
 348 static void __init smp4m_blackbox_id(unsigned *addr)
 349 {
 350         int rd = *addr & 0x3e000000;
 351         int rs1 = rd >> 11;
 352
 353         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 354         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
 355         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
 356 }
 357
 358 static void __init smp4m_blackbox_current(unsigned *addr)
 359 {
 360         int rd = *addr & 0x3e000000;
 361         int rs1 = rd >> 11;
 362
 363         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 364         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
 365         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 0xc, reg */
 366 }
 367
 368 void __init sun4m_init_smp(void)
 369 {
 370         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
 371         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
 372         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
 373         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
 374 }