4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2009 Magnus Damm
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/platform_device.h>
12 #include <linux/init.h>
13 #include <linux/serial.h>
14 #include <linux/serial_sci.h>
15 #include <linux/sh_timer.h>
18 static struct plat_sci_port scif0_platform_data = {
19 .mapbase = 0xffe80000,
20 .flags = UPF_BOOT_AUTOCONF,
22 .irqs = { 40, 41, 43, 42 },
25 static struct platform_device scif0_device = {
29 .platform_data = &scif0_platform_data,
33 static struct sh_timer_config tmu0_platform_data = {
34 .channel_offset = 0x04,
36 .clockevent_rating = 200,
39 static struct resource tmu0_resources[] = {
43 .flags = IORESOURCE_MEM,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device tmu0_device = {
55 .platform_data = &tmu0_platform_data,
57 .resource = tmu0_resources,
58 .num_resources = ARRAY_SIZE(tmu0_resources),
61 static struct sh_timer_config tmu1_platform_data = {
62 .channel_offset = 0x10,
64 .clocksource_rating = 200,
67 static struct resource tmu1_resources[] = {
71 .flags = IORESOURCE_MEM,
75 .flags = IORESOURCE_IRQ,
79 static struct platform_device tmu1_device = {
83 .platform_data = &tmu1_platform_data,
85 .resource = tmu1_resources,
86 .num_resources = ARRAY_SIZE(tmu1_resources),
89 static struct sh_timer_config tmu2_platform_data = {
90 .channel_offset = 0x1c,
94 static struct resource tmu2_resources[] = {
98 .flags = IORESOURCE_MEM,
102 .flags = IORESOURCE_IRQ,
106 static struct platform_device tmu2_device = {
110 .platform_data = &tmu2_platform_data,
112 .resource = tmu2_resources,
113 .num_resources = ARRAY_SIZE(tmu2_resources),
116 static struct platform_device *sh4202_devices[] __initdata = {
123 static int __init sh4202_devices_setup(void)
125 return platform_add_devices(sh4202_devices,
126 ARRAY_SIZE(sh4202_devices));
128 arch_initcall(sh4202_devices_setup);
130 static struct platform_device *sh4202_early_devices[] __initdata = {
137 void __init plat_early_device_setup(void)
139 early_platform_add_devices(sh4202_early_devices,
140 ARRAY_SIZE(sh4202_early_devices));
146 /* interrupt sources */
147 IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
148 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
151 static struct intc_vect vectors[] __initdata = {
152 INTC_VECT(HUDI, 0x600),
153 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
154 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
155 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
156 INTC_VECT(RTC, 0x4c0),
157 INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
158 INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
159 INTC_VECT(WDT, 0x560),
162 static struct intc_prio_reg prio_registers[] __initdata = {
163 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
164 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
165 { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
166 { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
169 static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
170 NULL, prio_registers, NULL);
172 static struct intc_vect vectors_irlm[] __initdata = {
173 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
174 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
177 static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
178 NULL, prio_registers, NULL);
180 void __init plat_irq_setup(void)
182 register_intc_controller(&intc_desc);
185 #define INTC_ICR 0xffd00000UL
186 #define INTC_ICR_IRLM (1<<7)
188 void __init plat_irq_setup_pins(int mode)
191 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
192 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
193 register_intc_controller(&intc_desc_irlm);