arch/sh/kernel/cpu/sh2/setup-sh7619.c

   1 /*
   2  * SH7619 Setup
   3  *
   4  *  Copyright (C) 2006  Yoshinori Sato
   5  *  Copyright (C) 2009  Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/platform_device.h>
  12 #include <linux/init.h>
  13 #include <linux/serial.h>
  14 #include <linux/serial_sci.h>
  15 #include <linux/sh_timer.h>
  16 #include <linux/io.h>
  17
  18 enum {
  19         UNUSED = 0,
  20
  21         /* interrupt sources */
  22         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
  23         WDT, EDMAC, CMT0, CMT1,
  24         SCIF0, SCIF1, SCIF2,
  25         HIF_HIFI, HIF_HIFBI,
  26         DMAC0, DMAC1, DMAC2, DMAC3,
  27         SIOF,
  28 };
  29
  30 static struct intc_vect vectors[] __initdata = {
  31         INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
  32         INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
  33         INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
  34         INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
  35         INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
  36         INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
  37         INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
  38         INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
  39         INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
  40         INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
  41         INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
  42         INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
  43         INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
  44         INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
  45         INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
  46         INTC_IRQ(SIOF, 108),
  47 };
  48
  49 static struct intc_prio_reg prio_registers[] __initdata = {
  50         { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
  51         { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
  52         { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
  53         { 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
  54         { 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
  55         { 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
  56         { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
  57 };
  58
  59 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
  60                          NULL, prio_registers, NULL);
  61
  62 static struct plat_sci_port sci_platform_data[] = {
  63         {
  64                 .mapbase        = 0xf8400000,
  65                 .flags          = UPF_BOOT_AUTOCONF,
  66                 .type           = PORT_SCIF,
  67                 .irqs           = { 88, 88, 88, 88 },
  68         }, {
  69                 .mapbase        = 0xf8410000,
  70                 .flags          = UPF_BOOT_AUTOCONF,
  71                 .type           = PORT_SCIF,
  72                 .irqs           = { 92, 92, 92, 92 },
  73         }, {
  74                 .mapbase        = 0xf8420000,
  75                 .flags          = UPF_BOOT_AUTOCONF,
  76                 .type           = PORT_SCIF,
  77                 .irqs           = { 96, 96, 96, 96 },
  78         }, {
  79                 .flags = 0,
  80         }
  81 };
  82
  83 static struct platform_device sci_device = {
  84         .name           = "sh-sci",
  85         .id             = -1,
  86         .dev            = {
  87                 .platform_data  = sci_platform_data,
  88         },
  89 };
  90
  91 static struct resource eth_resources[] = {
  92         [0] = {
  93                 .start = 0xfb000000,
  94                 .end =   0xfb0001c8,
  95                 .flags = IORESOURCE_MEM,
  96         },
  97         [1] = {
  98                 .start = 85,
  99                 .end = 85,
 100                 .flags = IORESOURCE_IRQ,
 101         },
 102 };
 103
 104 static struct platform_device eth_device = {
 105         .name = "sh-eth",
 106         .id     = -1,
 107         .dev = {
 108                 .platform_data = (void *)1,
 109         },
 110         .num_resources = ARRAY_SIZE(eth_resources),
 111         .resource = eth_resources,
 112 };
 113
 114 static struct sh_timer_config cmt0_platform_data = {
 115         .name = "CMT0",
 116         .channel_offset = 0x02,
 117         .timer_bit = 0,
 118         .clk = "peripheral_clk",
 119         .clockevent_rating = 125,
 120         .clocksource_rating = 0, /* disabled due to code generation issues */
 121 };
 122
 123 static struct resource cmt0_resources[] = {
 124         [0] = {
 125                 .name   = "CMT0",
 126                 .start  = 0xf84a0072,
 127                 .end    = 0xf84a0077,
 128                 .flags  = IORESOURCE_MEM,
 129         },
 130         [1] = {
 131                 .start  = 86,
 132                 .flags  = IORESOURCE_IRQ,
 133         },
 134 };
 135
 136 static struct platform_device cmt0_device = {
 137         .name           = "sh_cmt",
 138         .id             = 0,
 139         .dev = {
 140                 .platform_data  = &cmt0_platform_data,
 141         },
 142         .resource       = cmt0_resources,
 143         .num_resources  = ARRAY_SIZE(cmt0_resources),
 144 };
 145
 146 static struct sh_timer_config cmt1_platform_data = {
 147         .name = "CMT1",
 148         .channel_offset = 0x08,
 149         .timer_bit = 1,
 150         .clk = "peripheral_clk",
 151         .clockevent_rating = 125,
 152         .clocksource_rating = 0, /* disabled due to code generation issues */
 153 };
 154
 155 static struct resource cmt1_resources[] = {
 156         [0] = {
 157                 .name   = "CMT1",
 158                 .start  = 0xf84a0078,
 159                 .end    = 0xf84a007d,
 160                 .flags  = IORESOURCE_MEM,
 161         },
 162         [1] = {
 163                 .start  = 87,
 164                 .flags  = IORESOURCE_IRQ,
 165         },
 166 };
 167
 168 static struct platform_device cmt1_device = {
 169         .name           = "sh_cmt",
 170         .id             = 1,
 171         .dev = {
 172                 .platform_data  = &cmt1_platform_data,
 173         },
 174         .resource       = cmt1_resources,
 175         .num_resources  = ARRAY_SIZE(cmt1_resources),
 176 };
 177
 178 static struct platform_device *sh7619_devices[] __initdata = {
 179         &sci_device,
 180         &eth_device,
 181         &cmt0_device,
 182         &cmt1_device,
 183 };
 184
 185 static int __init sh7619_devices_setup(void)
 186 {
 187         return platform_add_devices(sh7619_devices,
 188                                     ARRAY_SIZE(sh7619_devices));
 189 }
 190 arch_initcall(sh7619_devices_setup);
 191
 192 void __init plat_irq_setup(void)
 193 {
 194         register_intc_controller(&intc_desc);
 195 }
 196
 197 static struct platform_device *sh7619_early_devices[] __initdata = {
 198         &cmt0_device,
 199         &cmt1_device,
 200 };
 201
 202 #define STBCR3 0xf80a0000
 203
 204 void __init plat_early_device_setup(void)
 205 {
 206         /* enable CMT clock */
 207         __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);
 208
 209         early_platform_add_devices(sh7619_early_devices,
 210                                    ARRAY_SIZE(sh7619_early_devices));
 211 }