arch/sh/kernel/cpu/irq/pint.c

   1 /*
   2  * arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs.
   3  *
   4  * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
   5  * Copyright (C) 2000  Kazumoto Kojima
   6  * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/init.h>
  15 #include <linux/irq.h>
  16 #include <linux/module.h>
  17
  18 #include <asm/system.h>
  19 #include <asm/io.h>
  20 #include <asm/machvec.h>
  21
  22 static unsigned char pint_map[256];
  23 static unsigned long portcr_mask;
  24
  25 static void enable_pint_irq(unsigned int irq);
  26 static void disable_pint_irq(unsigned int irq);
  27
  28 /* shutdown is same as "disable" */
  29 #define shutdown_pint_irq disable_pint_irq
  30
  31 static void mask_and_ack_pint(unsigned int);
  32 static void end_pint_irq(unsigned int irq);
  33
  34 static unsigned int startup_pint_irq(unsigned int irq)
  35 {
  36         enable_pint_irq(irq);
  37         return 0; /* never anything pending */
  38 }
  39
  40 static struct hw_interrupt_type pint_irq_type = {
  41         .typename = "PINT-IRQ",
  42         .startup = startup_pint_irq,
  43         .shutdown = shutdown_pint_irq,
  44         .enable = enable_pint_irq,
  45         .disable = disable_pint_irq,
  46         .ack = mask_and_ack_pint,
  47         .end = end_pint_irq
  48 };
  49
  50 static void disable_pint_irq(unsigned int irq)
  51 {
  52         unsigned long val, flags;
  53
  54         local_irq_save(flags);
  55         val = ctrl_inw(INTC_INTER);
  56         val &= ~(1 << (irq - PINT_IRQ_BASE));
  57         ctrl_outw(val, INTC_INTER);     /* disable PINTn */
  58         portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
  59         local_irq_restore(flags);
  60 }
  61
  62 static void enable_pint_irq(unsigned int irq)
  63 {
  64         unsigned long val, flags;
  65
  66         local_irq_save(flags);
  67         val = ctrl_inw(INTC_INTER);
  68         val |= 1 << (irq - PINT_IRQ_BASE);
  69         ctrl_outw(val, INTC_INTER);     /* enable PINTn */
  70         portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
  71         local_irq_restore(flags);
  72 }
  73
  74 static void mask_and_ack_pint(unsigned int irq)
  75 {
  76         disable_pint_irq(irq);
  77 }
  78
  79 static void end_pint_irq(unsigned int irq)
  80 {
  81         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  82                 enable_pint_irq(irq);
  83 }
  84
  85 void make_pint_irq(unsigned int irq)
  86 {
  87         disable_irq_nosync(irq);
  88         irq_desc[irq].handler = &pint_irq_type;
  89         disable_pint_irq(irq);
  90 }
  91
  92 void __init init_IRQ_pint(void)
  93 {
  94         int i;
  95
  96         make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
  97         make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
  98
  99         enable_irq(PINT0_IRQ);
 100         enable_irq(PINT8_IRQ);
 101
 102         for(i = 0; i < 16; i++)
 103                 make_pint_irq(PINT_IRQ_BASE + i);
 104
 105         for(i = 0; i < 256; i++) {
 106                 if (i & 1)
 107                         pint_map[i] = 0;
 108                 else if (i & 2)
 109                         pint_map[i] = 1;
 110                 else if (i & 4)
 111                         pint_map[i] = 2;
 112                 else if (i & 8)
 113                         pint_map[i] = 3;
 114                 else if (i & 0x10)
 115                         pint_map[i] = 4;
 116                 else if (i & 0x20)
 117                         pint_map[i] = 5;
 118                 else if (i & 0x40)
 119                         pint_map[i] = 6;
 120                 else if (i & 0x80)
 121                         pint_map[i] = 7;
 122         }
 123 }
 124
 125 int ipr_irq_demux(int irq)
 126 {
 127         unsigned long creg, dreg, d, sav;
 128
 129         if (irq == PINT0_IRQ) {
 130 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
 131                 creg = PORT_PACR;
 132                 dreg = PORT_PADR;
 133 #else
 134                 creg = PORT_PCCR;
 135                 dreg = PORT_PCDR;
 136 #endif
 137                 sav = ctrl_inw(creg);
 138                 ctrl_outw(sav | portcr_mask, creg);
 139                 d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) &
 140                         ctrl_inw(INTC_INTER) & 0xff;
 141                 ctrl_outw(sav, creg);
 142
 143                 if (d == 0)
 144                         return irq;
 145
 146                 return PINT_IRQ_BASE + pint_map[d];
 147         } else if (irq == PINT8_IRQ) {
 148 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
 149                 creg = PORT_PBCR;
 150                 dreg = PORT_PBDR;
 151 #else
 152                 creg = PORT_PFCR;
 153                 dreg = PORT_PFDR;
 154 #endif
 155                 sav = ctrl_inw(creg);
 156                 ctrl_outw(sav | (portcr_mask >> 16), creg);
 157                 d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) &
 158                         (ctrl_inw(INTC_INTER) >> 8) & 0xff;
 159                 ctrl_outw(sav, creg);
 160
 161                 if (d == 0)
 162                         return irq;
 163
 164                 return PINT_IRQ_BASE + 8 + pint_map[d];
 165         }
 166
 167         return irq;
 168 }
 169