Merge branch 'core-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[pandora-kernel.git] / arch / s390 / kernel / head31.S
1 /*
2  * arch/s390/kernel/head31.S
3  *
4  * Copyright (C) IBM Corp. 2005,2006
5  *
6  *   Author(s): Hartmut Penner <hp@de.ibm.com>
7  *              Martin Schwidefsky <schwidefsky@de.ibm.com>
8  *              Rob van der Heij <rvdhei@iae.nl>
9  *              Heiko Carstens <heiko.carstens@de.ibm.com>
10  *
11  */
12
13         .org    0x11000
14
15 startup_continue:
16         basr    %r13,0                  # get base
17 .LPG1:
18
19         mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
20         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
21         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
22                                         # move IPL device to lowcore
23 #
24 # Setup stack
25 #
26         l       %r15,.Linittu-.LPG1(%r13)
27         st      %r15,__LC_THREAD_INFO   # cache thread info in lowcore
28         mvc     __LC_CURRENT(4),__TI_task(%r15)
29         ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
30         st      %r15,__LC_KERNEL_STACK  # set end of kernel stack
31         ahi     %r15,-96
32 #
33 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
34 # and create a kernel NSS if the SAVESYS= parm is defined
35 #
36         l       %r14,.Lstartup_init-.LPG1(%r13)
37         basr    %r14,%r14
38         lpsw  .Lentry-.LPG1(13)         # jump to _stext in primary-space,
39                                         # virtual and never return ...
40         .align  8
41 .Lentry:.long   0x00080000,0x80000000 + _stext
42 .Lctl:  .long   0x04b50002              # cr0: various things
43         .long   0                       # cr1: primary space segment table
44         .long   .Lduct                  # cr2: dispatchable unit control table
45         .long   0                       # cr3: instruction authorization
46         .long   0                       # cr4: instruction authorization
47         .long   .Lduct                  # cr5: primary-aste origin
48         .long   0                       # cr6:  I/O interrupts
49         .long   0                       # cr7:  secondary space segment table
50         .long   0                       # cr8:  access registers translation
51         .long   0                       # cr9:  tracing off
52         .long   0                       # cr10: tracing off
53         .long   0                       # cr11: tracing off
54         .long   0                       # cr12: tracing off
55         .long   0                       # cr13: home space segment table
56         .long   0xc0000000              # cr14: machine check handling off
57         .long   0                       # cr15: linkage stack operations
58 .Lmchunk:.long  memory_chunk
59 .Lbss_bgn:  .long __bss_start
60 .Lbss_end:  .long _end
61 .Lparmaddr: .long PARMAREA
62 .Linittu:   .long init_thread_union
63 .Lstartup_init:
64             .long startup_init
65         .align  64
66 .Lduct: .long   0,0,0,0,.Lduald,0,0,0
67         .long   0,0,0,0,0,0,0,0
68         .align  128
69 .Lduald:.rept   8
70         .long   0x80000000,0,0,0        # invalid access-list entries
71         .endr
72
73         .org    0x12000
74         .globl  _ehead
75 _ehead:
76 #ifdef CONFIG_SHARED_KERNEL
77         .org    0x100000
78 #endif
79
80 #
81 # startup-code, running in absolute addressing mode
82 #
83         .globl  _stext
84 _stext: basr    %r13,0                  # get base
85 .LPG3:
86 # check control registers
87         stctl   %c0,%c15,0(%r15)
88         oi      2(%r15),0x40            # enable sigp emergency signal
89         oi      0(%r15),0x10            # switch on low address protection
90         lctl    %c0,%c15,0(%r15)
91
92 #
93         lam     0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
94         l       %r14,.Lstart-.LPG3(%r13)
95         basr    %r14,%r14               # call start_kernel
96 #
97 # We returned from start_kernel ?!? PANIK
98 #
99         basr    %r13,0
100         lpsw    .Ldw-.(%r13)            # load disabled wait psw
101 #
102         .align  8
103 .Ldw:   .long   0x000a0000,0x00000000
104 .Lstart:.long   start_kernel
105 .Laregs:.long   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0