arch/ppc/platforms/prpmc800.c

   1 /*
   2  * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
   3  *
   4  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   5  * the terms of the GNU General Public License version 2.  This program
   6  * is licensed "as is" without any warranty of any kind, whether express
   7  * or implied.
   8  */
   9
  10 #include <linux/stddef.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/errno.h>
  14 #include <linux/reboot.h>
  15 #include <linux/pci.h>
  16 #include <linux/kdev_t.h>
  17 #include <linux/types.h>
  18 #include <linux/major.h>
  19 #include <linux/initrd.h>
  20 #include <linux/console.h>
  21 #include <linux/delay.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/ide.h>
  24 #include <linux/root_dev.h>
  25 #include <linux/harrier_defs.h>
  26
  27 #include <asm/byteorder.h>
  28 #include <asm/system.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/page.h>
  31 #include <asm/dma.h>
  32 #include <asm/io.h>
  33 #include <asm/irq.h>
  34 #include <asm/machdep.h>
  35 #include <asm/time.h>
  36 #include <asm/pci-bridge.h>
  37 #include <asm/open_pic.h>
  38 #include <asm/bootinfo.h>
  39 #include <asm/harrier.h>
  40
  41 #include "prpmc800.h"
  42
  43 #define HARRIER_REVI_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
  44 #define HARRIER_UCTL_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
  45 #define HARRIER_MISC_CSR_REG   (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
  46 #define HARRIER_IFEVP_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
  47 #define HARRIER_IFEDE_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
  48 #define HARRIER_FEEN_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
  49 #define HARRIER_FEMA_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
  50
  51 #define HARRIER_VENI_REG        (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
  52 #define HARRIER_MISC_CSR        (PRPMC800_HARRIER_XCSR_BASE + \
  53                                  HARRIER_MISC_CSR_OFF)
  54
  55 #define MONARCH (monarch != 0)
  56 #define NON_MONARCH (monarch == 0)
  57
  58 extern int mpic_init(void);
  59 extern unsigned long loops_per_jiffy;
  60 extern void gen550_progress(char *, unsigned short);
  61
  62 static int monarch = 0;
  63 static int found_self = 0;
  64 static int self = 0;
  65
  66 static u_char prpmc800_openpic_initsenses[] __initdata =
  67 {
  68    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT0 */
  69    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  70    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_DEBUGINT */
  71    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_WDT */
  72    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  73    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  74    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT1 */
  75    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT2 */
  76    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT3 */
  77    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTA */
  78    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTB */
  79    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTC */
  80    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTD */
  81    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  82    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  83    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  84    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
  85 };
  86
  87 /*
  88  * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
  89  * Combined irq tables.  Only Base has IDSEL 14, only Carrier has 21 and 22.
  90  */
  91 static inline int
  92 prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  93 {
  94         static char pci_irq_table[][4] =
  95         /*
  96          *      PCI IDSEL/INTPIN->INTLINE
  97          *      A       B       C       D
  98          */
  99         {
 100                 {12,    0,      0,      0},  /* IDSEL 14 - Ethernet, base */
 101                 {0,     0,      0,      0},  /* IDSEL 15 - unused */
 102                 {10,    11,     12,     9},  /* IDSEL 16 - PMC A1, PMC1 */
 103                 {10,    11,     12,     9},  /* IDSEL 17 - PrPMC-A-B, PMC2-B */
 104                 {11,    12,     9,      10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
 105                 {0,     0,      0,      0},  /* IDSEL 19 - unused */
 106                 {9,     10,     11,     12}, /* IDSEL 20 - P2P Bridge */
 107                 {11,    12,     9,      10}, /* IDSEL 21 - PMC A2, carrier */
 108                 {12,    9,      10,     11}, /* IDSEL 22 - PMC A2-B, carrier */
 109         };
 110         const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
 111         return PCI_IRQ_TABLE_LOOKUP;
 112 };
 113
 114 static int
 115 prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
 116                         int offset, u32 * val)
 117 {
 118         /* paranoia */
 119         if ((hose == NULL) ||
 120             (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
 121                 return PCIBIOS_DEVICE_NOT_FOUND;
 122
 123         out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
 124                  | ((bus - hose->bus_offset) << 8) | 0x80);
 125         *val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
 126
 127         return PCIBIOS_SUCCESSFUL;
 128 }
 129
 130 #define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \
 131                                  (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
 132 static int prpmc_self(u8 bus, u8 devfn)
 133 {
 134         /*
 135          * Harriers always view themselves as being on bus 0. If we're not
 136          * looking at bus 0, we're not going to find ourselves.
 137          */
 138         if (bus != 0)
 139                 return PCIBIOS_DEVICE_NOT_FOUND;
 140         else {
 141                 int result;
 142                 int val;
 143                 struct pci_controller *hose;
 144
 145                 hose = pci_bus_to_hose(bus);
 146
 147                 /* See if target device is a Harrier */
 148                 result = prpmc_read_config_dword(hose, bus, devfn,
 149                                                  PCI_VENDOR_ID, &val);
 150                 if ((result != PCIBIOS_SUCCESSFUL) ||
 151                     (val != HARRIER_PCI_VEND_DEV_ID))
 152                         return PCIBIOS_DEVICE_NOT_FOUND;
 153
 154                 /*
 155                  * LBA bit is set if target Harrier == initiating Harrier
 156                  * (i.e. if we are reading our own PCI header).
 157                  */
 158                 result = prpmc_read_config_dword(hose, bus, devfn,
 159                                                  HARRIER_LBA_OFF, &val);
 160                 if ((result != PCIBIOS_SUCCESSFUL) ||
 161                     ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
 162                         return PCIBIOS_DEVICE_NOT_FOUND;
 163
 164                 /* It's us, save our location for later */
 165                 self = devfn;
 166                 found_self = 1;
 167                 return PCIBIOS_SUCCESSFUL;
 168         }
 169 }
 170
 171 static int prpmc_exclude_device(u8 bus, u8 devfn)
 172 {
 173         /*
 174          * Monarch is allowed to access all PCI devices. Non-monarch is
 175          * only allowed to access its own Harrier.
 176          */
 177
 178         if (MONARCH)
 179                 return PCIBIOS_SUCCESSFUL;
 180         if (found_self)
 181                 if ((bus == 0) && (devfn == self))
 182                         return PCIBIOS_SUCCESSFUL;
 183                 else
 184                         return PCIBIOS_DEVICE_NOT_FOUND;
 185         else
 186                 return prpmc_self(bus, devfn);
 187 }
 188
 189 void __init prpmc800_find_bridges(void)
 190 {
 191         struct pci_controller *hose;
 192         int host_bridge;
 193
 194         hose = pcibios_alloc_controller();
 195         if (!hose)
 196                 return;
 197
 198         hose->first_busno = 0;
 199         hose->last_busno = 0xff;
 200
 201         ppc_md.pci_exclude_device = prpmc_exclude_device;
 202         ppc_md.pcibios_fixup = NULL;
 203         ppc_md.pcibios_fixup_bus = NULL;
 204         ppc_md.pci_swizzle = common_swizzle;
 205         ppc_md.pci_map_irq = prpmc_map_irq;
 206
 207         setup_indirect_pci(hose,
 208                            PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
 209
 210         /* Get host bridge vendor/dev id */
 211
 212         host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
 213
 214         if (host_bridge != HARRIER_VEND_DEV_ID) {
 215                 printk(KERN_CRIT "Host bridge 0x%x not supported\n",
 216                                 host_bridge);
 217                 return;
 218         }
 219
 220         monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
 221
 222         printk(KERN_INFO "Running as %s.\n",
 223                         MONARCH ? "Monarch" : "Non-Monarch");
 224
 225         hose->io_space.start = PRPMC800_PCI_IO_START;
 226         hose->io_space.end = PRPMC800_PCI_IO_END;
 227         hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
 228         hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
 229
 230         pci_init_resource(&hose->io_resource,
 231                           PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
 232                           IORESOURCE_IO, "PCI host bridge");
 233
 234         if (MONARCH) {
 235                 hose->mem_space.start = PRPMC800_PCI_MEM_START;
 236                 hose->mem_space.end = PRPMC800_PCI_MEM_END;
 237
 238                 pci_init_resource(&hose->mem_resources[0],
 239                                   PRPMC800_PCI_MEM_START,
 240                                   PRPMC800_PCI_MEM_END,
 241                                   IORESOURCE_MEM, "PCI host bridge");
 242
 243                 if (harrier_init(hose,
 244                                  PRPMC800_HARRIER_XCSR_BASE,
 245                                  PRPMC800_PROC_PCI_MEM_START,
 246                                  PRPMC800_PROC_PCI_MEM_END,
 247                                  PRPMC800_PROC_PCI_IO_START,
 248                                  PRPMC800_PROC_PCI_IO_END,
 249                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 250                         printk(KERN_CRIT "Could not initialize HARRIER "
 251                                          "bridge\n");
 252
 253                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 254                 harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
 255                 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 256
 257         } else {
 258                 pci_init_resource(&hose->mem_resources[0],
 259                                   PRPMC800_NM_PCI_MEM_START,
 260                                   PRPMC800_NM_PCI_MEM_END,
 261                                   IORESOURCE_MEM, "PCI host bridge");
 262
 263                 hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
 264                 hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
 265
 266                 if (harrier_init(hose,
 267                                  PRPMC800_HARRIER_XCSR_BASE,
 268                                  PRPMC800_NM_PROC_PCI_MEM_START,
 269                                  PRPMC800_NM_PROC_PCI_MEM_END,
 270                                  PRPMC800_PROC_PCI_IO_START,
 271                                  PRPMC800_PROC_PCI_IO_END,
 272                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 273                         printk(KERN_CRIT "Could not initialize HARRIER "
 274                                          "bridge\n");
 275
 276                 harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
 277                                          HARRIER_ITSZ_1MB);
 278                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 279         }
 280 }
 281
 282 static int prpmc800_show_cpuinfo(struct seq_file *m)
 283 {
 284         seq_printf(m, "machine\t\t: PrPMC800\n");
 285
 286         return 0;
 287 }
 288
 289 static void __init prpmc800_setup_arch(void)
 290 {
 291         /* init to some ~sane value until calibrate_delay() runs */
 292         loops_per_jiffy = 50000000 / HZ;
 293
 294         /* Lookup PCI host bridges */
 295         prpmc800_find_bridges();
 296
 297 #ifdef CONFIG_BLK_DEV_INITRD
 298         if (initrd_start)
 299                 ROOT_DEV = Root_RAM0;
 300         else
 301 #endif
 302 #ifdef CONFIG_ROOT_NFS
 303                 ROOT_DEV = Root_NFS;
 304 #else
 305                 ROOT_DEV = Root_SDA2;
 306 #endif
 307
 308         printk(KERN_INFO "Port by MontaVista Software, Inc. "
 309                          "(source@mvista.com)\n");
 310 }
 311
 312 /*
 313  * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
 314  */
 315 static void __init prpmc800_calibrate_decr(void)
 316 {
 317         unsigned long tbl_start, tbl_end;
 318         unsigned long current_state, old_state, tb_ticks_per_second;
 319         unsigned int count;
 320         unsigned int harrier_revision;
 321
 322         harrier_revision = readb(HARRIER_REVI_REG);
 323         if (harrier_revision < 2) {
 324                 /* XTAL64 was broken in harrier revision 1 */
 325                 printk(KERN_INFO "time_init: Harrier revision %d, assuming "
 326                                  "100 Mhz bus\n", harrier_revision);
 327                 tb_ticks_per_second = 100000000 / 4;
 328                 tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 329                 tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 330                 return;
 331         }
 332
 333         /*
 334          * The XTAL64 bit oscillates at the 1/64 the base baud clock
 335          * Set count to XTAL64 cycles per second.  Since we'll count
 336          * half-cycles, we'll reach the count in half a second.
 337          */
 338         count = PRPMC800_BASE_BAUD / 64;
 339
 340         /* Find the first edge of the baud clock */
 341         old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 342         do {
 343                 current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 344         } while (old_state == current_state);
 345
 346         old_state = current_state;
 347
 348         /* Get the starting time base value */
 349         tbl_start = get_tbl();
 350
 351         /*
 352          * Loop until we have found a number of edges (half-cycles)
 353          * equal to the count (half a second)
 354          */
 355         do {
 356                 do {
 357                         current_state = readb(HARRIER_UCTL_REG) &
 358                             HARRIER_XTAL64_MASK;
 359                 } while (old_state == current_state);
 360                 old_state = current_state;
 361         } while (--count);
 362
 363         /* Get the ending time base value */
 364         tbl_end = get_tbl();
 365
 366         /* We only counted for half a second, so double to get ticks/second */
 367         tb_ticks_per_second = (tbl_end - tbl_start) * 2;
 368         tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 369         tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 370 }
 371
 372 static void prpmc800_restart(char *cmd)
 373 {
 374         ulong temp;
 375
 376         local_irq_disable();
 377         temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
 378         temp |= HARRIER_RSTOUT;
 379         out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
 380         while (1) ;
 381 }
 382
 383 static void prpmc800_halt(void)
 384 {
 385         local_irq_disable();
 386         while (1) ;
 387 }
 388
 389 static void prpmc800_power_off(void)
 390 {
 391         prpmc800_halt();
 392 }
 393
 394 static void __init prpmc800_init_IRQ(void)
 395 {
 396         OpenPIC_InitSenses = prpmc800_openpic_initsenses;
 397         OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
 398
 399         /* Setup external interrupt sources. */
 400         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
 401         /* Setup internal UART interrupt source. */
 402         openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
 403
 404         /* Do the MPIC initialization based on the above settings. */
 405         openpic_init(0);
 406
 407         /* enable functional exceptions for uarts and abort */
 408         out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
 409         out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
 410 }
 411
 412 /*
 413  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
 414  */
 415 static __inline__ void prpmc800_set_bat(void)
 416 {
 417         mb();
 418         mtspr(SPRN_DBAT1U, 0xf0001ffe);
 419         mtspr(SPRN_DBAT1L, 0xf000002a);
 420         mb();
 421 }
 422
 423 /*
 424  * We need to read the Harrier memory controller
 425  * to properly determine this value
 426  */
 427 static unsigned long __init prpmc800_find_end_of_memory(void)
 428 {
 429         /* Read the memory size from the Harrier XCSR */
 430         return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
 431 }
 432
 433 static void __init prpmc800_map_io(void)
 434 {
 435         io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
 436         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 437 }
 438
 439 void __init
 440 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 441               unsigned long r6, unsigned long r7)
 442 {
 443         parse_bootinfo(find_bootinfo());
 444
 445         prpmc800_set_bat();
 446
 447         isa_io_base = PRPMC800_ISA_IO_BASE;
 448         isa_mem_base = PRPMC800_ISA_MEM_BASE;
 449         pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
 450
 451         ppc_md.setup_arch = prpmc800_setup_arch;
 452         ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
 453         ppc_md.init_IRQ = prpmc800_init_IRQ;
 454         ppc_md.get_irq = openpic_get_irq;
 455
 456         ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
 457         ppc_md.setup_io_mappings = prpmc800_map_io;
 458
 459         ppc_md.restart = prpmc800_restart;
 460         ppc_md.power_off = prpmc800_power_off;
 461         ppc_md.halt = prpmc800_halt;
 462
 463         /* PrPMC800 has no timekeeper part */
 464         ppc_md.time_init = NULL;
 465         ppc_md.get_rtc_time = NULL;
 466         ppc_md.set_rtc_time = NULL;
 467         ppc_md.calibrate_decr = prpmc800_calibrate_decr;
 468 #ifdef  CONFIG_SERIAL_TEXT_DEBUG
 469         ppc_md.progress = gen550_progress;
 470 #else                           /* !CONFIG_SERIAL_TEXT_DEBUG */
 471         ppc_md.progress = NULL;
 472 #endif                          /* CONFIG_SERIAL_TEXT_DEBUG */
 473 }