arch/powerpc/sysdev/qe_lib/ucc_fast.c

   1 /*
   2  * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Authors:     Shlomi Gridish <gridish@freescale.com>
   5  *              Li Yang <leoli@freescale.com>
   6  *
   7  * Description:
   8  * QE UCC Fast API Set - UCC Fast specific routines implementations.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/slab.h>
  19 #include <linux/stddef.h>
  20 #include <linux/interrupt.h>
  21
  22 #include <asm/io.h>
  23 #include <asm/immap_qe.h>
  24 #include <asm/qe.h>
  25
  26 #include <asm/ucc.h>
  27 #include <asm/ucc_fast.h>
  28
  29 void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
  30 {
  31         printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
  32         printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
  33
  34         printk(KERN_INFO "gumr  : addr - 0x%08x, val - 0x%08x",
  35                   (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
  36         printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
  37                   (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
  38         printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
  39                   (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
  40         printk(KERN_INFO "udsr  : addr - 0x%08x, val - 0x%04x",
  41                   (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
  42         printk(KERN_INFO "ucce  : addr - 0x%08x, val - 0x%08x",
  43                   (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
  44         printk(KERN_INFO "uccm  : addr - 0x%08x, val - 0x%08x",
  45                   (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
  46         printk(KERN_INFO "uccs  : addr - 0x%08x, val - 0x%02x",
  47                   (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
  48         printk(KERN_INFO "urfb  : addr - 0x%08x, val - 0x%08x",
  49                   (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
  50         printk(KERN_INFO "urfs  : addr - 0x%08x, val - 0x%04x",
  51                   (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
  52         printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
  53                   (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
  54         printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
  55                   (u32) & uccf->uf_regs->urfset,
  56                   in_be16(&uccf->uf_regs->urfset));
  57         printk(KERN_INFO "utfb  : addr - 0x%08x, val - 0x%08x",
  58                   (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
  59         printk(KERN_INFO "utfs  : addr - 0x%08x, val - 0x%04x",
  60                   (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
  61         printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
  62                   (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
  63         printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
  64                   (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
  65         printk(KERN_INFO "utpt  : addr - 0x%08x, val - 0x%04x",
  66                   (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
  67         printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
  68                   (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
  69         printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
  70                   (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
  71 }
  72
  73 u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
  74 {
  75         switch (uccf_num) {
  76         case 0: return QE_CR_SUBBLOCK_UCCFAST1;
  77         case 1: return QE_CR_SUBBLOCK_UCCFAST2;
  78         case 2: return QE_CR_SUBBLOCK_UCCFAST3;
  79         case 3: return QE_CR_SUBBLOCK_UCCFAST4;
  80         case 4: return QE_CR_SUBBLOCK_UCCFAST5;
  81         case 5: return QE_CR_SUBBLOCK_UCCFAST6;
  82         case 6: return QE_CR_SUBBLOCK_UCCFAST7;
  83         case 7: return QE_CR_SUBBLOCK_UCCFAST8;
  84         default: return QE_CR_SUBBLOCK_INVALID;
  85         }
  86 }
  87
  88 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
  89 {
  90         out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
  91 }
  92
  93 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode)
  94 {
  95         struct ucc_fast *uf_regs;
  96         u32 gumr;
  97
  98         uf_regs = uccf->uf_regs;
  99
 100         /* Enable reception and/or transmission on this UCC. */
 101         gumr = in_be32(&uf_regs->gumr);
 102         if (mode & COMM_DIR_TX) {
 103                 gumr |= UCC_FAST_GUMR_ENT;
 104                 uccf->enabled_tx = 1;
 105         }
 106         if (mode & COMM_DIR_RX) {
 107                 gumr |= UCC_FAST_GUMR_ENR;
 108                 uccf->enabled_rx = 1;
 109         }
 110         out_be32(&uf_regs->gumr, gumr);
 111 }
 112
 113 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode)
 114 {
 115         struct ucc_fast *uf_regs;
 116         u32 gumr;
 117
 118         uf_regs = uccf->uf_regs;
 119
 120         /* Disable reception and/or transmission on this UCC. */
 121         gumr = in_be32(&uf_regs->gumr);
 122         if (mode & COMM_DIR_TX) {
 123                 gumr &= ~UCC_FAST_GUMR_ENT;
 124                 uccf->enabled_tx = 0;
 125         }
 126         if (mode & COMM_DIR_RX) {
 127                 gumr &= ~UCC_FAST_GUMR_ENR;
 128                 uccf->enabled_rx = 0;
 129         }
 130         out_be32(&uf_regs->gumr, gumr);
 131 }
 132
 133 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret)
 134 {
 135         struct ucc_fast_private *uccf;
 136         struct ucc_fast *uf_regs;
 137         u32 gumr;
 138         int ret;
 139
 140         if (!uf_info)
 141                 return -EINVAL;
 142
 143         /* check if the UCC port number is in range. */
 144         if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
 145                 printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
 146                 return -EINVAL;
 147         }
 148
 149         /* Check that 'max_rx_buf_length' is properly aligned (4). */
 150         if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
 151                 printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
 152                 return -EINVAL;
 153         }
 154
 155         /* Validate Virtual Fifo register values */
 156         if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
 157                 printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
 158                 return -EINVAL;
 159         }
 160
 161         if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 162                 printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
 163                 return -EINVAL;
 164         }
 165
 166         if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 167                 printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
 168                 return -EINVAL;
 169         }
 170
 171         if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 172                 printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
 173                 return -EINVAL;
 174         }
 175
 176         if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 177                 printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
 178                 return -EINVAL;
 179         }
 180
 181         if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 182                 printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
 183                 return -EINVAL;
 184         }
 185
 186         if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 187                 printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
 188                 return -EINVAL;
 189         }
 190
 191         uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
 192         if (!uccf) {
 193                 printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
 194                 return -ENOMEM;
 195         }
 196
 197         /* Fill fast UCC structure */
 198         uccf->uf_info = uf_info;
 199         /* Set the PHY base address */
 200         uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
 201         if (uccf->uf_regs == NULL) {
 202                 printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
 203                 return -ENOMEM;
 204         }
 205
 206         uccf->enabled_tx = 0;
 207         uccf->enabled_rx = 0;
 208         uccf->stopped_tx = 0;
 209         uccf->stopped_rx = 0;
 210         uf_regs = uccf->uf_regs;
 211         uccf->p_ucce = (u32 *) & (uf_regs->ucce);
 212         uccf->p_uccm = (u32 *) & (uf_regs->uccm);
 213 #ifdef STATISTICS
 214         uccf->tx_frames = 0;
 215         uccf->rx_frames = 0;
 216         uccf->rx_discarded = 0;
 217 #endif                          /* STATISTICS */
 218
 219         /* Init Guemr register */
 220         if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
 221                 printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
 222                 ucc_fast_free(uccf);
 223                 return ret;
 224         }
 225
 226         /* Set UCC to fast type */
 227         if ((ret = ucc_set_type(uf_info->ucc_num,
 228                                 (struct ucc_common *) (uf_regs),
 229                                 UCC_SPEED_TYPE_FAST))) {
 230                 printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
 231                 ucc_fast_free(uccf);
 232                 return ret;
 233         }
 234
 235         uccf->mrblr = uf_info->max_rx_buf_length;
 236
 237         /* Set GUMR */
 238         /* For more details see the hardware spec. */
 239         gumr = uf_info->ttx_trx;
 240         if (uf_info->tci)
 241                 gumr |= UCC_FAST_GUMR_TCI;
 242         if (uf_info->cdp)
 243                 gumr |= UCC_FAST_GUMR_CDP;
 244         if (uf_info->ctsp)
 245                 gumr |= UCC_FAST_GUMR_CTSP;
 246         if (uf_info->cds)
 247                 gumr |= UCC_FAST_GUMR_CDS;
 248         if (uf_info->ctss)
 249                 gumr |= UCC_FAST_GUMR_CTSS;
 250         if (uf_info->txsy)
 251                 gumr |= UCC_FAST_GUMR_TXSY;
 252         if (uf_info->rsyn)
 253                 gumr |= UCC_FAST_GUMR_RSYN;
 254         gumr |= uf_info->synl;
 255         if (uf_info->rtsm)
 256                 gumr |= UCC_FAST_GUMR_RTSM;
 257         gumr |= uf_info->renc;
 258         if (uf_info->revd)
 259                 gumr |= UCC_FAST_GUMR_REVD;
 260         gumr |= uf_info->tenc;
 261         gumr |= uf_info->tcrc;
 262         gumr |= uf_info->mode;
 263         out_be32(&uf_regs->gumr, gumr);
 264
 265         /* Allocate memory for Tx Virtual Fifo */
 266         uccf->ucc_fast_tx_virtual_fifo_base_offset =
 267             qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 268         if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
 269                 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
 270                 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
 271                 ucc_fast_free(uccf);
 272                 return -ENOMEM;
 273         }
 274
 275         /* Allocate memory for Rx Virtual Fifo */
 276         uccf->ucc_fast_rx_virtual_fifo_base_offset =
 277                 qe_muram_alloc(uf_info->urfs +
 278                            UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
 279                            UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 280         if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
 281                 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
 282                 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
 283                 ucc_fast_free(uccf);
 284                 return -ENOMEM;
 285         }
 286
 287         /* Set Virtual Fifo registers */
 288         out_be16(&uf_regs->urfs, uf_info->urfs);
 289         out_be16(&uf_regs->urfet, uf_info->urfet);
 290         out_be16(&uf_regs->urfset, uf_info->urfset);
 291         out_be16(&uf_regs->utfs, uf_info->utfs);
 292         out_be16(&uf_regs->utfet, uf_info->utfet);
 293         out_be16(&uf_regs->utftt, uf_info->utftt);
 294         /* utfb, urfb are offsets from MURAM base */
 295         out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
 296         out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);
 297
 298         /* Mux clocking */
 299         /* Grant Support */
 300         ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support);
 301         /* Breakpoint Support */
 302         ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support);
 303         /* Set Tsa or NMSI mode. */
 304         ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa);
 305         /* If NMSI (not Tsa), set Tx and Rx clock. */
 306         if (!uf_info->tsa) {
 307                 /* Rx clock routing */
 308                 if ((uf_info->rx_clock != QE_CLK_NONE) &&
 309                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
 310                                         COMM_DIR_RX)) {
 311                         printk(KERN_ERR "%s: illegal value for RX clock",
 312                                __FUNCTION__);
 313                         ucc_fast_free(uccf);
 314                         return -EINVAL;
 315                 }
 316                 /* Tx clock routing */
 317                 if ((uf_info->tx_clock != QE_CLK_NONE) &&
 318                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
 319                                         COMM_DIR_TX)) {
 320                         printk(KERN_ERR "%s: illegal value for TX clock",
 321                                __FUNCTION__);
 322                         ucc_fast_free(uccf);
 323                         return -EINVAL;
 324                 }
 325         }
 326
 327         /* Set interrupt mask register at UCC level. */
 328         out_be32(&uf_regs->uccm, uf_info->uccm_mask);
 329
 330         /* First, clear anything pending at UCC level,
 331          * otherwise, old garbage may come through
 332          * as soon as the dam is opened. */
 333
 334         /* Writing '1' clears */
 335         out_be32(&uf_regs->ucce, 0xffffffff);
 336
 337         *uccf_ret = uccf;
 338         return 0;
 339 }
 340
 341 void ucc_fast_free(struct ucc_fast_private * uccf)
 342 {
 343         if (!uccf)
 344                 return;
 345
 346         if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
 347                 qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
 348
 349         if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
 350                 qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
 351
 352         kfree(uccf);
 353 }