arch/powerpc/platforms/powermac/low_i2c.c

   1 /*
   2  * arch/powerpc/platforms/powermac/low_i2c.c
   3  *
   4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  * The linux i2c layer isn't completely suitable for our needs for various
  12  * reasons ranging from too late initialisation to semantics not perfectly
  13  * matching some requirements of the apple platform functions etc...
  14  *
  15  * This file thus provides a simple low level unified i2c interface for
  16  * powermac that covers the various types of i2c busses used in Apple machines.
  17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  18  * banging busses found on older chipstes in earlier machines if we ever need
  19  * one of them.
  20  *
  21  * The drivers in this file are synchronous/blocking. In addition, the
  22  * keywest one is fairly slow due to the use of msleep instead of interrupts
  23  * as the interrupt is currently used by i2c-keywest. In the long run, we
  24  * might want to get rid of those high-level interfaces to linux i2c layer
  25  * either completely (converting all drivers) or replacing them all with a
  26  * single stub driver on top of this one. Once done, the interrupt will be
  27  * available for our use.
  28  */
  29
  30 #undef DEBUG
  31 #undef DEBUG_LOW
  32
  33 #include <linux/types.h>
  34 #include <linux/sched.h>
  35 #include <linux/init.h>
  36 #include <linux/module.h>
  37 #include <linux/adb.h>
  38 #include <linux/pmu.h>
  39 #include <linux/delay.h>
  40 #include <linux/completion.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/completion.h>
  44 #include <linux/timer.h>
  45 #include <linux/mutex.h>
  46 #include <asm/keylargo.h>
  47 #include <asm/uninorth.h>
  48 #include <asm/io.h>
  49 #include <asm/prom.h>
  50 #include <asm/machdep.h>
  51 #include <asm/smu.h>
  52 #include <asm/pmac_pfunc.h>
  53 #include <asm/pmac_low_i2c.h>
  54
  55 #ifdef DEBUG
  56 #define DBG(x...) do {\
  57                 printk(KERN_DEBUG "low_i2c:" x);        \
  58         } while(0)
  59 #else
  60 #define DBG(x...)
  61 #endif
  62
  63 #ifdef DEBUG_LOW
  64 #define DBG_LOW(x...) do {\
  65                 printk(KERN_DEBUG "low_i2c:" x);        \
  66         } while(0)
  67 #else
  68 #define DBG_LOW(x...)
  69 #endif
  70
  71
  72 static int pmac_i2c_force_poll = 1;
  73
  74 /*
  75  * A bus structure. Each bus in the system has such a structure associated.
  76  */
  77 struct pmac_i2c_bus
  78 {
  79         struct list_head        link;
  80         struct device_node      *controller;
  81         struct device_node      *busnode;
  82         int                     type;
  83         int                     flags;
  84         struct i2c_adapter      *adapter;
  85         void                    *hostdata;
  86         int                     channel;        /* some hosts have multiple */
  87         int                     mode;           /* current mode */
  88         struct mutex            mutex;
  89         int                     opened;
  90         int                     polled;         /* open mode */
  91         struct platform_device  *platform_dev;
  92
  93         /* ops */
  94         int (*open)(struct pmac_i2c_bus *bus);
  95         void (*close)(struct pmac_i2c_bus *bus);
  96         int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  97                     u32 subaddr, u8 *data, int len);
  98 };
  99
 100 static LIST_HEAD(pmac_i2c_busses);
 101
 102 /*
 103  * Keywest implementation
 104  */
 105
 106 struct pmac_i2c_host_kw
 107 {
 108         struct mutex            mutex;          /* Access mutex for use by
 109                                                  * i2c-keywest */
 110         void __iomem            *base;          /* register base address */
 111         int                     bsteps;         /* register stepping */
 112         int                     speed;          /* speed */
 113         int                     irq;
 114         u8                      *data;
 115         unsigned                len;
 116         int                     state;
 117         int                     rw;
 118         int                     polled;
 119         int                     result;
 120         struct completion       complete;
 121         spinlock_t              lock;
 122         struct timer_list       timeout_timer;
 123 };
 124
 125 /* Register indices */
 126 typedef enum {
 127         reg_mode = 0,
 128         reg_control,
 129         reg_status,
 130         reg_isr,
 131         reg_ier,
 132         reg_addr,
 133         reg_subaddr,
 134         reg_data
 135 } reg_t;
 136
 137 /* The Tumbler audio equalizer can be really slow sometimes */
 138 #define KW_POLL_TIMEOUT         (2*HZ)
 139
 140 /* Mode register */
 141 #define KW_I2C_MODE_100KHZ      0x00
 142 #define KW_I2C_MODE_50KHZ       0x01
 143 #define KW_I2C_MODE_25KHZ       0x02
 144 #define KW_I2C_MODE_DUMB        0x00
 145 #define KW_I2C_MODE_STANDARD    0x04
 146 #define KW_I2C_MODE_STANDARDSUB 0x08
 147 #define KW_I2C_MODE_COMBINED    0x0C
 148 #define KW_I2C_MODE_MODE_MASK   0x0C
 149 #define KW_I2C_MODE_CHAN_MASK   0xF0
 150
 151 /* Control register */
 152 #define KW_I2C_CTL_AAK          0x01
 153 #define KW_I2C_CTL_XADDR        0x02
 154 #define KW_I2C_CTL_STOP         0x04
 155 #define KW_I2C_CTL_START        0x08
 156
 157 /* Status register */
 158 #define KW_I2C_STAT_BUSY        0x01
 159 #define KW_I2C_STAT_LAST_AAK    0x02
 160 #define KW_I2C_STAT_LAST_RW     0x04
 161 #define KW_I2C_STAT_SDA         0x08
 162 #define KW_I2C_STAT_SCL         0x10
 163
 164 /* IER & ISR registers */
 165 #define KW_I2C_IRQ_DATA         0x01
 166 #define KW_I2C_IRQ_ADDR         0x02
 167 #define KW_I2C_IRQ_STOP         0x04
 168 #define KW_I2C_IRQ_START        0x08
 169 #define KW_I2C_IRQ_MASK         0x0F
 170
 171 /* State machine states */
 172 enum {
 173         state_idle,
 174         state_addr,
 175         state_read,
 176         state_write,
 177         state_stop,
 178         state_dead
 179 };
 180
 181 #define WRONG_STATE(name) do {\
 182                 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
 183                        "(isr: %02x)\n", \
 184                        name, __kw_state_names[host->state], isr); \
 185         } while(0)
 186
 187 static const char *__kw_state_names[] = {
 188         "state_idle",
 189         "state_addr",
 190         "state_read",
 191         "state_write",
 192         "state_stop",
 193         "state_dead"
 194 };
 195
 196 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
 197 {
 198         return readb(host->base + (((unsigned int)reg) << host->bsteps));
 199 }
 200
 201 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
 202                                   reg_t reg, u8 val)
 203 {
 204         writeb(val, host->base + (((unsigned)reg) << host->bsteps));
 205         (void)__kw_read_reg(host, reg_subaddr);
 206 }
 207
 208 #define kw_write_reg(reg, val)  __kw_write_reg(host, reg, val)
 209 #define kw_read_reg(reg)        __kw_read_reg(host, reg)
 210
 211 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
 212 {
 213         int i, j;
 214         u8 isr;
 215
 216         for (i = 0; i < 1000; i++) {
 217                 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
 218                 if (isr != 0)
 219                         return isr;
 220
 221                 /* This code is used with the timebase frozen, we cannot rely
 222                  * on udelay nor schedule when in polled mode !
 223                  * For now, just use a bogus loop....
 224                  */
 225                 if (host->polled) {
 226                         for (j = 1; j < 100000; j++)
 227                                 mb();
 228                 } else
 229                         msleep(1);
 230         }
 231         return isr;
 232 }
 233
 234 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
 235 {
 236         kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 237         host->state = state_stop;
 238         host->result = result;
 239 }
 240
 241
 242 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
 243 {
 244         u8 ack;
 245
 246         DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
 247                 __kw_state_names[host->state], isr);
 248
 249         if (host->state == state_idle) {
 250                 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
 251                        " interrupt, ignoring\n");
 252                 kw_write_reg(reg_isr, isr);
 253                 return;
 254         }
 255
 256         if (isr == 0) {
 257                 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
 258                        " on keywest !\n");
 259                 if (host->state != state_stop) {
 260                         kw_i2c_do_stop(host, -EIO);
 261                         return;
 262                 }
 263                 ack = kw_read_reg(reg_status);
 264                 if (ack & KW_I2C_STAT_BUSY)
 265                         kw_write_reg(reg_status, 0);
 266                 host->state = state_idle;
 267                 kw_write_reg(reg_ier, 0x00);
 268                 if (!host->polled)
 269                         complete(&host->complete);
 270                 return;
 271         }
 272
 273         if (isr & KW_I2C_IRQ_ADDR) {
 274                 ack = kw_read_reg(reg_status);
 275                 if (host->state != state_addr) {
 276                         WRONG_STATE("KW_I2C_IRQ_ADDR");
 277                         kw_i2c_do_stop(host, -EIO);
 278                 }
 279                 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 280                         host->result = -ENXIO;
 281                         host->state = state_stop;
 282                         DBG_LOW("KW: NAK on address\n");
 283                 } else {
 284                         if (host->len == 0)
 285                                 kw_i2c_do_stop(host, 0);
 286                         else if (host->rw) {
 287                                 host->state = state_read;
 288                                 if (host->len > 1)
 289                                         kw_write_reg(reg_control,
 290                                                      KW_I2C_CTL_AAK);
 291                         } else {
 292                                 host->state = state_write;
 293                                 kw_write_reg(reg_data, *(host->data++));
 294                                 host->len--;
 295                         }
 296                 }
 297                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 298         }
 299
 300         if (isr & KW_I2C_IRQ_DATA) {
 301                 if (host->state == state_read) {
 302                         *(host->data++) = kw_read_reg(reg_data);
 303                         host->len--;
 304                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 305                         if (host->len == 0)
 306                                 host->state = state_stop;
 307                         else if (host->len == 1)
 308                                 kw_write_reg(reg_control, 0);
 309                 } else if (host->state == state_write) {
 310                         ack = kw_read_reg(reg_status);
 311                         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 312                                 DBG_LOW("KW: nack on data write\n");
 313                                 host->result = -EFBIG;
 314                                 host->state = state_stop;
 315                         } else if (host->len) {
 316                                 kw_write_reg(reg_data, *(host->data++));
 317                                 host->len--;
 318                         } else
 319                                 kw_i2c_do_stop(host, 0);
 320                 } else {
 321                         WRONG_STATE("KW_I2C_IRQ_DATA");
 322                         if (host->state != state_stop)
 323                                 kw_i2c_do_stop(host, -EIO);
 324                 }
 325                 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 326         }
 327
 328         if (isr & KW_I2C_IRQ_STOP) {
 329                 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
 330                 if (host->state != state_stop) {
 331                         WRONG_STATE("KW_I2C_IRQ_STOP");
 332                         host->result = -EIO;
 333                 }
 334                 host->state = state_idle;
 335                 if (!host->polled)
 336                         complete(&host->complete);
 337         }
 338
 339         /* Below should only happen in manual mode which we don't use ... */
 340         if (isr & KW_I2C_IRQ_START)
 341                 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
 342
 343 }
 344
 345 /* Interrupt handler */
 346 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
 347 {
 348         struct pmac_i2c_host_kw *host = dev_id;
 349         unsigned long flags;
 350
 351         spin_lock_irqsave(&host->lock, flags);
 352         del_timer(&host->timeout_timer);
 353         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 354         if (host->state != state_idle) {
 355                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 356                 add_timer(&host->timeout_timer);
 357         }
 358         spin_unlock_irqrestore(&host->lock, flags);
 359         return IRQ_HANDLED;
 360 }
 361
 362 static void kw_i2c_timeout(unsigned long data)
 363 {
 364         struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
 365         unsigned long flags;
 366
 367         spin_lock_irqsave(&host->lock, flags);
 368         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 369         if (host->state != state_idle) {
 370                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 371                 add_timer(&host->timeout_timer);
 372         }
 373         spin_unlock_irqrestore(&host->lock, flags);
 374 }
 375
 376 static int kw_i2c_open(struct pmac_i2c_bus *bus)
 377 {
 378         struct pmac_i2c_host_kw *host = bus->hostdata;
 379         mutex_lock(&host->mutex);
 380         return 0;
 381 }
 382
 383 static void kw_i2c_close(struct pmac_i2c_bus *bus)
 384 {
 385         struct pmac_i2c_host_kw *host = bus->hostdata;
 386         mutex_unlock(&host->mutex);
 387 }
 388
 389 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 390                        u32 subaddr, u8 *data, int len)
 391 {
 392         struct pmac_i2c_host_kw *host = bus->hostdata;
 393         u8 mode_reg = host->speed;
 394         int use_irq = host->irq != NO_IRQ && !bus->polled;
 395
 396         /* Setup mode & subaddress if any */
 397         switch(bus->mode) {
 398         case pmac_i2c_mode_dumb:
 399                 return -EINVAL;
 400         case pmac_i2c_mode_std:
 401                 mode_reg |= KW_I2C_MODE_STANDARD;
 402                 if (subsize != 0)
 403                         return -EINVAL;
 404                 break;
 405         case pmac_i2c_mode_stdsub:
 406                 mode_reg |= KW_I2C_MODE_STANDARDSUB;
 407                 if (subsize != 1)
 408                         return -EINVAL;
 409                 break;
 410         case pmac_i2c_mode_combined:
 411                 mode_reg |= KW_I2C_MODE_COMBINED;
 412                 if (subsize != 1)
 413                         return -EINVAL;
 414                 break;
 415         }
 416
 417         /* Setup channel & clear pending irqs */
 418         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 419         kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
 420         kw_write_reg(reg_status, 0);
 421
 422         /* Set up address and r/w bit, strip possible stale bus number from
 423          * address top bits
 424          */
 425         kw_write_reg(reg_addr, addrdir & 0xff);
 426
 427         /* Set up the sub address */
 428         if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
 429             || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
 430                 kw_write_reg(reg_subaddr, subaddr);
 431
 432         /* Prepare for async operations */
 433         host->data = data;
 434         host->len = len;
 435         host->state = state_addr;
 436         host->result = 0;
 437         host->rw = (addrdir & 1);
 438         host->polled = bus->polled;
 439
 440         /* Enable interrupt if not using polled mode and interrupt is
 441          * available
 442          */
 443         if (use_irq) {
 444                 /* Clear completion */
 445                 INIT_COMPLETION(host->complete);
 446                 /* Ack stale interrupts */
 447                 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 448                 /* Arm timeout */
 449                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 450                 add_timer(&host->timeout_timer);
 451                 /* Enable emission */
 452                 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
 453         }
 454
 455         /* Start sending address */
 456         kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
 457
 458         /* Wait for completion */
 459         if (use_irq)
 460                 wait_for_completion(&host->complete);
 461         else {
 462                 while(host->state != state_idle) {
 463                         unsigned long flags;
 464
 465                         u8 isr = kw_i2c_wait_interrupt(host);
 466                         spin_lock_irqsave(&host->lock, flags);
 467                         kw_i2c_handle_interrupt(host, isr);
 468                         spin_unlock_irqrestore(&host->lock, flags);
 469                 }
 470         }
 471
 472         /* Disable emission */
 473         kw_write_reg(reg_ier, 0);
 474
 475         return host->result;
 476 }
 477
 478 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
 479 {
 480         struct pmac_i2c_host_kw *host;
 481         const u32               *psteps, *prate, *addrp;
 482         u32                     steps;
 483
 484         host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
 485         if (host == NULL) {
 486                 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
 487                        np->full_name);
 488                 return NULL;
 489         }
 490
 491         /* Apple is kind enough to provide a valid AAPL,address property
 492          * on all i2c keywest nodes so far ... we would have to fallback
 493          * to macio parsing if that wasn't the case
 494          */
 495         addrp = of_get_property(np, "AAPL,address", NULL);
 496         if (addrp == NULL) {
 497                 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
 498                        np->full_name);
 499                 kfree(host);
 500                 return NULL;
 501         }
 502         mutex_init(&host->mutex);
 503         init_completion(&host->complete);
 504         spin_lock_init(&host->lock);
 505         init_timer(&host->timeout_timer);
 506         host->timeout_timer.function = kw_i2c_timeout;
 507         host->timeout_timer.data = (unsigned long)host;
 508
 509         psteps = of_get_property(np, "AAPL,address-step", NULL);
 510         steps = psteps ? (*psteps) : 0x10;
 511         for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
 512                 steps >>= 1;
 513         /* Select interface rate */
 514         host->speed = KW_I2C_MODE_25KHZ;
 515         prate = of_get_property(np, "AAPL,i2c-rate", NULL);
 516         if (prate) switch(*prate) {
 517         case 100:
 518                 host->speed = KW_I2C_MODE_100KHZ;
 519                 break;
 520         case 50:
 521                 host->speed = KW_I2C_MODE_50KHZ;
 522                 break;
 523         case 25:
 524                 host->speed = KW_I2C_MODE_25KHZ;
 525                 break;
 526         }
 527         host->irq = irq_of_parse_and_map(np, 0);
 528         if (host->irq == NO_IRQ)
 529                 printk(KERN_WARNING
 530                        "low_i2c: Failed to map interrupt for %s\n",
 531                        np->full_name);
 532
 533         host->base = ioremap((*addrp), 0x1000);
 534         if (host->base == NULL) {
 535                 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
 536                        np->full_name);
 537                 kfree(host);
 538                 return NULL;
 539         }
 540
 541         /* Make sure IRQ is disabled */
 542         kw_write_reg(reg_ier, 0);
 543
 544         /* Request chip interrupt */
 545         if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
 546                 host->irq = NO_IRQ;
 547
 548         printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
 549                *addrp, host->irq, np->full_name);
 550
 551         return host;
 552 }
 553
 554
 555 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
 556                               struct device_node *controller,
 557                               struct device_node *busnode,
 558                               int channel)
 559 {
 560         struct pmac_i2c_bus *bus;
 561
 562         bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
 563         if (bus == NULL)
 564                 return;
 565
 566         bus->controller = of_node_get(controller);
 567         bus->busnode = of_node_get(busnode);
 568         bus->type = pmac_i2c_bus_keywest;
 569         bus->hostdata = host;
 570         bus->channel = channel;
 571         bus->mode = pmac_i2c_mode_std;
 572         bus->open = kw_i2c_open;
 573         bus->close = kw_i2c_close;
 574         bus->xfer = kw_i2c_xfer;
 575         mutex_init(&bus->mutex);
 576         if (controller == busnode)
 577                 bus->flags = pmac_i2c_multibus;
 578         list_add(&bus->link, &pmac_i2c_busses);
 579
 580         printk(KERN_INFO " channel %d bus %s\n", channel,
 581                (controller == busnode) ? "<multibus>" : busnode->full_name);
 582 }
 583
 584 static void __init kw_i2c_probe(void)
 585 {
 586         struct device_node *np, *child, *parent;
 587
 588         /* Probe keywest-i2c busses */
 589         for (np = NULL;
 590              (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
 591                 struct pmac_i2c_host_kw *host;
 592                 int multibus, chans, i;
 593
 594                 /* Found one, init a host structure */
 595                 host = kw_i2c_host_init(np);
 596                 if (host == NULL)
 597                         continue;
 598
 599                 /* Now check if we have a multibus setup (old style) or if we
 600                  * have proper bus nodes. Note that the "new" way (proper bus
 601                  * nodes) might cause us to not create some busses that are
 602                  * kept hidden in the device-tree. In the future, we might
 603                  * want to work around that by creating busses without a node
 604                  * but not for now
 605                  */
 606                 child = of_get_next_child(np, NULL);
 607                 multibus = !child || strcmp(child->name, "i2c-bus");
 608                 of_node_put(child);
 609
 610                 /* For a multibus setup, we get the bus count based on the
 611                  * parent type
 612                  */
 613                 if (multibus) {
 614                         parent = of_get_parent(np);
 615                         if (parent == NULL)
 616                                 continue;
 617                         chans = parent->name[0] == 'u' ? 2 : 1;
 618                         for (i = 0; i < chans; i++)
 619                                 kw_i2c_add(host, np, np, i);
 620                 } else {
 621                         for (child = NULL;
 622                              (child = of_get_next_child(np, child)) != NULL;) {
 623                                 const u32 *reg = of_get_property(child,
 624                                                 "reg", NULL);
 625                                 if (reg == NULL)
 626                                         continue;
 627                                 kw_i2c_add(host, np, child, *reg);
 628                         }
 629                 }
 630         }
 631 }
 632
 633
 634 /*
 635  *
 636  * PMU implementation
 637  *
 638  */
 639
 640 #ifdef CONFIG_ADB_PMU
 641
 642 /*
 643  * i2c command block to the PMU
 644  */
 645 struct pmu_i2c_hdr {
 646         u8      bus;
 647         u8      mode;
 648         u8      bus2;
 649         u8      address;
 650         u8      sub_addr;
 651         u8      comb_addr;
 652         u8      count;
 653         u8      data[];
 654 };
 655
 656 static void pmu_i2c_complete(struct adb_request *req)
 657 {
 658         complete(req->arg);
 659 }
 660
 661 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 662                         u32 subaddr, u8 *data, int len)
 663 {
 664         struct adb_request *req = bus->hostdata;
 665         struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
 666         struct completion comp;
 667         int read = addrdir & 1;
 668         int retry;
 669         int rc = 0;
 670
 671         /* For now, limit ourselves to 16 bytes transfers */
 672         if (len > 16)
 673                 return -EINVAL;
 674
 675         init_completion(&comp);
 676
 677         for (retry = 0; retry < 16; retry++) {
 678                 memset(req, 0, sizeof(struct adb_request));
 679                 hdr->bus = bus->channel;
 680                 hdr->count = len;
 681
 682                 switch(bus->mode) {
 683                 case pmac_i2c_mode_std:
 684                         if (subsize != 0)
 685                                 return -EINVAL;
 686                         hdr->address = addrdir;
 687                         hdr->mode = PMU_I2C_MODE_SIMPLE;
 688                         break;
 689                 case pmac_i2c_mode_stdsub:
 690                 case pmac_i2c_mode_combined:
 691                         if (subsize != 1)
 692                                 return -EINVAL;
 693                         hdr->address = addrdir & 0xfe;
 694                         hdr->comb_addr = addrdir;
 695                         hdr->sub_addr = subaddr;
 696                         if (bus->mode == pmac_i2c_mode_stdsub)
 697                                 hdr->mode = PMU_I2C_MODE_STDSUB;
 698                         else
 699                                 hdr->mode = PMU_I2C_MODE_COMBINED;
 700                         break;
 701                 default:
 702                         return -EINVAL;
 703                 }
 704
 705                 INIT_COMPLETION(comp);
 706                 req->data[0] = PMU_I2C_CMD;
 707                 req->reply[0] = 0xff;
 708                 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
 709                 req->done = pmu_i2c_complete;
 710                 req->arg = &comp;
 711                 if (!read && len) {
 712                         memcpy(hdr->data, data, len);
 713                         req->nbytes += len;
 714                 }
 715                 rc = pmu_queue_request(req);
 716                 if (rc)
 717                         return rc;
 718                 wait_for_completion(&comp);
 719                 if (req->reply[0] == PMU_I2C_STATUS_OK)
 720                         break;
 721                 msleep(15);
 722         }
 723         if (req->reply[0] != PMU_I2C_STATUS_OK)
 724                 return -EIO;
 725
 726         for (retry = 0; retry < 16; retry++) {
 727                 memset(req, 0, sizeof(struct adb_request));
 728
 729                 /* I know that looks like a lot, slow as hell, but darwin
 730                  * does it so let's be on the safe side for now
 731                  */
 732                 msleep(15);
 733
 734                 hdr->bus = PMU_I2C_BUS_STATUS;
 735
 736                 INIT_COMPLETION(comp);
 737                 req->data[0] = PMU_I2C_CMD;
 738                 req->reply[0] = 0xff;
 739                 req->nbytes = 2;
 740                 req->done = pmu_i2c_complete;
 741                 req->arg = &comp;
 742                 rc = pmu_queue_request(req);
 743                 if (rc)
 744                         return rc;
 745                 wait_for_completion(&comp);
 746
 747                 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
 748                         return 0;
 749                 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
 750                         int rlen = req->reply_len - 1;
 751
 752                         if (rlen != len) {
 753                                 printk(KERN_WARNING "low_i2c: PMU returned %d"
 754                                        " bytes, expected %d !\n", rlen, len);
 755                                 return -EIO;
 756                         }
 757                         if (len)
 758                                 memcpy(data, &req->reply[1], len);
 759                         return 0;
 760                 }
 761         }
 762         return -EIO;
 763 }
 764
 765 static void __init pmu_i2c_probe(void)
 766 {
 767         struct pmac_i2c_bus *bus;
 768         struct device_node *busnode;
 769         int channel, sz;
 770
 771         if (!pmu_present())
 772                 return;
 773
 774         /* There might or might not be a "pmu-i2c" node, we use that
 775          * or via-pmu itself, whatever we find. I haven't seen a machine
 776          * with separate bus nodes, so we assume a multibus setup
 777          */
 778         busnode = of_find_node_by_name(NULL, "pmu-i2c");
 779         if (busnode == NULL)
 780                 busnode = of_find_node_by_name(NULL, "via-pmu");
 781         if (busnode == NULL)
 782                 return;
 783
 784         printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
 785
 786         /*
 787          * We add bus 1 and 2 only for now, bus 0 is "special"
 788          */
 789         for (channel = 1; channel <= 2; channel++) {
 790                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
 791                 bus = kzalloc(sz, GFP_KERNEL);
 792                 if (bus == NULL)
 793                         return;
 794
 795                 bus->controller = busnode;
 796                 bus->busnode = busnode;
 797                 bus->type = pmac_i2c_bus_pmu;
 798                 bus->channel = channel;
 799                 bus->mode = pmac_i2c_mode_std;
 800                 bus->hostdata = bus + 1;
 801                 bus->xfer = pmu_i2c_xfer;
 802                 mutex_init(&bus->mutex);
 803                 bus->flags = pmac_i2c_multibus;
 804                 list_add(&bus->link, &pmac_i2c_busses);
 805
 806                 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
 807         }
 808 }
 809
 810 #endif /* CONFIG_ADB_PMU */
 811
 812
 813 /*
 814  *
 815  * SMU implementation
 816  *
 817  */
 818
 819 #ifdef CONFIG_PMAC_SMU
 820
 821 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
 822 {
 823         complete(misc);
 824 }
 825
 826 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 827                         u32 subaddr, u8 *data, int len)
 828 {
 829         struct smu_i2c_cmd *cmd = bus->hostdata;
 830         struct completion comp;
 831         int read = addrdir & 1;
 832         int rc = 0;
 833
 834         if ((read && len > SMU_I2C_READ_MAX) ||
 835             ((!read) && len > SMU_I2C_WRITE_MAX))
 836                 return -EINVAL;
 837
 838         memset(cmd, 0, sizeof(struct smu_i2c_cmd));
 839         cmd->info.bus = bus->channel;
 840         cmd->info.devaddr = addrdir;
 841         cmd->info.datalen = len;
 842
 843         switch(bus->mode) {
 844         case pmac_i2c_mode_std:
 845                 if (subsize != 0)
 846                         return -EINVAL;
 847                 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
 848                 break;
 849         case pmac_i2c_mode_stdsub:
 850         case pmac_i2c_mode_combined:
 851                 if (subsize > 3 || subsize < 1)
 852                         return -EINVAL;
 853                 cmd->info.sublen = subsize;
 854                 /* that's big-endian only but heh ! */
 855                 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
 856                        subsize);
 857                 if (bus->mode == pmac_i2c_mode_stdsub)
 858                         cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
 859                 else
 860                         cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
 861                 break;
 862         default:
 863                 return -EINVAL;
 864         }
 865         if (!read && len)
 866                 memcpy(cmd->info.data, data, len);
 867
 868         init_completion(&comp);
 869         cmd->done = smu_i2c_complete;
 870         cmd->misc = &comp;
 871         rc = smu_queue_i2c(cmd);
 872         if (rc < 0)
 873                 return rc;
 874         wait_for_completion(&comp);
 875         rc = cmd->status;
 876
 877         if (read && len)
 878                 memcpy(data, cmd->info.data, len);
 879         return rc < 0 ? rc : 0;
 880 }
 881
 882 static void __init smu_i2c_probe(void)
 883 {
 884         struct device_node *controller, *busnode;
 885         struct pmac_i2c_bus *bus;
 886         const u32 *reg;
 887         int sz;
 888
 889         if (!smu_present())
 890                 return;
 891
 892         controller = of_find_node_by_name(NULL, "smu-i2c-control");
 893         if (controller == NULL)
 894                 controller = of_find_node_by_name(NULL, "smu");
 895         if (controller == NULL)
 896                 return;
 897
 898         printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
 899
 900         /* Look for childs, note that they might not be of the right
 901          * type as older device trees mix i2c busses and other thigns
 902          * at the same level
 903          */
 904         for (busnode = NULL;
 905              (busnode = of_get_next_child(controller, busnode)) != NULL;) {
 906                 if (strcmp(busnode->type, "i2c") &&
 907                     strcmp(busnode->type, "i2c-bus"))
 908                         continue;
 909                 reg = of_get_property(busnode, "reg", NULL);
 910                 if (reg == NULL)
 911                         continue;
 912
 913                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
 914                 bus = kzalloc(sz, GFP_KERNEL);
 915                 if (bus == NULL)
 916                         return;
 917
 918                 bus->controller = controller;
 919                 bus->busnode = of_node_get(busnode);
 920                 bus->type = pmac_i2c_bus_smu;
 921                 bus->channel = *reg;
 922                 bus->mode = pmac_i2c_mode_std;
 923                 bus->hostdata = bus + 1;
 924                 bus->xfer = smu_i2c_xfer;
 925                 mutex_init(&bus->mutex);
 926                 bus->flags = 0;
 927                 list_add(&bus->link, &pmac_i2c_busses);
 928
 929                 printk(KERN_INFO " channel %x bus %s\n",
 930                        bus->channel, busnode->full_name);
 931         }
 932 }
 933
 934 #endif /* CONFIG_PMAC_SMU */
 935
 936 /*
 937  *
 938  * Core code
 939  *
 940  */
 941
 942
 943 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
 944 {
 945         struct device_node *p = of_node_get(node);
 946         struct device_node *prev = NULL;
 947         struct pmac_i2c_bus *bus;
 948
 949         while(p) {
 950                 list_for_each_entry(bus, &pmac_i2c_busses, link) {
 951                         if (p == bus->busnode) {
 952                                 if (prev && bus->flags & pmac_i2c_multibus) {
 953                                         const u32 *reg;
 954                                         reg = of_get_property(prev, "reg",
 955                                                                 NULL);
 956                                         if (!reg)
 957                                                 continue;
 958                                         if (((*reg) >> 8) != bus->channel)
 959                                                 continue;
 960                                 }
 961                                 of_node_put(p);
 962                                 of_node_put(prev);
 963                                 return bus;
 964                         }
 965                 }
 966                 of_node_put(prev);
 967                 prev = p;
 968                 p = of_get_parent(p);
 969         }
 970         return NULL;
 971 }
 972 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
 973
 974 u8 pmac_i2c_get_dev_addr(struct device_node *device)
 975 {
 976         const u32 *reg = of_get_property(device, "reg", NULL);
 977
 978         if (reg == NULL)
 979                 return 0;
 980
 981         return (*reg) & 0xff;
 982 }
 983 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
 984
 985 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
 986 {
 987         return bus->controller;
 988 }
 989 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
 990
 991 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
 992 {
 993         return bus->busnode;
 994 }
 995 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
 996
 997 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
 998 {
 999         return bus->type;
1000 }
1001 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1002
1003 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1004 {
1005         return bus->flags;
1006 }
1007 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1008
1009 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1010 {
1011         return bus->channel;
1012 }
1013 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1014
1015
1016 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1017                              struct i2c_adapter *adapter)
1018 {
1019         WARN_ON(bus->adapter != NULL);
1020         bus->adapter = adapter;
1021 }
1022 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1023
1024 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1025                              struct i2c_adapter *adapter)
1026 {
1027         WARN_ON(bus->adapter != adapter);
1028         bus->adapter = NULL;
1029 }
1030 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1031
1032 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1033 {
1034         return bus->adapter;
1035 }
1036 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1037
1038 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1039 {
1040         struct pmac_i2c_bus *bus;
1041
1042         list_for_each_entry(bus, &pmac_i2c_busses, link)
1043                 if (bus->adapter == adapter)
1044                         return bus;
1045         return NULL;
1046 }
1047 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1048
1049 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1050 {
1051         struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1052
1053         if (bus == NULL)
1054                 return 0;
1055         return (bus->adapter == adapter);
1056 }
1057 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1058
1059 int pmac_low_i2c_lock(struct device_node *np)
1060 {
1061         struct pmac_i2c_bus *bus, *found = NULL;
1062
1063         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1064                 if (np == bus->controller) {
1065                         found = bus;
1066                         break;
1067                 }
1068         }
1069         if (!found)
1070                 return -ENODEV;
1071         return pmac_i2c_open(bus, 0);
1072 }
1073 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1074
1075 int pmac_low_i2c_unlock(struct device_node *np)
1076 {
1077         struct pmac_i2c_bus *bus, *found = NULL;
1078
1079         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1080                 if (np == bus->controller) {
1081                         found = bus;
1082                         break;
1083                 }
1084         }
1085         if (!found)
1086                 return -ENODEV;
1087         pmac_i2c_close(bus);
1088         return 0;
1089 }
1090 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1091
1092
1093 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1094 {
1095         int rc;
1096
1097         mutex_lock(&bus->mutex);
1098         bus->polled = polled || pmac_i2c_force_poll;
1099         bus->opened = 1;
1100         bus->mode = pmac_i2c_mode_std;
1101         if (bus->open && (rc = bus->open(bus)) != 0) {
1102                 bus->opened = 0;
1103                 mutex_unlock(&bus->mutex);
1104                 return rc;
1105         }
1106         return 0;
1107 }
1108 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1109
1110 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1111 {
1112         WARN_ON(!bus->opened);
1113         if (bus->close)
1114                 bus->close(bus);
1115         bus->opened = 0;
1116         mutex_unlock(&bus->mutex);
1117 }
1118 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1119
1120 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1121 {
1122         WARN_ON(!bus->opened);
1123
1124         /* Report me if you see the error below as there might be a new
1125          * "combined4" mode that I need to implement for the SMU bus
1126          */
1127         if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1128                 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1129                        " bus %s !\n", mode, bus->busnode->full_name);
1130                 return -EINVAL;
1131         }
1132         bus->mode = mode;
1133
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1137
1138 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1139                   u32 subaddr, u8 *data, int len)
1140 {
1141         int rc;
1142
1143         WARN_ON(!bus->opened);
1144
1145         DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1146             " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1147             subaddr, len, bus->busnode->full_name);
1148
1149         rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1150
1151 #ifdef DEBUG
1152         if (rc)
1153                 DBG("xfer error %d\n", rc);
1154 #endif
1155         return rc;
1156 }
1157 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1158
1159 /* some quirks for platform function decoding */
1160 enum {
1161         pmac_i2c_quirk_invmask = 0x00000001u,
1162         pmac_i2c_quirk_skip = 0x00000002u,
1163 };
1164
1165 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1166                                               int quirks))
1167 {
1168         struct pmac_i2c_bus *bus;
1169         struct device_node *np;
1170         static struct whitelist_ent {
1171                 char *name;
1172                 char *compatible;
1173                 int quirks;
1174         } whitelist[] = {
1175                 /* XXX Study device-tree's & apple drivers are get the quirks
1176                  * right !
1177                  */
1178                 /* Workaround: It seems that running the clockspreading
1179                  * properties on the eMac will cause lockups during boot.
1180                  * The machine seems to work fine without that. So for now,
1181                  * let's make sure i2c-hwclock doesn't match about "imic"
1182                  * clocks and we'll figure out if we really need to do
1183                  * something special about those later.
1184                  */
1185                 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1186                 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1187                 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1188                 { "i2c-cpu-voltage", NULL, 0},
1189                 {  "temp-monitor", NULL, 0 },
1190                 {  "supply-monitor", NULL, 0 },
1191                 { NULL, NULL, 0 },
1192         };
1193
1194         /* Only some devices need to have platform functions instanciated
1195          * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1196          * on Xserve, if we ever do a driver for them, will use their own
1197          * platform function instance
1198          */
1199         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1200                 for (np = NULL;
1201                      (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1202                         struct whitelist_ent *p;
1203                         /* If multibus, check if device is on that bus */
1204                         if (bus->flags & pmac_i2c_multibus)
1205                                 if (bus != pmac_i2c_find_bus(np))
1206                                         continue;
1207                         for (p = whitelist; p->name != NULL; p++) {
1208                                 if (strcmp(np->name, p->name))
1209                                         continue;
1210                                 if (p->compatible &&
1211                                     !of_device_is_compatible(np, p->compatible))
1212                                         continue;
1213                                 if (p->quirks & pmac_i2c_quirk_skip)
1214                                         break;
1215                                 callback(np, p->quirks);
1216                                 break;
1217                         }
1218                 }
1219         }
1220 }
1221
1222 #define MAX_I2C_DATA    64
1223
1224 struct pmac_i2c_pf_inst
1225 {
1226         struct pmac_i2c_bus     *bus;
1227         u8                      addr;
1228         u8                      buffer[MAX_I2C_DATA];
1229         u8                      scratch[MAX_I2C_DATA];
1230         int                     bytes;
1231         int                     quirks;
1232 };
1233
1234 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1235 {
1236         struct pmac_i2c_pf_inst *inst;
1237         struct pmac_i2c_bus     *bus;
1238
1239         bus = pmac_i2c_find_bus(func->node);
1240         if (bus == NULL) {
1241                 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1242                        func->node->full_name);
1243                 return NULL;
1244         }
1245         if (pmac_i2c_open(bus, 0)) {
1246                 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1247                        func->node->full_name);
1248                 return NULL;
1249         }
1250
1251         /* XXX might need GFP_ATOMIC when called during the suspend process,
1252          * but then, there are already lots of issues with suspending when
1253          * near OOM that need to be resolved, the allocator itself should
1254          * probably make GFP_NOIO implicit during suspend
1255          */
1256         inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1257         if (inst == NULL) {
1258                 pmac_i2c_close(bus);
1259                 return NULL;
1260         }
1261         inst->bus = bus;
1262         inst->addr = pmac_i2c_get_dev_addr(func->node);
1263         inst->quirks = (int)(long)func->driver_data;
1264         return inst;
1265 }
1266
1267 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1268 {
1269         struct pmac_i2c_pf_inst *inst = instdata;
1270
1271         if (inst == NULL)
1272                 return;
1273         pmac_i2c_close(inst->bus);
1274         if (inst)
1275                 kfree(inst);
1276 }
1277
1278 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1279 {
1280         struct pmac_i2c_pf_inst *inst = instdata;
1281
1282         inst->bytes = len;
1283         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1284                              inst->buffer, len);
1285 }
1286
1287 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1288 {
1289         struct pmac_i2c_pf_inst *inst = instdata;
1290
1291         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1292                              (u8 *)data, len);
1293 }
1294
1295 /* This function is used to do the masking & OR'ing for the "rmw" type
1296  * callbacks. Ze should apply the mask and OR in the values in the
1297  * buffer before writing back. The problem is that it seems that
1298  * various darwin drivers implement the mask/or differently, thus
1299  * we need to check the quirks first
1300  */
1301 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1302                                   u32 len, const u8 *mask, const u8 *val)
1303 {
1304         int i;
1305
1306         if (inst->quirks & pmac_i2c_quirk_invmask) {
1307                 for (i = 0; i < len; i ++)
1308                         inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1309         } else {
1310                 for (i = 0; i < len; i ++)
1311                         inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1312                                 | (val[i] & mask[i]);
1313         }
1314 }
1315
1316 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1317                            u32 totallen, const u8 *maskdata,
1318                            const u8 *valuedata)
1319 {
1320         struct pmac_i2c_pf_inst *inst = instdata;
1321
1322         if (masklen > inst->bytes || valuelen > inst->bytes ||
1323             totallen > inst->bytes || valuelen > masklen)
1324                 return -EINVAL;
1325
1326         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1327
1328         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1329                              inst->scratch, totallen);
1330 }
1331
1332 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1333 {
1334         struct pmac_i2c_pf_inst *inst = instdata;
1335
1336         inst->bytes = len;
1337         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1338                              inst->buffer, len);
1339 }
1340
1341 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1342                                      const u8 *data)
1343 {
1344         struct pmac_i2c_pf_inst *inst = instdata;
1345
1346         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1347                              subaddr, (u8 *)data, len);
1348 }
1349
1350 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1351 {
1352         struct pmac_i2c_pf_inst *inst = instdata;
1353
1354         return pmac_i2c_setmode(inst->bus, mode);
1355 }
1356
1357 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1358                                u32 valuelen, u32 totallen, const u8 *maskdata,
1359                                const u8 *valuedata)
1360 {
1361         struct pmac_i2c_pf_inst *inst = instdata;
1362
1363         if (masklen > inst->bytes || valuelen > inst->bytes ||
1364             totallen > inst->bytes || valuelen > masklen)
1365                 return -EINVAL;
1366
1367         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1368
1369         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1370                              subaddr, inst->scratch, totallen);
1371 }
1372
1373 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1374                                      const u8 *maskdata,
1375                                      const u8 *valuedata)
1376 {
1377         struct pmac_i2c_pf_inst *inst = instdata;
1378         int i, match;
1379
1380         /* Get return value pointer, it's assumed to be a u32 */
1381         if (!args || !args->count || !args->u[0].p)
1382                 return -EINVAL;
1383
1384         /* Check buffer */
1385         if (len > inst->bytes)
1386                 return -EINVAL;
1387
1388         for (i = 0, match = 1; match && i < len; i ++)
1389                 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1390                         match = 0;
1391         *args->u[0].p = match;
1392         return 0;
1393 }
1394
1395 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1396 {
1397         msleep((duration + 999) / 1000);
1398         return 0;
1399 }
1400
1401
1402 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1403         .begin                  = pmac_i2c_do_begin,
1404         .end                    = pmac_i2c_do_end,
1405         .read_i2c               = pmac_i2c_do_read,
1406         .write_i2c              = pmac_i2c_do_write,
1407         .rmw_i2c                = pmac_i2c_do_rmw,
1408         .read_i2c_sub           = pmac_i2c_do_read_sub,
1409         .write_i2c_sub          = pmac_i2c_do_write_sub,
1410         .rmw_i2c_sub            = pmac_i2c_do_rmw_sub,
1411         .set_i2c_mode           = pmac_i2c_do_set_mode,
1412         .mask_and_compare       = pmac_i2c_do_mask_and_comp,
1413         .delay                  = pmac_i2c_do_delay,
1414 };
1415
1416 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1417 {
1418         DBG("dev_create(%s)\n", np->full_name);
1419
1420         pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1421                             (void *)(long)quirks);
1422 }
1423
1424 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1425 {
1426         DBG("dev_create(%s)\n", np->full_name);
1427
1428         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1429 }
1430
1431 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1432 {
1433         DBG("dev_suspend(%s)\n", np->full_name);
1434         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1435 }
1436
1437 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1438 {
1439         DBG("dev_resume(%s)\n", np->full_name);
1440         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1441 }
1442
1443 void pmac_pfunc_i2c_suspend(void)
1444 {
1445         pmac_i2c_devscan(pmac_i2c_dev_suspend);
1446 }
1447
1448 void pmac_pfunc_i2c_resume(void)
1449 {
1450         pmac_i2c_devscan(pmac_i2c_dev_resume);
1451 }
1452
1453 /*
1454  * Initialize us: probe all i2c busses on the machine, instantiate
1455  * busses and platform functions as needed.
1456  */
1457 /* This is non-static as it might be called early by smp code */
1458 int __init pmac_i2c_init(void)
1459 {
1460         static int i2c_inited;
1461
1462         if (i2c_inited)
1463                 return 0;
1464         i2c_inited = 1;
1465
1466         if (!machine_is(powermac))
1467                 return 0;
1468
1469         /* Probe keywest-i2c busses */
1470         kw_i2c_probe();
1471
1472 #ifdef CONFIG_ADB_PMU
1473         /* Probe PMU i2c busses */
1474         pmu_i2c_probe();
1475 #endif
1476
1477 #ifdef CONFIG_PMAC_SMU
1478         /* Probe SMU i2c busses */
1479         smu_i2c_probe();
1480 #endif
1481
1482         /* Now add plaform functions for some known devices */
1483         pmac_i2c_devscan(pmac_i2c_dev_create);
1484
1485         return 0;
1486 }
1487 arch_initcall(pmac_i2c_init);
1488
1489 /* Since pmac_i2c_init can be called too early for the platform device
1490  * registration, we need to do it at a later time. In our case, subsys
1491  * happens to fit well, though I agree it's a bit of a hack...
1492  */
1493 static int __init pmac_i2c_create_platform_devices(void)
1494 {
1495         struct pmac_i2c_bus *bus;
1496         int i = 0;
1497
1498         /* In the case where we are initialized from smp_init(), we must
1499          * not use the timer (and thus the irq). It's safe from now on
1500          * though
1501          */
1502         pmac_i2c_force_poll = 0;
1503
1504         /* Create platform devices */
1505         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1506                 bus->platform_dev =
1507                         platform_device_alloc("i2c-powermac", i++);
1508                 if (bus->platform_dev == NULL)
1509                         return -ENOMEM;
1510                 bus->platform_dev->dev.platform_data = bus;
1511                 platform_device_add(bus->platform_dev);
1512         }
1513
1514         /* Now call platform "init" functions */
1515         pmac_i2c_devscan(pmac_i2c_dev_init);
1516
1517         return 0;
1518 }
1519 subsys_initcall(pmac_i2c_create_platform_devices);