arch/powerpc/platforms/pasemi/setup.c

   1 /*
   2  * Copyright (C) 2006-2007 PA Semi, Inc
   3  *
   4  * Authors: Kip Walker, PA Semi
   5  *          Olof Johansson, PA Semi
   6  *
   7  * Maintained by: Olof Johansson <olof@lixom.net>
   8  *
   9  * Based on arch/powerpc/platforms/maple/setup.c
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  */
  24
  25 #include <linux/errno.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/console.h>
  29 #include <linux/pci.h>
  30
  31 #include <asm/prom.h>
  32 #include <asm/system.h>
  33 #include <asm/iommu.h>
  34 #include <asm/machdep.h>
  35 #include <asm/mpic.h>
  36 #include <asm/smp.h>
  37 #include <asm/time.h>
  38 #include <asm/of_platform.h>
  39
  40 #include "pasemi.h"
  41
  42 static void __iomem *reset_reg;
  43
  44 static void pas_restart(char *cmd)
  45 {
  46         printk("Restarting...\n");
  47         while (1)
  48                 out_le32(reset_reg, 0x6000000);
  49 }
  50
  51 #ifdef CONFIG_SMP
  52 static DEFINE_SPINLOCK(timebase_lock);
  53
  54 static void __devinit pas_give_timebase(void)
  55 {
  56         unsigned long tb;
  57
  58         spin_lock(&timebase_lock);
  59         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
  60         tb = mftb();
  61         mtspr(SPRN_TBCTL, TBCTL_UPDATE_LOWER | (tb & 0xffffffff));
  62         mtspr(SPRN_TBCTL, TBCTL_UPDATE_UPPER | (tb >> 32));
  63         mtspr(SPRN_TBCTL, TBCTL_RESTART);
  64         spin_unlock(&timebase_lock);
  65         pr_debug("pas_give_timebase: cpu %d gave tb %lx\n",
  66                  smp_processor_id(), tb);
  67 }
  68
  69 static void __devinit pas_take_timebase(void)
  70 {
  71         pr_debug("pas_take_timebase: cpu %d has tb %lx\n",
  72                  smp_processor_id(), mftb());
  73 }
  74
  75 struct smp_ops_t pas_smp_ops = {
  76         .probe          = smp_mpic_probe,
  77         .message_pass   = smp_mpic_message_pass,
  78         .kick_cpu       = smp_generic_kick_cpu,
  79         .setup_cpu      = smp_mpic_setup_cpu,
  80         .give_timebase  = pas_give_timebase,
  81         .take_timebase  = pas_take_timebase,
  82 };
  83 #endif /* CONFIG_SMP */
  84
  85 void __init pas_setup_arch(void)
  86 {
  87 #ifdef CONFIG_SMP
  88         /* Setup SMP callback */
  89         smp_ops = &pas_smp_ops;
  90 #endif
  91         /* Lookup PCI hosts */
  92         pas_pci_init();
  93
  94 #ifdef CONFIG_DUMMY_CONSOLE
  95         conswitchp = &dummy_con;
  96 #endif
  97
  98         /* Remap SDC register for doing reset */
  99         /* XXXOJN This should maybe come out of the device tree */
 100         reset_reg = ioremap(0xfc101100, 4);
 101
 102         pasemi_idle_init();
 103 }
 104
 105 static __init void pas_init_IRQ(void)
 106 {
 107         struct device_node *np;
 108         struct device_node *root, *mpic_node;
 109         unsigned long openpic_addr;
 110         const unsigned int *opprop;
 111         int naddr, opplen;
 112         struct mpic *mpic;
 113
 114         mpic_node = NULL;
 115
 116         for_each_node_by_type(np, "interrupt-controller")
 117                 if (of_device_is_compatible(np, "open-pic")) {
 118                         mpic_node = np;
 119                         break;
 120                 }
 121         if (!mpic_node)
 122                 for_each_node_by_type(np, "open-pic") {
 123                         mpic_node = np;
 124                         break;
 125                 }
 126         if (!mpic_node) {
 127                 printk(KERN_ERR
 128                         "Failed to locate the MPIC interrupt controller\n");
 129                 return;
 130         }
 131
 132         /* Find address list in /platform-open-pic */
 133         root = of_find_node_by_path("/");
 134         naddr = of_n_addr_cells(root);
 135         opprop = of_get_property(root, "platform-open-pic", &opplen);
 136         if (!opprop) {
 137                 printk(KERN_ERR "No platform-open-pic property.\n");
 138                 of_node_put(root);
 139                 return;
 140         }
 141         openpic_addr = of_read_number(opprop, naddr);
 142         printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
 143
 144         mpic = mpic_alloc(mpic_node, openpic_addr,
 145                           MPIC_PRIMARY|MPIC_LARGE_VECTORS|MPIC_WANTS_RESET,
 146                           0, 0, " PAS-OPIC  ");
 147         BUG_ON(!mpic);
 148
 149         mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
 150         mpic_init(mpic);
 151         of_node_put(mpic_node);
 152         of_node_put(root);
 153 }
 154
 155 static void __init pas_progress(char *s, unsigned short hex)
 156 {
 157         printk("[%04x] : %s\n", hex, s ? s : "");
 158 }
 159
 160
 161 static int pas_machine_check_handler(struct pt_regs *regs)
 162 {
 163         int cpu = smp_processor_id();
 164         unsigned long srr0, srr1, dsisr;
 165
 166         srr0 = regs->nip;
 167         srr1 = regs->msr;
 168         dsisr = mfspr(SPRN_DSISR);
 169         printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
 170         printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1);
 171         printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar);
 172         printk(KERN_ERR "Cause:\n");
 173
 174         if (srr1 & 0x200000)
 175                 printk(KERN_ERR "Signalled by SDC\n");
 176         if (srr1 & 0x100000) {
 177                 printk(KERN_ERR "Load/Store detected error:\n");
 178                 if (dsisr & 0x8000)
 179                         printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
 180                 if (dsisr & 0x4000)
 181                         printk(KERN_ERR "LSU snoop response error\n");
 182                 if (dsisr & 0x2000)
 183                         printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
 184                 if (dsisr & 0x1000)
 185                         printk(KERN_ERR "Recoverable Duptags\n");
 186                 if (dsisr & 0x800)
 187                         printk(KERN_ERR "Recoverable D-cache parity error count overflow\n");
 188                 if (dsisr & 0x400)
 189                         printk(KERN_ERR "TLB parity error count overflow\n");
 190         }
 191         if (srr1 & 0x80000)
 192                 printk(KERN_ERR "Bus Error\n");
 193         if (srr1 & 0x40000)
 194                 printk(KERN_ERR "I-side SLB multiple hit\n");
 195         if (srr1 & 0x20000)
 196                 printk(KERN_ERR "I-cache parity error hit\n");
 197
 198         /* SRR1[62] is from MSR[62] if recoverable, so pass that back */
 199         return !!(srr1 & 0x2);
 200 }
 201
 202 static void __init pas_init_early(void)
 203 {
 204         iommu_init_early_pasemi();
 205 }
 206
 207 static struct of_device_id pasemi_bus_ids[] = {
 208         { .type = "sdc", },
 209         {},
 210 };
 211
 212 static int __init pasemi_publish_devices(void)
 213 {
 214         if (!machine_is(pasemi))
 215                 return 0;
 216
 217         /* Publish OF platform devices for SDC and other non-PCI devices */
 218         of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
 219
 220         return 0;
 221 }
 222 device_initcall(pasemi_publish_devices);
 223
 224
 225 /*
 226  * Called very early, MMU is off, device-tree isn't unflattened
 227  */
 228 static int __init pas_probe(void)
 229 {
 230         unsigned long root = of_get_flat_dt_root();
 231
 232         if (!of_flat_dt_is_compatible(root, "PA6T-1682M"))
 233                 return 0;
 234
 235         hpte_init_native();
 236
 237         alloc_iobmap_l2();
 238
 239         return 1;
 240 }
 241
 242 define_machine(pasemi) {
 243         .name                   = "PA Semi PA6T-1682M",
 244         .probe                  = pas_probe,
 245         .setup_arch             = pas_setup_arch,
 246         .init_early             = pas_init_early,
 247         .init_IRQ               = pas_init_IRQ,
 248         .get_irq                = mpic_get_irq,
 249         .restart                = pas_restart,
 250         .get_boot_time          = pas_get_boot_time,
 251         .calibrate_decr         = generic_calibrate_decr,
 252         .progress               = pas_progress,
 253         .machine_check_exception = pas_machine_check_handler,
 254 };