arch/powerpc/platforms/8xx/ep88xc.c

   1 /*
   2  * Platform setup for the Embedded Planet EP88xC board
   3  *
   4  * Author: Scott Wood <scottwood@freescale.com>
   5  * Copyright 2007 Freescale Semiconductor, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2. This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/of_platform.h>
  14
  15 #include <asm/machdep.h>
  16 #include <asm/io.h>
  17 #include <asm/udbg.h>
  18 #include <asm/commproc.h>
  19 #include <asm/cpm1.h>
  20
  21 #include "mpc8xx.h"
  22
  23 struct cpm_pin {
  24         int port, pin, flags;
  25 };
  26
  27 static struct cpm_pin ep88xc_pins[] = {
  28         /* SMC1 */
  29         {1, 24, CPM_PIN_INPUT}, /* RX */
  30         {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
  31
  32         /* SCC2 */
  33         {0, 12, CPM_PIN_INPUT}, /* TX */
  34         {0, 13, CPM_PIN_INPUT}, /* RX */
  35         {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
  36         {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
  37         {2, 14, CPM_PIN_INPUT}, /* RTS */
  38
  39         /* MII1 */
  40         {0, 0, CPM_PIN_INPUT},
  41         {0, 1, CPM_PIN_INPUT},
  42         {0, 2, CPM_PIN_INPUT},
  43         {0, 3, CPM_PIN_INPUT},
  44         {0, 4, CPM_PIN_OUTPUT},
  45         {0, 10, CPM_PIN_OUTPUT},
  46         {0, 11, CPM_PIN_OUTPUT},
  47         {1, 19, CPM_PIN_INPUT},
  48         {1, 31, CPM_PIN_INPUT},
  49         {2, 12, CPM_PIN_INPUT},
  50         {2, 13, CPM_PIN_INPUT},
  51         {3, 8, CPM_PIN_INPUT},
  52         {4, 30, CPM_PIN_OUTPUT},
  53         {4, 31, CPM_PIN_OUTPUT},
  54
  55         /* MII2 */
  56         {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  57         {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  58         {4, 16, CPM_PIN_OUTPUT},
  59         {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  60         {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  61         {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  62         {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  63         {4, 21, CPM_PIN_OUTPUT},
  64         {4, 22, CPM_PIN_OUTPUT},
  65         {4, 23, CPM_PIN_OUTPUT},
  66         {4, 24, CPM_PIN_OUTPUT},
  67         {4, 25, CPM_PIN_OUTPUT},
  68         {4, 26, CPM_PIN_OUTPUT},
  69         {4, 27, CPM_PIN_OUTPUT},
  70         {4, 28, CPM_PIN_OUTPUT},
  71         {4, 29, CPM_PIN_OUTPUT},
  72
  73         /* USB */
  74         {0, 6, CPM_PIN_INPUT},  /* CLK2 */
  75         {0, 14, CPM_PIN_INPUT}, /* USBOE */
  76         {0, 15, CPM_PIN_INPUT}, /* USBRXD */
  77         {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
  78         {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
  79         {2, 10, CPM_PIN_INPUT}, /* USBRXN */
  80         {2, 11, CPM_PIN_INPUT}, /* USBRXP */
  81
  82         /* Misc */
  83         {1, 26, CPM_PIN_INPUT}, /* BRGO2 */
  84         {1, 27, CPM_PIN_INPUT}, /* BRGO1 */
  85 };
  86
  87 static void __init init_ioports(void)
  88 {
  89         int i;
  90
  91         for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
  92                 struct cpm_pin *pin = &ep88xc_pins[i];
  93                 cpm1_set_pin(pin->port, pin->pin, pin->flags);
  94         }
  95
  96         cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
  97         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
  98         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
  99         cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
 100         cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
 101 }
 102
 103 static u8 __iomem *ep88xc_bcsr;
 104
 105 #define BCSR7_SCC2_ENABLE 0x10
 106
 107 #define BCSR8_PHY1_ENABLE 0x80
 108 #define BCSR8_PHY1_POWER  0x40
 109 #define BCSR8_PHY2_ENABLE 0x20
 110 #define BCSR8_PHY2_POWER  0x10
 111
 112 #define BCSR9_USB_ENABLE  0x80
 113 #define BCSR9_USB_POWER   0x40
 114 #define BCSR9_USB_HOST    0x20
 115 #define BCSR9_USB_FULL_SPEED_TARGET 0x10
 116
 117 static void __init ep88xc_setup_arch(void)
 118 {
 119         struct device_node *np;
 120
 121         cpm_reset();
 122         init_ioports();
 123
 124         np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
 125         if (!np) {
 126                 printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
 127                 return;
 128         }
 129
 130         ep88xc_bcsr = of_iomap(np, 0);
 131         of_node_put(np);
 132
 133         if (!ep88xc_bcsr) {
 134                 printk(KERN_CRIT "Could not remap BCSR\n");
 135                 return;
 136         }
 137
 138         setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
 139         setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
 140                                   BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
 141 }
 142
 143 static int __init ep88xc_probe(void)
 144 {
 145         unsigned long root = of_get_flat_dt_root();
 146         return of_flat_dt_is_compatible(root, "fsl,ep88xc");
 147 }
 148
 149 static struct of_device_id __initdata of_bus_ids[] = {
 150         { .name = "soc", },
 151         { .name = "cpm", },
 152         { .name = "localbus", },
 153         {},
 154 };
 155
 156 static int __init declare_of_platform_devices(void)
 157 {
 158         /* Publish the QE devices */
 159         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 160
 161         return 0;
 162 }
 163 machine_device_initcall(ep88xc, declare_of_platform_devices);
 164
 165 define_machine(ep88xc) {
 166         .name = "Embedded Planet EP88xC",
 167         .probe = ep88xc_probe,
 168         .setup_arch = ep88xc_setup_arch,
 169         .init_IRQ = mpc8xx_pics_init,
 170         .get_irq        = mpc8xx_get_irq,
 171         .restart = mpc8xx_restart,
 172         .calibrate_decr = mpc8xx_calibrate_decr,
 173         .set_rtc_time = mpc8xx_set_rtc_time,
 174         .get_rtc_time = mpc8xx_get_rtc_time,
 175         .progress = udbg_progress,
 176 };