arch/powerpc/platforms/82xx/km82xx.c

   1 /*
   2  * Keymile km82xx support
   3  * Copyright 2008-2011 DENX Software Engineering GmbH
   4  * Author: Heiko Schocher <hs@denx.de>
   5  *
   6  * based on code from:
   7  * Copyright 2007 Freescale Semiconductor, Inc.
   8  * Author: Scott Wood <scottwood@freescale.com>
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/fsl_devices.h>
  19 #include <linux/of_platform.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/cpm2.h>
  23 #include <asm/udbg.h>
  24 #include <asm/machdep.h>
  25 #include <asm/time.h>
  26 #include <asm/mpc8260.h>
  27 #include <asm/prom.h>
  28
  29 #include <sysdev/fsl_soc.h>
  30 #include <sysdev/cpm2_pic.h>
  31
  32 #include "pq2.h"
  33
  34 static void __init km82xx_pic_init(void)
  35 {
  36         struct device_node *np = of_find_compatible_node(NULL, NULL,
  37                                                         "fsl,pq2-pic");
  38         if (!np) {
  39                 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
  40                 return;
  41         }
  42
  43         cpm2_pic_init(np);
  44         of_node_put(np);
  45 }
  46
  47 struct cpm_pin {
  48         int port, pin, flags;
  49 };
  50
  51 static __initdata struct cpm_pin km82xx_pins[] = {
  52
  53         /* SMC2 */
  54         {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  55         {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  56
  57         /* SCC1 */
  58         {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  59         {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  60         {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  61         {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  62
  63         /* SCC4 */
  64         {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  65         {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  66         {2,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  67         {2,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  68         {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  69         {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  70
  71         /* FCC1 */
  72         {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  73         {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  74         {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  75         {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  76         {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  77         {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  78         {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  79         {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  80         {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  81         {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  82         {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  83         {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  84         {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  85         {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  86
  87         {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  88         {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  89
  90         /* FCC2 */
  91         {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  92         {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  93         {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  94         {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  95         {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  96         {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  97         {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  98         {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  99         {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 100         {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 101         {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 102         {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 103         {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 104         {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 105
 106         {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 107         {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 108
 109         /* MDC */
 110         {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
 111
 112 #if defined(CONFIG_I2C_CPM)
 113         /* I2C */
 114         {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
 115         {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
 116 #endif
 117
 118         /* USB */
 119         {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /* FULL_SPEED */
 120         {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /*/SLAVE */
 121         {2, 10, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXN */
 122         {2, 11, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXP */
 123         {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
 124         {2, 27, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXCLK */
 125         {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
 126         {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
 127         {3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
 128 };
 129
 130 static void __init init_ioports(void)
 131 {
 132         int i;
 133
 134         for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
 135                 const struct cpm_pin *pin = &km82xx_pins[i];
 136                 cpm2_set_pin(pin->port, pin->pin, pin->flags);
 137         }
 138
 139         cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
 140         cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
 141         cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
 142         cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
 143         cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
 144         cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
 145         cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
 146         cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);
 147         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
 148         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
 149
 150         /* Force USB FULL SPEED bit to '1' */
 151         setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
 152         /* clear USB_SLAVE */
 153         clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
 154 }
 155
 156 static void __init km82xx_setup_arch(void)
 157 {
 158         if (ppc_md.progress)
 159                 ppc_md.progress("km82xx_setup_arch()", 0);
 160
 161         cpm2_reset();
 162
 163         /* When this is set, snooping CPM DMA from RAM causes
 164          * machine checks.  See erratum SIU18.
 165          */
 166         clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
 167
 168         init_ioports();
 169
 170         if (ppc_md.progress)
 171                 ppc_md.progress("km82xx_setup_arch(), finish", 0);
 172 }
 173
 174 static  __initdata struct of_device_id of_bus_ids[] = {
 175         { .compatible = "simple-bus", },
 176         {},
 177 };
 178
 179 static int __init declare_of_platform_devices(void)
 180 {
 181         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 182
 183         return 0;
 184 }
 185 machine_device_initcall(km82xx, declare_of_platform_devices);
 186
 187 /*
 188  * Called very early, device-tree isn't unflattened
 189  */
 190 static int __init km82xx_probe(void)
 191 {
 192         unsigned long root = of_get_flat_dt_root();
 193         return of_flat_dt_is_compatible(root, "keymile,km82xx");
 194 }
 195
 196 define_machine(km82xx)
 197 {
 198         .name = "Keymile km82xx",
 199         .probe = km82xx_probe,
 200         .setup_arch = km82xx_setup_arch,
 201         .init_IRQ = km82xx_pic_init,
 202         .get_irq = cpm2_get_irq,
 203         .calibrate_decr = generic_calibrate_decr,
 204         .restart = pq2_restart,
 205         .progress = udbg_progress,
 206 };