arch/powerpc/kvm/book3s_paired_singles.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright Novell Inc 2010
  16  *
  17  * Authors: Alexander Graf <agraf@suse.de>
  18  */
  19
  20 #include <asm/kvm.h>
  21 #include <asm/kvm_ppc.h>
  22 #include <asm/disassemble.h>
  23 #include <asm/kvm_book3s.h>
  24 #include <asm/kvm_fpu.h>
  25 #include <asm/reg.h>
  26 #include <asm/cacheflush.h>
  27 #include <linux/vmalloc.h>
  28
  29 /* #define DEBUG */
  30
  31 #ifdef DEBUG
  32 #define dprintk printk
  33 #else
  34 #define dprintk(...) do { } while(0);
  35 #endif
  36
  37 #define OP_LFS                  48
  38 #define OP_LFSU                 49
  39 #define OP_LFD                  50
  40 #define OP_LFDU                 51
  41 #define OP_STFS                 52
  42 #define OP_STFSU                53
  43 #define OP_STFD                 54
  44 #define OP_STFDU                55
  45 #define OP_PSQ_L                56
  46 #define OP_PSQ_LU               57
  47 #define OP_PSQ_ST               60
  48 #define OP_PSQ_STU              61
  49
  50 #define OP_31_LFSX              535
  51 #define OP_31_LFSUX             567
  52 #define OP_31_LFDX              599
  53 #define OP_31_LFDUX             631
  54 #define OP_31_STFSX             663
  55 #define OP_31_STFSUX            695
  56 #define OP_31_STFX              727
  57 #define OP_31_STFUX             759
  58 #define OP_31_LWIZX             887
  59 #define OP_31_STFIWX            983
  60
  61 #define OP_59_FADDS             21
  62 #define OP_59_FSUBS             20
  63 #define OP_59_FSQRTS            22
  64 #define OP_59_FDIVS             18
  65 #define OP_59_FRES              24
  66 #define OP_59_FMULS             25
  67 #define OP_59_FRSQRTES          26
  68 #define OP_59_FMSUBS            28
  69 #define OP_59_FMADDS            29
  70 #define OP_59_FNMSUBS           30
  71 #define OP_59_FNMADDS           31
  72
  73 #define OP_63_FCMPU             0
  74 #define OP_63_FCPSGN            8
  75 #define OP_63_FRSP              12
  76 #define OP_63_FCTIW             14
  77 #define OP_63_FCTIWZ            15
  78 #define OP_63_FDIV              18
  79 #define OP_63_FADD              21
  80 #define OP_63_FSQRT             22
  81 #define OP_63_FSEL              23
  82 #define OP_63_FRE               24
  83 #define OP_63_FMUL              25
  84 #define OP_63_FRSQRTE           26
  85 #define OP_63_FMSUB             28
  86 #define OP_63_FMADD             29
  87 #define OP_63_FNMSUB            30
  88 #define OP_63_FNMADD            31
  89 #define OP_63_FCMPO             32
  90 #define OP_63_MTFSB1            38 // XXX
  91 #define OP_63_FSUB              20
  92 #define OP_63_FNEG              40
  93 #define OP_63_MCRFS             64
  94 #define OP_63_MTFSB0            70
  95 #define OP_63_FMR               72
  96 #define OP_63_MTFSFI            134
  97 #define OP_63_FABS              264
  98 #define OP_63_MFFS              583
  99 #define OP_63_MTFSF             711
 100
 101 #define OP_4X_PS_CMPU0          0
 102 #define OP_4X_PSQ_LX            6
 103 #define OP_4XW_PSQ_STX          7
 104 #define OP_4A_PS_SUM0           10
 105 #define OP_4A_PS_SUM1           11
 106 #define OP_4A_PS_MULS0          12
 107 #define OP_4A_PS_MULS1          13
 108 #define OP_4A_PS_MADDS0         14
 109 #define OP_4A_PS_MADDS1         15
 110 #define OP_4A_PS_DIV            18
 111 #define OP_4A_PS_SUB            20
 112 #define OP_4A_PS_ADD            21
 113 #define OP_4A_PS_SEL            23
 114 #define OP_4A_PS_RES            24
 115 #define OP_4A_PS_MUL            25
 116 #define OP_4A_PS_RSQRTE         26
 117 #define OP_4A_PS_MSUB           28
 118 #define OP_4A_PS_MADD           29
 119 #define OP_4A_PS_NMSUB          30
 120 #define OP_4A_PS_NMADD          31
 121 #define OP_4X_PS_CMPO0          32
 122 #define OP_4X_PSQ_LUX           38
 123 #define OP_4XW_PSQ_STUX         39
 124 #define OP_4X_PS_NEG            40
 125 #define OP_4X_PS_CMPU1          64
 126 #define OP_4X_PS_MR             72
 127 #define OP_4X_PS_CMPO1          96
 128 #define OP_4X_PS_NABS           136
 129 #define OP_4X_PS_ABS            264
 130 #define OP_4X_PS_MERGE00        528
 131 #define OP_4X_PS_MERGE01        560
 132 #define OP_4X_PS_MERGE10        592
 133 #define OP_4X_PS_MERGE11        624
 134
 135 #define SCALAR_NONE             0
 136 #define SCALAR_HIGH             (1 << 0)
 137 #define SCALAR_LOW              (1 << 1)
 138 #define SCALAR_NO_PS0           (1 << 2)
 139 #define SCALAR_NO_PS1           (1 << 3)
 140
 141 #define GQR_ST_TYPE_MASK        0x00000007
 142 #define GQR_ST_TYPE_SHIFT       0
 143 #define GQR_ST_SCALE_MASK       0x00003f00
 144 #define GQR_ST_SCALE_SHIFT      8
 145 #define GQR_LD_TYPE_MASK        0x00070000
 146 #define GQR_LD_TYPE_SHIFT       16
 147 #define GQR_LD_SCALE_MASK       0x3f000000
 148 #define GQR_LD_SCALE_SHIFT      24
 149
 150 #define GQR_QUANTIZE_FLOAT      0
 151 #define GQR_QUANTIZE_U8         4
 152 #define GQR_QUANTIZE_U16        5
 153 #define GQR_QUANTIZE_S8         6
 154 #define GQR_QUANTIZE_S16        7
 155
 156 #define FPU_LS_SINGLE           0
 157 #define FPU_LS_DOUBLE           1
 158 #define FPU_LS_SINGLE_LOW       2
 159
 160 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
 161 {
 162         kvm_cvt_df(&vcpu->arch.fpr[rt], &vcpu->arch.qpr[rt], &vcpu->arch.fpscr);
 163 }
 164
 165 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
 166 {
 167         u64 dsisr;
 168
 169         vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 36, 0);
 170         vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0);
 171         vcpu->arch.dear = eaddr;
 172         /* Page Fault */
 173         dsisr = kvmppc_set_field(0, 33, 33, 1);
 174         if (is_store)
 175                 to_book3s(vcpu)->dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
 176         kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
 177 }
 178
 179 static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
 180                                    int rs, ulong addr, int ls_type)
 181 {
 182         int emulated = EMULATE_FAIL;
 183         int r;
 184         char tmp[8];
 185         int len = sizeof(u32);
 186
 187         if (ls_type == FPU_LS_DOUBLE)
 188                 len = sizeof(u64);
 189
 190         /* read from memory */
 191         r = kvmppc_ld(vcpu, &addr, len, tmp, true);
 192         vcpu->arch.paddr_accessed = addr;
 193
 194         if (r < 0) {
 195                 kvmppc_inject_pf(vcpu, addr, false);
 196                 goto done_load;
 197         } else if (r == EMULATE_DO_MMIO) {
 198                 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, len, 1);
 199                 goto done_load;
 200         }
 201
 202         emulated = EMULATE_DONE;
 203
 204         /* put in registers */
 205         switch (ls_type) {
 206         case FPU_LS_SINGLE:
 207                 kvm_cvt_fd((u32*)tmp, &vcpu->arch.fpr[rs], &vcpu->arch.fpscr);
 208                 vcpu->arch.qpr[rs] = *((u32*)tmp);
 209                 break;
 210         case FPU_LS_DOUBLE:
 211                 vcpu->arch.fpr[rs] = *((u64*)tmp);
 212                 break;
 213         }
 214
 215         dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp,
 216                           addr, len);
 217
 218 done_load:
 219         return emulated;
 220 }
 221
 222 static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
 223                                     int rs, ulong addr, int ls_type)
 224 {
 225         int emulated = EMULATE_FAIL;
 226         int r;
 227         char tmp[8];
 228         u64 val;
 229         int len;
 230
 231         switch (ls_type) {
 232         case FPU_LS_SINGLE:
 233                 kvm_cvt_df(&vcpu->arch.fpr[rs], (u32*)tmp, &vcpu->arch.fpscr);
 234                 val = *((u32*)tmp);
 235                 len = sizeof(u32);
 236                 break;
 237         case FPU_LS_SINGLE_LOW:
 238                 *((u32*)tmp) = vcpu->arch.fpr[rs];
 239                 val = vcpu->arch.fpr[rs] & 0xffffffff;
 240                 len = sizeof(u32);
 241                 break;
 242         case FPU_LS_DOUBLE:
 243                 *((u64*)tmp) = vcpu->arch.fpr[rs];
 244                 val = vcpu->arch.fpr[rs];
 245                 len = sizeof(u64);
 246                 break;
 247         default:
 248                 val = 0;
 249                 len = 0;
 250         }
 251
 252         r = kvmppc_st(vcpu, &addr, len, tmp, true);
 253         vcpu->arch.paddr_accessed = addr;
 254         if (r < 0) {
 255                 kvmppc_inject_pf(vcpu, addr, true);
 256         } else if (r == EMULATE_DO_MMIO) {
 257                 emulated = kvmppc_handle_store(run, vcpu, val, len, 1);
 258         } else {
 259                 emulated = EMULATE_DONE;
 260         }
 261
 262         dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
 263                           val, addr, len);
 264
 265         return emulated;
 266 }
 267
 268 static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
 269                                    int rs, ulong addr, bool w, int i)
 270 {
 271         int emulated = EMULATE_FAIL;
 272         int r;
 273         float one = 1.0;
 274         u32 tmp[2];
 275
 276         /* read from memory */
 277         if (w) {
 278                 r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true);
 279                 memcpy(&tmp[1], &one, sizeof(u32));
 280         } else {
 281                 r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true);
 282         }
 283         vcpu->arch.paddr_accessed = addr;
 284         if (r < 0) {
 285                 kvmppc_inject_pf(vcpu, addr, false);
 286                 goto done_load;
 287         } else if ((r == EMULATE_DO_MMIO) && w) {
 288                 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, 4, 1);
 289                 vcpu->arch.qpr[rs] = tmp[1];
 290                 goto done_load;
 291         } else if (r == EMULATE_DO_MMIO) {
 292                 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FQPR | rs, 8, 1);
 293                 goto done_load;
 294         }
 295
 296         emulated = EMULATE_DONE;
 297
 298         /* put in registers */
 299         kvm_cvt_fd(&tmp[0], &vcpu->arch.fpr[rs], &vcpu->arch.fpscr);
 300         vcpu->arch.qpr[rs] = tmp[1];
 301
 302         dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
 303                           tmp[1], addr, w ? 4 : 8);
 304
 305 done_load:
 306         return emulated;
 307 }
 308
 309 static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
 310                                     int rs, ulong addr, bool w, int i)
 311 {
 312         int emulated = EMULATE_FAIL;
 313         int r;
 314         u32 tmp[2];
 315         int len = w ? sizeof(u32) : sizeof(u64);
 316
 317         kvm_cvt_df(&vcpu->arch.fpr[rs], &tmp[0], &vcpu->arch.fpscr);
 318         tmp[1] = vcpu->arch.qpr[rs];
 319
 320         r = kvmppc_st(vcpu, &addr, len, tmp, true);
 321         vcpu->arch.paddr_accessed = addr;
 322         if (r < 0) {
 323                 kvmppc_inject_pf(vcpu, addr, true);
 324         } else if ((r == EMULATE_DO_MMIO) && w) {
 325                 emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1);
 326         } else if (r == EMULATE_DO_MMIO) {
 327                 u64 val = ((u64)tmp[0] << 32) | tmp[1];
 328                 emulated = kvmppc_handle_store(run, vcpu, val, 8, 1);
 329         } else {
 330                 emulated = EMULATE_DONE;
 331         }
 332
 333         dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
 334                           tmp[0], tmp[1], addr, len);
 335
 336         return emulated;
 337 }
 338
 339 /*
 340  * Cuts out inst bits with ordering according to spec.
 341  * That means the leftmost bit is zero. All given bits are included.
 342  */
 343 static inline u32 inst_get_field(u32 inst, int msb, int lsb)
 344 {
 345         return kvmppc_get_field(inst, msb + 32, lsb + 32);
 346 }
 347
 348 /*
 349  * Replaces inst bits with ordering according to spec.
 350  */
 351 static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
 352 {
 353         return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
 354 }
 355
 356 bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
 357 {
 358         if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
 359                 return false;
 360
 361         switch (get_op(inst)) {
 362         case OP_PSQ_L:
 363         case OP_PSQ_LU:
 364         case OP_PSQ_ST:
 365         case OP_PSQ_STU:
 366         case OP_LFS:
 367         case OP_LFSU:
 368         case OP_LFD:
 369         case OP_LFDU:
 370         case OP_STFS:
 371         case OP_STFSU:
 372         case OP_STFD:
 373         case OP_STFDU:
 374                 return true;
 375         case 4:
 376                 /* X form */
 377                 switch (inst_get_field(inst, 21, 30)) {
 378                 case OP_4X_PS_CMPU0:
 379                 case OP_4X_PSQ_LX:
 380                 case OP_4X_PS_CMPO0:
 381                 case OP_4X_PSQ_LUX:
 382                 case OP_4X_PS_NEG:
 383                 case OP_4X_PS_CMPU1:
 384                 case OP_4X_PS_MR:
 385                 case OP_4X_PS_CMPO1:
 386                 case OP_4X_PS_NABS:
 387                 case OP_4X_PS_ABS:
 388                 case OP_4X_PS_MERGE00:
 389                 case OP_4X_PS_MERGE01:
 390                 case OP_4X_PS_MERGE10:
 391                 case OP_4X_PS_MERGE11:
 392                         return true;
 393                 }
 394                 /* XW form */
 395                 switch (inst_get_field(inst, 25, 30)) {
 396                 case OP_4XW_PSQ_STX:
 397                 case OP_4XW_PSQ_STUX:
 398                         return true;
 399                 }
 400                 /* A form */
 401                 switch (inst_get_field(inst, 26, 30)) {
 402                 case OP_4A_PS_SUM1:
 403                 case OP_4A_PS_SUM0:
 404                 case OP_4A_PS_MULS0:
 405                 case OP_4A_PS_MULS1:
 406                 case OP_4A_PS_MADDS0:
 407                 case OP_4A_PS_MADDS1:
 408                 case OP_4A_PS_DIV:
 409                 case OP_4A_PS_SUB:
 410                 case OP_4A_PS_ADD:
 411                 case OP_4A_PS_SEL:
 412                 case OP_4A_PS_RES:
 413                 case OP_4A_PS_MUL:
 414                 case OP_4A_PS_RSQRTE:
 415                 case OP_4A_PS_MSUB:
 416                 case OP_4A_PS_MADD:
 417                 case OP_4A_PS_NMSUB:
 418                 case OP_4A_PS_NMADD:
 419                         return true;
 420                 }
 421                 break;
 422         case 59:
 423                 switch (inst_get_field(inst, 21, 30)) {
 424                 case OP_59_FADDS:
 425                 case OP_59_FSUBS:
 426                 case OP_59_FDIVS:
 427                 case OP_59_FRES:
 428                 case OP_59_FRSQRTES:
 429                         return true;
 430                 }
 431                 switch (inst_get_field(inst, 26, 30)) {
 432                 case OP_59_FMULS:
 433                 case OP_59_FMSUBS:
 434                 case OP_59_FMADDS:
 435                 case OP_59_FNMSUBS:
 436                 case OP_59_FNMADDS:
 437                         return true;
 438                 }
 439                 break;
 440         case 63:
 441                 switch (inst_get_field(inst, 21, 30)) {
 442                 case OP_63_MTFSB0:
 443                 case OP_63_MTFSB1:
 444                 case OP_63_MTFSF:
 445                 case OP_63_MTFSFI:
 446                 case OP_63_MCRFS:
 447                 case OP_63_MFFS:
 448                 case OP_63_FCMPU:
 449                 case OP_63_FCMPO:
 450                 case OP_63_FNEG:
 451                 case OP_63_FMR:
 452                 case OP_63_FABS:
 453                 case OP_63_FRSP:
 454                 case OP_63_FDIV:
 455                 case OP_63_FADD:
 456                 case OP_63_FSUB:
 457                 case OP_63_FCTIW:
 458                 case OP_63_FCTIWZ:
 459                 case OP_63_FRSQRTE:
 460                 case OP_63_FCPSGN:
 461                         return true;
 462                 }
 463                 switch (inst_get_field(inst, 26, 30)) {
 464                 case OP_63_FMUL:
 465                 case OP_63_FSEL:
 466                 case OP_63_FMSUB:
 467                 case OP_63_FMADD:
 468                 case OP_63_FNMSUB:
 469                 case OP_63_FNMADD:
 470                         return true;
 471                 }
 472                 break;
 473         case 31:
 474                 switch (inst_get_field(inst, 21, 30)) {
 475                 case OP_31_LFSX:
 476                 case OP_31_LFSUX:
 477                 case OP_31_LFDX:
 478                 case OP_31_LFDUX:
 479                 case OP_31_STFSX:
 480                 case OP_31_STFSUX:
 481                 case OP_31_STFX:
 482                 case OP_31_STFUX:
 483                 case OP_31_STFIWX:
 484                         return true;
 485                 }
 486                 break;
 487         }
 488
 489         return false;
 490 }
 491
 492 static int get_d_signext(u32 inst)
 493 {
 494         int d = inst & 0x8ff;
 495
 496         if (d & 0x800)
 497                 return -(d & 0x7ff);
 498
 499         return (d & 0x7ff);
 500 }
 501
 502 static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
 503                                       int reg_out, int reg_in1, int reg_in2,
 504                                       int reg_in3, int scalar,
 505                                       void (*func)(u64 *fpscr,
 506                                                  u32 *dst, u32 *src1,
 507                                                  u32 *src2, u32 *src3))
 508 {
 509         u32 *qpr = vcpu->arch.qpr;
 510         u64 *fpr = vcpu->arch.fpr;
 511         u32 ps0_out;
 512         u32 ps0_in1, ps0_in2, ps0_in3;
 513         u32 ps1_in1, ps1_in2, ps1_in3;
 514
 515         /* RC */
 516         WARN_ON(rc);
 517
 518         /* PS0 */
 519         kvm_cvt_df(&fpr[reg_in1], &ps0_in1, &vcpu->arch.fpscr);
 520         kvm_cvt_df(&fpr[reg_in2], &ps0_in2, &vcpu->arch.fpscr);
 521         kvm_cvt_df(&fpr[reg_in3], &ps0_in3, &vcpu->arch.fpscr);
 522
 523         if (scalar & SCALAR_LOW)
 524                 ps0_in2 = qpr[reg_in2];
 525
 526         func(&vcpu->arch.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3);
 527
 528         dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
 529                           ps0_in1, ps0_in2, ps0_in3, ps0_out);
 530
 531         if (!(scalar & SCALAR_NO_PS0))
 532                 kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
 533
 534         /* PS1 */
 535         ps1_in1 = qpr[reg_in1];
 536         ps1_in2 = qpr[reg_in2];
 537         ps1_in3 = qpr[reg_in3];
 538
 539         if (scalar & SCALAR_HIGH)
 540                 ps1_in2 = ps0_in2;
 541
 542         if (!(scalar & SCALAR_NO_PS1))
 543                 func(&vcpu->arch.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3);
 544
 545         dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
 546                           ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]);
 547
 548         return EMULATE_DONE;
 549 }
 550
 551 static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
 552                                     int reg_out, int reg_in1, int reg_in2,
 553                                     int scalar,
 554                                     void (*func)(u64 *fpscr,
 555                                                  u32 *dst, u32 *src1,
 556                                                  u32 *src2))
 557 {
 558         u32 *qpr = vcpu->arch.qpr;
 559         u64 *fpr = vcpu->arch.fpr;
 560         u32 ps0_out;
 561         u32 ps0_in1, ps0_in2;
 562         u32 ps1_out;
 563         u32 ps1_in1, ps1_in2;
 564
 565         /* RC */
 566         WARN_ON(rc);
 567
 568         /* PS0 */
 569         kvm_cvt_df(&fpr[reg_in1], &ps0_in1, &vcpu->arch.fpscr);
 570
 571         if (scalar & SCALAR_LOW)
 572                 ps0_in2 = qpr[reg_in2];
 573         else
 574                 kvm_cvt_df(&fpr[reg_in2], &ps0_in2, &vcpu->arch.fpscr);
 575
 576         func(&vcpu->arch.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
 577
 578         if (!(scalar & SCALAR_NO_PS0)) {
 579                 dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
 580                                   ps0_in1, ps0_in2, ps0_out);
 581
 582                 kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
 583         }
 584
 585         /* PS1 */
 586         ps1_in1 = qpr[reg_in1];
 587         ps1_in2 = qpr[reg_in2];
 588
 589         if (scalar & SCALAR_HIGH)
 590                 ps1_in2 = ps0_in2;
 591
 592         func(&vcpu->arch.fpscr, &ps1_out, &ps1_in1, &ps1_in2);
 593
 594         if (!(scalar & SCALAR_NO_PS1)) {
 595                 qpr[reg_out] = ps1_out;
 596
 597                 dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
 598                                   ps1_in1, ps1_in2, qpr[reg_out]);
 599         }
 600
 601         return EMULATE_DONE;
 602 }
 603
 604 static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
 605                                     int reg_out, int reg_in,
 606                                     void (*func)(u64 *t,
 607                                                  u32 *dst, u32 *src1))
 608 {
 609         u32 *qpr = vcpu->arch.qpr;
 610         u64 *fpr = vcpu->arch.fpr;
 611         u32 ps0_out, ps0_in;
 612         u32 ps1_in;
 613
 614         /* RC */
 615         WARN_ON(rc);
 616
 617         /* PS0 */
 618         kvm_cvt_df(&fpr[reg_in], &ps0_in, &vcpu->arch.fpscr);
 619         func(&vcpu->arch.fpscr, &ps0_out, &ps0_in);
 620
 621         dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
 622                           ps0_in, ps0_out);
 623
 624         kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
 625
 626         /* PS1 */
 627         ps1_in = qpr[reg_in];
 628         func(&vcpu->arch.fpscr, &qpr[reg_out], &ps1_in);
 629
 630         dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n",
 631                           ps1_in, qpr[reg_out]);
 632
 633         return EMULATE_DONE;
 634 }
 635
 636 int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
 637 {
 638         u32 inst = kvmppc_get_last_inst(vcpu);
 639         enum emulation_result emulated = EMULATE_DONE;
 640
 641         int ax_rd = inst_get_field(inst, 6, 10);
 642         int ax_ra = inst_get_field(inst, 11, 15);
 643         int ax_rb = inst_get_field(inst, 16, 20);
 644         int ax_rc = inst_get_field(inst, 21, 25);
 645         short full_d = inst_get_field(inst, 16, 31);
 646
 647         u64 *fpr_d = &vcpu->arch.fpr[ax_rd];
 648         u64 *fpr_a = &vcpu->arch.fpr[ax_ra];
 649         u64 *fpr_b = &vcpu->arch.fpr[ax_rb];
 650         u64 *fpr_c = &vcpu->arch.fpr[ax_rc];
 651
 652         bool rcomp = (inst & 1) ? true : false;
 653         u32 cr = kvmppc_get_cr(vcpu);
 654 #ifdef DEBUG
 655         int i;
 656 #endif
 657
 658         if (!kvmppc_inst_is_paired_single(vcpu, inst))
 659                 return EMULATE_FAIL;
 660
 661         if (!(vcpu->arch.msr & MSR_FP)) {
 662                 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
 663                 return EMULATE_AGAIN;
 664         }
 665
 666         kvmppc_giveup_ext(vcpu, MSR_FP);
 667         preempt_disable();
 668         enable_kernel_fp();
 669         /* Do we need to clear FE0 / FE1 here? Don't think so. */
 670
 671 #ifdef DEBUG
 672         for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
 673                 u32 f;
 674                 kvm_cvt_df(&vcpu->arch.fpr[i], &f, &vcpu->arch.fpscr);
 675                 dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx    QPR[%d] = 0x%x\n",
 676                         i, f, vcpu->arch.fpr[i], i, vcpu->arch.qpr[i]);
 677         }
 678 #endif
 679
 680         switch (get_op(inst)) {
 681         case OP_PSQ_L:
 682         {
 683                 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
 684                 bool w = inst_get_field(inst, 16, 16) ? true : false;
 685                 int i = inst_get_field(inst, 17, 19);
 686
 687                 addr += get_d_signext(inst);
 688                 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
 689                 break;
 690         }
 691         case OP_PSQ_LU:
 692         {
 693                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
 694                 bool w = inst_get_field(inst, 16, 16) ? true : false;
 695                 int i = inst_get_field(inst, 17, 19);
 696
 697                 addr += get_d_signext(inst);
 698                 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
 699
 700                 if (emulated == EMULATE_DONE)
 701                         kvmppc_set_gpr(vcpu, ax_ra, addr);
 702                 break;
 703         }
 704         case OP_PSQ_ST:
 705         {
 706                 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
 707                 bool w = inst_get_field(inst, 16, 16) ? true : false;
 708                 int i = inst_get_field(inst, 17, 19);
 709
 710                 addr += get_d_signext(inst);
 711                 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
 712                 break;
 713         }
 714         case OP_PSQ_STU:
 715         {
 716                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
 717                 bool w = inst_get_field(inst, 16, 16) ? true : false;
 718                 int i = inst_get_field(inst, 17, 19);
 719
 720                 addr += get_d_signext(inst);
 721                 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
 722
 723                 if (emulated == EMULATE_DONE)
 724                         kvmppc_set_gpr(vcpu, ax_ra, addr);
 725                 break;
 726         }
 727         case 4:
 728                 /* X form */
 729                 switch (inst_get_field(inst, 21, 30)) {
 730                 case OP_4X_PS_CMPU0:
 731                         /* XXX */
 732                         emulated = EMULATE_FAIL;
 733                         break;
 734                 case OP_4X_PSQ_LX:
 735                 {
 736                         ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
 737                         bool w = inst_get_field(inst, 21, 21) ? true : false;
 738                         int i = inst_get_field(inst, 22, 24);
 739
 740                         addr += kvmppc_get_gpr(vcpu, ax_rb);
 741                         emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
 742                         break;
 743                 }
 744                 case OP_4X_PS_CMPO0:
 745                         /* XXX */
 746                         emulated = EMULATE_FAIL;
 747                         break;
 748                 case OP_4X_PSQ_LUX:
 749                 {
 750                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
 751                         bool w = inst_get_field(inst, 21, 21) ? true : false;
 752                         int i = inst_get_field(inst, 22, 24);
 753
 754                         addr += kvmppc_get_gpr(vcpu, ax_rb);
 755                         emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
 756
 757                         if (emulated == EMULATE_DONE)
 758                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
 759                         break;
 760                 }
 761                 case OP_4X_PS_NEG:
 762                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
 763                         vcpu->arch.fpr[ax_rd] ^= 0x8000000000000000ULL;
 764                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 765                         vcpu->arch.qpr[ax_rd] ^= 0x80000000;
 766                         break;
 767                 case OP_4X_PS_CMPU1:
 768                         /* XXX */
 769                         emulated = EMULATE_FAIL;
 770                         break;
 771                 case OP_4X_PS_MR:
 772                         WARN_ON(rcomp);
 773                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
 774                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 775                         break;
 776                 case OP_4X_PS_CMPO1:
 777                         /* XXX */
 778                         emulated = EMULATE_FAIL;
 779                         break;
 780                 case OP_4X_PS_NABS:
 781                         WARN_ON(rcomp);
 782                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
 783                         vcpu->arch.fpr[ax_rd] |= 0x8000000000000000ULL;
 784                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 785                         vcpu->arch.qpr[ax_rd] |= 0x80000000;
 786                         break;
 787                 case OP_4X_PS_ABS:
 788                         WARN_ON(rcomp);
 789                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
 790                         vcpu->arch.fpr[ax_rd] &= ~0x8000000000000000ULL;
 791                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 792                         vcpu->arch.qpr[ax_rd] &= ~0x80000000;
 793                         break;
 794                 case OP_4X_PS_MERGE00:
 795                         WARN_ON(rcomp);
 796                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra];
 797                         /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
 798                         kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
 799                                    &vcpu->arch.qpr[ax_rd],
 800                                    &vcpu->arch.fpscr);
 801                         break;
 802                 case OP_4X_PS_MERGE01:
 803                         WARN_ON(rcomp);
 804                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra];
 805                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 806                         break;
 807                 case OP_4X_PS_MERGE10:
 808                         WARN_ON(rcomp);
 809                         /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
 810                         kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
 811                                    &vcpu->arch.fpr[ax_rd],
 812                                    &vcpu->arch.fpscr);
 813                         /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
 814                         kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
 815                                    &vcpu->arch.qpr[ax_rd],
 816                                    &vcpu->arch.fpscr);
 817                         break;
 818                 case OP_4X_PS_MERGE11:
 819                         WARN_ON(rcomp);
 820                         /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
 821                         kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
 822                                    &vcpu->arch.fpr[ax_rd],
 823                                    &vcpu->arch.fpscr);
 824                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
 825                         break;
 826                 }
 827                 /* XW form */
 828                 switch (inst_get_field(inst, 25, 30)) {
 829                 case OP_4XW_PSQ_STX:
 830                 {
 831                         ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
 832                         bool w = inst_get_field(inst, 21, 21) ? true : false;
 833                         int i = inst_get_field(inst, 22, 24);
 834
 835                         addr += kvmppc_get_gpr(vcpu, ax_rb);
 836                         emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
 837                         break;
 838                 }
 839                 case OP_4XW_PSQ_STUX:
 840                 {
 841                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
 842                         bool w = inst_get_field(inst, 21, 21) ? true : false;
 843                         int i = inst_get_field(inst, 22, 24);
 844
 845                         addr += kvmppc_get_gpr(vcpu, ax_rb);
 846                         emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
 847
 848                         if (emulated == EMULATE_DONE)
 849                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
 850                         break;
 851                 }
 852                 }
 853                 /* A form */
 854                 switch (inst_get_field(inst, 26, 30)) {
 855                 case OP_4A_PS_SUM1:
 856                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 857                                         ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds);
 858                         vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rc];
 859                         break;
 860                 case OP_4A_PS_SUM0:
 861                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 862                                         ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds);
 863                         vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc];
 864                         break;
 865                 case OP_4A_PS_MULS0:
 866                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 867                                         ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls);
 868                         break;
 869                 case OP_4A_PS_MULS1:
 870                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 871                                         ax_ra, ax_rc, SCALAR_LOW, fps_fmuls);
 872                         break;
 873                 case OP_4A_PS_MADDS0:
 874                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 875                                         ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds);
 876                         break;
 877                 case OP_4A_PS_MADDS1:
 878                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 879                                         ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds);
 880                         break;
 881                 case OP_4A_PS_DIV:
 882                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 883                                         ax_ra, ax_rb, SCALAR_NONE, fps_fdivs);
 884                         break;
 885                 case OP_4A_PS_SUB:
 886                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 887                                         ax_ra, ax_rb, SCALAR_NONE, fps_fsubs);
 888                         break;
 889                 case OP_4A_PS_ADD:
 890                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 891                                         ax_ra, ax_rb, SCALAR_NONE, fps_fadds);
 892                         break;
 893                 case OP_4A_PS_SEL:
 894                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 895                                         ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel);
 896                         break;
 897                 case OP_4A_PS_RES:
 898                         emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
 899                                         ax_rb, fps_fres);
 900                         break;
 901                 case OP_4A_PS_MUL:
 902                         emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
 903                                         ax_ra, ax_rc, SCALAR_NONE, fps_fmuls);
 904                         break;
 905                 case OP_4A_PS_RSQRTE:
 906                         emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
 907                                         ax_rb, fps_frsqrte);
 908                         break;
 909                 case OP_4A_PS_MSUB:
 910                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 911                                         ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs);
 912                         break;
 913                 case OP_4A_PS_MADD:
 914                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 915                                         ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds);
 916                         break;
 917                 case OP_4A_PS_NMSUB:
 918                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 919                                         ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs);
 920                         break;
 921                 case OP_4A_PS_NMADD:
 922                         emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
 923                                         ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds);
 924                         break;
 925                 }
 926                 break;
 927
 928         /* Real FPU operations */
 929
 930         case OP_LFS:
 931         {
 932                 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
 933
 934                 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
 935                                                    FPU_LS_SINGLE);
 936                 break;
 937         }
 938         case OP_LFSU:
 939         {
 940                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
 941
 942                 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
 943                                                    FPU_LS_SINGLE);
 944
 945                 if (emulated == EMULATE_DONE)
 946                         kvmppc_set_gpr(vcpu, ax_ra, addr);
 947                 break;
 948         }
 949         case OP_LFD:
 950         {
 951                 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
 952
 953                 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
 954                                                    FPU_LS_DOUBLE);
 955                 break;
 956         }
 957         case OP_LFDU:
 958         {
 959                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
 960
 961                 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
 962                                                    FPU_LS_DOUBLE);
 963
 964                 if (emulated == EMULATE_DONE)
 965                         kvmppc_set_gpr(vcpu, ax_ra, addr);
 966                 break;
 967         }
 968         case OP_STFS:
 969         {
 970                 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
 971
 972                 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
 973                                                     FPU_LS_SINGLE);
 974                 break;
 975         }
 976         case OP_STFSU:
 977         {
 978                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
 979
 980                 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
 981                                                     FPU_LS_SINGLE);
 982
 983                 if (emulated == EMULATE_DONE)
 984                         kvmppc_set_gpr(vcpu, ax_ra, addr);
 985                 break;
 986         }
 987         case OP_STFD:
 988         {
 989                 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
 990
 991                 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
 992                                                     FPU_LS_DOUBLE);
 993                 break;
 994         }
 995         case OP_STFDU:
 996         {
 997                 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
 998
 999                 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
1000                                                     FPU_LS_DOUBLE);
1001
1002                 if (emulated == EMULATE_DONE)
1003                         kvmppc_set_gpr(vcpu, ax_ra, addr);
1004                 break;
1005         }
1006         case 31:
1007                 switch (inst_get_field(inst, 21, 30)) {
1008                 case OP_31_LFSX:
1009                 {
1010                         ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
1011
1012                         addr += kvmppc_get_gpr(vcpu, ax_rb);
1013                         emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1014                                                            addr, FPU_LS_SINGLE);
1015                         break;
1016                 }
1017                 case OP_31_LFSUX:
1018                 {
1019                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1020                                      kvmppc_get_gpr(vcpu, ax_rb);
1021
1022                         emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1023                                                            addr, FPU_LS_SINGLE);
1024
1025                         if (emulated == EMULATE_DONE)
1026                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
1027                         break;
1028                 }
1029                 case OP_31_LFDX:
1030                 {
1031                         ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1032                                      kvmppc_get_gpr(vcpu, ax_rb);
1033
1034                         emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1035                                                            addr, FPU_LS_DOUBLE);
1036                         break;
1037                 }
1038                 case OP_31_LFDUX:
1039                 {
1040                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1041                                      kvmppc_get_gpr(vcpu, ax_rb);
1042
1043                         emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1044                                                            addr, FPU_LS_DOUBLE);
1045
1046                         if (emulated == EMULATE_DONE)
1047                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
1048                         break;
1049                 }
1050                 case OP_31_STFSX:
1051                 {
1052                         ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1053                                      kvmppc_get_gpr(vcpu, ax_rb);
1054
1055                         emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1056                                                             addr, FPU_LS_SINGLE);
1057                         break;
1058                 }
1059                 case OP_31_STFSUX:
1060                 {
1061                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1062                                      kvmppc_get_gpr(vcpu, ax_rb);
1063
1064                         emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1065                                                             addr, FPU_LS_SINGLE);
1066
1067                         if (emulated == EMULATE_DONE)
1068                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
1069                         break;
1070                 }
1071                 case OP_31_STFX:
1072                 {
1073                         ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1074                                      kvmppc_get_gpr(vcpu, ax_rb);
1075
1076                         emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1077                                                             addr, FPU_LS_DOUBLE);
1078                         break;
1079                 }
1080                 case OP_31_STFUX:
1081                 {
1082                         ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1083                                      kvmppc_get_gpr(vcpu, ax_rb);
1084
1085                         emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1086                                                             addr, FPU_LS_DOUBLE);
1087
1088                         if (emulated == EMULATE_DONE)
1089                                 kvmppc_set_gpr(vcpu, ax_ra, addr);
1090                         break;
1091                 }
1092                 case OP_31_STFIWX:
1093                 {
1094                         ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1095                                      kvmppc_get_gpr(vcpu, ax_rb);
1096
1097                         emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1098                                                             addr,
1099                                                             FPU_LS_SINGLE_LOW);
1100                         break;
1101                 }
1102                         break;
1103                 }
1104                 break;
1105         case 59:
1106                 switch (inst_get_field(inst, 21, 30)) {
1107                 case OP_59_FADDS:
1108                         fpd_fadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1109                         kvmppc_sync_qpr(vcpu, ax_rd);
1110                         break;
1111                 case OP_59_FSUBS:
1112                         fpd_fsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1113                         kvmppc_sync_qpr(vcpu, ax_rd);
1114                         break;
1115                 case OP_59_FDIVS:
1116                         fpd_fdivs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1117                         kvmppc_sync_qpr(vcpu, ax_rd);
1118                         break;
1119                 case OP_59_FRES:
1120                         fpd_fres(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1121                         kvmppc_sync_qpr(vcpu, ax_rd);
1122                         break;
1123                 case OP_59_FRSQRTES:
1124                         fpd_frsqrtes(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1125                         kvmppc_sync_qpr(vcpu, ax_rd);
1126                         break;
1127                 }
1128                 switch (inst_get_field(inst, 26, 30)) {
1129                 case OP_59_FMULS:
1130                         fpd_fmuls(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1131                         kvmppc_sync_qpr(vcpu, ax_rd);
1132                         break;
1133                 case OP_59_FMSUBS:
1134                         fpd_fmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1135                         kvmppc_sync_qpr(vcpu, ax_rd);
1136                         break;
1137                 case OP_59_FMADDS:
1138                         fpd_fmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1139                         kvmppc_sync_qpr(vcpu, ax_rd);
1140                         break;
1141                 case OP_59_FNMSUBS:
1142                         fpd_fnmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1143                         kvmppc_sync_qpr(vcpu, ax_rd);
1144                         break;
1145                 case OP_59_FNMADDS:
1146                         fpd_fnmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1147                         kvmppc_sync_qpr(vcpu, ax_rd);
1148                         break;
1149                 }
1150                 break;
1151         case 63:
1152                 switch (inst_get_field(inst, 21, 30)) {
1153                 case OP_63_MTFSB0:
1154                 case OP_63_MTFSB1:
1155                 case OP_63_MCRFS:
1156                 case OP_63_MTFSFI:
1157                         /* XXX need to implement */
1158                         break;
1159                 case OP_63_MFFS:
1160                         /* XXX missing CR */
1161                         *fpr_d = vcpu->arch.fpscr;
1162                         break;
1163                 case OP_63_MTFSF:
1164                         /* XXX missing fm bits */
1165                         /* XXX missing CR */
1166                         vcpu->arch.fpscr = *fpr_b;
1167                         break;
1168                 case OP_63_FCMPU:
1169                 {
1170                         u32 tmp_cr;
1171                         u32 cr0_mask = 0xf0000000;
1172                         u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1173
1174                         fpd_fcmpu(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b);
1175                         cr &= ~(cr0_mask >> cr_shift);
1176                         cr |= (cr & cr0_mask) >> cr_shift;
1177                         break;
1178                 }
1179                 case OP_63_FCMPO:
1180                 {
1181                         u32 tmp_cr;
1182                         u32 cr0_mask = 0xf0000000;
1183                         u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1184
1185                         fpd_fcmpo(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b);
1186                         cr &= ~(cr0_mask >> cr_shift);
1187                         cr |= (cr & cr0_mask) >> cr_shift;
1188                         break;
1189                 }
1190                 case OP_63_FNEG:
1191                         fpd_fneg(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1192                         break;
1193                 case OP_63_FMR:
1194                         *fpr_d = *fpr_b;
1195                         break;
1196                 case OP_63_FABS:
1197                         fpd_fabs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1198                         break;
1199                 case OP_63_FCPSGN:
1200                         fpd_fcpsgn(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1201                         break;
1202                 case OP_63_FDIV:
1203                         fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1204                         break;
1205                 case OP_63_FADD:
1206                         fpd_fadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1207                         break;
1208                 case OP_63_FSUB:
1209                         fpd_fsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1210                         break;
1211                 case OP_63_FCTIW:
1212                         fpd_fctiw(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1213                         break;
1214                 case OP_63_FCTIWZ:
1215                         fpd_fctiwz(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1216                         break;
1217                 case OP_63_FRSP:
1218                         fpd_frsp(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1219                         kvmppc_sync_qpr(vcpu, ax_rd);
1220                         break;
1221                 case OP_63_FRSQRTE:
1222                 {
1223                         double one = 1.0f;
1224
1225                         /* fD = sqrt(fB) */
1226                         fpd_fsqrt(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1227                         /* fD = 1.0f / fD */
1228                         fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, (u64*)&one, fpr_d);
1229                         break;
1230                 }
1231                 }
1232                 switch (inst_get_field(inst, 26, 30)) {
1233                 case OP_63_FMUL:
1234                         fpd_fmul(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1235                         break;
1236                 case OP_63_FSEL:
1237                         fpd_fsel(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1238                         break;
1239                 case OP_63_FMSUB:
1240                         fpd_fmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1241                         break;
1242                 case OP_63_FMADD:
1243                         fpd_fmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1244                         break;
1245                 case OP_63_FNMSUB:
1246                         fpd_fnmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1247                         break;
1248                 case OP_63_FNMADD:
1249                         fpd_fnmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1250                         break;
1251                 }
1252                 break;
1253         }
1254
1255 #ifdef DEBUG
1256         for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
1257                 u32 f;
1258                 kvm_cvt_df(&vcpu->arch.fpr[i], &f, &vcpu->arch.fpscr);
1259                 dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
1260         }
1261 #endif
1262
1263         if (rcomp)
1264                 kvmppc_set_cr(vcpu, cr);
1265
1266         preempt_enable();
1267
1268         return emulated;
1269 }