arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #ifdef CONFIG_PPC32
  33 #include <linux/module.h>
  34 #endif
  35 #include <linux/hw_breakpoint.h>
  36 #include <linux/perf_event.h>
  37
  38 #include <asm/uaccess.h>
  39 #include <asm/page.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/system.h>
  42
  43 /*
  44  * The parameter save area on the stack is used to store arguments being passed
  45  * to callee function and is located at fixed offset from stack pointer.
  46  */
  47 #ifdef CONFIG_PPC32
  48 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  49 #else /* CONFIG_PPC32 */
  50 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  51 #endif
  52
  53 struct pt_regs_offset {
  54         const char *name;
  55         int offset;
  56 };
  57
  58 #define STR(s)  #s                      /* convert to string */
  59 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  60 #define GPR_OFFSET_NAME(num)    \
  61         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  62 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  63
  64 static const struct pt_regs_offset regoffset_table[] = {
  65         GPR_OFFSET_NAME(0),
  66         GPR_OFFSET_NAME(1),
  67         GPR_OFFSET_NAME(2),
  68         GPR_OFFSET_NAME(3),
  69         GPR_OFFSET_NAME(4),
  70         GPR_OFFSET_NAME(5),
  71         GPR_OFFSET_NAME(6),
  72         GPR_OFFSET_NAME(7),
  73         GPR_OFFSET_NAME(8),
  74         GPR_OFFSET_NAME(9),
  75         GPR_OFFSET_NAME(10),
  76         GPR_OFFSET_NAME(11),
  77         GPR_OFFSET_NAME(12),
  78         GPR_OFFSET_NAME(13),
  79         GPR_OFFSET_NAME(14),
  80         GPR_OFFSET_NAME(15),
  81         GPR_OFFSET_NAME(16),
  82         GPR_OFFSET_NAME(17),
  83         GPR_OFFSET_NAME(18),
  84         GPR_OFFSET_NAME(19),
  85         GPR_OFFSET_NAME(20),
  86         GPR_OFFSET_NAME(21),
  87         GPR_OFFSET_NAME(22),
  88         GPR_OFFSET_NAME(23),
  89         GPR_OFFSET_NAME(24),
  90         GPR_OFFSET_NAME(25),
  91         GPR_OFFSET_NAME(26),
  92         GPR_OFFSET_NAME(27),
  93         GPR_OFFSET_NAME(28),
  94         GPR_OFFSET_NAME(29),
  95         GPR_OFFSET_NAME(30),
  96         GPR_OFFSET_NAME(31),
  97         REG_OFFSET_NAME(nip),
  98         REG_OFFSET_NAME(msr),
  99         REG_OFFSET_NAME(ctr),
 100         REG_OFFSET_NAME(link),
 101         REG_OFFSET_NAME(xer),
 102         REG_OFFSET_NAME(ccr),
 103 #ifdef CONFIG_PPC64
 104         REG_OFFSET_NAME(softe),
 105 #else
 106         REG_OFFSET_NAME(mq),
 107 #endif
 108         REG_OFFSET_NAME(trap),
 109         REG_OFFSET_NAME(dar),
 110         REG_OFFSET_NAME(dsisr),
 111         REG_OFFSET_END,
 112 };
 113
 114 /**
 115  * regs_query_register_offset() - query register offset from its name
 116  * @name:       the name of a register
 117  *
 118  * regs_query_register_offset() returns the offset of a register in struct
 119  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 120  */
 121 int regs_query_register_offset(const char *name)
 122 {
 123         const struct pt_regs_offset *roff;
 124         for (roff = regoffset_table; roff->name != NULL; roff++)
 125                 if (!strcmp(roff->name, name))
 126                         return roff->offset;
 127         return -EINVAL;
 128 }
 129
 130 /**
 131  * regs_query_register_name() - query register name from its offset
 132  * @offset:     the offset of a register in struct pt_regs.
 133  *
 134  * regs_query_register_name() returns the name of a register from its
 135  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 136  */
 137 const char *regs_query_register_name(unsigned int offset)
 138 {
 139         const struct pt_regs_offset *roff;
 140         for (roff = regoffset_table; roff->name != NULL; roff++)
 141                 if (roff->offset == offset)
 142                         return roff->name;
 143         return NULL;
 144 }
 145
 146 /*
 147  * does not yet catch signals sent when the child dies.
 148  * in exit.c or in signal.c.
 149  */
 150
 151 /*
 152  * Set of msr bits that gdb can change on behalf of a process.
 153  */
 154 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 155 #define MSR_DEBUGCHANGE 0
 156 #else
 157 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 158 #endif
 159
 160 /*
 161  * Max register writeable via put_reg
 162  */
 163 #ifdef CONFIG_PPC32
 164 #define PT_MAX_PUT_REG  PT_MQ
 165 #else
 166 #define PT_MAX_PUT_REG  PT_CCR
 167 #endif
 168
 169 static unsigned long get_user_msr(struct task_struct *task)
 170 {
 171         return task->thread.regs->msr | task->thread.fpexc_mode;
 172 }
 173
 174 static int set_user_msr(struct task_struct *task, unsigned long msr)
 175 {
 176         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 177         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 178         return 0;
 179 }
 180
 181 /*
 182  * We prevent mucking around with the reserved area of trap
 183  * which are used internally by the kernel.
 184  */
 185 static int set_user_trap(struct task_struct *task, unsigned long trap)
 186 {
 187         task->thread.regs->trap = trap & 0xfff0;
 188         return 0;
 189 }
 190
 191 /*
 192  * Get contents of register REGNO in task TASK.
 193  */
 194 unsigned long ptrace_get_reg(struct task_struct *task, int regno)
 195 {
 196         if (task->thread.regs == NULL)
 197                 return -EIO;
 198
 199         if (regno == PT_MSR)
 200                 return get_user_msr(task);
 201
 202         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
 203                 return ((unsigned long *)task->thread.regs)[regno];
 204
 205         return -EIO;
 206 }
 207
 208 /*
 209  * Write contents of register REGNO in task TASK.
 210  */
 211 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 212 {
 213         if (task->thread.regs == NULL)
 214                 return -EIO;
 215
 216         if (regno == PT_MSR)
 217                 return set_user_msr(task, data);
 218         if (regno == PT_TRAP)
 219                 return set_user_trap(task, data);
 220
 221         if (regno <= PT_MAX_PUT_REG) {
 222                 ((unsigned long *)task->thread.regs)[regno] = data;
 223                 return 0;
 224         }
 225         return -EIO;
 226 }
 227
 228 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 229                    unsigned int pos, unsigned int count,
 230                    void *kbuf, void __user *ubuf)
 231 {
 232         int i, ret;
 233
 234         if (target->thread.regs == NULL)
 235                 return -EIO;
 236
 237         if (!FULL_REGS(target->thread.regs)) {
 238                 /* We have a partial register set.  Fill 14-31 with bogus values */
 239                 for (i = 14; i < 32; i++)
 240                         target->thread.regs->gpr[i] = NV_REG_POISON;
 241         }
 242
 243         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 244                                   target->thread.regs,
 245                                   0, offsetof(struct pt_regs, msr));
 246         if (!ret) {
 247                 unsigned long msr = get_user_msr(target);
 248                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 249                                           offsetof(struct pt_regs, msr),
 250                                           offsetof(struct pt_regs, msr) +
 251                                           sizeof(msr));
 252         }
 253
 254         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 255                      offsetof(struct pt_regs, msr) + sizeof(long));
 256
 257         if (!ret)
 258                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 259                                           &target->thread.regs->orig_gpr3,
 260                                           offsetof(struct pt_regs, orig_gpr3),
 261                                           sizeof(struct pt_regs));
 262         if (!ret)
 263                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 264                                                sizeof(struct pt_regs), -1);
 265
 266         return ret;
 267 }
 268
 269 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 270                    unsigned int pos, unsigned int count,
 271                    const void *kbuf, const void __user *ubuf)
 272 {
 273         unsigned long reg;
 274         int ret;
 275
 276         if (target->thread.regs == NULL)
 277                 return -EIO;
 278
 279         CHECK_FULL_REGS(target->thread.regs);
 280
 281         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 282                                  target->thread.regs,
 283                                  0, PT_MSR * sizeof(reg));
 284
 285         if (!ret && count > 0) {
 286                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 287                                          PT_MSR * sizeof(reg),
 288                                          (PT_MSR + 1) * sizeof(reg));
 289                 if (!ret)
 290                         ret = set_user_msr(target, reg);
 291         }
 292
 293         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 294                      offsetof(struct pt_regs, msr) + sizeof(long));
 295
 296         if (!ret)
 297                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 298                                          &target->thread.regs->orig_gpr3,
 299                                          PT_ORIG_R3 * sizeof(reg),
 300                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 301
 302         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 303                 ret = user_regset_copyin_ignore(
 304                         &pos, &count, &kbuf, &ubuf,
 305                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 306                         PT_TRAP * sizeof(reg));
 307
 308         if (!ret && count > 0) {
 309                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 310                                          PT_TRAP * sizeof(reg),
 311                                          (PT_TRAP + 1) * sizeof(reg));
 312                 if (!ret)
 313                         ret = set_user_trap(target, reg);
 314         }
 315
 316         if (!ret)
 317                 ret = user_regset_copyin_ignore(
 318                         &pos, &count, &kbuf, &ubuf,
 319                         (PT_TRAP + 1) * sizeof(reg), -1);
 320
 321         return ret;
 322 }
 323
 324 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 325                    unsigned int pos, unsigned int count,
 326                    void *kbuf, void __user *ubuf)
 327 {
 328 #ifdef CONFIG_VSX
 329         double buf[33];
 330         int i;
 331 #endif
 332         flush_fp_to_thread(target);
 333
 334 #ifdef CONFIG_VSX
 335         /* copy to local buffer then write that out */
 336         for (i = 0; i < 32 ; i++)
 337                 buf[i] = target->thread.TS_FPR(i);
 338         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 339         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 340
 341 #else
 342         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 343                      offsetof(struct thread_struct, TS_FPR(32)));
 344
 345         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 346                                    &target->thread.fpr, 0, -1);
 347 #endif
 348 }
 349
 350 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 351                    unsigned int pos, unsigned int count,
 352                    const void *kbuf, const void __user *ubuf)
 353 {
 354 #ifdef CONFIG_VSX
 355         double buf[33];
 356         int i;
 357 #endif
 358         flush_fp_to_thread(target);
 359
 360 #ifdef CONFIG_VSX
 361         /* copy to local buffer then write that out */
 362         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 363         if (i)
 364                 return i;
 365         for (i = 0; i < 32 ; i++)
 366                 target->thread.TS_FPR(i) = buf[i];
 367         memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
 368         return 0;
 369 #else
 370         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 371                      offsetof(struct thread_struct, TS_FPR(32)));
 372
 373         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 374                                   &target->thread.fpr, 0, -1);
 375 #endif
 376 }
 377
 378 #ifdef CONFIG_ALTIVEC
 379 /*
 380  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 381  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 382  * corresponding vector registers.  Quadword 32 contains the vscr as the
 383  * last word (offset 12) within that quadword.  Quadword 33 contains the
 384  * vrsave as the first word (offset 0) within the quadword.
 385  *
 386  * This definition of the VMX state is compatible with the current PPC32
 387  * ptrace interface.  This allows signal handling and ptrace to use the
 388  * same structures.  This also simplifies the implementation of a bi-arch
 389  * (combined (32- and 64-bit) gdb.
 390  */
 391
 392 static int vr_active(struct task_struct *target,
 393                      const struct user_regset *regset)
 394 {
 395         flush_altivec_to_thread(target);
 396         return target->thread.used_vr ? regset->n : 0;
 397 }
 398
 399 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 400                   unsigned int pos, unsigned int count,
 401                   void *kbuf, void __user *ubuf)
 402 {
 403         int ret;
 404
 405         flush_altivec_to_thread(target);
 406
 407         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 408                      offsetof(struct thread_struct, vr[32]));
 409
 410         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 411                                   &target->thread.vr, 0,
 412                                   33 * sizeof(vector128));
 413         if (!ret) {
 414                 /*
 415                  * Copy out only the low-order word of vrsave.
 416                  */
 417                 union {
 418                         elf_vrreg_t reg;
 419                         u32 word;
 420                 } vrsave;
 421                 memset(&vrsave, 0, sizeof(vrsave));
 422                 vrsave.word = target->thread.vrsave;
 423                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 424                                           33 * sizeof(vector128), -1);
 425         }
 426
 427         return ret;
 428 }
 429
 430 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 431                   unsigned int pos, unsigned int count,
 432                   const void *kbuf, const void __user *ubuf)
 433 {
 434         int ret;
 435
 436         flush_altivec_to_thread(target);
 437
 438         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 439                      offsetof(struct thread_struct, vr[32]));
 440
 441         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 442                                  &target->thread.vr, 0, 33 * sizeof(vector128));
 443         if (!ret && count > 0) {
 444                 /*
 445                  * We use only the first word of vrsave.
 446                  */
 447                 union {
 448                         elf_vrreg_t reg;
 449                         u32 word;
 450                 } vrsave;
 451                 memset(&vrsave, 0, sizeof(vrsave));
 452                 vrsave.word = target->thread.vrsave;
 453                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 454                                          33 * sizeof(vector128), -1);
 455                 if (!ret)
 456                         target->thread.vrsave = vrsave.word;
 457         }
 458
 459         return ret;
 460 }
 461 #endif /* CONFIG_ALTIVEC */
 462
 463 #ifdef CONFIG_VSX
 464 /*
 465  * Currently to set and and get all the vsx state, you need to call
 466  * the fp and VMX calls as well.  This only get/sets the lower 32
 467  * 128bit VSX registers.
 468  */
 469
 470 static int vsr_active(struct task_struct *target,
 471                       const struct user_regset *regset)
 472 {
 473         flush_vsx_to_thread(target);
 474         return target->thread.used_vsr ? regset->n : 0;
 475 }
 476
 477 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 478                    unsigned int pos, unsigned int count,
 479                    void *kbuf, void __user *ubuf)
 480 {
 481         double buf[32];
 482         int ret, i;
 483
 484         flush_vsx_to_thread(target);
 485
 486         for (i = 0; i < 32 ; i++)
 487                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 488         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 489                                   buf, 0, 32 * sizeof(double));
 490
 491         return ret;
 492 }
 493
 494 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 495                    unsigned int pos, unsigned int count,
 496                    const void *kbuf, const void __user *ubuf)
 497 {
 498         double buf[32];
 499         int ret,i;
 500
 501         flush_vsx_to_thread(target);
 502
 503         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 504                                  buf, 0, 32 * sizeof(double));
 505         for (i = 0; i < 32 ; i++)
 506                 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 507
 508
 509         return ret;
 510 }
 511 #endif /* CONFIG_VSX */
 512
 513 #ifdef CONFIG_SPE
 514
 515 /*
 516  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 517  *
 518  * struct {
 519  *   u32 evr[32];
 520  *   u64 acc;
 521  *   u32 spefscr;
 522  * }
 523  */
 524
 525 static int evr_active(struct task_struct *target,
 526                       const struct user_regset *regset)
 527 {
 528         flush_spe_to_thread(target);
 529         return target->thread.used_spe ? regset->n : 0;
 530 }
 531
 532 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 533                    unsigned int pos, unsigned int count,
 534                    void *kbuf, void __user *ubuf)
 535 {
 536         int ret;
 537
 538         flush_spe_to_thread(target);
 539
 540         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 541                                   &target->thread.evr,
 542                                   0, sizeof(target->thread.evr));
 543
 544         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 545                      offsetof(struct thread_struct, spefscr));
 546
 547         if (!ret)
 548                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 549                                           &target->thread.acc,
 550                                           sizeof(target->thread.evr), -1);
 551
 552         return ret;
 553 }
 554
 555 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 556                    unsigned int pos, unsigned int count,
 557                    const void *kbuf, const void __user *ubuf)
 558 {
 559         int ret;
 560
 561         flush_spe_to_thread(target);
 562
 563         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 564                                  &target->thread.evr,
 565                                  0, sizeof(target->thread.evr));
 566
 567         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 568                      offsetof(struct thread_struct, spefscr));
 569
 570         if (!ret)
 571                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 572                                          &target->thread.acc,
 573                                          sizeof(target->thread.evr), -1);
 574
 575         return ret;
 576 }
 577 #endif /* CONFIG_SPE */
 578
 579
 580 /*
 581  * These are our native regset flavors.
 582  */
 583 enum powerpc_regset {
 584         REGSET_GPR,
 585         REGSET_FPR,
 586 #ifdef CONFIG_ALTIVEC
 587         REGSET_VMX,
 588 #endif
 589 #ifdef CONFIG_VSX
 590         REGSET_VSX,
 591 #endif
 592 #ifdef CONFIG_SPE
 593         REGSET_SPE,
 594 #endif
 595 };
 596
 597 static const struct user_regset native_regsets[] = {
 598         [REGSET_GPR] = {
 599                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 600                 .size = sizeof(long), .align = sizeof(long),
 601                 .get = gpr_get, .set = gpr_set
 602         },
 603         [REGSET_FPR] = {
 604                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 605                 .size = sizeof(double), .align = sizeof(double),
 606                 .get = fpr_get, .set = fpr_set
 607         },
 608 #ifdef CONFIG_ALTIVEC
 609         [REGSET_VMX] = {
 610                 .core_note_type = NT_PPC_VMX, .n = 34,
 611                 .size = sizeof(vector128), .align = sizeof(vector128),
 612                 .active = vr_active, .get = vr_get, .set = vr_set
 613         },
 614 #endif
 615 #ifdef CONFIG_VSX
 616         [REGSET_VSX] = {
 617                 .core_note_type = NT_PPC_VSX, .n = 32,
 618                 .size = sizeof(double), .align = sizeof(double),
 619                 .active = vsr_active, .get = vsr_get, .set = vsr_set
 620         },
 621 #endif
 622 #ifdef CONFIG_SPE
 623         [REGSET_SPE] = {
 624                 .n = 35,
 625                 .size = sizeof(u32), .align = sizeof(u32),
 626                 .active = evr_active, .get = evr_get, .set = evr_set
 627         },
 628 #endif
 629 };
 630
 631 static const struct user_regset_view user_ppc_native_view = {
 632         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
 633         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
 634 };
 635
 636 #ifdef CONFIG_PPC64
 637 #include <linux/compat.h>
 638
 639 static int gpr32_get(struct task_struct *target,
 640                      const struct user_regset *regset,
 641                      unsigned int pos, unsigned int count,
 642                      void *kbuf, void __user *ubuf)
 643 {
 644         const unsigned long *regs = &target->thread.regs->gpr[0];
 645         compat_ulong_t *k = kbuf;
 646         compat_ulong_t __user *u = ubuf;
 647         compat_ulong_t reg;
 648         int i;
 649
 650         if (target->thread.regs == NULL)
 651                 return -EIO;
 652
 653         if (!FULL_REGS(target->thread.regs)) {
 654                 /* We have a partial register set.  Fill 14-31 with bogus values */
 655                 for (i = 14; i < 32; i++)
 656                         target->thread.regs->gpr[i] = NV_REG_POISON;
 657         }
 658
 659         pos /= sizeof(reg);
 660         count /= sizeof(reg);
 661
 662         if (kbuf)
 663                 for (; count > 0 && pos < PT_MSR; --count)
 664                         *k++ = regs[pos++];
 665         else
 666                 for (; count > 0 && pos < PT_MSR; --count)
 667                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 668                                 return -EFAULT;
 669
 670         if (count > 0 && pos == PT_MSR) {
 671                 reg = get_user_msr(target);
 672                 if (kbuf)
 673                         *k++ = reg;
 674                 else if (__put_user(reg, u++))
 675                         return -EFAULT;
 676                 ++pos;
 677                 --count;
 678         }
 679
 680         if (kbuf)
 681                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 682                         *k++ = regs[pos++];
 683         else
 684                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 685                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 686                                 return -EFAULT;
 687
 688         kbuf = k;
 689         ubuf = u;
 690         pos *= sizeof(reg);
 691         count *= sizeof(reg);
 692         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 693                                         PT_REGS_COUNT * sizeof(reg), -1);
 694 }
 695
 696 static int gpr32_set(struct task_struct *target,
 697                      const struct user_regset *regset,
 698                      unsigned int pos, unsigned int count,
 699                      const void *kbuf, const void __user *ubuf)
 700 {
 701         unsigned long *regs = &target->thread.regs->gpr[0];
 702         const compat_ulong_t *k = kbuf;
 703         const compat_ulong_t __user *u = ubuf;
 704         compat_ulong_t reg;
 705
 706         if (target->thread.regs == NULL)
 707                 return -EIO;
 708
 709         CHECK_FULL_REGS(target->thread.regs);
 710
 711         pos /= sizeof(reg);
 712         count /= sizeof(reg);
 713
 714         if (kbuf)
 715                 for (; count > 0 && pos < PT_MSR; --count)
 716                         regs[pos++] = *k++;
 717         else
 718                 for (; count > 0 && pos < PT_MSR; --count) {
 719                         if (__get_user(reg, u++))
 720                                 return -EFAULT;
 721                         regs[pos++] = reg;
 722                 }
 723
 724
 725         if (count > 0 && pos == PT_MSR) {
 726                 if (kbuf)
 727                         reg = *k++;
 728                 else if (__get_user(reg, u++))
 729                         return -EFAULT;
 730                 set_user_msr(target, reg);
 731                 ++pos;
 732                 --count;
 733         }
 734
 735         if (kbuf) {
 736                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
 737                         regs[pos++] = *k++;
 738                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 739                         ++k;
 740         } else {
 741                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
 742                         if (__get_user(reg, u++))
 743                                 return -EFAULT;
 744                         regs[pos++] = reg;
 745                 }
 746                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 747                         if (__get_user(reg, u++))
 748                                 return -EFAULT;
 749         }
 750
 751         if (count > 0 && pos == PT_TRAP) {
 752                 if (kbuf)
 753                         reg = *k++;
 754                 else if (__get_user(reg, u++))
 755                         return -EFAULT;
 756                 set_user_trap(target, reg);
 757                 ++pos;
 758                 --count;
 759         }
 760
 761         kbuf = k;
 762         ubuf = u;
 763         pos *= sizeof(reg);
 764         count *= sizeof(reg);
 765         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 766                                          (PT_TRAP + 1) * sizeof(reg), -1);
 767 }
 768
 769 /*
 770  * These are the regset flavors matching the CONFIG_PPC32 native set.
 771  */
 772 static const struct user_regset compat_regsets[] = {
 773         [REGSET_GPR] = {
 774                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 775                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
 776                 .get = gpr32_get, .set = gpr32_set
 777         },
 778         [REGSET_FPR] = {
 779                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 780                 .size = sizeof(double), .align = sizeof(double),
 781                 .get = fpr_get, .set = fpr_set
 782         },
 783 #ifdef CONFIG_ALTIVEC
 784         [REGSET_VMX] = {
 785                 .core_note_type = NT_PPC_VMX, .n = 34,
 786                 .size = sizeof(vector128), .align = sizeof(vector128),
 787                 .active = vr_active, .get = vr_get, .set = vr_set
 788         },
 789 #endif
 790 #ifdef CONFIG_SPE
 791         [REGSET_SPE] = {
 792                 .core_note_type = NT_PPC_SPE, .n = 35,
 793                 .size = sizeof(u32), .align = sizeof(u32),
 794                 .active = evr_active, .get = evr_get, .set = evr_set
 795         },
 796 #endif
 797 };
 798
 799 static const struct user_regset_view user_ppc_compat_view = {
 800         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
 801         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
 802 };
 803 #endif  /* CONFIG_PPC64 */
 804
 805 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 806 {
 807 #ifdef CONFIG_PPC64
 808         if (test_tsk_thread_flag(task, TIF_32BIT))
 809                 return &user_ppc_compat_view;
 810 #endif
 811         return &user_ppc_native_view;
 812 }
 813
 814
 815 void user_enable_single_step(struct task_struct *task)
 816 {
 817         struct pt_regs *regs = task->thread.regs;
 818
 819         if (regs != NULL) {
 820 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 821                 task->thread.dbcr0 &= ~DBCR0_BT;
 822                 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
 823                 regs->msr |= MSR_DE;
 824 #else
 825                 regs->msr &= ~MSR_BE;
 826                 regs->msr |= MSR_SE;
 827 #endif
 828         }
 829         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 830 }
 831
 832 void user_enable_block_step(struct task_struct *task)
 833 {
 834         struct pt_regs *regs = task->thread.regs;
 835
 836         if (regs != NULL) {
 837 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 838                 task->thread.dbcr0 &= ~DBCR0_IC;
 839                 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
 840                 regs->msr |= MSR_DE;
 841 #else
 842                 regs->msr &= ~MSR_SE;
 843                 regs->msr |= MSR_BE;
 844 #endif
 845         }
 846         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 847 }
 848
 849 void user_disable_single_step(struct task_struct *task)
 850 {
 851         struct pt_regs *regs = task->thread.regs;
 852
 853         if (regs != NULL) {
 854 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 855                 /*
 856                  * The logic to disable single stepping should be as
 857                  * simple as turning off the Instruction Complete flag.
 858                  * And, after doing so, if all debug flags are off, turn
 859                  * off DBCR0(IDM) and MSR(DE) .... Torez
 860                  */
 861                 task->thread.dbcr0 &= ~DBCR0_IC;
 862                 /*
 863                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
 864                  */
 865                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 866                                         task->thread.dbcr1)) {
 867                         /*
 868                          * All debug events were off.....
 869                          */
 870                         task->thread.dbcr0 &= ~DBCR0_IDM;
 871                         regs->msr &= ~MSR_DE;
 872                 }
 873 #else
 874                 regs->msr &= ~(MSR_SE | MSR_BE);
 875 #endif
 876         }
 877         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
 878 }
 879
 880 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 881 void ptrace_triggered(struct perf_event *bp, int nmi,
 882                       struct perf_sample_data *data, struct pt_regs *regs)
 883 {
 884         struct perf_event_attr attr;
 885
 886         /*
 887          * Disable the breakpoint request here since ptrace has defined a
 888          * one-shot behaviour for breakpoint exceptions in PPC64.
 889          * The SIGTRAP signal is generated automatically for us in do_dabr().
 890          * We don't have to do anything about that here
 891          */
 892         attr = bp->attr;
 893         attr.disabled = true;
 894         modify_user_hw_breakpoint(bp, &attr);
 895 }
 896 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 897
 898 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 899                                unsigned long data)
 900 {
 901 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 902         int ret;
 903         struct thread_struct *thread = &(task->thread);
 904         struct perf_event *bp;
 905         struct perf_event_attr attr;
 906 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 907
 908         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
 909          *  For embedded processors we support one DAC and no IAC's at the
 910          *  moment.
 911          */
 912         if (addr > 0)
 913                 return -EINVAL;
 914
 915         /* The bottom 3 bits in dabr are flags */
 916         if ((data & ~0x7UL) >= TASK_SIZE)
 917                 return -EIO;
 918
 919 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 920         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
 921          *  It was assumed, on previous implementations, that 3 bits were
 922          *  passed together with the data address, fitting the design of the
 923          *  DABR register, as follows:
 924          *
 925          *  bit 0: Read flag
 926          *  bit 1: Write flag
 927          *  bit 2: Breakpoint translation
 928          *
 929          *  Thus, we use them here as so.
 930          */
 931
 932         /* Ensure breakpoint translation bit is set */
 933         if (data && !(data & DABR_TRANSLATION))
 934                 return -EIO;
 935 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 936         if (ptrace_get_breakpoints(task) < 0)
 937                 return -ESRCH;
 938
 939         bp = thread->ptrace_bps[0];
 940         if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
 941                 if (bp) {
 942                         unregister_hw_breakpoint(bp);
 943                         thread->ptrace_bps[0] = NULL;
 944                 }
 945                 ptrace_put_breakpoints(task);
 946                 return 0;
 947         }
 948         if (bp) {
 949                 attr = bp->attr;
 950                 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 951                 arch_bp_generic_fields(data &
 952                                         (DABR_DATA_WRITE | DABR_DATA_READ),
 953                                                         &attr.bp_type);
 954                 ret =  modify_user_hw_breakpoint(bp, &attr);
 955                 if (ret) {
 956                         ptrace_put_breakpoints(task);
 957                         return ret;
 958                 }
 959                 thread->ptrace_bps[0] = bp;
 960                 ptrace_put_breakpoints(task);
 961                 thread->dabr = data;
 962                 return 0;
 963         }
 964
 965         /* Create a new breakpoint request if one doesn't exist already */
 966         hw_breakpoint_init(&attr);
 967         attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 968         arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ),
 969                                                                 &attr.bp_type);
 970
 971         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
 972                                                         ptrace_triggered, task);
 973         if (IS_ERR(bp)) {
 974                 thread->ptrace_bps[0] = NULL;
 975                 ptrace_put_breakpoints(task);
 976                 return PTR_ERR(bp);
 977         }
 978
 979         ptrace_put_breakpoints(task);
 980
 981 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 982
 983         /* Move contents to the DABR register */
 984         task->thread.dabr = data;
 985 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
 986         /* As described above, it was assumed 3 bits were passed with the data
 987          *  address, but we will assume only the mode bits will be passed
 988          *  as to not cause alignment restrictions for DAC-based processors.
 989          */
 990
 991         /* DAC's hold the whole address without any mode flags */
 992         task->thread.dac1 = data & ~0x3UL;
 993
 994         if (task->thread.dac1 == 0) {
 995                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
 996                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 997                                         task->thread.dbcr1)) {
 998                         task->thread.regs->msr &= ~MSR_DE;
 999                         task->thread.dbcr0 &= ~DBCR0_IDM;
1000                 }
1001                 return 0;
1002         }
1003
1004         /* Read or Write bits must be set */
1005
1006         if (!(data & 0x3UL))
1007                 return -EINVAL;
1008
1009         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
1010            register */
1011         task->thread.dbcr0 |= DBCR0_IDM;
1012
1013         /* Check for write and read flags and set DBCR0
1014            accordingly */
1015         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
1016         if (data & 0x1UL)
1017                 dbcr_dac(task) |= DBCR_DAC1R;
1018         if (data & 0x2UL)
1019                 dbcr_dac(task) |= DBCR_DAC1W;
1020         task->thread.regs->msr |= MSR_DE;
1021 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1022         return 0;
1023 }
1024
1025 /*
1026  * Called by kernel/ptrace.c when detaching..
1027  *
1028  * Make sure single step bits etc are not set.
1029  */
1030 void ptrace_disable(struct task_struct *child)
1031 {
1032         /* make sure the single step bit is not set. */
1033         user_disable_single_step(child);
1034 }
1035
1036 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1037 static long set_intruction_bp(struct task_struct *child,
1038                               struct ppc_hw_breakpoint *bp_info)
1039 {
1040         int slot;
1041         int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
1042         int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
1043         int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
1044         int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
1045
1046         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1047                 slot2_in_use = 1;
1048         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1049                 slot4_in_use = 1;
1050
1051         if (bp_info->addr >= TASK_SIZE)
1052                 return -EIO;
1053
1054         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1055
1056                 /* Make sure range is valid. */
1057                 if (bp_info->addr2 >= TASK_SIZE)
1058                         return -EIO;
1059
1060                 /* We need a pair of IAC regsisters */
1061                 if ((!slot1_in_use) && (!slot2_in_use)) {
1062                         slot = 1;
1063                         child->thread.iac1 = bp_info->addr;
1064                         child->thread.iac2 = bp_info->addr2;
1065                         child->thread.dbcr0 |= DBCR0_IAC1;
1066                         if (bp_info->addr_mode ==
1067                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1068                                 dbcr_iac_range(child) |= DBCR_IAC12X;
1069                         else
1070                                 dbcr_iac_range(child) |= DBCR_IAC12I;
1071 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1072                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1073                         slot = 3;
1074                         child->thread.iac3 = bp_info->addr;
1075                         child->thread.iac4 = bp_info->addr2;
1076                         child->thread.dbcr0 |= DBCR0_IAC3;
1077                         if (bp_info->addr_mode ==
1078                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1079                                 dbcr_iac_range(child) |= DBCR_IAC34X;
1080                         else
1081                                 dbcr_iac_range(child) |= DBCR_IAC34I;
1082 #endif
1083                 } else
1084                         return -ENOSPC;
1085         } else {
1086                 /* We only need one.  If possible leave a pair free in
1087                  * case a range is needed later
1088                  */
1089                 if (!slot1_in_use) {
1090                         /*
1091                          * Don't use iac1 if iac1-iac2 are free and either
1092                          * iac3 or iac4 (but not both) are free
1093                          */
1094                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1095                                 slot = 1;
1096                                 child->thread.iac1 = bp_info->addr;
1097                                 child->thread.dbcr0 |= DBCR0_IAC1;
1098                                 goto out;
1099                         }
1100                 }
1101                 if (!slot2_in_use) {
1102                         slot = 2;
1103                         child->thread.iac2 = bp_info->addr;
1104                         child->thread.dbcr0 |= DBCR0_IAC2;
1105 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1106                 } else if (!slot3_in_use) {
1107                         slot = 3;
1108                         child->thread.iac3 = bp_info->addr;
1109                         child->thread.dbcr0 |= DBCR0_IAC3;
1110                 } else if (!slot4_in_use) {
1111                         slot = 4;
1112                         child->thread.iac4 = bp_info->addr;
1113                         child->thread.dbcr0 |= DBCR0_IAC4;
1114 #endif
1115                 } else
1116                         return -ENOSPC;
1117         }
1118 out:
1119         child->thread.dbcr0 |= DBCR0_IDM;
1120         child->thread.regs->msr |= MSR_DE;
1121
1122         return slot;
1123 }
1124
1125 static int del_instruction_bp(struct task_struct *child, int slot)
1126 {
1127         switch (slot) {
1128         case 1:
1129                 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1130                         return -ENOENT;
1131
1132                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1133                         /* address range - clear slots 1 & 2 */
1134                         child->thread.iac2 = 0;
1135                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1136                 }
1137                 child->thread.iac1 = 0;
1138                 child->thread.dbcr0 &= ~DBCR0_IAC1;
1139                 break;
1140         case 2:
1141                 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1142                         return -ENOENT;
1143
1144                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1145                         /* used in a range */
1146                         return -EINVAL;
1147                 child->thread.iac2 = 0;
1148                 child->thread.dbcr0 &= ~DBCR0_IAC2;
1149                 break;
1150 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1151         case 3:
1152                 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1153                         return -ENOENT;
1154
1155                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1156                         /* address range - clear slots 3 & 4 */
1157                         child->thread.iac4 = 0;
1158                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1159                 }
1160                 child->thread.iac3 = 0;
1161                 child->thread.dbcr0 &= ~DBCR0_IAC3;
1162                 break;
1163         case 4:
1164                 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1165                         return -ENOENT;
1166
1167                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1168                         /* Used in a range */
1169                         return -EINVAL;
1170                 child->thread.iac4 = 0;
1171                 child->thread.dbcr0 &= ~DBCR0_IAC4;
1172                 break;
1173 #endif
1174         default:
1175                 return -EINVAL;
1176         }
1177         return 0;
1178 }
1179
1180 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1181 {
1182         int byte_enable =
1183                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1184                 & 0xf;
1185         int condition_mode =
1186                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1187         int slot;
1188
1189         if (byte_enable && (condition_mode == 0))
1190                 return -EINVAL;
1191
1192         if (bp_info->addr >= TASK_SIZE)
1193                 return -EIO;
1194
1195         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1196                 slot = 1;
1197                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1198                         dbcr_dac(child) |= DBCR_DAC1R;
1199                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1200                         dbcr_dac(child) |= DBCR_DAC1W;
1201                 child->thread.dac1 = (unsigned long)bp_info->addr;
1202 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1203                 if (byte_enable) {
1204                         child->thread.dvc1 =
1205                                 (unsigned long)bp_info->condition_value;
1206                         child->thread.dbcr2 |=
1207                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1208                                  (condition_mode << DBCR2_DVC1M_SHIFT));
1209                 }
1210 #endif
1211 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1212         } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1213                 /* Both dac1 and dac2 are part of a range */
1214                 return -ENOSPC;
1215 #endif
1216         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1217                 slot = 2;
1218                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1219                         dbcr_dac(child) |= DBCR_DAC2R;
1220                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1221                         dbcr_dac(child) |= DBCR_DAC2W;
1222                 child->thread.dac2 = (unsigned long)bp_info->addr;
1223 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1224                 if (byte_enable) {
1225                         child->thread.dvc2 =
1226                                 (unsigned long)bp_info->condition_value;
1227                         child->thread.dbcr2 |=
1228                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1229                                  (condition_mode << DBCR2_DVC2M_SHIFT));
1230                 }
1231 #endif
1232         } else
1233                 return -ENOSPC;
1234         child->thread.dbcr0 |= DBCR0_IDM;
1235         child->thread.regs->msr |= MSR_DE;
1236
1237         return slot + 4;
1238 }
1239
1240 static int del_dac(struct task_struct *child, int slot)
1241 {
1242         if (slot == 1) {
1243                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1244                         return -ENOENT;
1245
1246                 child->thread.dac1 = 0;
1247                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1248 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1249                 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1250                         child->thread.dac2 = 0;
1251                         child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1252                 }
1253                 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1254 #endif
1255 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1256                 child->thread.dvc1 = 0;
1257 #endif
1258         } else if (slot == 2) {
1259                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1260                         return -ENOENT;
1261
1262 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1263                 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1264                         /* Part of a range */
1265                         return -EINVAL;
1266                 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1267 #endif
1268 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1269                 child->thread.dvc2 = 0;
1270 #endif
1271                 child->thread.dac2 = 0;
1272                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1273         } else
1274                 return -EINVAL;
1275
1276         return 0;
1277 }
1278 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1279
1280 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1281 static int set_dac_range(struct task_struct *child,
1282                          struct ppc_hw_breakpoint *bp_info)
1283 {
1284         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1285
1286         /* We don't allow range watchpoints to be used with DVC */
1287         if (bp_info->condition_mode)
1288                 return -EINVAL;
1289
1290         /*
1291          * Best effort to verify the address range.  The user/supervisor bits
1292          * prevent trapping in kernel space, but let's fail on an obvious bad
1293          * range.  The simple test on the mask is not fool-proof, and any
1294          * exclusive range will spill over into kernel space.
1295          */
1296         if (bp_info->addr >= TASK_SIZE)
1297                 return -EIO;
1298         if (mode == PPC_BREAKPOINT_MODE_MASK) {
1299                 /*
1300                  * dac2 is a bitmask.  Don't allow a mask that makes a
1301                  * kernel space address from a valid dac1 value
1302                  */
1303                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1304                         return -EIO;
1305         } else {
1306                 /*
1307                  * For range breakpoints, addr2 must also be a valid address
1308                  */
1309                 if (bp_info->addr2 >= TASK_SIZE)
1310                         return -EIO;
1311         }
1312
1313         if (child->thread.dbcr0 &
1314             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1315                 return -ENOSPC;
1316
1317         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1318                 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1319         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1320                 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1321         child->thread.dac1 = bp_info->addr;
1322         child->thread.dac2 = bp_info->addr2;
1323         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1324                 child->thread.dbcr2  |= DBCR2_DAC12M;
1325         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1326                 child->thread.dbcr2  |= DBCR2_DAC12MX;
1327         else    /* PPC_BREAKPOINT_MODE_MASK */
1328                 child->thread.dbcr2  |= DBCR2_DAC12MM;
1329         child->thread.regs->msr |= MSR_DE;
1330
1331         return 5;
1332 }
1333 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1334
1335 static long ppc_set_hwdebug(struct task_struct *child,
1336                      struct ppc_hw_breakpoint *bp_info)
1337 {
1338 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
1339         unsigned long dabr;
1340 #endif
1341
1342         if (bp_info->version != 1)
1343                 return -ENOTSUPP;
1344 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1345         /*
1346          * Check for invalid flags and combinations
1347          */
1348         if ((bp_info->trigger_type == 0) ||
1349             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1350                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
1351             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1352             (bp_info->condition_mode &
1353              ~(PPC_BREAKPOINT_CONDITION_MODE |
1354                PPC_BREAKPOINT_CONDITION_BE_ALL)))
1355                 return -EINVAL;
1356 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1357         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1358                 return -EINVAL;
1359 #endif
1360
1361         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1362                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1363                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1364                         return -EINVAL;
1365                 return set_intruction_bp(child, bp_info);
1366         }
1367         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1368                 return set_dac(child, bp_info);
1369
1370 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1371         return set_dac_range(child, bp_info);
1372 #else
1373         return -EINVAL;
1374 #endif
1375 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1376         /*
1377          * We only support one data breakpoint
1378          */
1379         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
1380             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
1381             bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
1382             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1383                 return -EINVAL;
1384
1385         if (child->thread.dabr)
1386                 return -ENOSPC;
1387
1388         if ((unsigned long)bp_info->addr >= TASK_SIZE)
1389                 return -EIO;
1390
1391         dabr = (unsigned long)bp_info->addr & ~7UL;
1392         dabr |= DABR_TRANSLATION;
1393         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1394                 dabr |= DABR_DATA_READ;
1395         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1396                 dabr |= DABR_DATA_WRITE;
1397
1398         child->thread.dabr = dabr;
1399
1400         return 1;
1401 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1402 }
1403
1404 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1405 {
1406 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1407         int rc;
1408
1409         if (data <= 4)
1410                 rc = del_instruction_bp(child, (int)data);
1411         else
1412                 rc = del_dac(child, (int)data - 4);
1413
1414         if (!rc) {
1415                 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1416                                         child->thread.dbcr1)) {
1417                         child->thread.dbcr0 &= ~DBCR0_IDM;
1418                         child->thread.regs->msr &= ~MSR_DE;
1419                 }
1420         }
1421         return rc;
1422 #else
1423         if (data != 1)
1424                 return -EINVAL;
1425         if (child->thread.dabr == 0)
1426                 return -ENOENT;
1427
1428         child->thread.dabr = 0;
1429
1430         return 0;
1431 #endif
1432 }
1433
1434 /*
1435  * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1436  * we mark them as obsolete now, they will be removed in a future version
1437  */
1438 static long arch_ptrace_old(struct task_struct *child, long request,
1439                             unsigned long addr, unsigned long data)
1440 {
1441         void __user *datavp = (void __user *) data;
1442
1443         switch (request) {
1444         case PPC_PTRACE_GETREGS:        /* Get GPRs 0 - 31. */
1445                 return copy_regset_to_user(child, &user_ppc_native_view,
1446                                            REGSET_GPR, 0, 32 * sizeof(long),
1447                                            datavp);
1448
1449         case PPC_PTRACE_SETREGS:        /* Set GPRs 0 - 31. */
1450                 return copy_regset_from_user(child, &user_ppc_native_view,
1451                                              REGSET_GPR, 0, 32 * sizeof(long),
1452                                              datavp);
1453
1454         case PPC_PTRACE_GETFPREGS:      /* Get FPRs 0 - 31. */
1455                 return copy_regset_to_user(child, &user_ppc_native_view,
1456                                            REGSET_FPR, 0, 32 * sizeof(double),
1457                                            datavp);
1458
1459         case PPC_PTRACE_SETFPREGS:      /* Set FPRs 0 - 31. */
1460                 return copy_regset_from_user(child, &user_ppc_native_view,
1461                                              REGSET_FPR, 0, 32 * sizeof(double),
1462                                              datavp);
1463         }
1464
1465         return -EPERM;
1466 }
1467
1468 long arch_ptrace(struct task_struct *child, long request,
1469                  unsigned long addr, unsigned long data)
1470 {
1471         int ret = -EPERM;
1472         void __user *datavp = (void __user *) data;
1473         unsigned long __user *datalp = datavp;
1474
1475         switch (request) {
1476         /* read the word at location addr in the USER area. */
1477         case PTRACE_PEEKUSR: {
1478                 unsigned long index, tmp;
1479
1480                 ret = -EIO;
1481                 /* convert to index and check */
1482 #ifdef CONFIG_PPC32
1483                 index = addr >> 2;
1484                 if ((addr & 3) || (index > PT_FPSCR)
1485                     || (child->thread.regs == NULL))
1486 #else
1487                 index = addr >> 3;
1488                 if ((addr & 7) || (index > PT_FPSCR))
1489 #endif
1490                         break;
1491
1492                 CHECK_FULL_REGS(child->thread.regs);
1493                 if (index < PT_FPR0) {
1494                         tmp = ptrace_get_reg(child, (int) index);
1495                 } else {
1496                         flush_fp_to_thread(child);
1497                         tmp = ((unsigned long *)child->thread.fpr)
1498                                 [TS_FPRWIDTH * (index - PT_FPR0)];
1499                 }
1500                 ret = put_user(tmp, datalp);
1501                 break;
1502         }
1503
1504         /* write the word at location addr in the USER area */
1505         case PTRACE_POKEUSR: {
1506                 unsigned long index;
1507
1508                 ret = -EIO;
1509                 /* convert to index and check */
1510 #ifdef CONFIG_PPC32
1511                 index = addr >> 2;
1512                 if ((addr & 3) || (index > PT_FPSCR)
1513                     || (child->thread.regs == NULL))
1514 #else
1515                 index = addr >> 3;
1516                 if ((addr & 7) || (index > PT_FPSCR))
1517 #endif
1518                         break;
1519
1520                 CHECK_FULL_REGS(child->thread.regs);
1521                 if (index < PT_FPR0) {
1522                         ret = ptrace_put_reg(child, index, data);
1523                 } else {
1524                         flush_fp_to_thread(child);
1525                         ((unsigned long *)child->thread.fpr)
1526                                 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1527                         ret = 0;
1528                 }
1529                 break;
1530         }
1531
1532         case PPC_PTRACE_GETHWDBGINFO: {
1533                 struct ppc_debug_info dbginfo;
1534
1535                 dbginfo.version = 1;
1536 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1537                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1538                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1539                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1540                 dbginfo.data_bp_alignment = 4;
1541                 dbginfo.sizeof_condition = 4;
1542                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1543                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
1544 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1545                 dbginfo.features |=
1546                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1547                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
1548 #endif
1549 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1550                 dbginfo.num_instruction_bps = 0;
1551                 dbginfo.num_data_bps = 1;
1552                 dbginfo.num_condition_regs = 0;
1553 #ifdef CONFIG_PPC64
1554                 dbginfo.data_bp_alignment = 8;
1555 #else
1556                 dbginfo.data_bp_alignment = 4;
1557 #endif
1558                 dbginfo.sizeof_condition = 0;
1559                 dbginfo.features = 0;
1560 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1561
1562                 if (!access_ok(VERIFY_WRITE, datavp,
1563                                sizeof(struct ppc_debug_info)))
1564                         return -EFAULT;
1565                 ret = __copy_to_user(datavp, &dbginfo,
1566                                      sizeof(struct ppc_debug_info)) ?
1567                       -EFAULT : 0;
1568                 break;
1569         }
1570
1571         case PPC_PTRACE_SETHWDEBUG: {
1572                 struct ppc_hw_breakpoint bp_info;
1573
1574                 if (!access_ok(VERIFY_READ, datavp,
1575                                sizeof(struct ppc_hw_breakpoint)))
1576                         return -EFAULT;
1577                 ret = __copy_from_user(&bp_info, datavp,
1578                                        sizeof(struct ppc_hw_breakpoint)) ?
1579                       -EFAULT : 0;
1580                 if (!ret)
1581                         ret = ppc_set_hwdebug(child, &bp_info);
1582                 break;
1583         }
1584
1585         case PPC_PTRACE_DELHWDEBUG: {
1586                 ret = ppc_del_hwdebug(child, addr, data);
1587                 break;
1588         }
1589
1590         case PTRACE_GET_DEBUGREG: {
1591                 ret = -EINVAL;
1592                 /* We only support one DABR and no IABRS at the moment */
1593                 if (addr > 0)
1594                         break;
1595 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1596                 ret = put_user(child->thread.dac1, datalp);
1597 #else
1598                 ret = put_user(child->thread.dabr, datalp);
1599 #endif
1600                 break;
1601         }
1602
1603         case PTRACE_SET_DEBUGREG:
1604                 ret = ptrace_set_debugreg(child, addr, data);
1605                 break;
1606
1607 #ifdef CONFIG_PPC64
1608         case PTRACE_GETREGS64:
1609 #endif
1610         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
1611                 return copy_regset_to_user(child, &user_ppc_native_view,
1612                                            REGSET_GPR,
1613                                            0, sizeof(struct pt_regs),
1614                                            datavp);
1615
1616 #ifdef CONFIG_PPC64
1617         case PTRACE_SETREGS64:
1618 #endif
1619         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
1620                 return copy_regset_from_user(child, &user_ppc_native_view,
1621                                              REGSET_GPR,
1622                                              0, sizeof(struct pt_regs),
1623                                              datavp);
1624
1625         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1626                 return copy_regset_to_user(child, &user_ppc_native_view,
1627                                            REGSET_FPR,
1628                                            0, sizeof(elf_fpregset_t),
1629                                            datavp);
1630
1631         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1632                 return copy_regset_from_user(child, &user_ppc_native_view,
1633                                              REGSET_FPR,
1634                                              0, sizeof(elf_fpregset_t),
1635                                              datavp);
1636
1637 #ifdef CONFIG_ALTIVEC
1638         case PTRACE_GETVRREGS:
1639                 return copy_regset_to_user(child, &user_ppc_native_view,
1640                                            REGSET_VMX,
1641                                            0, (33 * sizeof(vector128) +
1642                                                sizeof(u32)),
1643                                            datavp);
1644
1645         case PTRACE_SETVRREGS:
1646                 return copy_regset_from_user(child, &user_ppc_native_view,
1647                                              REGSET_VMX,
1648                                              0, (33 * sizeof(vector128) +
1649                                                  sizeof(u32)),
1650                                              datavp);
1651 #endif
1652 #ifdef CONFIG_VSX
1653         case PTRACE_GETVSRREGS:
1654                 return copy_regset_to_user(child, &user_ppc_native_view,
1655                                            REGSET_VSX,
1656                                            0, 32 * sizeof(double),
1657                                            datavp);
1658
1659         case PTRACE_SETVSRREGS:
1660                 return copy_regset_from_user(child, &user_ppc_native_view,
1661                                              REGSET_VSX,
1662                                              0, 32 * sizeof(double),
1663                                              datavp);
1664 #endif
1665 #ifdef CONFIG_SPE
1666         case PTRACE_GETEVRREGS:
1667                 /* Get the child spe register state. */
1668                 return copy_regset_to_user(child, &user_ppc_native_view,
1669                                            REGSET_SPE, 0, 35 * sizeof(u32),
1670                                            datavp);
1671
1672         case PTRACE_SETEVRREGS:
1673                 /* Set the child spe register state. */
1674                 return copy_regset_from_user(child, &user_ppc_native_view,
1675                                              REGSET_SPE, 0, 35 * sizeof(u32),
1676                                              datavp);
1677 #endif
1678
1679         /* Old reverse args ptrace callss */
1680         case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1681         case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1682         case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1683         case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
1684                 ret = arch_ptrace_old(child, request, addr, data);
1685                 break;
1686
1687         default:
1688                 ret = ptrace_request(child, request, addr, data);
1689                 break;
1690         }
1691         return ret;
1692 }
1693
1694 /*
1695  * We must return the syscall number to actually look up in the table.
1696  * This can be -1L to skip running any syscall at all.
1697  */
1698 long do_syscall_trace_enter(struct pt_regs *regs)
1699 {
1700         long ret = 0;
1701
1702         secure_computing(regs->gpr[0]);
1703
1704         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1705             tracehook_report_syscall_entry(regs))
1706                 /*
1707                  * Tracing decided this syscall should not happen.
1708                  * We'll return a bogus call number to get an ENOSYS
1709                  * error, but leave the original number in regs->gpr[0].
1710                  */
1711                 ret = -1L;
1712
1713         if (unlikely(current->audit_context)) {
1714 #ifdef CONFIG_PPC64
1715                 if (!is_32bit_task())
1716                         audit_syscall_entry(AUDIT_ARCH_PPC64,
1717                                             regs->gpr[0],
1718                                             regs->gpr[3], regs->gpr[4],
1719                                             regs->gpr[5], regs->gpr[6]);
1720                 else
1721 #endif
1722                         audit_syscall_entry(AUDIT_ARCH_PPC,
1723                                             regs->gpr[0],
1724                                             regs->gpr[3] & 0xffffffff,
1725                                             regs->gpr[4] & 0xffffffff,
1726                                             regs->gpr[5] & 0xffffffff,
1727                                             regs->gpr[6] & 0xffffffff);
1728         }
1729
1730         return ret ?: regs->gpr[0];
1731 }
1732
1733 void do_syscall_trace_leave(struct pt_regs *regs)
1734 {
1735         int step;
1736
1737         if (unlikely(current->audit_context))
1738                 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1739                                    regs->result);
1740
1741         step = test_thread_flag(TIF_SINGLESTEP);
1742         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1743                 tracehook_report_syscall_exit(regs, step);
1744 }