arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #ifdef CONFIG_PPC32
  33 #include <linux/module.h>
  34 #endif
  35
  36 #include <asm/uaccess.h>
  37 #include <asm/page.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/system.h>
  40
  41 /*
  42  * The parameter save area on the stack is used to store arguments being passed
  43  * to callee function and is located at fixed offset from stack pointer.
  44  */
  45 #ifdef CONFIG_PPC32
  46 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  47 #else /* CONFIG_PPC32 */
  48 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  49 #endif
  50
  51 struct pt_regs_offset {
  52         const char *name;
  53         int offset;
  54 };
  55
  56 #define STR(s)  #s                      /* convert to string */
  57 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  58 #define GPR_OFFSET_NAME(num)    \
  59         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  60 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  61
  62 static const struct pt_regs_offset regoffset_table[] = {
  63         GPR_OFFSET_NAME(0),
  64         GPR_OFFSET_NAME(1),
  65         GPR_OFFSET_NAME(2),
  66         GPR_OFFSET_NAME(3),
  67         GPR_OFFSET_NAME(4),
  68         GPR_OFFSET_NAME(5),
  69         GPR_OFFSET_NAME(6),
  70         GPR_OFFSET_NAME(7),
  71         GPR_OFFSET_NAME(8),
  72         GPR_OFFSET_NAME(9),
  73         GPR_OFFSET_NAME(10),
  74         GPR_OFFSET_NAME(11),
  75         GPR_OFFSET_NAME(12),
  76         GPR_OFFSET_NAME(13),
  77         GPR_OFFSET_NAME(14),
  78         GPR_OFFSET_NAME(15),
  79         GPR_OFFSET_NAME(16),
  80         GPR_OFFSET_NAME(17),
  81         GPR_OFFSET_NAME(18),
  82         GPR_OFFSET_NAME(19),
  83         GPR_OFFSET_NAME(20),
  84         GPR_OFFSET_NAME(21),
  85         GPR_OFFSET_NAME(22),
  86         GPR_OFFSET_NAME(23),
  87         GPR_OFFSET_NAME(24),
  88         GPR_OFFSET_NAME(25),
  89         GPR_OFFSET_NAME(26),
  90         GPR_OFFSET_NAME(27),
  91         GPR_OFFSET_NAME(28),
  92         GPR_OFFSET_NAME(29),
  93         GPR_OFFSET_NAME(30),
  94         GPR_OFFSET_NAME(31),
  95         REG_OFFSET_NAME(nip),
  96         REG_OFFSET_NAME(msr),
  97         REG_OFFSET_NAME(ctr),
  98         REG_OFFSET_NAME(link),
  99         REG_OFFSET_NAME(xer),
 100         REG_OFFSET_NAME(ccr),
 101 #ifdef CONFIG_PPC64
 102         REG_OFFSET_NAME(softe),
 103 #else
 104         REG_OFFSET_NAME(mq),
 105 #endif
 106         REG_OFFSET_NAME(trap),
 107         REG_OFFSET_NAME(dar),
 108         REG_OFFSET_NAME(dsisr),
 109         REG_OFFSET_END,
 110 };
 111
 112 /**
 113  * regs_query_register_offset() - query register offset from its name
 114  * @name:       the name of a register
 115  *
 116  * regs_query_register_offset() returns the offset of a register in struct
 117  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 118  */
 119 int regs_query_register_offset(const char *name)
 120 {
 121         const struct pt_regs_offset *roff;
 122         for (roff = regoffset_table; roff->name != NULL; roff++)
 123                 if (!strcmp(roff->name, name))
 124                         return roff->offset;
 125         return -EINVAL;
 126 }
 127
 128 /**
 129  * regs_query_register_name() - query register name from its offset
 130  * @offset:     the offset of a register in struct pt_regs.
 131  *
 132  * regs_query_register_name() returns the name of a register from its
 133  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 134  */
 135 const char *regs_query_register_name(unsigned int offset)
 136 {
 137         const struct pt_regs_offset *roff;
 138         for (roff = regoffset_table; roff->name != NULL; roff++)
 139                 if (roff->offset == offset)
 140                         return roff->name;
 141         return NULL;
 142 }
 143
 144 /*
 145  * does not yet catch signals sent when the child dies.
 146  * in exit.c or in signal.c.
 147  */
 148
 149 /*
 150  * Set of msr bits that gdb can change on behalf of a process.
 151  */
 152 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 153 #define MSR_DEBUGCHANGE 0
 154 #else
 155 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 156 #endif
 157
 158 /*
 159  * Max register writeable via put_reg
 160  */
 161 #ifdef CONFIG_PPC32
 162 #define PT_MAX_PUT_REG  PT_MQ
 163 #else
 164 #define PT_MAX_PUT_REG  PT_CCR
 165 #endif
 166
 167 static unsigned long get_user_msr(struct task_struct *task)
 168 {
 169         return task->thread.regs->msr | task->thread.fpexc_mode;
 170 }
 171
 172 static int set_user_msr(struct task_struct *task, unsigned long msr)
 173 {
 174         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 175         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 176         return 0;
 177 }
 178
 179 /*
 180  * We prevent mucking around with the reserved area of trap
 181  * which are used internally by the kernel.
 182  */
 183 static int set_user_trap(struct task_struct *task, unsigned long trap)
 184 {
 185         task->thread.regs->trap = trap & 0xfff0;
 186         return 0;
 187 }
 188
 189 /*
 190  * Get contents of register REGNO in task TASK.
 191  */
 192 unsigned long ptrace_get_reg(struct task_struct *task, int regno)
 193 {
 194         if (task->thread.regs == NULL)
 195                 return -EIO;
 196
 197         if (regno == PT_MSR)
 198                 return get_user_msr(task);
 199
 200         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
 201                 return ((unsigned long *)task->thread.regs)[regno];
 202
 203         return -EIO;
 204 }
 205
 206 /*
 207  * Write contents of register REGNO in task TASK.
 208  */
 209 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 210 {
 211         if (task->thread.regs == NULL)
 212                 return -EIO;
 213
 214         if (regno == PT_MSR)
 215                 return set_user_msr(task, data);
 216         if (regno == PT_TRAP)
 217                 return set_user_trap(task, data);
 218
 219         if (regno <= PT_MAX_PUT_REG) {
 220                 ((unsigned long *)task->thread.regs)[regno] = data;
 221                 return 0;
 222         }
 223         return -EIO;
 224 }
 225
 226 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 227                    unsigned int pos, unsigned int count,
 228                    void *kbuf, void __user *ubuf)
 229 {
 230         int ret;
 231
 232         if (target->thread.regs == NULL)
 233                 return -EIO;
 234
 235         CHECK_FULL_REGS(target->thread.regs);
 236
 237         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 238                                   target->thread.regs,
 239                                   0, offsetof(struct pt_regs, msr));
 240         if (!ret) {
 241                 unsigned long msr = get_user_msr(target);
 242                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 243                                           offsetof(struct pt_regs, msr),
 244                                           offsetof(struct pt_regs, msr) +
 245                                           sizeof(msr));
 246         }
 247
 248         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 249                      offsetof(struct pt_regs, msr) + sizeof(long));
 250
 251         if (!ret)
 252                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 253                                           &target->thread.regs->orig_gpr3,
 254                                           offsetof(struct pt_regs, orig_gpr3),
 255                                           sizeof(struct pt_regs));
 256         if (!ret)
 257                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 258                                                sizeof(struct pt_regs), -1);
 259
 260         return ret;
 261 }
 262
 263 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 264                    unsigned int pos, unsigned int count,
 265                    const void *kbuf, const void __user *ubuf)
 266 {
 267         unsigned long reg;
 268         int ret;
 269
 270         if (target->thread.regs == NULL)
 271                 return -EIO;
 272
 273         CHECK_FULL_REGS(target->thread.regs);
 274
 275         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 276                                  target->thread.regs,
 277                                  0, PT_MSR * sizeof(reg));
 278
 279         if (!ret && count > 0) {
 280                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 281                                          PT_MSR * sizeof(reg),
 282                                          (PT_MSR + 1) * sizeof(reg));
 283                 if (!ret)
 284                         ret = set_user_msr(target, reg);
 285         }
 286
 287         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 288                      offsetof(struct pt_regs, msr) + sizeof(long));
 289
 290         if (!ret)
 291                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 292                                          &target->thread.regs->orig_gpr3,
 293                                          PT_ORIG_R3 * sizeof(reg),
 294                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 295
 296         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 297                 ret = user_regset_copyin_ignore(
 298                         &pos, &count, &kbuf, &ubuf,
 299                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 300                         PT_TRAP * sizeof(reg));
 301
 302         if (!ret && count > 0) {
 303                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 304                                          PT_TRAP * sizeof(reg),
 305                                          (PT_TRAP + 1) * sizeof(reg));
 306                 if (!ret)
 307                         ret = set_user_trap(target, reg);
 308         }
 309
 310         if (!ret)
 311                 ret = user_regset_copyin_ignore(
 312                         &pos, &count, &kbuf, &ubuf,
 313                         (PT_TRAP + 1) * sizeof(reg), -1);
 314
 315         return ret;
 316 }
 317
 318 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 319                    unsigned int pos, unsigned int count,
 320                    void *kbuf, void __user *ubuf)
 321 {
 322 #ifdef CONFIG_VSX
 323         double buf[33];
 324         int i;
 325 #endif
 326         flush_fp_to_thread(target);
 327
 328 #ifdef CONFIG_VSX
 329         /* copy to local buffer then write that out */
 330         for (i = 0; i < 32 ; i++)
 331                 buf[i] = target->thread.TS_FPR(i);
 332         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 333         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 334
 335 #else
 336         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 337                      offsetof(struct thread_struct, TS_FPR(32)));
 338
 339         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 340                                    &target->thread.fpr, 0, -1);
 341 #endif
 342 }
 343
 344 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 345                    unsigned int pos, unsigned int count,
 346                    const void *kbuf, const void __user *ubuf)
 347 {
 348 #ifdef CONFIG_VSX
 349         double buf[33];
 350         int i;
 351 #endif
 352         flush_fp_to_thread(target);
 353
 354 #ifdef CONFIG_VSX
 355         /* copy to local buffer then write that out */
 356         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 357         if (i)
 358                 return i;
 359         for (i = 0; i < 32 ; i++)
 360                 target->thread.TS_FPR(i) = buf[i];
 361         memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
 362         return 0;
 363 #else
 364         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 365                      offsetof(struct thread_struct, TS_FPR(32)));
 366
 367         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 368                                   &target->thread.fpr, 0, -1);
 369 #endif
 370 }
 371
 372 #ifdef CONFIG_ALTIVEC
 373 /*
 374  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 375  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 376  * corresponding vector registers.  Quadword 32 contains the vscr as the
 377  * last word (offset 12) within that quadword.  Quadword 33 contains the
 378  * vrsave as the first word (offset 0) within the quadword.
 379  *
 380  * This definition of the VMX state is compatible with the current PPC32
 381  * ptrace interface.  This allows signal handling and ptrace to use the
 382  * same structures.  This also simplifies the implementation of a bi-arch
 383  * (combined (32- and 64-bit) gdb.
 384  */
 385
 386 static int vr_active(struct task_struct *target,
 387                      const struct user_regset *regset)
 388 {
 389         flush_altivec_to_thread(target);
 390         return target->thread.used_vr ? regset->n : 0;
 391 }
 392
 393 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 394                   unsigned int pos, unsigned int count,
 395                   void *kbuf, void __user *ubuf)
 396 {
 397         int ret;
 398
 399         flush_altivec_to_thread(target);
 400
 401         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 402                      offsetof(struct thread_struct, vr[32]));
 403
 404         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 405                                   &target->thread.vr, 0,
 406                                   33 * sizeof(vector128));
 407         if (!ret) {
 408                 /*
 409                  * Copy out only the low-order word of vrsave.
 410                  */
 411                 union {
 412                         elf_vrreg_t reg;
 413                         u32 word;
 414                 } vrsave;
 415                 memset(&vrsave, 0, sizeof(vrsave));
 416                 vrsave.word = target->thread.vrsave;
 417                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 418                                           33 * sizeof(vector128), -1);
 419         }
 420
 421         return ret;
 422 }
 423
 424 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 425                   unsigned int pos, unsigned int count,
 426                   const void *kbuf, const void __user *ubuf)
 427 {
 428         int ret;
 429
 430         flush_altivec_to_thread(target);
 431
 432         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 433                      offsetof(struct thread_struct, vr[32]));
 434
 435         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 436                                  &target->thread.vr, 0, 33 * sizeof(vector128));
 437         if (!ret && count > 0) {
 438                 /*
 439                  * We use only the first word of vrsave.
 440                  */
 441                 union {
 442                         elf_vrreg_t reg;
 443                         u32 word;
 444                 } vrsave;
 445                 memset(&vrsave, 0, sizeof(vrsave));
 446                 vrsave.word = target->thread.vrsave;
 447                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 448                                          33 * sizeof(vector128), -1);
 449                 if (!ret)
 450                         target->thread.vrsave = vrsave.word;
 451         }
 452
 453         return ret;
 454 }
 455 #endif /* CONFIG_ALTIVEC */
 456
 457 #ifdef CONFIG_VSX
 458 /*
 459  * Currently to set and and get all the vsx state, you need to call
 460  * the fp and VMX calls aswell.  This only get/sets the lower 32
 461  * 128bit VSX registers.
 462  */
 463
 464 static int vsr_active(struct task_struct *target,
 465                       const struct user_regset *regset)
 466 {
 467         flush_vsx_to_thread(target);
 468         return target->thread.used_vsr ? regset->n : 0;
 469 }
 470
 471 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 472                    unsigned int pos, unsigned int count,
 473                    void *kbuf, void __user *ubuf)
 474 {
 475         double buf[32];
 476         int ret, i;
 477
 478         flush_vsx_to_thread(target);
 479
 480         for (i = 0; i < 32 ; i++)
 481                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 482         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 483                                   buf, 0, 32 * sizeof(double));
 484
 485         return ret;
 486 }
 487
 488 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 489                    unsigned int pos, unsigned int count,
 490                    const void *kbuf, const void __user *ubuf)
 491 {
 492         double buf[32];
 493         int ret,i;
 494
 495         flush_vsx_to_thread(target);
 496
 497         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 498                                  buf, 0, 32 * sizeof(double));
 499         for (i = 0; i < 32 ; i++)
 500                 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 501
 502
 503         return ret;
 504 }
 505 #endif /* CONFIG_VSX */
 506
 507 #ifdef CONFIG_SPE
 508
 509 /*
 510  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 511  *
 512  * struct {
 513  *   u32 evr[32];
 514  *   u64 acc;
 515  *   u32 spefscr;
 516  * }
 517  */
 518
 519 static int evr_active(struct task_struct *target,
 520                       const struct user_regset *regset)
 521 {
 522         flush_spe_to_thread(target);
 523         return target->thread.used_spe ? regset->n : 0;
 524 }
 525
 526 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 527                    unsigned int pos, unsigned int count,
 528                    void *kbuf, void __user *ubuf)
 529 {
 530         int ret;
 531
 532         flush_spe_to_thread(target);
 533
 534         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 535                                   &target->thread.evr,
 536                                   0, sizeof(target->thread.evr));
 537
 538         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 539                      offsetof(struct thread_struct, spefscr));
 540
 541         if (!ret)
 542                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 543                                           &target->thread.acc,
 544                                           sizeof(target->thread.evr), -1);
 545
 546         return ret;
 547 }
 548
 549 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 550                    unsigned int pos, unsigned int count,
 551                    const void *kbuf, const void __user *ubuf)
 552 {
 553         int ret;
 554
 555         flush_spe_to_thread(target);
 556
 557         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 558                                  &target->thread.evr,
 559                                  0, sizeof(target->thread.evr));
 560
 561         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 562                      offsetof(struct thread_struct, spefscr));
 563
 564         if (!ret)
 565                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 566                                          &target->thread.acc,
 567                                          sizeof(target->thread.evr), -1);
 568
 569         return ret;
 570 }
 571 #endif /* CONFIG_SPE */
 572
 573
 574 /*
 575  * These are our native regset flavors.
 576  */
 577 enum powerpc_regset {
 578         REGSET_GPR,
 579         REGSET_FPR,
 580 #ifdef CONFIG_ALTIVEC
 581         REGSET_VMX,
 582 #endif
 583 #ifdef CONFIG_VSX
 584         REGSET_VSX,
 585 #endif
 586 #ifdef CONFIG_SPE
 587         REGSET_SPE,
 588 #endif
 589 };
 590
 591 static const struct user_regset native_regsets[] = {
 592         [REGSET_GPR] = {
 593                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 594                 .size = sizeof(long), .align = sizeof(long),
 595                 .get = gpr_get, .set = gpr_set
 596         },
 597         [REGSET_FPR] = {
 598                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 599                 .size = sizeof(double), .align = sizeof(double),
 600                 .get = fpr_get, .set = fpr_set
 601         },
 602 #ifdef CONFIG_ALTIVEC
 603         [REGSET_VMX] = {
 604                 .core_note_type = NT_PPC_VMX, .n = 34,
 605                 .size = sizeof(vector128), .align = sizeof(vector128),
 606                 .active = vr_active, .get = vr_get, .set = vr_set
 607         },
 608 #endif
 609 #ifdef CONFIG_VSX
 610         [REGSET_VSX] = {
 611                 .core_note_type = NT_PPC_VSX, .n = 32,
 612                 .size = sizeof(double), .align = sizeof(double),
 613                 .active = vsr_active, .get = vsr_get, .set = vsr_set
 614         },
 615 #endif
 616 #ifdef CONFIG_SPE
 617         [REGSET_SPE] = {
 618                 .n = 35,
 619                 .size = sizeof(u32), .align = sizeof(u32),
 620                 .active = evr_active, .get = evr_get, .set = evr_set
 621         },
 622 #endif
 623 };
 624
 625 static const struct user_regset_view user_ppc_native_view = {
 626         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
 627         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
 628 };
 629
 630 #ifdef CONFIG_PPC64
 631 #include <linux/compat.h>
 632
 633 static int gpr32_get(struct task_struct *target,
 634                      const struct user_regset *regset,
 635                      unsigned int pos, unsigned int count,
 636                      void *kbuf, void __user *ubuf)
 637 {
 638         const unsigned long *regs = &target->thread.regs->gpr[0];
 639         compat_ulong_t *k = kbuf;
 640         compat_ulong_t __user *u = ubuf;
 641         compat_ulong_t reg;
 642
 643         if (target->thread.regs == NULL)
 644                 return -EIO;
 645
 646         CHECK_FULL_REGS(target->thread.regs);
 647
 648         pos /= sizeof(reg);
 649         count /= sizeof(reg);
 650
 651         if (kbuf)
 652                 for (; count > 0 && pos < PT_MSR; --count)
 653                         *k++ = regs[pos++];
 654         else
 655                 for (; count > 0 && pos < PT_MSR; --count)
 656                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 657                                 return -EFAULT;
 658
 659         if (count > 0 && pos == PT_MSR) {
 660                 reg = get_user_msr(target);
 661                 if (kbuf)
 662                         *k++ = reg;
 663                 else if (__put_user(reg, u++))
 664                         return -EFAULT;
 665                 ++pos;
 666                 --count;
 667         }
 668
 669         if (kbuf)
 670                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 671                         *k++ = regs[pos++];
 672         else
 673                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 674                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 675                                 return -EFAULT;
 676
 677         kbuf = k;
 678         ubuf = u;
 679         pos *= sizeof(reg);
 680         count *= sizeof(reg);
 681         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 682                                         PT_REGS_COUNT * sizeof(reg), -1);
 683 }
 684
 685 static int gpr32_set(struct task_struct *target,
 686                      const struct user_regset *regset,
 687                      unsigned int pos, unsigned int count,
 688                      const void *kbuf, const void __user *ubuf)
 689 {
 690         unsigned long *regs = &target->thread.regs->gpr[0];
 691         const compat_ulong_t *k = kbuf;
 692         const compat_ulong_t __user *u = ubuf;
 693         compat_ulong_t reg;
 694
 695         if (target->thread.regs == NULL)
 696                 return -EIO;
 697
 698         CHECK_FULL_REGS(target->thread.regs);
 699
 700         pos /= sizeof(reg);
 701         count /= sizeof(reg);
 702
 703         if (kbuf)
 704                 for (; count > 0 && pos < PT_MSR; --count)
 705                         regs[pos++] = *k++;
 706         else
 707                 for (; count > 0 && pos < PT_MSR; --count) {
 708                         if (__get_user(reg, u++))
 709                                 return -EFAULT;
 710                         regs[pos++] = reg;
 711                 }
 712
 713
 714         if (count > 0 && pos == PT_MSR) {
 715                 if (kbuf)
 716                         reg = *k++;
 717                 else if (__get_user(reg, u++))
 718                         return -EFAULT;
 719                 set_user_msr(target, reg);
 720                 ++pos;
 721                 --count;
 722         }
 723
 724         if (kbuf) {
 725                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
 726                         regs[pos++] = *k++;
 727                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 728                         ++k;
 729         } else {
 730                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
 731                         if (__get_user(reg, u++))
 732                                 return -EFAULT;
 733                         regs[pos++] = reg;
 734                 }
 735                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 736                         if (__get_user(reg, u++))
 737                                 return -EFAULT;
 738         }
 739
 740         if (count > 0 && pos == PT_TRAP) {
 741                 if (kbuf)
 742                         reg = *k++;
 743                 else if (__get_user(reg, u++))
 744                         return -EFAULT;
 745                 set_user_trap(target, reg);
 746                 ++pos;
 747                 --count;
 748         }
 749
 750         kbuf = k;
 751         ubuf = u;
 752         pos *= sizeof(reg);
 753         count *= sizeof(reg);
 754         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 755                                          (PT_TRAP + 1) * sizeof(reg), -1);
 756 }
 757
 758 /*
 759  * These are the regset flavors matching the CONFIG_PPC32 native set.
 760  */
 761 static const struct user_regset compat_regsets[] = {
 762         [REGSET_GPR] = {
 763                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 764                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
 765                 .get = gpr32_get, .set = gpr32_set
 766         },
 767         [REGSET_FPR] = {
 768                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 769                 .size = sizeof(double), .align = sizeof(double),
 770                 .get = fpr_get, .set = fpr_set
 771         },
 772 #ifdef CONFIG_ALTIVEC
 773         [REGSET_VMX] = {
 774                 .core_note_type = NT_PPC_VMX, .n = 34,
 775                 .size = sizeof(vector128), .align = sizeof(vector128),
 776                 .active = vr_active, .get = vr_get, .set = vr_set
 777         },
 778 #endif
 779 #ifdef CONFIG_SPE
 780         [REGSET_SPE] = {
 781                 .core_note_type = NT_PPC_SPE, .n = 35,
 782                 .size = sizeof(u32), .align = sizeof(u32),
 783                 .active = evr_active, .get = evr_get, .set = evr_set
 784         },
 785 #endif
 786 };
 787
 788 static const struct user_regset_view user_ppc_compat_view = {
 789         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
 790         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
 791 };
 792 #endif  /* CONFIG_PPC64 */
 793
 794 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 795 {
 796 #ifdef CONFIG_PPC64
 797         if (test_tsk_thread_flag(task, TIF_32BIT))
 798                 return &user_ppc_compat_view;
 799 #endif
 800         return &user_ppc_native_view;
 801 }
 802
 803
 804 void user_enable_single_step(struct task_struct *task)
 805 {
 806         struct pt_regs *regs = task->thread.regs;
 807
 808         if (regs != NULL) {
 809 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 810                 task->thread.dbcr0 &= ~DBCR0_BT;
 811                 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
 812                 regs->msr |= MSR_DE;
 813 #else
 814                 regs->msr &= ~MSR_BE;
 815                 regs->msr |= MSR_SE;
 816 #endif
 817         }
 818         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 819 }
 820
 821 void user_enable_block_step(struct task_struct *task)
 822 {
 823         struct pt_regs *regs = task->thread.regs;
 824
 825         if (regs != NULL) {
 826 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 827                 task->thread.dbcr0 &= ~DBCR0_IC;
 828                 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
 829                 regs->msr |= MSR_DE;
 830 #else
 831                 regs->msr &= ~MSR_SE;
 832                 regs->msr |= MSR_BE;
 833 #endif
 834         }
 835         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 836 }
 837
 838 void user_disable_single_step(struct task_struct *task)
 839 {
 840         struct pt_regs *regs = task->thread.regs;
 841
 842         if (regs != NULL) {
 843 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 844                 /*
 845                  * The logic to disable single stepping should be as
 846                  * simple as turning off the Instruction Complete flag.
 847                  * And, after doing so, if all debug flags are off, turn
 848                  * off DBCR0(IDM) and MSR(DE) .... Torez
 849                  */
 850                 task->thread.dbcr0 &= ~DBCR0_IC;
 851                 /*
 852                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
 853                  */
 854                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 855                                         task->thread.dbcr1)) {
 856                         /*
 857                          * All debug events were off.....
 858                          */
 859                         task->thread.dbcr0 &= ~DBCR0_IDM;
 860                         regs->msr &= ~MSR_DE;
 861                 }
 862 #else
 863                 regs->msr &= ~(MSR_SE | MSR_BE);
 864 #endif
 865         }
 866         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
 867 }
 868
 869 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 870                                unsigned long data)
 871 {
 872         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
 873          *  For embedded processors we support one DAC and no IAC's at the
 874          *  moment.
 875          */
 876         if (addr > 0)
 877                 return -EINVAL;
 878
 879         /* The bottom 3 bits in dabr are flags */
 880         if ((data & ~0x7UL) >= TASK_SIZE)
 881                 return -EIO;
 882
 883 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 884         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
 885          *  It was assumed, on previous implementations, that 3 bits were
 886          *  passed together with the data address, fitting the design of the
 887          *  DABR register, as follows:
 888          *
 889          *  bit 0: Read flag
 890          *  bit 1: Write flag
 891          *  bit 2: Breakpoint translation
 892          *
 893          *  Thus, we use them here as so.
 894          */
 895
 896         /* Ensure breakpoint translation bit is set */
 897         if (data && !(data & DABR_TRANSLATION))
 898                 return -EIO;
 899
 900         /* Move contents to the DABR register */
 901         task->thread.dabr = data;
 902 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
 903         /* As described above, it was assumed 3 bits were passed with the data
 904          *  address, but we will assume only the mode bits will be passed
 905          *  as to not cause alignment restrictions for DAC-based processors.
 906          */
 907
 908         /* DAC's hold the whole address without any mode flags */
 909         task->thread.dac1 = data & ~0x3UL;
 910
 911         if (task->thread.dac1 == 0) {
 912                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
 913                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 914                                         task->thread.dbcr1)) {
 915                         task->thread.regs->msr &= ~MSR_DE;
 916                         task->thread.dbcr0 &= ~DBCR0_IDM;
 917                 }
 918                 return 0;
 919         }
 920
 921         /* Read or Write bits must be set */
 922
 923         if (!(data & 0x3UL))
 924                 return -EINVAL;
 925
 926         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
 927            register */
 928         task->thread.dbcr0 |= DBCR0_IDM;
 929
 930         /* Check for write and read flags and set DBCR0
 931            accordingly */
 932         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
 933         if (data & 0x1UL)
 934                 dbcr_dac(task) |= DBCR_DAC1R;
 935         if (data & 0x2UL)
 936                 dbcr_dac(task) |= DBCR_DAC1W;
 937         task->thread.regs->msr |= MSR_DE;
 938 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
 939         return 0;
 940 }
 941
 942 /*
 943  * Called by kernel/ptrace.c when detaching..
 944  *
 945  * Make sure single step bits etc are not set.
 946  */
 947 void ptrace_disable(struct task_struct *child)
 948 {
 949         /* make sure the single step bit is not set. */
 950         user_disable_single_step(child);
 951 }
 952
 953 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 954 static long set_intruction_bp(struct task_struct *child,
 955                               struct ppc_hw_breakpoint *bp_info)
 956 {
 957         int slot;
 958         int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
 959         int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
 960         int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
 961         int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
 962
 963         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
 964                 slot2_in_use = 1;
 965         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
 966                 slot4_in_use = 1;
 967
 968         if (bp_info->addr >= TASK_SIZE)
 969                 return -EIO;
 970
 971         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
 972
 973                 /* Make sure range is valid. */
 974                 if (bp_info->addr2 >= TASK_SIZE)
 975                         return -EIO;
 976
 977                 /* We need a pair of IAC regsisters */
 978                 if ((!slot1_in_use) && (!slot2_in_use)) {
 979                         slot = 1;
 980                         child->thread.iac1 = bp_info->addr;
 981                         child->thread.iac2 = bp_info->addr2;
 982                         child->thread.dbcr0 |= DBCR0_IAC1;
 983                         if (bp_info->addr_mode ==
 984                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
 985                                 dbcr_iac_range(child) |= DBCR_IAC12X;
 986                         else
 987                                 dbcr_iac_range(child) |= DBCR_IAC12I;
 988 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
 989                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
 990                         slot = 3;
 991                         child->thread.iac3 = bp_info->addr;
 992                         child->thread.iac4 = bp_info->addr2;
 993                         child->thread.dbcr0 |= DBCR0_IAC3;
 994                         if (bp_info->addr_mode ==
 995                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
 996                                 dbcr_iac_range(child) |= DBCR_IAC34X;
 997                         else
 998                                 dbcr_iac_range(child) |= DBCR_IAC34I;
 999 #endif
1000                 } else
1001                         return -ENOSPC;
1002         } else {
1003                 /* We only need one.  If possible leave a pair free in
1004                  * case a range is needed later
1005                  */
1006                 if (!slot1_in_use) {
1007                         /*
1008                          * Don't use iac1 if iac1-iac2 are free and either
1009                          * iac3 or iac4 (but not both) are free
1010                          */
1011                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1012                                 slot = 1;
1013                                 child->thread.iac1 = bp_info->addr;
1014                                 child->thread.dbcr0 |= DBCR0_IAC1;
1015                                 goto out;
1016                         }
1017                 }
1018                 if (!slot2_in_use) {
1019                         slot = 2;
1020                         child->thread.iac2 = bp_info->addr;
1021                         child->thread.dbcr0 |= DBCR0_IAC2;
1022 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1023                 } else if (!slot3_in_use) {
1024                         slot = 3;
1025                         child->thread.iac3 = bp_info->addr;
1026                         child->thread.dbcr0 |= DBCR0_IAC3;
1027                 } else if (!slot4_in_use) {
1028                         slot = 4;
1029                         child->thread.iac4 = bp_info->addr;
1030                         child->thread.dbcr0 |= DBCR0_IAC4;
1031 #endif
1032                 } else
1033                         return -ENOSPC;
1034         }
1035 out:
1036         child->thread.dbcr0 |= DBCR0_IDM;
1037         child->thread.regs->msr |= MSR_DE;
1038
1039         return slot;
1040 }
1041
1042 static int del_instruction_bp(struct task_struct *child, int slot)
1043 {
1044         switch (slot) {
1045         case 1:
1046                 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1047                         return -ENOENT;
1048
1049                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1050                         /* address range - clear slots 1 & 2 */
1051                         child->thread.iac2 = 0;
1052                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1053                 }
1054                 child->thread.iac1 = 0;
1055                 child->thread.dbcr0 &= ~DBCR0_IAC1;
1056                 break;
1057         case 2:
1058                 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1059                         return -ENOENT;
1060
1061                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1062                         /* used in a range */
1063                         return -EINVAL;
1064                 child->thread.iac2 = 0;
1065                 child->thread.dbcr0 &= ~DBCR0_IAC2;
1066                 break;
1067 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1068         case 3:
1069                 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1070                         return -ENOENT;
1071
1072                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1073                         /* address range - clear slots 3 & 4 */
1074                         child->thread.iac4 = 0;
1075                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1076                 }
1077                 child->thread.iac3 = 0;
1078                 child->thread.dbcr0 &= ~DBCR0_IAC3;
1079                 break;
1080         case 4:
1081                 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1082                         return -ENOENT;
1083
1084                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1085                         /* Used in a range */
1086                         return -EINVAL;
1087                 child->thread.iac4 = 0;
1088                 child->thread.dbcr0 &= ~DBCR0_IAC4;
1089                 break;
1090 #endif
1091         default:
1092                 return -EINVAL;
1093         }
1094         return 0;
1095 }
1096
1097 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1098 {
1099         int byte_enable =
1100                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1101                 & 0xf;
1102         int condition_mode =
1103                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1104         int slot;
1105
1106         if (byte_enable && (condition_mode == 0))
1107                 return -EINVAL;
1108
1109         if (bp_info->addr >= TASK_SIZE)
1110                 return -EIO;
1111
1112         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1113                 slot = 1;
1114                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1115                         dbcr_dac(child) |= DBCR_DAC1R;
1116                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1117                         dbcr_dac(child) |= DBCR_DAC1W;
1118                 child->thread.dac1 = (unsigned long)bp_info->addr;
1119 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1120                 if (byte_enable) {
1121                         child->thread.dvc1 =
1122                                 (unsigned long)bp_info->condition_value;
1123                         child->thread.dbcr2 |=
1124                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1125                                  (condition_mode << DBCR2_DVC1M_SHIFT));
1126                 }
1127 #endif
1128 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1129         } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1130                 /* Both dac1 and dac2 are part of a range */
1131                 return -ENOSPC;
1132 #endif
1133         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1134                 slot = 2;
1135                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1136                         dbcr_dac(child) |= DBCR_DAC2R;
1137                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1138                         dbcr_dac(child) |= DBCR_DAC2W;
1139                 child->thread.dac2 = (unsigned long)bp_info->addr;
1140 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1141                 if (byte_enable) {
1142                         child->thread.dvc2 =
1143                                 (unsigned long)bp_info->condition_value;
1144                         child->thread.dbcr2 |=
1145                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1146                                  (condition_mode << DBCR2_DVC2M_SHIFT));
1147                 }
1148 #endif
1149         } else
1150                 return -ENOSPC;
1151         child->thread.dbcr0 |= DBCR0_IDM;
1152         child->thread.regs->msr |= MSR_DE;
1153
1154         return slot + 4;
1155 }
1156
1157 static int del_dac(struct task_struct *child, int slot)
1158 {
1159         if (slot == 1) {
1160                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1161                         return -ENOENT;
1162
1163                 child->thread.dac1 = 0;
1164                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1165 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1166                 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1167                         child->thread.dac2 = 0;
1168                         child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1169                 }
1170                 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1171 #endif
1172 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1173                 child->thread.dvc1 = 0;
1174 #endif
1175         } else if (slot == 2) {
1176                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1177                         return -ENOENT;
1178
1179 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1180                 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1181                         /* Part of a range */
1182                         return -EINVAL;
1183                 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1184 #endif
1185 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1186                 child->thread.dvc2 = 0;
1187 #endif
1188                 child->thread.dac2 = 0;
1189                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1190         } else
1191                 return -EINVAL;
1192
1193         return 0;
1194 }
1195 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1196
1197 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1198 static int set_dac_range(struct task_struct *child,
1199                          struct ppc_hw_breakpoint *bp_info)
1200 {
1201         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1202
1203         /* We don't allow range watchpoints to be used with DVC */
1204         if (bp_info->condition_mode)
1205                 return -EINVAL;
1206
1207         /*
1208          * Best effort to verify the address range.  The user/supervisor bits
1209          * prevent trapping in kernel space, but let's fail on an obvious bad
1210          * range.  The simple test on the mask is not fool-proof, and any
1211          * exclusive range will spill over into kernel space.
1212          */
1213         if (bp_info->addr >= TASK_SIZE)
1214                 return -EIO;
1215         if (mode == PPC_BREAKPOINT_MODE_MASK) {
1216                 /*
1217                  * dac2 is a bitmask.  Don't allow a mask that makes a
1218                  * kernel space address from a valid dac1 value
1219                  */
1220                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1221                         return -EIO;
1222         } else {
1223                 /*
1224                  * For range breakpoints, addr2 must also be a valid address
1225                  */
1226                 if (bp_info->addr2 >= TASK_SIZE)
1227                         return -EIO;
1228         }
1229
1230         if (child->thread.dbcr0 &
1231             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1232                 return -ENOSPC;
1233
1234         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1235                 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1236         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1237                 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1238         child->thread.dac1 = bp_info->addr;
1239         child->thread.dac2 = bp_info->addr2;
1240         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1241                 child->thread.dbcr2  |= DBCR2_DAC12M;
1242         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1243                 child->thread.dbcr2  |= DBCR2_DAC12MX;
1244         else    /* PPC_BREAKPOINT_MODE_MASK */
1245                 child->thread.dbcr2  |= DBCR2_DAC12MM;
1246         child->thread.regs->msr |= MSR_DE;
1247
1248         return 5;
1249 }
1250 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1251
1252 static long ppc_set_hwdebug(struct task_struct *child,
1253                      struct ppc_hw_breakpoint *bp_info)
1254 {
1255         if (bp_info->version != 1)
1256                 return -ENOTSUPP;
1257 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1258         /*
1259          * Check for invalid flags and combinations
1260          */
1261         if ((bp_info->trigger_type == 0) ||
1262             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1263                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
1264             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1265             (bp_info->condition_mode &
1266              ~(PPC_BREAKPOINT_CONDITION_MODE |
1267                PPC_BREAKPOINT_CONDITION_BE_ALL)))
1268                 return -EINVAL;
1269 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1270         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1271                 return -EINVAL;
1272 #endif
1273
1274         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1275                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1276                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1277                         return -EINVAL;
1278                 return set_intruction_bp(child, bp_info);
1279         }
1280         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1281                 return set_dac(child, bp_info);
1282
1283 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1284         return set_dac_range(child, bp_info);
1285 #else
1286         return -EINVAL;
1287 #endif
1288 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1289         /*
1290          * We only support one data breakpoint
1291          */
1292         if (((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0) ||
1293             ((bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0) ||
1294             (bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_WRITE) ||
1295             (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) ||
1296             (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1297                 return -EINVAL;
1298
1299         if (child->thread.dabr)
1300                 return -ENOSPC;
1301
1302         if ((unsigned long)bp_info->addr >= TASK_SIZE)
1303                 return -EIO;
1304
1305         child->thread.dabr = (unsigned long)bp_info->addr;
1306
1307         return 1;
1308 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1309 }
1310
1311 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1312 {
1313 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1314         int rc;
1315
1316         if (data <= 4)
1317                 rc = del_instruction_bp(child, (int)data);
1318         else
1319                 rc = del_dac(child, (int)data - 4);
1320
1321         if (!rc) {
1322                 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1323                                         child->thread.dbcr1)) {
1324                         child->thread.dbcr0 &= ~DBCR0_IDM;
1325                         child->thread.regs->msr &= ~MSR_DE;
1326                 }
1327         }
1328         return rc;
1329 #else
1330         if (data != 1)
1331                 return -EINVAL;
1332         if (child->thread.dabr == 0)
1333                 return -ENOENT;
1334
1335         child->thread.dabr = 0;
1336
1337         return 0;
1338 #endif
1339 }
1340
1341 /*
1342  * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1343  * we mark them as obsolete now, they will be removed in a future version
1344  */
1345 static long arch_ptrace_old(struct task_struct *child, long request, long addr,
1346                             long data)
1347 {
1348         switch (request) {
1349         case PPC_PTRACE_GETREGS:        /* Get GPRs 0 - 31. */
1350                 return copy_regset_to_user(child, &user_ppc_native_view,
1351                                            REGSET_GPR, 0, 32 * sizeof(long),
1352                                            (void __user *) data);
1353
1354         case PPC_PTRACE_SETREGS:        /* Set GPRs 0 - 31. */
1355                 return copy_regset_from_user(child, &user_ppc_native_view,
1356                                              REGSET_GPR, 0, 32 * sizeof(long),
1357                                              (const void __user *) data);
1358
1359         case PPC_PTRACE_GETFPREGS:      /* Get FPRs 0 - 31. */
1360                 return copy_regset_to_user(child, &user_ppc_native_view,
1361                                            REGSET_FPR, 0, 32 * sizeof(double),
1362                                            (void __user *) data);
1363
1364         case PPC_PTRACE_SETFPREGS:      /* Set FPRs 0 - 31. */
1365                 return copy_regset_from_user(child, &user_ppc_native_view,
1366                                              REGSET_FPR, 0, 32 * sizeof(double),
1367                                              (const void __user *) data);
1368         }
1369
1370         return -EPERM;
1371 }
1372
1373 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1374 {
1375         int ret = -EPERM;
1376
1377         switch (request) {
1378         /* read the word at location addr in the USER area. */
1379         case PTRACE_PEEKUSR: {
1380                 unsigned long index, tmp;
1381
1382                 ret = -EIO;
1383                 /* convert to index and check */
1384 #ifdef CONFIG_PPC32
1385                 index = (unsigned long) addr >> 2;
1386                 if ((addr & 3) || (index > PT_FPSCR)
1387                     || (child->thread.regs == NULL))
1388 #else
1389                 index = (unsigned long) addr >> 3;
1390                 if ((addr & 7) || (index > PT_FPSCR))
1391 #endif
1392                         break;
1393
1394                 CHECK_FULL_REGS(child->thread.regs);
1395                 if (index < PT_FPR0) {
1396                         tmp = ptrace_get_reg(child, (int) index);
1397                 } else {
1398                         flush_fp_to_thread(child);
1399                         tmp = ((unsigned long *)child->thread.fpr)
1400                                 [TS_FPRWIDTH * (index - PT_FPR0)];
1401                 }
1402                 ret = put_user(tmp,(unsigned long __user *) data);
1403                 break;
1404         }
1405
1406         /* write the word at location addr in the USER area */
1407         case PTRACE_POKEUSR: {
1408                 unsigned long index;
1409
1410                 ret = -EIO;
1411                 /* convert to index and check */
1412 #ifdef CONFIG_PPC32
1413                 index = (unsigned long) addr >> 2;
1414                 if ((addr & 3) || (index > PT_FPSCR)
1415                     || (child->thread.regs == NULL))
1416 #else
1417                 index = (unsigned long) addr >> 3;
1418                 if ((addr & 7) || (index > PT_FPSCR))
1419 #endif
1420                         break;
1421
1422                 CHECK_FULL_REGS(child->thread.regs);
1423                 if (index < PT_FPR0) {
1424                         ret = ptrace_put_reg(child, index, data);
1425                 } else {
1426                         flush_fp_to_thread(child);
1427                         ((unsigned long *)child->thread.fpr)
1428                                 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1429                         ret = 0;
1430                 }
1431                 break;
1432         }
1433
1434         case PPC_PTRACE_GETHWDBGINFO: {
1435                 struct ppc_debug_info dbginfo;
1436
1437                 dbginfo.version = 1;
1438 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1439                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1440                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1441                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1442                 dbginfo.data_bp_alignment = 4;
1443                 dbginfo.sizeof_condition = 4;
1444                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1445                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
1446 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1447                 dbginfo.features |=
1448                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1449                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
1450 #endif
1451 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1452                 dbginfo.num_instruction_bps = 0;
1453                 dbginfo.num_data_bps = 1;
1454                 dbginfo.num_condition_regs = 0;
1455 #ifdef CONFIG_PPC64
1456                 dbginfo.data_bp_alignment = 8;
1457 #else
1458                 dbginfo.data_bp_alignment = 4;
1459 #endif
1460                 dbginfo.sizeof_condition = 0;
1461                 dbginfo.features = 0;
1462 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1463
1464                 if (!access_ok(VERIFY_WRITE, data,
1465                                sizeof(struct ppc_debug_info)))
1466                         return -EFAULT;
1467                 ret = __copy_to_user((struct ppc_debug_info __user *)data,
1468                                      &dbginfo, sizeof(struct ppc_debug_info)) ?
1469                       -EFAULT : 0;
1470                 break;
1471         }
1472
1473         case PPC_PTRACE_SETHWDEBUG: {
1474                 struct ppc_hw_breakpoint bp_info;
1475
1476                 if (!access_ok(VERIFY_READ, data,
1477                                sizeof(struct ppc_hw_breakpoint)))
1478                         return -EFAULT;
1479                 ret = __copy_from_user(&bp_info,
1480                                        (struct ppc_hw_breakpoint __user *)data,
1481                                        sizeof(struct ppc_hw_breakpoint)) ?
1482                       -EFAULT : 0;
1483                 if (!ret)
1484                         ret = ppc_set_hwdebug(child, &bp_info);
1485                 break;
1486         }
1487
1488         case PPC_PTRACE_DELHWDEBUG: {
1489                 ret = ppc_del_hwdebug(child, addr, data);
1490                 break;
1491         }
1492
1493         case PTRACE_GET_DEBUGREG: {
1494                 ret = -EINVAL;
1495                 /* We only support one DABR and no IABRS at the moment */
1496                 if (addr > 0)
1497                         break;
1498 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1499                 ret = put_user(child->thread.dac1,
1500                                (unsigned long __user *)data);
1501 #else
1502                 ret = put_user(child->thread.dabr,
1503                                (unsigned long __user *)data);
1504 #endif
1505                 break;
1506         }
1507
1508         case PTRACE_SET_DEBUGREG:
1509                 ret = ptrace_set_debugreg(child, addr, data);
1510                 break;
1511
1512 #ifdef CONFIG_PPC64
1513         case PTRACE_GETREGS64:
1514 #endif
1515         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
1516                 return copy_regset_to_user(child, &user_ppc_native_view,
1517                                            REGSET_GPR,
1518                                            0, sizeof(struct pt_regs),
1519                                            (void __user *) data);
1520
1521 #ifdef CONFIG_PPC64
1522         case PTRACE_SETREGS64:
1523 #endif
1524         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
1525                 return copy_regset_from_user(child, &user_ppc_native_view,
1526                                              REGSET_GPR,
1527                                              0, sizeof(struct pt_regs),
1528                                              (const void __user *) data);
1529
1530         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1531                 return copy_regset_to_user(child, &user_ppc_native_view,
1532                                            REGSET_FPR,
1533                                            0, sizeof(elf_fpregset_t),
1534                                            (void __user *) data);
1535
1536         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1537                 return copy_regset_from_user(child, &user_ppc_native_view,
1538                                              REGSET_FPR,
1539                                              0, sizeof(elf_fpregset_t),
1540                                              (const void __user *) data);
1541
1542 #ifdef CONFIG_ALTIVEC
1543         case PTRACE_GETVRREGS:
1544                 return copy_regset_to_user(child, &user_ppc_native_view,
1545                                            REGSET_VMX,
1546                                            0, (33 * sizeof(vector128) +
1547                                                sizeof(u32)),
1548                                            (void __user *) data);
1549
1550         case PTRACE_SETVRREGS:
1551                 return copy_regset_from_user(child, &user_ppc_native_view,
1552                                              REGSET_VMX,
1553                                              0, (33 * sizeof(vector128) +
1554                                                  sizeof(u32)),
1555                                              (const void __user *) data);
1556 #endif
1557 #ifdef CONFIG_VSX
1558         case PTRACE_GETVSRREGS:
1559                 return copy_regset_to_user(child, &user_ppc_native_view,
1560                                            REGSET_VSX,
1561                                            0, 32 * sizeof(double),
1562                                            (void __user *) data);
1563
1564         case PTRACE_SETVSRREGS:
1565                 return copy_regset_from_user(child, &user_ppc_native_view,
1566                                              REGSET_VSX,
1567                                              0, 32 * sizeof(double),
1568                                              (const void __user *) data);
1569 #endif
1570 #ifdef CONFIG_SPE
1571         case PTRACE_GETEVRREGS:
1572                 /* Get the child spe register state. */
1573                 return copy_regset_to_user(child, &user_ppc_native_view,
1574                                            REGSET_SPE, 0, 35 * sizeof(u32),
1575                                            (void __user *) data);
1576
1577         case PTRACE_SETEVRREGS:
1578                 /* Set the child spe register state. */
1579                 return copy_regset_from_user(child, &user_ppc_native_view,
1580                                              REGSET_SPE, 0, 35 * sizeof(u32),
1581                                              (const void __user *) data);
1582 #endif
1583
1584         /* Old reverse args ptrace callss */
1585         case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1586         case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1587         case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1588         case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
1589                 ret = arch_ptrace_old(child, request, addr, data);
1590                 break;
1591
1592         default:
1593                 ret = ptrace_request(child, request, addr, data);
1594                 break;
1595         }
1596         return ret;
1597 }
1598
1599 /*
1600  * We must return the syscall number to actually look up in the table.
1601  * This can be -1L to skip running any syscall at all.
1602  */
1603 long do_syscall_trace_enter(struct pt_regs *regs)
1604 {
1605         long ret = 0;
1606
1607         secure_computing(regs->gpr[0]);
1608
1609         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1610             tracehook_report_syscall_entry(regs))
1611                 /*
1612                  * Tracing decided this syscall should not happen.
1613                  * We'll return a bogus call number to get an ENOSYS
1614                  * error, but leave the original number in regs->gpr[0].
1615                  */
1616                 ret = -1L;
1617
1618         if (unlikely(current->audit_context)) {
1619 #ifdef CONFIG_PPC64
1620                 if (!test_thread_flag(TIF_32BIT))
1621                         audit_syscall_entry(AUDIT_ARCH_PPC64,
1622                                             regs->gpr[0],
1623                                             regs->gpr[3], regs->gpr[4],
1624                                             regs->gpr[5], regs->gpr[6]);
1625                 else
1626 #endif
1627                         audit_syscall_entry(AUDIT_ARCH_PPC,
1628                                             regs->gpr[0],
1629                                             regs->gpr[3] & 0xffffffff,
1630                                             regs->gpr[4] & 0xffffffff,
1631                                             regs->gpr[5] & 0xffffffff,
1632                                             regs->gpr[6] & 0xffffffff);
1633         }
1634
1635         return ret ?: regs->gpr[0];
1636 }
1637
1638 void do_syscall_trace_leave(struct pt_regs *regs)
1639 {
1640         int step;
1641
1642         if (unlikely(current->audit_context))
1643                 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1644                                    regs->result);
1645
1646         step = test_thread_flag(TIF_SINGLESTEP);
1647         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1648                 tracehook_report_syscall_exit(regs, step);
1649 }