arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #include <trace/syscall.h>
  33 #ifdef CONFIG_PPC32
  34 #include <linux/module.h>
  35 #endif
  36 #include <linux/hw_breakpoint.h>
  37 #include <linux/perf_event.h>
  38
  39 #include <asm/uaccess.h>
  40 #include <asm/page.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/system.h>
  43
  44 #define CREATE_TRACE_POINTS
  45 #include <trace/events/syscalls.h>
  46
  47 /*
  48  * The parameter save area on the stack is used to store arguments being passed
  49  * to callee function and is located at fixed offset from stack pointer.
  50  */
  51 #ifdef CONFIG_PPC32
  52 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  53 #else /* CONFIG_PPC32 */
  54 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  55 #endif
  56
  57 struct pt_regs_offset {
  58         const char *name;
  59         int offset;
  60 };
  61
  62 #define STR(s)  #s                      /* convert to string */
  63 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  64 #define GPR_OFFSET_NAME(num)    \
  65         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  66 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  67
  68 static const struct pt_regs_offset regoffset_table[] = {
  69         GPR_OFFSET_NAME(0),
  70         GPR_OFFSET_NAME(1),
  71         GPR_OFFSET_NAME(2),
  72         GPR_OFFSET_NAME(3),
  73         GPR_OFFSET_NAME(4),
  74         GPR_OFFSET_NAME(5),
  75         GPR_OFFSET_NAME(6),
  76         GPR_OFFSET_NAME(7),
  77         GPR_OFFSET_NAME(8),
  78         GPR_OFFSET_NAME(9),
  79         GPR_OFFSET_NAME(10),
  80         GPR_OFFSET_NAME(11),
  81         GPR_OFFSET_NAME(12),
  82         GPR_OFFSET_NAME(13),
  83         GPR_OFFSET_NAME(14),
  84         GPR_OFFSET_NAME(15),
  85         GPR_OFFSET_NAME(16),
  86         GPR_OFFSET_NAME(17),
  87         GPR_OFFSET_NAME(18),
  88         GPR_OFFSET_NAME(19),
  89         GPR_OFFSET_NAME(20),
  90         GPR_OFFSET_NAME(21),
  91         GPR_OFFSET_NAME(22),
  92         GPR_OFFSET_NAME(23),
  93         GPR_OFFSET_NAME(24),
  94         GPR_OFFSET_NAME(25),
  95         GPR_OFFSET_NAME(26),
  96         GPR_OFFSET_NAME(27),
  97         GPR_OFFSET_NAME(28),
  98         GPR_OFFSET_NAME(29),
  99         GPR_OFFSET_NAME(30),
 100         GPR_OFFSET_NAME(31),
 101         REG_OFFSET_NAME(nip),
 102         REG_OFFSET_NAME(msr),
 103         REG_OFFSET_NAME(ctr),
 104         REG_OFFSET_NAME(link),
 105         REG_OFFSET_NAME(xer),
 106         REG_OFFSET_NAME(ccr),
 107 #ifdef CONFIG_PPC64
 108         REG_OFFSET_NAME(softe),
 109 #else
 110         REG_OFFSET_NAME(mq),
 111 #endif
 112         REG_OFFSET_NAME(trap),
 113         REG_OFFSET_NAME(dar),
 114         REG_OFFSET_NAME(dsisr),
 115         REG_OFFSET_END,
 116 };
 117
 118 /**
 119  * regs_query_register_offset() - query register offset from its name
 120  * @name:       the name of a register
 121  *
 122  * regs_query_register_offset() returns the offset of a register in struct
 123  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 124  */
 125 int regs_query_register_offset(const char *name)
 126 {
 127         const struct pt_regs_offset *roff;
 128         for (roff = regoffset_table; roff->name != NULL; roff++)
 129                 if (!strcmp(roff->name, name))
 130                         return roff->offset;
 131         return -EINVAL;
 132 }
 133
 134 /**
 135  * regs_query_register_name() - query register name from its offset
 136  * @offset:     the offset of a register in struct pt_regs.
 137  *
 138  * regs_query_register_name() returns the name of a register from its
 139  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 140  */
 141 const char *regs_query_register_name(unsigned int offset)
 142 {
 143         const struct pt_regs_offset *roff;
 144         for (roff = regoffset_table; roff->name != NULL; roff++)
 145                 if (roff->offset == offset)
 146                         return roff->name;
 147         return NULL;
 148 }
 149
 150 /*
 151  * does not yet catch signals sent when the child dies.
 152  * in exit.c or in signal.c.
 153  */
 154
 155 /*
 156  * Set of msr bits that gdb can change on behalf of a process.
 157  */
 158 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 159 #define MSR_DEBUGCHANGE 0
 160 #else
 161 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 162 #endif
 163
 164 /*
 165  * Max register writeable via put_reg
 166  */
 167 #ifdef CONFIG_PPC32
 168 #define PT_MAX_PUT_REG  PT_MQ
 169 #else
 170 #define PT_MAX_PUT_REG  PT_CCR
 171 #endif
 172
 173 static unsigned long get_user_msr(struct task_struct *task)
 174 {
 175         return task->thread.regs->msr | task->thread.fpexc_mode;
 176 }
 177
 178 static int set_user_msr(struct task_struct *task, unsigned long msr)
 179 {
 180         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 181         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 182         return 0;
 183 }
 184
 185 /*
 186  * We prevent mucking around with the reserved area of trap
 187  * which are used internally by the kernel.
 188  */
 189 static int set_user_trap(struct task_struct *task, unsigned long trap)
 190 {
 191         task->thread.regs->trap = trap & 0xfff0;
 192         return 0;
 193 }
 194
 195 /*
 196  * Get contents of register REGNO in task TASK.
 197  */
 198 unsigned long ptrace_get_reg(struct task_struct *task, int regno)
 199 {
 200         if (task->thread.regs == NULL)
 201                 return -EIO;
 202
 203         if (regno == PT_MSR)
 204                 return get_user_msr(task);
 205
 206         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
 207                 return ((unsigned long *)task->thread.regs)[regno];
 208
 209         return -EIO;
 210 }
 211
 212 /*
 213  * Write contents of register REGNO in task TASK.
 214  */
 215 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 216 {
 217         if (task->thread.regs == NULL)
 218                 return -EIO;
 219
 220         if (regno == PT_MSR)
 221                 return set_user_msr(task, data);
 222         if (regno == PT_TRAP)
 223                 return set_user_trap(task, data);
 224
 225         if (regno <= PT_MAX_PUT_REG) {
 226                 ((unsigned long *)task->thread.regs)[regno] = data;
 227                 return 0;
 228         }
 229         return -EIO;
 230 }
 231
 232 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 233                    unsigned int pos, unsigned int count,
 234                    void *kbuf, void __user *ubuf)
 235 {
 236         int i, ret;
 237
 238         if (target->thread.regs == NULL)
 239                 return -EIO;
 240
 241         if (!FULL_REGS(target->thread.regs)) {
 242                 /* We have a partial register set.  Fill 14-31 with bogus values */
 243                 for (i = 14; i < 32; i++)
 244                         target->thread.regs->gpr[i] = NV_REG_POISON;
 245         }
 246
 247         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 248                                   target->thread.regs,
 249                                   0, offsetof(struct pt_regs, msr));
 250         if (!ret) {
 251                 unsigned long msr = get_user_msr(target);
 252                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 253                                           offsetof(struct pt_regs, msr),
 254                                           offsetof(struct pt_regs, msr) +
 255                                           sizeof(msr));
 256         }
 257
 258         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 259                      offsetof(struct pt_regs, msr) + sizeof(long));
 260
 261         if (!ret)
 262                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 263                                           &target->thread.regs->orig_gpr3,
 264                                           offsetof(struct pt_regs, orig_gpr3),
 265                                           sizeof(struct pt_regs));
 266         if (!ret)
 267                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 268                                                sizeof(struct pt_regs), -1);
 269
 270         return ret;
 271 }
 272
 273 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 274                    unsigned int pos, unsigned int count,
 275                    const void *kbuf, const void __user *ubuf)
 276 {
 277         unsigned long reg;
 278         int ret;
 279
 280         if (target->thread.regs == NULL)
 281                 return -EIO;
 282
 283         CHECK_FULL_REGS(target->thread.regs);
 284
 285         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 286                                  target->thread.regs,
 287                                  0, PT_MSR * sizeof(reg));
 288
 289         if (!ret && count > 0) {
 290                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 291                                          PT_MSR * sizeof(reg),
 292                                          (PT_MSR + 1) * sizeof(reg));
 293                 if (!ret)
 294                         ret = set_user_msr(target, reg);
 295         }
 296
 297         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 298                      offsetof(struct pt_regs, msr) + sizeof(long));
 299
 300         if (!ret)
 301                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 302                                          &target->thread.regs->orig_gpr3,
 303                                          PT_ORIG_R3 * sizeof(reg),
 304                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 305
 306         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 307                 ret = user_regset_copyin_ignore(
 308                         &pos, &count, &kbuf, &ubuf,
 309                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 310                         PT_TRAP * sizeof(reg));
 311
 312         if (!ret && count > 0) {
 313                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 314                                          PT_TRAP * sizeof(reg),
 315                                          (PT_TRAP + 1) * sizeof(reg));
 316                 if (!ret)
 317                         ret = set_user_trap(target, reg);
 318         }
 319
 320         if (!ret)
 321                 ret = user_regset_copyin_ignore(
 322                         &pos, &count, &kbuf, &ubuf,
 323                         (PT_TRAP + 1) * sizeof(reg), -1);
 324
 325         return ret;
 326 }
 327
 328 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 329                    unsigned int pos, unsigned int count,
 330                    void *kbuf, void __user *ubuf)
 331 {
 332 #ifdef CONFIG_VSX
 333         double buf[33];
 334         int i;
 335 #endif
 336         flush_fp_to_thread(target);
 337
 338 #ifdef CONFIG_VSX
 339         /* copy to local buffer then write that out */
 340         for (i = 0; i < 32 ; i++)
 341                 buf[i] = target->thread.TS_FPR(i);
 342         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 343         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 344
 345 #else
 346         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 347                      offsetof(struct thread_struct, TS_FPR(32)));
 348
 349         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 350                                    &target->thread.fpr, 0, -1);
 351 #endif
 352 }
 353
 354 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 355                    unsigned int pos, unsigned int count,
 356                    const void *kbuf, const void __user *ubuf)
 357 {
 358 #ifdef CONFIG_VSX
 359         double buf[33];
 360         int i;
 361 #endif
 362         flush_fp_to_thread(target);
 363
 364 #ifdef CONFIG_VSX
 365         /* copy to local buffer then write that out */
 366         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 367         if (i)
 368                 return i;
 369         for (i = 0; i < 32 ; i++)
 370                 target->thread.TS_FPR(i) = buf[i];
 371         memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
 372         return 0;
 373 #else
 374         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 375                      offsetof(struct thread_struct, TS_FPR(32)));
 376
 377         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 378                                   &target->thread.fpr, 0, -1);
 379 #endif
 380 }
 381
 382 #ifdef CONFIG_ALTIVEC
 383 /*
 384  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 385  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 386  * corresponding vector registers.  Quadword 32 contains the vscr as the
 387  * last word (offset 12) within that quadword.  Quadword 33 contains the
 388  * vrsave as the first word (offset 0) within the quadword.
 389  *
 390  * This definition of the VMX state is compatible with the current PPC32
 391  * ptrace interface.  This allows signal handling and ptrace to use the
 392  * same structures.  This also simplifies the implementation of a bi-arch
 393  * (combined (32- and 64-bit) gdb.
 394  */
 395
 396 static int vr_active(struct task_struct *target,
 397                      const struct user_regset *regset)
 398 {
 399         flush_altivec_to_thread(target);
 400         return target->thread.used_vr ? regset->n : 0;
 401 }
 402
 403 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 404                   unsigned int pos, unsigned int count,
 405                   void *kbuf, void __user *ubuf)
 406 {
 407         int ret;
 408
 409         flush_altivec_to_thread(target);
 410
 411         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 412                      offsetof(struct thread_struct, vr[32]));
 413
 414         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 415                                   &target->thread.vr, 0,
 416                                   33 * sizeof(vector128));
 417         if (!ret) {
 418                 /*
 419                  * Copy out only the low-order word of vrsave.
 420                  */
 421                 union {
 422                         elf_vrreg_t reg;
 423                         u32 word;
 424                 } vrsave;
 425                 memset(&vrsave, 0, sizeof(vrsave));
 426                 vrsave.word = target->thread.vrsave;
 427                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 428                                           33 * sizeof(vector128), -1);
 429         }
 430
 431         return ret;
 432 }
 433
 434 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 435                   unsigned int pos, unsigned int count,
 436                   const void *kbuf, const void __user *ubuf)
 437 {
 438         int ret;
 439
 440         flush_altivec_to_thread(target);
 441
 442         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 443                      offsetof(struct thread_struct, vr[32]));
 444
 445         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 446                                  &target->thread.vr, 0, 33 * sizeof(vector128));
 447         if (!ret && count > 0) {
 448                 /*
 449                  * We use only the first word of vrsave.
 450                  */
 451                 union {
 452                         elf_vrreg_t reg;
 453                         u32 word;
 454                 } vrsave;
 455                 memset(&vrsave, 0, sizeof(vrsave));
 456                 vrsave.word = target->thread.vrsave;
 457                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 458                                          33 * sizeof(vector128), -1);
 459                 if (!ret)
 460                         target->thread.vrsave = vrsave.word;
 461         }
 462
 463         return ret;
 464 }
 465 #endif /* CONFIG_ALTIVEC */
 466
 467 #ifdef CONFIG_VSX
 468 /*
 469  * Currently to set and and get all the vsx state, you need to call
 470  * the fp and VMX calls as well.  This only get/sets the lower 32
 471  * 128bit VSX registers.
 472  */
 473
 474 static int vsr_active(struct task_struct *target,
 475                       const struct user_regset *regset)
 476 {
 477         flush_vsx_to_thread(target);
 478         return target->thread.used_vsr ? regset->n : 0;
 479 }
 480
 481 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 482                    unsigned int pos, unsigned int count,
 483                    void *kbuf, void __user *ubuf)
 484 {
 485         double buf[32];
 486         int ret, i;
 487
 488         flush_vsx_to_thread(target);
 489
 490         for (i = 0; i < 32 ; i++)
 491                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 492         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 493                                   buf, 0, 32 * sizeof(double));
 494
 495         return ret;
 496 }
 497
 498 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 499                    unsigned int pos, unsigned int count,
 500                    const void *kbuf, const void __user *ubuf)
 501 {
 502         double buf[32];
 503         int ret,i;
 504
 505         flush_vsx_to_thread(target);
 506
 507         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 508                                  buf, 0, 32 * sizeof(double));
 509         for (i = 0; i < 32 ; i++)
 510                 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 511
 512
 513         return ret;
 514 }
 515 #endif /* CONFIG_VSX */
 516
 517 #ifdef CONFIG_SPE
 518
 519 /*
 520  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 521  *
 522  * struct {
 523  *   u32 evr[32];
 524  *   u64 acc;
 525  *   u32 spefscr;
 526  * }
 527  */
 528
 529 static int evr_active(struct task_struct *target,
 530                       const struct user_regset *regset)
 531 {
 532         flush_spe_to_thread(target);
 533         return target->thread.used_spe ? regset->n : 0;
 534 }
 535
 536 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 537                    unsigned int pos, unsigned int count,
 538                    void *kbuf, void __user *ubuf)
 539 {
 540         int ret;
 541
 542         flush_spe_to_thread(target);
 543
 544         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 545                                   &target->thread.evr,
 546                                   0, sizeof(target->thread.evr));
 547
 548         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 549                      offsetof(struct thread_struct, spefscr));
 550
 551         if (!ret)
 552                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 553                                           &target->thread.acc,
 554                                           sizeof(target->thread.evr), -1);
 555
 556         return ret;
 557 }
 558
 559 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 560                    unsigned int pos, unsigned int count,
 561                    const void *kbuf, const void __user *ubuf)
 562 {
 563         int ret;
 564
 565         flush_spe_to_thread(target);
 566
 567         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 568                                  &target->thread.evr,
 569                                  0, sizeof(target->thread.evr));
 570
 571         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 572                      offsetof(struct thread_struct, spefscr));
 573
 574         if (!ret)
 575                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 576                                          &target->thread.acc,
 577                                          sizeof(target->thread.evr), -1);
 578
 579         return ret;
 580 }
 581 #endif /* CONFIG_SPE */
 582
 583
 584 /*
 585  * These are our native regset flavors.
 586  */
 587 enum powerpc_regset {
 588         REGSET_GPR,
 589         REGSET_FPR,
 590 #ifdef CONFIG_ALTIVEC
 591         REGSET_VMX,
 592 #endif
 593 #ifdef CONFIG_VSX
 594         REGSET_VSX,
 595 #endif
 596 #ifdef CONFIG_SPE
 597         REGSET_SPE,
 598 #endif
 599 };
 600
 601 static const struct user_regset native_regsets[] = {
 602         [REGSET_GPR] = {
 603                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 604                 .size = sizeof(long), .align = sizeof(long),
 605                 .get = gpr_get, .set = gpr_set
 606         },
 607         [REGSET_FPR] = {
 608                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 609                 .size = sizeof(double), .align = sizeof(double),
 610                 .get = fpr_get, .set = fpr_set
 611         },
 612 #ifdef CONFIG_ALTIVEC
 613         [REGSET_VMX] = {
 614                 .core_note_type = NT_PPC_VMX, .n = 34,
 615                 .size = sizeof(vector128), .align = sizeof(vector128),
 616                 .active = vr_active, .get = vr_get, .set = vr_set
 617         },
 618 #endif
 619 #ifdef CONFIG_VSX
 620         [REGSET_VSX] = {
 621                 .core_note_type = NT_PPC_VSX, .n = 32,
 622                 .size = sizeof(double), .align = sizeof(double),
 623                 .active = vsr_active, .get = vsr_get, .set = vsr_set
 624         },
 625 #endif
 626 #ifdef CONFIG_SPE
 627         [REGSET_SPE] = {
 628                 .n = 35,
 629                 .size = sizeof(u32), .align = sizeof(u32),
 630                 .active = evr_active, .get = evr_get, .set = evr_set
 631         },
 632 #endif
 633 };
 634
 635 static const struct user_regset_view user_ppc_native_view = {
 636         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
 637         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
 638 };
 639
 640 #ifdef CONFIG_PPC64
 641 #include <linux/compat.h>
 642
 643 static int gpr32_get(struct task_struct *target,
 644                      const struct user_regset *regset,
 645                      unsigned int pos, unsigned int count,
 646                      void *kbuf, void __user *ubuf)
 647 {
 648         const unsigned long *regs = &target->thread.regs->gpr[0];
 649         compat_ulong_t *k = kbuf;
 650         compat_ulong_t __user *u = ubuf;
 651         compat_ulong_t reg;
 652         int i;
 653
 654         if (target->thread.regs == NULL)
 655                 return -EIO;
 656
 657         if (!FULL_REGS(target->thread.regs)) {
 658                 /* We have a partial register set.  Fill 14-31 with bogus values */
 659                 for (i = 14; i < 32; i++)
 660                         target->thread.regs->gpr[i] = NV_REG_POISON;
 661         }
 662
 663         pos /= sizeof(reg);
 664         count /= sizeof(reg);
 665
 666         if (kbuf)
 667                 for (; count > 0 && pos < PT_MSR; --count)
 668                         *k++ = regs[pos++];
 669         else
 670                 for (; count > 0 && pos < PT_MSR; --count)
 671                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 672                                 return -EFAULT;
 673
 674         if (count > 0 && pos == PT_MSR) {
 675                 reg = get_user_msr(target);
 676                 if (kbuf)
 677                         *k++ = reg;
 678                 else if (__put_user(reg, u++))
 679                         return -EFAULT;
 680                 ++pos;
 681                 --count;
 682         }
 683
 684         if (kbuf)
 685                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 686                         *k++ = regs[pos++];
 687         else
 688                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 689                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 690                                 return -EFAULT;
 691
 692         kbuf = k;
 693         ubuf = u;
 694         pos *= sizeof(reg);
 695         count *= sizeof(reg);
 696         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 697                                         PT_REGS_COUNT * sizeof(reg), -1);
 698 }
 699
 700 static int gpr32_set(struct task_struct *target,
 701                      const struct user_regset *regset,
 702                      unsigned int pos, unsigned int count,
 703                      const void *kbuf, const void __user *ubuf)
 704 {
 705         unsigned long *regs = &target->thread.regs->gpr[0];
 706         const compat_ulong_t *k = kbuf;
 707         const compat_ulong_t __user *u = ubuf;
 708         compat_ulong_t reg;
 709
 710         if (target->thread.regs == NULL)
 711                 return -EIO;
 712
 713         CHECK_FULL_REGS(target->thread.regs);
 714
 715         pos /= sizeof(reg);
 716         count /= sizeof(reg);
 717
 718         if (kbuf)
 719                 for (; count > 0 && pos < PT_MSR; --count)
 720                         regs[pos++] = *k++;
 721         else
 722                 for (; count > 0 && pos < PT_MSR; --count) {
 723                         if (__get_user(reg, u++))
 724                                 return -EFAULT;
 725                         regs[pos++] = reg;
 726                 }
 727
 728
 729         if (count > 0 && pos == PT_MSR) {
 730                 if (kbuf)
 731                         reg = *k++;
 732                 else if (__get_user(reg, u++))
 733                         return -EFAULT;
 734                 set_user_msr(target, reg);
 735                 ++pos;
 736                 --count;
 737         }
 738
 739         if (kbuf) {
 740                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
 741                         regs[pos++] = *k++;
 742                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 743                         ++k;
 744         } else {
 745                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
 746                         if (__get_user(reg, u++))
 747                                 return -EFAULT;
 748                         regs[pos++] = reg;
 749                 }
 750                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 751                         if (__get_user(reg, u++))
 752                                 return -EFAULT;
 753         }
 754
 755         if (count > 0 && pos == PT_TRAP) {
 756                 if (kbuf)
 757                         reg = *k++;
 758                 else if (__get_user(reg, u++))
 759                         return -EFAULT;
 760                 set_user_trap(target, reg);
 761                 ++pos;
 762                 --count;
 763         }
 764
 765         kbuf = k;
 766         ubuf = u;
 767         pos *= sizeof(reg);
 768         count *= sizeof(reg);
 769         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 770                                          (PT_TRAP + 1) * sizeof(reg), -1);
 771 }
 772
 773 /*
 774  * These are the regset flavors matching the CONFIG_PPC32 native set.
 775  */
 776 static const struct user_regset compat_regsets[] = {
 777         [REGSET_GPR] = {
 778                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 779                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
 780                 .get = gpr32_get, .set = gpr32_set
 781         },
 782         [REGSET_FPR] = {
 783                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 784                 .size = sizeof(double), .align = sizeof(double),
 785                 .get = fpr_get, .set = fpr_set
 786         },
 787 #ifdef CONFIG_ALTIVEC
 788         [REGSET_VMX] = {
 789                 .core_note_type = NT_PPC_VMX, .n = 34,
 790                 .size = sizeof(vector128), .align = sizeof(vector128),
 791                 .active = vr_active, .get = vr_get, .set = vr_set
 792         },
 793 #endif
 794 #ifdef CONFIG_SPE
 795         [REGSET_SPE] = {
 796                 .core_note_type = NT_PPC_SPE, .n = 35,
 797                 .size = sizeof(u32), .align = sizeof(u32),
 798                 .active = evr_active, .get = evr_get, .set = evr_set
 799         },
 800 #endif
 801 };
 802
 803 static const struct user_regset_view user_ppc_compat_view = {
 804         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
 805         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
 806 };
 807 #endif  /* CONFIG_PPC64 */
 808
 809 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 810 {
 811 #ifdef CONFIG_PPC64
 812         if (test_tsk_thread_flag(task, TIF_32BIT))
 813                 return &user_ppc_compat_view;
 814 #endif
 815         return &user_ppc_native_view;
 816 }
 817
 818
 819 void user_enable_single_step(struct task_struct *task)
 820 {
 821         struct pt_regs *regs = task->thread.regs;
 822
 823         if (regs != NULL) {
 824 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 825                 task->thread.dbcr0 &= ~DBCR0_BT;
 826                 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
 827                 regs->msr |= MSR_DE;
 828 #else
 829                 regs->msr &= ~MSR_BE;
 830                 regs->msr |= MSR_SE;
 831 #endif
 832         }
 833         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 834 }
 835
 836 void user_enable_block_step(struct task_struct *task)
 837 {
 838         struct pt_regs *regs = task->thread.regs;
 839
 840         if (regs != NULL) {
 841 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 842                 task->thread.dbcr0 &= ~DBCR0_IC;
 843                 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
 844                 regs->msr |= MSR_DE;
 845 #else
 846                 regs->msr &= ~MSR_SE;
 847                 regs->msr |= MSR_BE;
 848 #endif
 849         }
 850         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 851 }
 852
 853 void user_disable_single_step(struct task_struct *task)
 854 {
 855         struct pt_regs *regs = task->thread.regs;
 856
 857         if (regs != NULL) {
 858 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 859                 /*
 860                  * The logic to disable single stepping should be as
 861                  * simple as turning off the Instruction Complete flag.
 862                  * And, after doing so, if all debug flags are off, turn
 863                  * off DBCR0(IDM) and MSR(DE) .... Torez
 864                  */
 865                 task->thread.dbcr0 &= ~DBCR0_IC;
 866                 /*
 867                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
 868                  */
 869                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 870                                         task->thread.dbcr1)) {
 871                         /*
 872                          * All debug events were off.....
 873                          */
 874                         task->thread.dbcr0 &= ~DBCR0_IDM;
 875                         regs->msr &= ~MSR_DE;
 876                 }
 877 #else
 878                 regs->msr &= ~(MSR_SE | MSR_BE);
 879 #endif
 880         }
 881         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
 882 }
 883
 884 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 885 void ptrace_triggered(struct perf_event *bp,
 886                       struct perf_sample_data *data, struct pt_regs *regs)
 887 {
 888         struct perf_event_attr attr;
 889
 890         /*
 891          * Disable the breakpoint request here since ptrace has defined a
 892          * one-shot behaviour for breakpoint exceptions in PPC64.
 893          * The SIGTRAP signal is generated automatically for us in do_dabr().
 894          * We don't have to do anything about that here
 895          */
 896         attr = bp->attr;
 897         attr.disabled = true;
 898         modify_user_hw_breakpoint(bp, &attr);
 899 }
 900 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 901
 902 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 903                                unsigned long data)
 904 {
 905 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 906         int ret;
 907         struct thread_struct *thread = &(task->thread);
 908         struct perf_event *bp;
 909         struct perf_event_attr attr;
 910 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 911
 912         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
 913          *  For embedded processors we support one DAC and no IAC's at the
 914          *  moment.
 915          */
 916         if (addr > 0)
 917                 return -EINVAL;
 918
 919         /* The bottom 3 bits in dabr are flags */
 920         if ((data & ~0x7UL) >= TASK_SIZE)
 921                 return -EIO;
 922
 923 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 924         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
 925          *  It was assumed, on previous implementations, that 3 bits were
 926          *  passed together with the data address, fitting the design of the
 927          *  DABR register, as follows:
 928          *
 929          *  bit 0: Read flag
 930          *  bit 1: Write flag
 931          *  bit 2: Breakpoint translation
 932          *
 933          *  Thus, we use them here as so.
 934          */
 935
 936         /* Ensure breakpoint translation bit is set */
 937         if (data && !(data & DABR_TRANSLATION))
 938                 return -EIO;
 939 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 940         if (ptrace_get_breakpoints(task) < 0)
 941                 return -ESRCH;
 942
 943         bp = thread->ptrace_bps[0];
 944         if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
 945                 if (bp) {
 946                         unregister_hw_breakpoint(bp);
 947                         thread->ptrace_bps[0] = NULL;
 948                 }
 949                 ptrace_put_breakpoints(task);
 950                 return 0;
 951         }
 952         if (bp) {
 953                 attr = bp->attr;
 954                 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 955                 arch_bp_generic_fields(data &
 956                                         (DABR_DATA_WRITE | DABR_DATA_READ),
 957                                                         &attr.bp_type);
 958                 ret =  modify_user_hw_breakpoint(bp, &attr);
 959                 if (ret) {
 960                         ptrace_put_breakpoints(task);
 961                         return ret;
 962                 }
 963                 thread->ptrace_bps[0] = bp;
 964                 ptrace_put_breakpoints(task);
 965                 thread->dabr = data;
 966                 return 0;
 967         }
 968
 969         /* Create a new breakpoint request if one doesn't exist already */
 970         hw_breakpoint_init(&attr);
 971         attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 972         arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ),
 973                                                                 &attr.bp_type);
 974
 975         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
 976                                                ptrace_triggered, NULL, task);
 977         if (IS_ERR(bp)) {
 978                 thread->ptrace_bps[0] = NULL;
 979                 ptrace_put_breakpoints(task);
 980                 return PTR_ERR(bp);
 981         }
 982
 983         ptrace_put_breakpoints(task);
 984
 985 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 986
 987         /* Move contents to the DABR register */
 988         task->thread.dabr = data;
 989 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
 990         /* As described above, it was assumed 3 bits were passed with the data
 991          *  address, but we will assume only the mode bits will be passed
 992          *  as to not cause alignment restrictions for DAC-based processors.
 993          */
 994
 995         /* DAC's hold the whole address without any mode flags */
 996         task->thread.dac1 = data & ~0x3UL;
 997
 998         if (task->thread.dac1 == 0) {
 999                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1000                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
1001                                         task->thread.dbcr1)) {
1002                         task->thread.regs->msr &= ~MSR_DE;
1003                         task->thread.dbcr0 &= ~DBCR0_IDM;
1004                 }
1005                 return 0;
1006         }
1007
1008         /* Read or Write bits must be set */
1009
1010         if (!(data & 0x3UL))
1011                 return -EINVAL;
1012
1013         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
1014            register */
1015         task->thread.dbcr0 |= DBCR0_IDM;
1016
1017         /* Check for write and read flags and set DBCR0
1018            accordingly */
1019         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
1020         if (data & 0x1UL)
1021                 dbcr_dac(task) |= DBCR_DAC1R;
1022         if (data & 0x2UL)
1023                 dbcr_dac(task) |= DBCR_DAC1W;
1024         task->thread.regs->msr |= MSR_DE;
1025 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1026         return 0;
1027 }
1028
1029 /*
1030  * Called by kernel/ptrace.c when detaching..
1031  *
1032  * Make sure single step bits etc are not set.
1033  */
1034 void ptrace_disable(struct task_struct *child)
1035 {
1036         /* make sure the single step bit is not set. */
1037         user_disable_single_step(child);
1038 }
1039
1040 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1041 static long set_intruction_bp(struct task_struct *child,
1042                               struct ppc_hw_breakpoint *bp_info)
1043 {
1044         int slot;
1045         int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
1046         int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
1047         int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
1048         int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
1049
1050         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1051                 slot2_in_use = 1;
1052         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1053                 slot4_in_use = 1;
1054
1055         if (bp_info->addr >= TASK_SIZE)
1056                 return -EIO;
1057
1058         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1059
1060                 /* Make sure range is valid. */
1061                 if (bp_info->addr2 >= TASK_SIZE)
1062                         return -EIO;
1063
1064                 /* We need a pair of IAC regsisters */
1065                 if ((!slot1_in_use) && (!slot2_in_use)) {
1066                         slot = 1;
1067                         child->thread.iac1 = bp_info->addr;
1068                         child->thread.iac2 = bp_info->addr2;
1069                         child->thread.dbcr0 |= DBCR0_IAC1;
1070                         if (bp_info->addr_mode ==
1071                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1072                                 dbcr_iac_range(child) |= DBCR_IAC12X;
1073                         else
1074                                 dbcr_iac_range(child) |= DBCR_IAC12I;
1075 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1076                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1077                         slot = 3;
1078                         child->thread.iac3 = bp_info->addr;
1079                         child->thread.iac4 = bp_info->addr2;
1080                         child->thread.dbcr0 |= DBCR0_IAC3;
1081                         if (bp_info->addr_mode ==
1082                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1083                                 dbcr_iac_range(child) |= DBCR_IAC34X;
1084                         else
1085                                 dbcr_iac_range(child) |= DBCR_IAC34I;
1086 #endif
1087                 } else
1088                         return -ENOSPC;
1089         } else {
1090                 /* We only need one.  If possible leave a pair free in
1091                  * case a range is needed later
1092                  */
1093                 if (!slot1_in_use) {
1094                         /*
1095                          * Don't use iac1 if iac1-iac2 are free and either
1096                          * iac3 or iac4 (but not both) are free
1097                          */
1098                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1099                                 slot = 1;
1100                                 child->thread.iac1 = bp_info->addr;
1101                                 child->thread.dbcr0 |= DBCR0_IAC1;
1102                                 goto out;
1103                         }
1104                 }
1105                 if (!slot2_in_use) {
1106                         slot = 2;
1107                         child->thread.iac2 = bp_info->addr;
1108                         child->thread.dbcr0 |= DBCR0_IAC2;
1109 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1110                 } else if (!slot3_in_use) {
1111                         slot = 3;
1112                         child->thread.iac3 = bp_info->addr;
1113                         child->thread.dbcr0 |= DBCR0_IAC3;
1114                 } else if (!slot4_in_use) {
1115                         slot = 4;
1116                         child->thread.iac4 = bp_info->addr;
1117                         child->thread.dbcr0 |= DBCR0_IAC4;
1118 #endif
1119                 } else
1120                         return -ENOSPC;
1121         }
1122 out:
1123         child->thread.dbcr0 |= DBCR0_IDM;
1124         child->thread.regs->msr |= MSR_DE;
1125
1126         return slot;
1127 }
1128
1129 static int del_instruction_bp(struct task_struct *child, int slot)
1130 {
1131         switch (slot) {
1132         case 1:
1133                 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1134                         return -ENOENT;
1135
1136                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1137                         /* address range - clear slots 1 & 2 */
1138                         child->thread.iac2 = 0;
1139                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1140                 }
1141                 child->thread.iac1 = 0;
1142                 child->thread.dbcr0 &= ~DBCR0_IAC1;
1143                 break;
1144         case 2:
1145                 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1146                         return -ENOENT;
1147
1148                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1149                         /* used in a range */
1150                         return -EINVAL;
1151                 child->thread.iac2 = 0;
1152                 child->thread.dbcr0 &= ~DBCR0_IAC2;
1153                 break;
1154 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1155         case 3:
1156                 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1157                         return -ENOENT;
1158
1159                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1160                         /* address range - clear slots 3 & 4 */
1161                         child->thread.iac4 = 0;
1162                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1163                 }
1164                 child->thread.iac3 = 0;
1165                 child->thread.dbcr0 &= ~DBCR0_IAC3;
1166                 break;
1167         case 4:
1168                 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1169                         return -ENOENT;
1170
1171                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1172                         /* Used in a range */
1173                         return -EINVAL;
1174                 child->thread.iac4 = 0;
1175                 child->thread.dbcr0 &= ~DBCR0_IAC4;
1176                 break;
1177 #endif
1178         default:
1179                 return -EINVAL;
1180         }
1181         return 0;
1182 }
1183
1184 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1185 {
1186         int byte_enable =
1187                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1188                 & 0xf;
1189         int condition_mode =
1190                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1191         int slot;
1192
1193         if (byte_enable && (condition_mode == 0))
1194                 return -EINVAL;
1195
1196         if (bp_info->addr >= TASK_SIZE)
1197                 return -EIO;
1198
1199         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1200                 slot = 1;
1201                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1202                         dbcr_dac(child) |= DBCR_DAC1R;
1203                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1204                         dbcr_dac(child) |= DBCR_DAC1W;
1205                 child->thread.dac1 = (unsigned long)bp_info->addr;
1206 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1207                 if (byte_enable) {
1208                         child->thread.dvc1 =
1209                                 (unsigned long)bp_info->condition_value;
1210                         child->thread.dbcr2 |=
1211                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1212                                  (condition_mode << DBCR2_DVC1M_SHIFT));
1213                 }
1214 #endif
1215 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1216         } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1217                 /* Both dac1 and dac2 are part of a range */
1218                 return -ENOSPC;
1219 #endif
1220         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1221                 slot = 2;
1222                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1223                         dbcr_dac(child) |= DBCR_DAC2R;
1224                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1225                         dbcr_dac(child) |= DBCR_DAC2W;
1226                 child->thread.dac2 = (unsigned long)bp_info->addr;
1227 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1228                 if (byte_enable) {
1229                         child->thread.dvc2 =
1230                                 (unsigned long)bp_info->condition_value;
1231                         child->thread.dbcr2 |=
1232                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1233                                  (condition_mode << DBCR2_DVC2M_SHIFT));
1234                 }
1235 #endif
1236         } else
1237                 return -ENOSPC;
1238         child->thread.dbcr0 |= DBCR0_IDM;
1239         child->thread.regs->msr |= MSR_DE;
1240
1241         return slot + 4;
1242 }
1243
1244 static int del_dac(struct task_struct *child, int slot)
1245 {
1246         if (slot == 1) {
1247                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1248                         return -ENOENT;
1249
1250                 child->thread.dac1 = 0;
1251                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1252 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1253                 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1254                         child->thread.dac2 = 0;
1255                         child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1256                 }
1257                 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1258 #endif
1259 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1260                 child->thread.dvc1 = 0;
1261 #endif
1262         } else if (slot == 2) {
1263                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1264                         return -ENOENT;
1265
1266 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1267                 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1268                         /* Part of a range */
1269                         return -EINVAL;
1270                 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1271 #endif
1272 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1273                 child->thread.dvc2 = 0;
1274 #endif
1275                 child->thread.dac2 = 0;
1276                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1277         } else
1278                 return -EINVAL;
1279
1280         return 0;
1281 }
1282 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1283
1284 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1285 static int set_dac_range(struct task_struct *child,
1286                          struct ppc_hw_breakpoint *bp_info)
1287 {
1288         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1289
1290         /* We don't allow range watchpoints to be used with DVC */
1291         if (bp_info->condition_mode)
1292                 return -EINVAL;
1293
1294         /*
1295          * Best effort to verify the address range.  The user/supervisor bits
1296          * prevent trapping in kernel space, but let's fail on an obvious bad
1297          * range.  The simple test on the mask is not fool-proof, and any
1298          * exclusive range will spill over into kernel space.
1299          */
1300         if (bp_info->addr >= TASK_SIZE)
1301                 return -EIO;
1302         if (mode == PPC_BREAKPOINT_MODE_MASK) {
1303                 /*
1304                  * dac2 is a bitmask.  Don't allow a mask that makes a
1305                  * kernel space address from a valid dac1 value
1306                  */
1307                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1308                         return -EIO;
1309         } else {
1310                 /*
1311                  * For range breakpoints, addr2 must also be a valid address
1312                  */
1313                 if (bp_info->addr2 >= TASK_SIZE)
1314                         return -EIO;
1315         }
1316
1317         if (child->thread.dbcr0 &
1318             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1319                 return -ENOSPC;
1320
1321         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1322                 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1323         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1324                 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1325         child->thread.dac1 = bp_info->addr;
1326         child->thread.dac2 = bp_info->addr2;
1327         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1328                 child->thread.dbcr2  |= DBCR2_DAC12M;
1329         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1330                 child->thread.dbcr2  |= DBCR2_DAC12MX;
1331         else    /* PPC_BREAKPOINT_MODE_MASK */
1332                 child->thread.dbcr2  |= DBCR2_DAC12MM;
1333         child->thread.regs->msr |= MSR_DE;
1334
1335         return 5;
1336 }
1337 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1338
1339 static long ppc_set_hwdebug(struct task_struct *child,
1340                      struct ppc_hw_breakpoint *bp_info)
1341 {
1342 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
1343         unsigned long dabr;
1344 #endif
1345
1346         if (bp_info->version != 1)
1347                 return -ENOTSUPP;
1348 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1349         /*
1350          * Check for invalid flags and combinations
1351          */
1352         if ((bp_info->trigger_type == 0) ||
1353             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1354                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
1355             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1356             (bp_info->condition_mode &
1357              ~(PPC_BREAKPOINT_CONDITION_MODE |
1358                PPC_BREAKPOINT_CONDITION_BE_ALL)))
1359                 return -EINVAL;
1360 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1361         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1362                 return -EINVAL;
1363 #endif
1364
1365         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1366                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1367                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1368                         return -EINVAL;
1369                 return set_intruction_bp(child, bp_info);
1370         }
1371         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1372                 return set_dac(child, bp_info);
1373
1374 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1375         return set_dac_range(child, bp_info);
1376 #else
1377         return -EINVAL;
1378 #endif
1379 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1380         /*
1381          * We only support one data breakpoint
1382          */
1383         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
1384             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
1385             bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
1386             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1387                 return -EINVAL;
1388
1389         if (child->thread.dabr)
1390                 return -ENOSPC;
1391
1392         if ((unsigned long)bp_info->addr >= TASK_SIZE)
1393                 return -EIO;
1394
1395         dabr = (unsigned long)bp_info->addr & ~7UL;
1396         dabr |= DABR_TRANSLATION;
1397         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1398                 dabr |= DABR_DATA_READ;
1399         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1400                 dabr |= DABR_DATA_WRITE;
1401
1402         child->thread.dabr = dabr;
1403
1404         return 1;
1405 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1406 }
1407
1408 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1409 {
1410 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1411         int rc;
1412
1413         if (data <= 4)
1414                 rc = del_instruction_bp(child, (int)data);
1415         else
1416                 rc = del_dac(child, (int)data - 4);
1417
1418         if (!rc) {
1419                 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1420                                         child->thread.dbcr1)) {
1421                         child->thread.dbcr0 &= ~DBCR0_IDM;
1422                         child->thread.regs->msr &= ~MSR_DE;
1423                 }
1424         }
1425         return rc;
1426 #else
1427         if (data != 1)
1428                 return -EINVAL;
1429         if (child->thread.dabr == 0)
1430                 return -ENOENT;
1431
1432         child->thread.dabr = 0;
1433
1434         return 0;
1435 #endif
1436 }
1437
1438 /*
1439  * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1440  * we mark them as obsolete now, they will be removed in a future version
1441  */
1442 static long arch_ptrace_old(struct task_struct *child, long request,
1443                             unsigned long addr, unsigned long data)
1444 {
1445         void __user *datavp = (void __user *) data;
1446
1447         switch (request) {
1448         case PPC_PTRACE_GETREGS:        /* Get GPRs 0 - 31. */
1449                 return copy_regset_to_user(child, &user_ppc_native_view,
1450                                            REGSET_GPR, 0, 32 * sizeof(long),
1451                                            datavp);
1452
1453         case PPC_PTRACE_SETREGS:        /* Set GPRs 0 - 31. */
1454                 return copy_regset_from_user(child, &user_ppc_native_view,
1455                                              REGSET_GPR, 0, 32 * sizeof(long),
1456                                              datavp);
1457
1458         case PPC_PTRACE_GETFPREGS:      /* Get FPRs 0 - 31. */
1459                 return copy_regset_to_user(child, &user_ppc_native_view,
1460                                            REGSET_FPR, 0, 32 * sizeof(double),
1461                                            datavp);
1462
1463         case PPC_PTRACE_SETFPREGS:      /* Set FPRs 0 - 31. */
1464                 return copy_regset_from_user(child, &user_ppc_native_view,
1465                                              REGSET_FPR, 0, 32 * sizeof(double),
1466                                              datavp);
1467         }
1468
1469         return -EPERM;
1470 }
1471
1472 long arch_ptrace(struct task_struct *child, long request,
1473                  unsigned long addr, unsigned long data)
1474 {
1475         int ret = -EPERM;
1476         void __user *datavp = (void __user *) data;
1477         unsigned long __user *datalp = datavp;
1478
1479         switch (request) {
1480         /* read the word at location addr in the USER area. */
1481         case PTRACE_PEEKUSR: {
1482                 unsigned long index, tmp;
1483
1484                 ret = -EIO;
1485                 /* convert to index and check */
1486 #ifdef CONFIG_PPC32
1487                 index = addr >> 2;
1488                 if ((addr & 3) || (index > PT_FPSCR)
1489                     || (child->thread.regs == NULL))
1490 #else
1491                 index = addr >> 3;
1492                 if ((addr & 7) || (index > PT_FPSCR))
1493 #endif
1494                         break;
1495
1496                 CHECK_FULL_REGS(child->thread.regs);
1497                 if (index < PT_FPR0) {
1498                         tmp = ptrace_get_reg(child, (int) index);
1499                 } else {
1500                         flush_fp_to_thread(child);
1501                         tmp = ((unsigned long *)child->thread.fpr)
1502                                 [TS_FPRWIDTH * (index - PT_FPR0)];
1503                 }
1504                 ret = put_user(tmp, datalp);
1505                 break;
1506         }
1507
1508         /* write the word at location addr in the USER area */
1509         case PTRACE_POKEUSR: {
1510                 unsigned long index;
1511
1512                 ret = -EIO;
1513                 /* convert to index and check */
1514 #ifdef CONFIG_PPC32
1515                 index = addr >> 2;
1516                 if ((addr & 3) || (index > PT_FPSCR)
1517                     || (child->thread.regs == NULL))
1518 #else
1519                 index = addr >> 3;
1520                 if ((addr & 7) || (index > PT_FPSCR))
1521 #endif
1522                         break;
1523
1524                 CHECK_FULL_REGS(child->thread.regs);
1525                 if (index < PT_FPR0) {
1526                         ret = ptrace_put_reg(child, index, data);
1527                 } else {
1528                         flush_fp_to_thread(child);
1529                         ((unsigned long *)child->thread.fpr)
1530                                 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1531                         ret = 0;
1532                 }
1533                 break;
1534         }
1535
1536         case PPC_PTRACE_GETHWDBGINFO: {
1537                 struct ppc_debug_info dbginfo;
1538
1539                 dbginfo.version = 1;
1540 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1541                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1542                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1543                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1544                 dbginfo.data_bp_alignment = 4;
1545                 dbginfo.sizeof_condition = 4;
1546                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1547                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
1548 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1549                 dbginfo.features |=
1550                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1551                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
1552 #endif
1553 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1554                 dbginfo.num_instruction_bps = 0;
1555                 dbginfo.num_data_bps = 1;
1556                 dbginfo.num_condition_regs = 0;
1557 #ifdef CONFIG_PPC64
1558                 dbginfo.data_bp_alignment = 8;
1559 #else
1560                 dbginfo.data_bp_alignment = 4;
1561 #endif
1562                 dbginfo.sizeof_condition = 0;
1563                 dbginfo.features = 0;
1564 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1565
1566                 if (!access_ok(VERIFY_WRITE, datavp,
1567                                sizeof(struct ppc_debug_info)))
1568                         return -EFAULT;
1569                 ret = __copy_to_user(datavp, &dbginfo,
1570                                      sizeof(struct ppc_debug_info)) ?
1571                       -EFAULT : 0;
1572                 break;
1573         }
1574
1575         case PPC_PTRACE_SETHWDEBUG: {
1576                 struct ppc_hw_breakpoint bp_info;
1577
1578                 if (!access_ok(VERIFY_READ, datavp,
1579                                sizeof(struct ppc_hw_breakpoint)))
1580                         return -EFAULT;
1581                 ret = __copy_from_user(&bp_info, datavp,
1582                                        sizeof(struct ppc_hw_breakpoint)) ?
1583                       -EFAULT : 0;
1584                 if (!ret)
1585                         ret = ppc_set_hwdebug(child, &bp_info);
1586                 break;
1587         }
1588
1589         case PPC_PTRACE_DELHWDEBUG: {
1590                 ret = ppc_del_hwdebug(child, addr, data);
1591                 break;
1592         }
1593
1594         case PTRACE_GET_DEBUGREG: {
1595                 ret = -EINVAL;
1596                 /* We only support one DABR and no IABRS at the moment */
1597                 if (addr > 0)
1598                         break;
1599 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1600                 ret = put_user(child->thread.dac1, datalp);
1601 #else
1602                 ret = put_user(child->thread.dabr, datalp);
1603 #endif
1604                 break;
1605         }
1606
1607         case PTRACE_SET_DEBUGREG:
1608                 ret = ptrace_set_debugreg(child, addr, data);
1609                 break;
1610
1611 #ifdef CONFIG_PPC64
1612         case PTRACE_GETREGS64:
1613 #endif
1614         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
1615                 return copy_regset_to_user(child, &user_ppc_native_view,
1616                                            REGSET_GPR,
1617                                            0, sizeof(struct pt_regs),
1618                                            datavp);
1619
1620 #ifdef CONFIG_PPC64
1621         case PTRACE_SETREGS64:
1622 #endif
1623         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
1624                 return copy_regset_from_user(child, &user_ppc_native_view,
1625                                              REGSET_GPR,
1626                                              0, sizeof(struct pt_regs),
1627                                              datavp);
1628
1629         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1630                 return copy_regset_to_user(child, &user_ppc_native_view,
1631                                            REGSET_FPR,
1632                                            0, sizeof(elf_fpregset_t),
1633                                            datavp);
1634
1635         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1636                 return copy_regset_from_user(child, &user_ppc_native_view,
1637                                              REGSET_FPR,
1638                                              0, sizeof(elf_fpregset_t),
1639                                              datavp);
1640
1641 #ifdef CONFIG_ALTIVEC
1642         case PTRACE_GETVRREGS:
1643                 return copy_regset_to_user(child, &user_ppc_native_view,
1644                                            REGSET_VMX,
1645                                            0, (33 * sizeof(vector128) +
1646                                                sizeof(u32)),
1647                                            datavp);
1648
1649         case PTRACE_SETVRREGS:
1650                 return copy_regset_from_user(child, &user_ppc_native_view,
1651                                              REGSET_VMX,
1652                                              0, (33 * sizeof(vector128) +
1653                                                  sizeof(u32)),
1654                                              datavp);
1655 #endif
1656 #ifdef CONFIG_VSX
1657         case PTRACE_GETVSRREGS:
1658                 return copy_regset_to_user(child, &user_ppc_native_view,
1659                                            REGSET_VSX,
1660                                            0, 32 * sizeof(double),
1661                                            datavp);
1662
1663         case PTRACE_SETVSRREGS:
1664                 return copy_regset_from_user(child, &user_ppc_native_view,
1665                                              REGSET_VSX,
1666                                              0, 32 * sizeof(double),
1667                                              datavp);
1668 #endif
1669 #ifdef CONFIG_SPE
1670         case PTRACE_GETEVRREGS:
1671                 /* Get the child spe register state. */
1672                 return copy_regset_to_user(child, &user_ppc_native_view,
1673                                            REGSET_SPE, 0, 35 * sizeof(u32),
1674                                            datavp);
1675
1676         case PTRACE_SETEVRREGS:
1677                 /* Set the child spe register state. */
1678                 return copy_regset_from_user(child, &user_ppc_native_view,
1679                                              REGSET_SPE, 0, 35 * sizeof(u32),
1680                                              datavp);
1681 #endif
1682
1683         /* Old reverse args ptrace callss */
1684         case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1685         case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1686         case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1687         case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
1688                 ret = arch_ptrace_old(child, request, addr, data);
1689                 break;
1690
1691         default:
1692                 ret = ptrace_request(child, request, addr, data);
1693                 break;
1694         }
1695         return ret;
1696 }
1697
1698 /*
1699  * We must return the syscall number to actually look up in the table.
1700  * This can be -1L to skip running any syscall at all.
1701  */
1702 long do_syscall_trace_enter(struct pt_regs *regs)
1703 {
1704         long ret = 0;
1705
1706         secure_computing(regs->gpr[0]);
1707
1708         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1709             tracehook_report_syscall_entry(regs))
1710                 /*
1711                  * Tracing decided this syscall should not happen.
1712                  * We'll return a bogus call number to get an ENOSYS
1713                  * error, but leave the original number in regs->gpr[0].
1714                  */
1715                 ret = -1L;
1716
1717         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1718                 trace_sys_enter(regs, regs->gpr[0]);
1719
1720         if (unlikely(current->audit_context)) {
1721 #ifdef CONFIG_PPC64
1722                 if (!is_32bit_task())
1723                         audit_syscall_entry(AUDIT_ARCH_PPC64,
1724                                             regs->gpr[0],
1725                                             regs->gpr[3], regs->gpr[4],
1726                                             regs->gpr[5], regs->gpr[6]);
1727                 else
1728 #endif
1729                         audit_syscall_entry(AUDIT_ARCH_PPC,
1730                                             regs->gpr[0],
1731                                             regs->gpr[3] & 0xffffffff,
1732                                             regs->gpr[4] & 0xffffffff,
1733                                             regs->gpr[5] & 0xffffffff,
1734                                             regs->gpr[6] & 0xffffffff);
1735         }
1736
1737         return ret ?: regs->gpr[0];
1738 }
1739
1740 void do_syscall_trace_leave(struct pt_regs *regs)
1741 {
1742         int step;
1743
1744         if (unlikely(current->audit_context))
1745                 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1746                                    regs->result);
1747
1748         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1749                 trace_sys_exit(regs, regs->result);
1750
1751         step = test_thread_flag(TIF_SINGLESTEP);
1752         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1753                 tracehook_report_syscall_exit(regs, step);
1754 }