Merge branch 'exec_rm_compat' of git://git.kernel.org/pub/scm/linux/kernel/git/oleg...
[pandora-kernel.git] / arch / powerpc / kernel / process.c
1 /*
2  *  Derived from "arch/i386/kernel/process.c"
3  *    Copyright (C) 1995  Linus Torvalds
4  *
5  *  Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6  *  Paul Mackerras (paulus@cs.anu.edu.au)
7  *
8  *  PowerPC version
9  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10  *
11  *  This program is free software; you can redistribute it and/or
12  *  modify it under the terms of the GNU General Public License
13  *  as published by the Free Software Foundation; either version
14  *  2 of the License, or (at your option) any later version.
15  */
16
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/module.h>
32 #include <linux/kallsyms.h>
33 #include <linux/mqueue.h>
34 #include <linux/hardirq.h>
35 #include <linux/utsname.h>
36 #include <linux/ftrace.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/personality.h>
39 #include <linux/random.h>
40 #include <linux/hw_breakpoint.h>
41
42 #include <asm/pgtable.h>
43 #include <asm/uaccess.h>
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/processor.h>
47 #include <asm/mmu.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/time.h>
51 #include <asm/syscalls.h>
52 #ifdef CONFIG_PPC64
53 #include <asm/firmware.h>
54 #endif
55 #include <linux/kprobes.h>
56 #include <linux/kdebug.h>
57
58 extern unsigned long _get_SP(void);
59
60 #ifndef CONFIG_SMP
61 struct task_struct *last_task_used_math = NULL;
62 struct task_struct *last_task_used_altivec = NULL;
63 struct task_struct *last_task_used_vsx = NULL;
64 struct task_struct *last_task_used_spe = NULL;
65 #endif
66
67 /*
68  * Make sure the floating-point register state in the
69  * the thread_struct is up to date for task tsk.
70  */
71 void flush_fp_to_thread(struct task_struct *tsk)
72 {
73         if (tsk->thread.regs) {
74                 /*
75                  * We need to disable preemption here because if we didn't,
76                  * another process could get scheduled after the regs->msr
77                  * test but before we have finished saving the FP registers
78                  * to the thread_struct.  That process could take over the
79                  * FPU, and then when we get scheduled again we would store
80                  * bogus values for the remaining FP registers.
81                  */
82                 preempt_disable();
83                 if (tsk->thread.regs->msr & MSR_FP) {
84 #ifdef CONFIG_SMP
85                         /*
86                          * This should only ever be called for current or
87                          * for a stopped child process.  Since we save away
88                          * the FP register state on context switch on SMP,
89                          * there is something wrong if a stopped child appears
90                          * to still have its FP state in the CPU registers.
91                          */
92                         BUG_ON(tsk != current);
93 #endif
94                         giveup_fpu(tsk);
95                 }
96                 preempt_enable();
97         }
98 }
99
100 void enable_kernel_fp(void)
101 {
102         WARN_ON(preemptible());
103
104 #ifdef CONFIG_SMP
105         if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
106                 giveup_fpu(current);
107         else
108                 giveup_fpu(NULL);       /* just enables FP for kernel */
109 #else
110         giveup_fpu(last_task_used_math);
111 #endif /* CONFIG_SMP */
112 }
113 EXPORT_SYMBOL(enable_kernel_fp);
114
115 #ifdef CONFIG_ALTIVEC
116 void enable_kernel_altivec(void)
117 {
118         WARN_ON(preemptible());
119
120 #ifdef CONFIG_SMP
121         if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
122                 giveup_altivec(current);
123         else
124                 giveup_altivec(NULL);   /* just enable AltiVec for kernel - force */
125 #else
126         giveup_altivec(last_task_used_altivec);
127 #endif /* CONFIG_SMP */
128 }
129 EXPORT_SYMBOL(enable_kernel_altivec);
130
131 /*
132  * Make sure the VMX/Altivec register state in the
133  * the thread_struct is up to date for task tsk.
134  */
135 void flush_altivec_to_thread(struct task_struct *tsk)
136 {
137         if (tsk->thread.regs) {
138                 preempt_disable();
139                 if (tsk->thread.regs->msr & MSR_VEC) {
140 #ifdef CONFIG_SMP
141                         BUG_ON(tsk != current);
142 #endif
143                         giveup_altivec(tsk);
144                 }
145                 preempt_enable();
146         }
147 }
148 #endif /* CONFIG_ALTIVEC */
149
150 #ifdef CONFIG_VSX
151 #if 0
152 /* not currently used, but some crazy RAID module might want to later */
153 void enable_kernel_vsx(void)
154 {
155         WARN_ON(preemptible());
156
157 #ifdef CONFIG_SMP
158         if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
159                 giveup_vsx(current);
160         else
161                 giveup_vsx(NULL);       /* just enable vsx for kernel - force */
162 #else
163         giveup_vsx(last_task_used_vsx);
164 #endif /* CONFIG_SMP */
165 }
166 EXPORT_SYMBOL(enable_kernel_vsx);
167 #endif
168
169 void giveup_vsx(struct task_struct *tsk)
170 {
171         giveup_fpu(tsk);
172         giveup_altivec(tsk);
173         __giveup_vsx(tsk);
174 }
175
176 void flush_vsx_to_thread(struct task_struct *tsk)
177 {
178         if (tsk->thread.regs) {
179                 preempt_disable();
180                 if (tsk->thread.regs->msr & MSR_VSX) {
181 #ifdef CONFIG_SMP
182                         BUG_ON(tsk != current);
183 #endif
184                         giveup_vsx(tsk);
185                 }
186                 preempt_enable();
187         }
188 }
189 #endif /* CONFIG_VSX */
190
191 #ifdef CONFIG_SPE
192
193 void enable_kernel_spe(void)
194 {
195         WARN_ON(preemptible());
196
197 #ifdef CONFIG_SMP
198         if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
199                 giveup_spe(current);
200         else
201                 giveup_spe(NULL);       /* just enable SPE for kernel - force */
202 #else
203         giveup_spe(last_task_used_spe);
204 #endif /* __SMP __ */
205 }
206 EXPORT_SYMBOL(enable_kernel_spe);
207
208 void flush_spe_to_thread(struct task_struct *tsk)
209 {
210         if (tsk->thread.regs) {
211                 preempt_disable();
212                 if (tsk->thread.regs->msr & MSR_SPE) {
213 #ifdef CONFIG_SMP
214                         BUG_ON(tsk != current);
215 #endif
216                         giveup_spe(tsk);
217                 }
218                 preempt_enable();
219         }
220 }
221 #endif /* CONFIG_SPE */
222
223 #ifndef CONFIG_SMP
224 /*
225  * If we are doing lazy switching of CPU state (FP, altivec or SPE),
226  * and the current task has some state, discard it.
227  */
228 void discard_lazy_cpu_state(void)
229 {
230         preempt_disable();
231         if (last_task_used_math == current)
232                 last_task_used_math = NULL;
233 #ifdef CONFIG_ALTIVEC
234         if (last_task_used_altivec == current)
235                 last_task_used_altivec = NULL;
236 #endif /* CONFIG_ALTIVEC */
237 #ifdef CONFIG_VSX
238         if (last_task_used_vsx == current)
239                 last_task_used_vsx = NULL;
240 #endif /* CONFIG_VSX */
241 #ifdef CONFIG_SPE
242         if (last_task_used_spe == current)
243                 last_task_used_spe = NULL;
244 #endif
245         preempt_enable();
246 }
247 #endif /* CONFIG_SMP */
248
249 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
250 void do_send_trap(struct pt_regs *regs, unsigned long address,
251                   unsigned long error_code, int signal_code, int breakpt)
252 {
253         siginfo_t info;
254
255         if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
256                         11, SIGSEGV) == NOTIFY_STOP)
257                 return;
258
259         /* Deliver the signal to userspace */
260         info.si_signo = SIGTRAP;
261         info.si_errno = breakpt;        /* breakpoint or watchpoint id */
262         info.si_code = signal_code;
263         info.si_addr = (void __user *)address;
264         force_sig_info(SIGTRAP, &info, current);
265 }
266 #else   /* !CONFIG_PPC_ADV_DEBUG_REGS */
267 void do_dabr(struct pt_regs *regs, unsigned long address,
268                     unsigned long error_code)
269 {
270         siginfo_t info;
271
272         if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
273                         11, SIGSEGV) == NOTIFY_STOP)
274                 return;
275
276         if (debugger_dabr_match(regs))
277                 return;
278
279         /* Clear the DABR */
280         set_dabr(0);
281
282         /* Deliver the signal to userspace */
283         info.si_signo = SIGTRAP;
284         info.si_errno = 0;
285         info.si_code = TRAP_HWBKPT;
286         info.si_addr = (void __user *)address;
287         force_sig_info(SIGTRAP, &info, current);
288 }
289 #endif  /* CONFIG_PPC_ADV_DEBUG_REGS */
290
291 static DEFINE_PER_CPU(unsigned long, current_dabr);
292
293 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
294 /*
295  * Set the debug registers back to their default "safe" values.
296  */
297 static void set_debug_reg_defaults(struct thread_struct *thread)
298 {
299         thread->iac1 = thread->iac2 = 0;
300 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
301         thread->iac3 = thread->iac4 = 0;
302 #endif
303         thread->dac1 = thread->dac2 = 0;
304 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
305         thread->dvc1 = thread->dvc2 = 0;
306 #endif
307         thread->dbcr0 = 0;
308 #ifdef CONFIG_BOOKE
309         /*
310          * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
311          */
312         thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |   \
313                         DBCR1_IAC3US | DBCR1_IAC4US;
314         /*
315          * Force Data Address Compare User/Supervisor bits to be User-only
316          * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
317          */
318         thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
319 #else
320         thread->dbcr1 = 0;
321 #endif
322 }
323
324 static void prime_debug_regs(struct thread_struct *thread)
325 {
326         mtspr(SPRN_IAC1, thread->iac1);
327         mtspr(SPRN_IAC2, thread->iac2);
328 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
329         mtspr(SPRN_IAC3, thread->iac3);
330         mtspr(SPRN_IAC4, thread->iac4);
331 #endif
332         mtspr(SPRN_DAC1, thread->dac1);
333         mtspr(SPRN_DAC2, thread->dac2);
334 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
335         mtspr(SPRN_DVC1, thread->dvc1);
336         mtspr(SPRN_DVC2, thread->dvc2);
337 #endif
338         mtspr(SPRN_DBCR0, thread->dbcr0);
339         mtspr(SPRN_DBCR1, thread->dbcr1);
340 #ifdef CONFIG_BOOKE
341         mtspr(SPRN_DBCR2, thread->dbcr2);
342 #endif
343 }
344 /*
345  * Unless neither the old or new thread are making use of the
346  * debug registers, set the debug registers from the values
347  * stored in the new thread.
348  */
349 static void switch_booke_debug_regs(struct thread_struct *new_thread)
350 {
351         if ((current->thread.dbcr0 & DBCR0_IDM)
352                 || (new_thread->dbcr0 & DBCR0_IDM))
353                         prime_debug_regs(new_thread);
354 }
355 #else   /* !CONFIG_PPC_ADV_DEBUG_REGS */
356 #ifndef CONFIG_HAVE_HW_BREAKPOINT
357 static void set_debug_reg_defaults(struct thread_struct *thread)
358 {
359         if (thread->dabr) {
360                 thread->dabr = 0;
361                 set_dabr(0);
362         }
363 }
364 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
365 #endif  /* CONFIG_PPC_ADV_DEBUG_REGS */
366
367 int set_dabr(unsigned long dabr)
368 {
369         __get_cpu_var(current_dabr) = dabr;
370
371         if (ppc_md.set_dabr)
372                 return ppc_md.set_dabr(dabr);
373
374         /* XXX should we have a CPU_FTR_HAS_DABR ? */
375 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
376         mtspr(SPRN_DAC1, dabr);
377 #ifdef CONFIG_PPC_47x
378         isync();
379 #endif
380 #elif defined(CONFIG_PPC_BOOK3S)
381         mtspr(SPRN_DABR, dabr);
382 #endif
383
384
385         return 0;
386 }
387
388 #ifdef CONFIG_PPC64
389 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
390 #endif
391
392 struct task_struct *__switch_to(struct task_struct *prev,
393         struct task_struct *new)
394 {
395         struct thread_struct *new_thread, *old_thread;
396         unsigned long flags;
397         struct task_struct *last;
398
399 #ifdef CONFIG_SMP
400         /* avoid complexity of lazy save/restore of fpu
401          * by just saving it every time we switch out if
402          * this task used the fpu during the last quantum.
403          *
404          * If it tries to use the fpu again, it'll trap and
405          * reload its fp regs.  So we don't have to do a restore
406          * every switch, just a save.
407          *  -- Cort
408          */
409         if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
410                 giveup_fpu(prev);
411 #ifdef CONFIG_ALTIVEC
412         /*
413          * If the previous thread used altivec in the last quantum
414          * (thus changing altivec regs) then save them.
415          * We used to check the VRSAVE register but not all apps
416          * set it, so we don't rely on it now (and in fact we need
417          * to save & restore VSCR even if VRSAVE == 0).  -- paulus
418          *
419          * On SMP we always save/restore altivec regs just to avoid the
420          * complexity of changing processors.
421          *  -- Cort
422          */
423         if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
424                 giveup_altivec(prev);
425 #endif /* CONFIG_ALTIVEC */
426 #ifdef CONFIG_VSX
427         if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
428                 /* VMX and FPU registers are already save here */
429                 __giveup_vsx(prev);
430 #endif /* CONFIG_VSX */
431 #ifdef CONFIG_SPE
432         /*
433          * If the previous thread used spe in the last quantum
434          * (thus changing spe regs) then save them.
435          *
436          * On SMP we always save/restore spe regs just to avoid the
437          * complexity of changing processors.
438          */
439         if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
440                 giveup_spe(prev);
441 #endif /* CONFIG_SPE */
442
443 #else  /* CONFIG_SMP */
444 #ifdef CONFIG_ALTIVEC
445         /* Avoid the trap.  On smp this this never happens since
446          * we don't set last_task_used_altivec -- Cort
447          */
448         if (new->thread.regs && last_task_used_altivec == new)
449                 new->thread.regs->msr |= MSR_VEC;
450 #endif /* CONFIG_ALTIVEC */
451 #ifdef CONFIG_VSX
452         if (new->thread.regs && last_task_used_vsx == new)
453                 new->thread.regs->msr |= MSR_VSX;
454 #endif /* CONFIG_VSX */
455 #ifdef CONFIG_SPE
456         /* Avoid the trap.  On smp this this never happens since
457          * we don't set last_task_used_spe
458          */
459         if (new->thread.regs && last_task_used_spe == new)
460                 new->thread.regs->msr |= MSR_SPE;
461 #endif /* CONFIG_SPE */
462
463 #endif /* CONFIG_SMP */
464
465 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
466         switch_booke_debug_regs(&new->thread);
467 #else
468 /*
469  * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
470  * schedule DABR
471  */
472 #ifndef CONFIG_HAVE_HW_BREAKPOINT
473         if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
474                 set_dabr(new->thread.dabr);
475 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
476 #endif
477
478
479         new_thread = &new->thread;
480         old_thread = &current->thread;
481
482 #if defined(CONFIG_PPC_BOOK3E_64)
483         /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
484          * we always hold the user values, so we set it now.
485          *
486          * However, we ensure the kernel MSR:DE is appropriately cleared too
487          * to avoid spurrious single step exceptions in the kernel.
488          *
489          * This will have to change to merge with the ppc32 code at some point,
490          * but I don't like much what ppc32 is doing today so there's some
491          * thinking needed there
492          */
493         if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
494                 u32 dbcr0;
495
496                 mtmsr(mfmsr() & ~MSR_DE);
497                 isync();
498                 dbcr0 = mfspr(SPRN_DBCR0);
499                 dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
500                 mtspr(SPRN_DBCR0, dbcr0);
501         }
502 #endif /* CONFIG_PPC64_BOOK3E */
503
504 #ifdef CONFIG_PPC64
505         /*
506          * Collect processor utilization data per process
507          */
508         if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
509                 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
510                 long unsigned start_tb, current_tb;
511                 start_tb = old_thread->start_tb;
512                 cu->current_tb = current_tb = mfspr(SPRN_PURR);
513                 old_thread->accum_tb += (current_tb - start_tb);
514                 new_thread->start_tb = current_tb;
515         }
516 #endif
517
518         local_irq_save(flags);
519
520         account_system_vtime(current);
521         account_process_vtime(current);
522
523         /*
524          * We can't take a PMU exception inside _switch() since there is a
525          * window where the kernel stack SLB and the kernel stack are out
526          * of sync. Hard disable here.
527          */
528         hard_irq_disable();
529         last = _switch(old_thread, new_thread);
530
531         local_irq_restore(flags);
532
533         return last;
534 }
535
536 static int instructions_to_print = 16;
537
538 static void show_instructions(struct pt_regs *regs)
539 {
540         int i;
541         unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
542                         sizeof(int));
543
544         printk("Instruction dump:");
545
546         for (i = 0; i < instructions_to_print; i++) {
547                 int instr;
548
549                 if (!(i % 8))
550                         printk("\n");
551
552 #if !defined(CONFIG_BOOKE)
553                 /* If executing with the IMMU off, adjust pc rather
554                  * than print XXXXXXXX.
555                  */
556                 if (!(regs->msr & MSR_IR))
557                         pc = (unsigned long)phys_to_virt(pc);
558 #endif
559
560                 /* We use __get_user here *only* to avoid an OOPS on a
561                  * bad address because the pc *should* only be a
562                  * kernel address.
563                  */
564                 if (!__kernel_text_address(pc) ||
565                      __get_user(instr, (unsigned int __user *)pc)) {
566                         printk("XXXXXXXX ");
567                 } else {
568                         if (regs->nip == pc)
569                                 printk("<%08x> ", instr);
570                         else
571                                 printk("%08x ", instr);
572                 }
573
574                 pc += sizeof(int);
575         }
576
577         printk("\n");
578 }
579
580 static struct regbit {
581         unsigned long bit;
582         const char *name;
583 } msr_bits[] = {
584         {MSR_EE,        "EE"},
585         {MSR_PR,        "PR"},
586         {MSR_FP,        "FP"},
587         {MSR_VEC,       "VEC"},
588         {MSR_VSX,       "VSX"},
589         {MSR_ME,        "ME"},
590         {MSR_CE,        "CE"},
591         {MSR_DE,        "DE"},
592         {MSR_IR,        "IR"},
593         {MSR_DR,        "DR"},
594         {0,             NULL}
595 };
596
597 static void printbits(unsigned long val, struct regbit *bits)
598 {
599         const char *sep = "";
600
601         printk("<");
602         for (; bits->bit; ++bits)
603                 if (val & bits->bit) {
604                         printk("%s%s", sep, bits->name);
605                         sep = ",";
606                 }
607         printk(">");
608 }
609
610 #ifdef CONFIG_PPC64
611 #define REG             "%016lx"
612 #define REGS_PER_LINE   4
613 #define LAST_VOLATILE   13
614 #else
615 #define REG             "%08lx"
616 #define REGS_PER_LINE   8
617 #define LAST_VOLATILE   12
618 #endif
619
620 void show_regs(struct pt_regs * regs)
621 {
622         int i, trap;
623
624         printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
625                regs->nip, regs->link, regs->ctr);
626         printk("REGS: %p TRAP: %04lx   %s  (%s)\n",
627                regs, regs->trap, print_tainted(), init_utsname()->release);
628         printk("MSR: "REG" ", regs->msr);
629         printbits(regs->msr, msr_bits);
630         printk("  CR: %08lx  XER: %08lx\n", regs->ccr, regs->xer);
631         trap = TRAP(regs);
632         if (trap == 0x300 || trap == 0x600)
633 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
634                 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
635 #else
636                 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
637 #endif
638         printk("TASK = %p[%d] '%s' THREAD: %p",
639                current, task_pid_nr(current), current->comm, task_thread_info(current));
640
641 #ifdef CONFIG_SMP
642         printk(" CPU: %d", raw_smp_processor_id());
643 #endif /* CONFIG_SMP */
644
645         for (i = 0;  i < 32;  i++) {
646                 if ((i % REGS_PER_LINE) == 0)
647                         printk("\nGPR%02d: ", i);
648                 printk(REG " ", regs->gpr[i]);
649                 if (i == LAST_VOLATILE && !FULL_REGS(regs))
650                         break;
651         }
652         printk("\n");
653 #ifdef CONFIG_KALLSYMS
654         /*
655          * Lookup NIP late so we have the best change of getting the
656          * above info out without failing
657          */
658         printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
659         printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
660 #endif
661         show_stack(current, (unsigned long *) regs->gpr[1]);
662         if (!user_mode(regs))
663                 show_instructions(regs);
664 }
665
666 void exit_thread(void)
667 {
668         discard_lazy_cpu_state();
669 }
670
671 void flush_thread(void)
672 {
673         discard_lazy_cpu_state();
674
675 #ifdef CONFIG_HAVE_HW_BREAKPOINT
676         flush_ptrace_hw_breakpoint(current);
677 #else /* CONFIG_HAVE_HW_BREAKPOINT */
678         set_debug_reg_defaults(&current->thread);
679 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
680 }
681
682 void
683 release_thread(struct task_struct *t)
684 {
685 }
686
687 /*
688  * This gets called before we allocate a new thread and copy
689  * the current task into it.
690  */
691 void prepare_to_copy(struct task_struct *tsk)
692 {
693         flush_fp_to_thread(current);
694         flush_altivec_to_thread(current);
695         flush_vsx_to_thread(current);
696         flush_spe_to_thread(current);
697 #ifdef CONFIG_HAVE_HW_BREAKPOINT
698         flush_ptrace_hw_breakpoint(tsk);
699 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
700 }
701
702 /*
703  * Copy a thread..
704  */
705 extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
706
707 int copy_thread(unsigned long clone_flags, unsigned long usp,
708                 unsigned long unused, struct task_struct *p,
709                 struct pt_regs *regs)
710 {
711         struct pt_regs *childregs, *kregs;
712         extern void ret_from_fork(void);
713         unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
714
715         CHECK_FULL_REGS(regs);
716         /* Copy registers */
717         sp -= sizeof(struct pt_regs);
718         childregs = (struct pt_regs *) sp;
719         *childregs = *regs;
720         if ((childregs->msr & MSR_PR) == 0) {
721                 /* for kernel thread, set `current' and stackptr in new task */
722                 childregs->gpr[1] = sp + sizeof(struct pt_regs);
723 #ifdef CONFIG_PPC32
724                 childregs->gpr[2] = (unsigned long) p;
725 #else
726                 clear_tsk_thread_flag(p, TIF_32BIT);
727 #endif
728                 p->thread.regs = NULL;  /* no user register state */
729         } else {
730                 childregs->gpr[1] = usp;
731                 p->thread.regs = childregs;
732                 if (clone_flags & CLONE_SETTLS) {
733 #ifdef CONFIG_PPC64
734                         if (!is_32bit_task())
735                                 childregs->gpr[13] = childregs->gpr[6];
736                         else
737 #endif
738                                 childregs->gpr[2] = childregs->gpr[6];
739                 }
740         }
741         childregs->gpr[3] = 0;  /* Result from fork() */
742         sp -= STACK_FRAME_OVERHEAD;
743
744         /*
745          * The way this works is that at some point in the future
746          * some task will call _switch to switch to the new task.
747          * That will pop off the stack frame created below and start
748          * the new task running at ret_from_fork.  The new task will
749          * do some house keeping and then return from the fork or clone
750          * system call, using the stack frame created above.
751          */
752         sp -= sizeof(struct pt_regs);
753         kregs = (struct pt_regs *) sp;
754         sp -= STACK_FRAME_OVERHEAD;
755         p->thread.ksp = sp;
756         p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
757                                 _ALIGN_UP(sizeof(struct thread_info), 16);
758
759 #ifdef CONFIG_PPC_STD_MMU_64
760         if (mmu_has_feature(MMU_FTR_SLB)) {
761                 unsigned long sp_vsid;
762                 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
763
764                 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
765                         sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
766                                 << SLB_VSID_SHIFT_1T;
767                 else
768                         sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
769                                 << SLB_VSID_SHIFT;
770                 sp_vsid |= SLB_VSID_KERNEL | llp;
771                 p->thread.ksp_vsid = sp_vsid;
772         }
773 #endif /* CONFIG_PPC_STD_MMU_64 */
774 #ifdef CONFIG_PPC64 
775         if (cpu_has_feature(CPU_FTR_DSCR)) {
776                 if (current->thread.dscr_inherit) {
777                         p->thread.dscr_inherit = 1;
778                         p->thread.dscr = current->thread.dscr;
779                 } else if (0 != dscr_default) {
780                         p->thread.dscr_inherit = 1;
781                         p->thread.dscr = dscr_default;
782                 } else {
783                         p->thread.dscr_inherit = 0;
784                         p->thread.dscr = 0;
785                 }
786         }
787 #endif
788
789         /*
790          * The PPC64 ABI makes use of a TOC to contain function 
791          * pointers.  The function (ret_from_except) is actually a pointer
792          * to the TOC entry.  The first entry is a pointer to the actual
793          * function.
794          */
795 #ifdef CONFIG_PPC64
796         kregs->nip = *((unsigned long *)ret_from_fork);
797 #else
798         kregs->nip = (unsigned long)ret_from_fork;
799 #endif
800
801         return 0;
802 }
803
804 /*
805  * Set up a thread for executing a new program
806  */
807 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
808 {
809 #ifdef CONFIG_PPC64
810         unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
811 #endif
812
813         set_fs(USER_DS);
814
815         /*
816          * If we exec out of a kernel thread then thread.regs will not be
817          * set.  Do it now.
818          */
819         if (!current->thread.regs) {
820                 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
821                 current->thread.regs = regs - 1;
822         }
823
824         memset(regs->gpr, 0, sizeof(regs->gpr));
825         regs->ctr = 0;
826         regs->link = 0;
827         regs->xer = 0;
828         regs->ccr = 0;
829         regs->gpr[1] = sp;
830
831         /*
832          * We have just cleared all the nonvolatile GPRs, so make
833          * FULL_REGS(regs) return true.  This is necessary to allow
834          * ptrace to examine the thread immediately after exec.
835          */
836         regs->trap &= ~1UL;
837
838 #ifdef CONFIG_PPC32
839         regs->mq = 0;
840         regs->nip = start;
841         regs->msr = MSR_USER;
842 #else
843         if (!is_32bit_task()) {
844                 unsigned long entry, toc;
845
846                 /* start is a relocated pointer to the function descriptor for
847                  * the elf _start routine.  The first entry in the function
848                  * descriptor is the entry address of _start and the second
849                  * entry is the TOC value we need to use.
850                  */
851                 __get_user(entry, (unsigned long __user *)start);
852                 __get_user(toc, (unsigned long __user *)start+1);
853
854                 /* Check whether the e_entry function descriptor entries
855                  * need to be relocated before we can use them.
856                  */
857                 if (load_addr != 0) {
858                         entry += load_addr;
859                         toc   += load_addr;
860                 }
861                 regs->nip = entry;
862                 regs->gpr[2] = toc;
863                 regs->msr = MSR_USER64;
864         } else {
865                 regs->nip = start;
866                 regs->gpr[2] = 0;
867                 regs->msr = MSR_USER32;
868         }
869 #endif
870
871         discard_lazy_cpu_state();
872 #ifdef CONFIG_VSX
873         current->thread.used_vsr = 0;
874 #endif
875         memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
876         current->thread.fpscr.val = 0;
877 #ifdef CONFIG_ALTIVEC
878         memset(current->thread.vr, 0, sizeof(current->thread.vr));
879         memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
880         current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
881         current->thread.vrsave = 0;
882         current->thread.used_vr = 0;
883 #endif /* CONFIG_ALTIVEC */
884 #ifdef CONFIG_SPE
885         memset(current->thread.evr, 0, sizeof(current->thread.evr));
886         current->thread.acc = 0;
887         current->thread.spefscr = 0;
888         current->thread.used_spe = 0;
889 #endif /* CONFIG_SPE */
890 }
891
892 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
893                 | PR_FP_EXC_RES | PR_FP_EXC_INV)
894
895 int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
896 {
897         struct pt_regs *regs = tsk->thread.regs;
898
899         /* This is a bit hairy.  If we are an SPE enabled  processor
900          * (have embedded fp) we store the IEEE exception enable flags in
901          * fpexc_mode.  fpexc_mode is also used for setting FP exception
902          * mode (asyn, precise, disabled) for 'Classic' FP. */
903         if (val & PR_FP_EXC_SW_ENABLE) {
904 #ifdef CONFIG_SPE
905                 if (cpu_has_feature(CPU_FTR_SPE)) {
906                         tsk->thread.fpexc_mode = val &
907                                 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
908                         return 0;
909                 } else {
910                         return -EINVAL;
911                 }
912 #else
913                 return -EINVAL;
914 #endif
915         }
916
917         /* on a CONFIG_SPE this does not hurt us.  The bits that
918          * __pack_fe01 use do not overlap with bits used for
919          * PR_FP_EXC_SW_ENABLE.  Additionally, the MSR[FE0,FE1] bits
920          * on CONFIG_SPE implementations are reserved so writing to
921          * them does not change anything */
922         if (val > PR_FP_EXC_PRECISE)
923                 return -EINVAL;
924         tsk->thread.fpexc_mode = __pack_fe01(val);
925         if (regs != NULL && (regs->msr & MSR_FP) != 0)
926                 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
927                         | tsk->thread.fpexc_mode;
928         return 0;
929 }
930
931 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
932 {
933         unsigned int val;
934
935         if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
936 #ifdef CONFIG_SPE
937                 if (cpu_has_feature(CPU_FTR_SPE))
938                         val = tsk->thread.fpexc_mode;
939                 else
940                         return -EINVAL;
941 #else
942                 return -EINVAL;
943 #endif
944         else
945                 val = __unpack_fe01(tsk->thread.fpexc_mode);
946         return put_user(val, (unsigned int __user *) adr);
947 }
948
949 int set_endian(struct task_struct *tsk, unsigned int val)
950 {
951         struct pt_regs *regs = tsk->thread.regs;
952
953         if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
954             (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
955                 return -EINVAL;
956
957         if (regs == NULL)
958                 return -EINVAL;
959
960         if (val == PR_ENDIAN_BIG)
961                 regs->msr &= ~MSR_LE;
962         else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
963                 regs->msr |= MSR_LE;
964         else
965                 return -EINVAL;
966
967         return 0;
968 }
969
970 int get_endian(struct task_struct *tsk, unsigned long adr)
971 {
972         struct pt_regs *regs = tsk->thread.regs;
973         unsigned int val;
974
975         if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
976             !cpu_has_feature(CPU_FTR_REAL_LE))
977                 return -EINVAL;
978
979         if (regs == NULL)
980                 return -EINVAL;
981
982         if (regs->msr & MSR_LE) {
983                 if (cpu_has_feature(CPU_FTR_REAL_LE))
984                         val = PR_ENDIAN_LITTLE;
985                 else
986                         val = PR_ENDIAN_PPC_LITTLE;
987         } else
988                 val = PR_ENDIAN_BIG;
989
990         return put_user(val, (unsigned int __user *)adr);
991 }
992
993 int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
994 {
995         tsk->thread.align_ctl = val;
996         return 0;
997 }
998
999 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1000 {
1001         return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1002 }
1003
1004 #define TRUNC_PTR(x)    ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
1005
1006 int sys_clone(unsigned long clone_flags, unsigned long usp,
1007               int __user *parent_tidp, void __user *child_threadptr,
1008               int __user *child_tidp, int p6,
1009               struct pt_regs *regs)
1010 {
1011         CHECK_FULL_REGS(regs);
1012         if (usp == 0)
1013                 usp = regs->gpr[1];     /* stack pointer for child */
1014 #ifdef CONFIG_PPC64
1015         if (is_32bit_task()) {
1016                 parent_tidp = TRUNC_PTR(parent_tidp);
1017                 child_tidp = TRUNC_PTR(child_tidp);
1018         }
1019 #endif
1020         return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
1021 }
1022
1023 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
1024              unsigned long p4, unsigned long p5, unsigned long p6,
1025              struct pt_regs *regs)
1026 {
1027         CHECK_FULL_REGS(regs);
1028         return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
1029 }
1030
1031 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
1032               unsigned long p4, unsigned long p5, unsigned long p6,
1033               struct pt_regs *regs)
1034 {
1035         CHECK_FULL_REGS(regs);
1036         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
1037                         regs, 0, NULL, NULL);
1038 }
1039
1040 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
1041                unsigned long a3, unsigned long a4, unsigned long a5,
1042                struct pt_regs *regs)
1043 {
1044         int error;
1045         char *filename;
1046
1047         filename = getname((const char __user *) a0);
1048         error = PTR_ERR(filename);
1049         if (IS_ERR(filename))
1050                 goto out;
1051         flush_fp_to_thread(current);
1052         flush_altivec_to_thread(current);
1053         flush_spe_to_thread(current);
1054         error = do_execve(filename,
1055                           (const char __user *const __user *) a1,
1056                           (const char __user *const __user *) a2, regs);
1057         putname(filename);
1058 out:
1059         return error;
1060 }
1061
1062 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1063                                   unsigned long nbytes)
1064 {
1065         unsigned long stack_page;
1066         unsigned long cpu = task_cpu(p);
1067
1068         /*
1069          * Avoid crashing if the stack has overflowed and corrupted
1070          * task_cpu(p), which is in the thread_info struct.
1071          */
1072         if (cpu < NR_CPUS && cpu_possible(cpu)) {
1073                 stack_page = (unsigned long) hardirq_ctx[cpu];
1074                 if (sp >= stack_page + sizeof(struct thread_struct)
1075                     && sp <= stack_page + THREAD_SIZE - nbytes)
1076                         return 1;
1077
1078                 stack_page = (unsigned long) softirq_ctx[cpu];
1079                 if (sp >= stack_page + sizeof(struct thread_struct)
1080                     && sp <= stack_page + THREAD_SIZE - nbytes)
1081                         return 1;
1082         }
1083         return 0;
1084 }
1085
1086 int validate_sp(unsigned long sp, struct task_struct *p,
1087                        unsigned long nbytes)
1088 {
1089         unsigned long stack_page = (unsigned long)task_stack_page(p);
1090
1091         if (sp >= stack_page + sizeof(struct thread_struct)
1092             && sp <= stack_page + THREAD_SIZE - nbytes)
1093                 return 1;
1094
1095         return valid_irq_stack(sp, p, nbytes);
1096 }
1097
1098 EXPORT_SYMBOL(validate_sp);
1099
1100 unsigned long get_wchan(struct task_struct *p)
1101 {
1102         unsigned long ip, sp;
1103         int count = 0;
1104
1105         if (!p || p == current || p->state == TASK_RUNNING)
1106                 return 0;
1107
1108         sp = p->thread.ksp;
1109         if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1110                 return 0;
1111
1112         do {
1113                 sp = *(unsigned long *)sp;
1114                 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1115                         return 0;
1116                 if (count > 0) {
1117                         ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
1118                         if (!in_sched_functions(ip))
1119                                 return ip;
1120                 }
1121         } while (count++ < 16);
1122         return 0;
1123 }
1124
1125 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
1126
1127 void show_stack(struct task_struct *tsk, unsigned long *stack)
1128 {
1129         unsigned long sp, ip, lr, newsp;
1130         int count = 0;
1131         int firstframe = 1;
1132 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1133         int curr_frame = current->curr_ret_stack;
1134         extern void return_to_handler(void);
1135         unsigned long rth = (unsigned long)return_to_handler;
1136         unsigned long mrth = -1;
1137 #ifdef CONFIG_PPC64
1138         extern void mod_return_to_handler(void);
1139         rth = *(unsigned long *)rth;
1140         mrth = (unsigned long)mod_return_to_handler;
1141         mrth = *(unsigned long *)mrth;
1142 #endif
1143 #endif
1144
1145         sp = (unsigned long) stack;
1146         if (tsk == NULL)
1147                 tsk = current;
1148         if (sp == 0) {
1149                 if (tsk == current)
1150                         asm("mr %0,1" : "=r" (sp));
1151                 else
1152                         sp = tsk->thread.ksp;
1153         }
1154
1155         lr = 0;
1156         printk("Call Trace:\n");
1157         do {
1158                 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
1159                         return;
1160
1161                 stack = (unsigned long *) sp;
1162                 newsp = stack[0];
1163                 ip = stack[STACK_FRAME_LR_SAVE];
1164                 if (!firstframe || ip != lr) {
1165                         printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1166 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1167                         if ((ip == rth || ip == mrth) && curr_frame >= 0) {
1168                                 printk(" (%pS)",
1169                                        (void *)current->ret_stack[curr_frame].ret);
1170                                 curr_frame--;
1171                         }
1172 #endif
1173                         if (firstframe)
1174                                 printk(" (unreliable)");
1175                         printk("\n");
1176                 }
1177                 firstframe = 0;
1178
1179                 /*
1180                  * See if this is an exception frame.
1181                  * We look for the "regshere" marker in the current frame.
1182                  */
1183                 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1184                     && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
1185                         struct pt_regs *regs = (struct pt_regs *)
1186                                 (sp + STACK_FRAME_OVERHEAD);
1187                         lr = regs->link;
1188                         printk("--- Exception: %lx at %pS\n    LR = %pS\n",
1189                                regs->trap, (void *)regs->nip, (void *)lr);
1190                         firstframe = 1;
1191                 }
1192
1193                 sp = newsp;
1194         } while (count++ < kstack_depth_to_print);
1195 }
1196
1197 void dump_stack(void)
1198 {
1199         show_stack(current, NULL);
1200 }
1201 EXPORT_SYMBOL(dump_stack);
1202
1203 #ifdef CONFIG_PPC64
1204 void ppc64_runlatch_on(void)
1205 {
1206         unsigned long ctrl;
1207
1208         if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
1209                 HMT_medium();
1210
1211                 ctrl = mfspr(SPRN_CTRLF);
1212                 ctrl |= CTRL_RUNLATCH;
1213                 mtspr(SPRN_CTRLT, ctrl);
1214
1215                 set_thread_flag(TIF_RUNLATCH);
1216         }
1217 }
1218
1219 void __ppc64_runlatch_off(void)
1220 {
1221         unsigned long ctrl;
1222
1223         HMT_medium();
1224
1225         clear_thread_flag(TIF_RUNLATCH);
1226
1227         ctrl = mfspr(SPRN_CTRLF);
1228         ctrl &= ~CTRL_RUNLATCH;
1229         mtspr(SPRN_CTRLT, ctrl);
1230 }
1231 #endif
1232
1233 #if THREAD_SHIFT < PAGE_SHIFT
1234
1235 static struct kmem_cache *thread_info_cache;
1236
1237 struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
1238 {
1239         struct thread_info *ti;
1240
1241         ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
1242         if (unlikely(ti == NULL))
1243                 return NULL;
1244 #ifdef CONFIG_DEBUG_STACK_USAGE
1245         memset(ti, 0, THREAD_SIZE);
1246 #endif
1247         return ti;
1248 }
1249
1250 void free_thread_info(struct thread_info *ti)
1251 {
1252         kmem_cache_free(thread_info_cache, ti);
1253 }
1254
1255 void thread_info_cache_init(void)
1256 {
1257         thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1258                                               THREAD_SIZE, 0, NULL);
1259         BUG_ON(thread_info_cache == NULL);
1260 }
1261
1262 #endif /* THREAD_SHIFT < PAGE_SHIFT */
1263
1264 unsigned long arch_align_stack(unsigned long sp)
1265 {
1266         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1267                 sp -= get_random_int() & ~PAGE_MASK;
1268         return sp & ~0xf;
1269 }
1270
1271 static inline unsigned long brk_rnd(void)
1272 {
1273         unsigned long rnd = 0;
1274
1275         /* 8MB for 32bit, 1GB for 64bit */
1276         if (is_32bit_task())
1277                 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1278         else
1279                 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1280
1281         return rnd << PAGE_SHIFT;
1282 }
1283
1284 unsigned long arch_randomize_brk(struct mm_struct *mm)
1285 {
1286         unsigned long base = mm->brk;
1287         unsigned long ret;
1288
1289 #ifdef CONFIG_PPC_STD_MMU_64
1290         /*
1291          * If we are using 1TB segments and we are allowed to randomise
1292          * the heap, we can put it above 1TB so it is backed by a 1TB
1293          * segment. Otherwise the heap will be in the bottom 1TB
1294          * which always uses 256MB segments and this may result in a
1295          * performance penalty.
1296          */
1297         if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1298                 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1299 #endif
1300
1301         ret = PAGE_ALIGN(base + brk_rnd());
1302
1303         if (ret < mm->brk)
1304                 return mm->brk;
1305
1306         return ret;
1307 }
1308
1309 unsigned long randomize_et_dyn(unsigned long base)
1310 {
1311         unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1312
1313         if (ret < base)
1314                 return base;
1315
1316         return ret;
1317 }