Merge branch 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux...
[pandora-kernel.git] / arch / powerpc / kernel / power7-pmu.c
1 /*
2  * Performance counter support for POWER7 processors.
3  *
4  * Copyright 2009 Paul Mackerras, IBM Corporation.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 #include <linux/kernel.h>
12 #include <linux/perf_counter.h>
13 #include <linux/string.h>
14 #include <asm/reg.h>
15 #include <asm/cputable.h>
16
17 /*
18  * Bits in event code for POWER7
19  */
20 #define PM_PMC_SH       16      /* PMC number (1-based) for direct events */
21 #define PM_PMC_MSK      0xf
22 #define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
23 #define PM_UNIT_SH      12      /* TTMMUX number and setting - unit select */
24 #define PM_UNIT_MSK     0xf
25 #define PM_COMBINE_SH   11      /* Combined event bit */
26 #define PM_COMBINE_MSK  1
27 #define PM_COMBINE_MSKS 0x800
28 #define PM_L2SEL_SH     8       /* L2 event select */
29 #define PM_L2SEL_MSK    7
30 #define PM_PMCSEL_MSK   0xff
31
32 /*
33  * Bits in MMCR1 for POWER7
34  */
35 #define MMCR1_TTM0SEL_SH        60
36 #define MMCR1_TTM1SEL_SH        56
37 #define MMCR1_TTM2SEL_SH        52
38 #define MMCR1_TTM3SEL_SH        48
39 #define MMCR1_TTMSEL_MSK        0xf
40 #define MMCR1_L2SEL_SH          45
41 #define MMCR1_L2SEL_MSK         7
42 #define MMCR1_PMC1_COMBINE_SH   35
43 #define MMCR1_PMC2_COMBINE_SH   34
44 #define MMCR1_PMC3_COMBINE_SH   33
45 #define MMCR1_PMC4_COMBINE_SH   32
46 #define MMCR1_PMC1SEL_SH        24
47 #define MMCR1_PMC2SEL_SH        16
48 #define MMCR1_PMC3SEL_SH        8
49 #define MMCR1_PMC4SEL_SH        0
50 #define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
51 #define MMCR1_PMCSEL_MSK        0xff
52
53 /*
54  * Bits in MMCRA
55  */
56
57 /*
58  * Layout of constraint bits:
59  * 6666555555555544444444443333333333222222222211111111110000000000
60  * 3210987654321098765432109876543210987654321098765432109876543210
61  *                                                 [  ><><><><><><>
62  *                                                  NC P6P5P4P3P2P1
63  *
64  * NC - number of counters
65  *     15: NC error 0x8000
66  *     12-14: number of events needing PMC1-4 0x7000
67  *
68  * P6
69  *     11: P6 error 0x800
70  *     10-11: Count of events needing PMC6
71  *
72  * P1..P5
73  *     0-9: Count of events needing PMC1..PMC5
74  */
75
76 static int power7_get_constraint(u64 event, unsigned long *maskp,
77                                  unsigned long *valp)
78 {
79         int pmc, sh;
80         unsigned long mask = 0, value = 0;
81
82         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
83         if (pmc) {
84                 if (pmc > 6)
85                         return -1;
86                 sh = (pmc - 1) * 2;
87                 mask |= 2 << sh;
88                 value |= 1 << sh;
89                 if (pmc >= 5 && !(event == 0x500fa || event == 0x600f4))
90                         return -1;
91         }
92         if (pmc < 5) {
93                 /* need a counter from PMC1-4 set */
94                 mask  |= 0x8000;
95                 value |= 0x1000;
96         }
97         *maskp = mask;
98         *valp = value;
99         return 0;
100 }
101
102 #define MAX_ALT 2       /* at most 2 alternatives for any event */
103
104 static const unsigned int event_alternatives[][MAX_ALT] = {
105         { 0x200f2, 0x300f2 },           /* PM_INST_DISP */
106         { 0x200f4, 0x600f4 },           /* PM_RUN_CYC */
107         { 0x400fa, 0x500fa },           /* PM_RUN_INST_CMPL */
108 };
109
110 /*
111  * Scan the alternatives table for a match and return the
112  * index into the alternatives table if found, else -1.
113  */
114 static int find_alternative(u64 event)
115 {
116         int i, j;
117
118         for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
119                 if (event < event_alternatives[i][0])
120                         break;
121                 for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
122                         if (event == event_alternatives[i][j])
123                                 return i;
124         }
125         return -1;
126 }
127
128 static s64 find_alternative_decode(u64 event)
129 {
130         int pmc, psel;
131
132         /* this only handles the 4x decode events */
133         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
134         psel = event & PM_PMCSEL_MSK;
135         if ((pmc == 2 || pmc == 4) && (psel & ~7) == 0x40)
136                 return event - (1 << PM_PMC_SH) + 8;
137         if ((pmc == 1 || pmc == 3) && (psel & ~7) == 0x48)
138                 return event + (1 << PM_PMC_SH) - 8;
139         return -1;
140 }
141
142 static int power7_get_alternatives(u64 event, unsigned int flags, u64 alt[])
143 {
144         int i, j, nalt = 1;
145         s64 ae;
146
147         alt[0] = event;
148         nalt = 1;
149         i = find_alternative(event);
150         if (i >= 0) {
151                 for (j = 0; j < MAX_ALT; ++j) {
152                         ae = event_alternatives[i][j];
153                         if (ae && ae != event)
154                                 alt[nalt++] = ae;
155                 }
156         } else {
157                 ae = find_alternative_decode(event);
158                 if (ae > 0)
159                         alt[nalt++] = ae;
160         }
161
162         if (flags & PPMU_ONLY_COUNT_RUN) {
163                 /*
164                  * We're only counting in RUN state,
165                  * so PM_CYC is equivalent to PM_RUN_CYC
166                  * and PM_INST_CMPL === PM_RUN_INST_CMPL.
167                  * This doesn't include alternatives that don't provide
168                  * any extra flexibility in assigning PMCs.
169                  */
170                 j = nalt;
171                 for (i = 0; i < nalt; ++i) {
172                         switch (alt[i]) {
173                         case 0x1e:      /* PM_CYC */
174                                 alt[j++] = 0x600f4;     /* PM_RUN_CYC */
175                                 break;
176                         case 0x600f4:   /* PM_RUN_CYC */
177                                 alt[j++] = 0x1e;
178                                 break;
179                         case 0x2:       /* PM_PPC_CMPL */
180                                 alt[j++] = 0x500fa;     /* PM_RUN_INST_CMPL */
181                                 break;
182                         case 0x500fa:   /* PM_RUN_INST_CMPL */
183                                 alt[j++] = 0x2; /* PM_PPC_CMPL */
184                                 break;
185                         }
186                 }
187                 nalt = j;
188         }
189
190         return nalt;
191 }
192
193 /*
194  * Returns 1 if event counts things relating to marked instructions
195  * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
196  */
197 static int power7_marked_instr_event(u64 event)
198 {
199         int pmc, psel;
200         int unit;
201
202         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
203         unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
204         psel = event & PM_PMCSEL_MSK & ~1;      /* trim off edge/level bit */
205         if (pmc >= 5)
206                 return 0;
207
208         switch (psel >> 4) {
209         case 2:
210                 return pmc == 2 || pmc == 4;
211         case 3:
212                 if (psel == 0x3c)
213                         return pmc == 1;
214                 if (psel == 0x3e)
215                         return pmc != 2;
216                 return 1;
217         case 4:
218         case 5:
219                 return unit == 0xd;
220         case 6:
221                 if (psel == 0x64)
222                         return pmc >= 3;
223         case 8:
224                 return unit == 0xd;
225         }
226         return 0;
227 }
228
229 static int power7_compute_mmcr(u64 event[], int n_ev,
230                                unsigned int hwc[], unsigned long mmcr[])
231 {
232         unsigned long mmcr1 = 0;
233         unsigned long mmcra = 0;
234         unsigned int pmc, unit, combine, l2sel, psel;
235         unsigned int pmc_inuse = 0;
236         int i;
237
238         /* First pass to count resource use */
239         for (i = 0; i < n_ev; ++i) {
240                 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
241                 if (pmc) {
242                         if (pmc > 6)
243                                 return -1;
244                         if (pmc_inuse & (1 << (pmc - 1)))
245                                 return -1;
246                         pmc_inuse |= 1 << (pmc - 1);
247                 }
248         }
249
250         /* Second pass: assign PMCs, set all MMCR1 fields */
251         for (i = 0; i < n_ev; ++i) {
252                 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
253                 unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
254                 combine = (event[i] >> PM_COMBINE_SH) & PM_COMBINE_MSK;
255                 l2sel = (event[i] >> PM_L2SEL_SH) & PM_L2SEL_MSK;
256                 psel = event[i] & PM_PMCSEL_MSK;
257                 if (!pmc) {
258                         /* Bus event or any-PMC direct event */
259                         for (pmc = 0; pmc < 4; ++pmc) {
260                                 if (!(pmc_inuse & (1 << pmc)))
261                                         break;
262                         }
263                         if (pmc >= 4)
264                                 return -1;
265                         pmc_inuse |= 1 << pmc;
266                 } else {
267                         /* Direct or decoded event */
268                         --pmc;
269                 }
270                 if (pmc <= 3) {
271                         mmcr1 |= (unsigned long) unit
272                                 << (MMCR1_TTM0SEL_SH - 4 * pmc);
273                         mmcr1 |= (unsigned long) combine
274                                 << (MMCR1_PMC1_COMBINE_SH - pmc);
275                         mmcr1 |= psel << MMCR1_PMCSEL_SH(pmc);
276                         if (unit == 6)  /* L2 events */
277                                 mmcr1 |= (unsigned long) l2sel
278                                         << MMCR1_L2SEL_SH;
279                 }
280                 if (power7_marked_instr_event(event[i]))
281                         mmcra |= MMCRA_SAMPLE_ENABLE;
282                 hwc[i] = pmc;
283         }
284
285         /* Return MMCRx values */
286         mmcr[0] = 0;
287         if (pmc_inuse & 1)
288                 mmcr[0] = MMCR0_PMC1CE;
289         if (pmc_inuse & 0x3e)
290                 mmcr[0] |= MMCR0_PMCjCE;
291         mmcr[1] = mmcr1;
292         mmcr[2] = mmcra;
293         return 0;
294 }
295
296 static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
297 {
298         if (pmc <= 3)
299                 mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc));
300 }
301
302 static int power7_generic_events[] = {
303         [PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
304         [PERF_COUNT_HW_INSTRUCTIONS] = 2,
305         [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,      /* LD_REF_L1_LSU*/
306         [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,         /* LD_MISS_L1   */
307         [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,  /* BRU_FIN      */
308         [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,        /* BR_MPRED     */
309 };
310
311 #define C(x)    PERF_COUNT_HW_CACHE_##x
312
313 /*
314  * Table of generalized cache-related events.
315  * 0 means not supported, -1 means nonsensical, other values
316  * are event codes.
317  */
318 static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
319         [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
320                 [C(OP_READ)] = {        0xc880,         0x400f0 },
321                 [C(OP_WRITE)] = {       0,              0x300f0 },
322                 [C(OP_PREFETCH)] = {    0xd8b8,         0       },
323         },
324         [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
325                 [C(OP_READ)] = {        0,              0x200fc },
326                 [C(OP_WRITE)] = {       -1,             -1      },
327                 [C(OP_PREFETCH)] = {    0x408a,         0       },
328         },
329         [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
330                 [C(OP_READ)] = {        0x16080,        0x26080 },
331                 [C(OP_WRITE)] = {       0x16082,        0x26082 },
332                 [C(OP_PREFETCH)] = {    0,              0       },
333         },
334         [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
335                 [C(OP_READ)] = {        0,              0x300fc },
336                 [C(OP_WRITE)] = {       -1,             -1      },
337                 [C(OP_PREFETCH)] = {    -1,             -1      },
338         },
339         [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
340                 [C(OP_READ)] = {        0,              0x400fc },
341                 [C(OP_WRITE)] = {       -1,             -1      },
342                 [C(OP_PREFETCH)] = {    -1,             -1      },
343         },
344         [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
345                 [C(OP_READ)] = {        0x10068,        0x400f6 },
346                 [C(OP_WRITE)] = {       -1,             -1      },
347                 [C(OP_PREFETCH)] = {    -1,             -1      },
348         },
349 };
350
351 static struct power_pmu power7_pmu = {
352         .name                   = "POWER7",
353         .n_counter              = 6,
354         .max_alternatives       = MAX_ALT + 1,
355         .add_fields             = 0x1555ul,
356         .test_adder             = 0x3000ul,
357         .compute_mmcr           = power7_compute_mmcr,
358         .get_constraint         = power7_get_constraint,
359         .get_alternatives       = power7_get_alternatives,
360         .disable_pmc            = power7_disable_pmc,
361         .flags                  = PPMU_ALT_SIPR,
362         .n_generic              = ARRAY_SIZE(power7_generic_events),
363         .generic_events         = power7_generic_events,
364         .cache_events           = &power7_cache_events,
365 };
366
367 static int init_power7_pmu(void)
368 {
369         if (!cur_cpu_spec->oprofile_cpu_type ||
370             strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power7"))
371                 return -ENODEV;
372
373         return register_power_pmu(&power7_pmu);
374 }
375
376 arch_initcall(init_power7_pmu);