3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/iseries/lpar_map.h>
36 #include <asm/thread_info.h>
37 #include <asm/firmware.h>
38 #include <asm/page_64.h>
39 #include <asm/irqflags.h>
40 #include <asm/kvm_book3s_asm.h>
42 /* The physical memory is layed out such that the secondary processor
43 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
44 * using the layout described in exceptions-64s.S
48 * Entering into this code we make the following assumptions:
50 * For pSeries or server processors:
51 * 1. The MMU is off & open firmware is running in real mode.
52 * 2. The kernel is entered at __start
55 * 1. The MMU is on (as it always is for iSeries)
56 * 2. The kernel is entered at system_reset_iSeries
58 * For Book3E processors:
59 * 1. The MMU is on running in AS0 in a state defined in ePAPR
60 * 2. The kernel is entered at __start
67 /* NOP this out unconditionally */
69 b .__start_initialization_multiplatform
72 /* Catch branch to 0 in real mode */
75 /* Secondary processors spin on this value until it becomes nonzero.
76 * When it does it contains the real address of the descriptor
77 * of the function that the cpu should jump to to continue
80 .globl __secondary_hold_spinloop
81 __secondary_hold_spinloop:
84 /* Secondary processors write this value with their cpu # */
85 /* after they enter the spin loop immediately below. */
86 .globl __secondary_hold_acknowledge
87 __secondary_hold_acknowledge:
90 #ifdef CONFIG_PPC_ISERIES
92 * At offset 0x20, there is a pointer to iSeries LPAR data.
93 * This is required by the hypervisor
96 .llong hvReleaseData-KERNELBASE
97 #endif /* CONFIG_PPC_ISERIES */
99 #ifdef CONFIG_CRASH_DUMP
100 /* This flag is set to 1 by a loader if the kernel should run
101 * at the loaded address instead of the linked address. This
102 * is used by kexec-tools to keep the the kdump kernel in the
103 * crash_kernel region. The loader is responsible for
104 * observing the alignment requirement.
106 /* Do not move this variable as kexec-tools knows about it. */
110 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
115 * The following code is used to hold secondary processors
116 * in a spin loop after they have entered the kernel, but
117 * before the bulk of the kernel has been relocated. This code
118 * is relocated to physical address 0x60 before prom_init is run.
119 * All of it must fit below the first exception vector at 0x100.
120 * Use .globl here not _GLOBAL because we want __secondary_hold
121 * to be the actual text address, not a descriptor.
123 .globl __secondary_hold
125 #ifndef CONFIG_PPC_BOOK3E
128 mtmsrd r24 /* RI on */
130 /* Grab our physical cpu number */
133 /* Tell the master cpu we're here */
134 /* Relocation is off & we are located at an address less */
135 /* than 0x100, so only need to grab low order offset. */
136 std r24,__secondary_hold_acknowledge-_stext(0)
139 /* All secondary cpus wait here until told to start. */
140 100: ld r4,__secondary_hold_spinloop-_stext(0)
144 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
145 ld r4,0(r4) /* deref function descriptor */
154 /* This value is used to mark exception frames on the stack. */
157 .tc ID_72656773_68657265[TC],0x7265677368657265
161 * On server, we include the exception vectors code here as it
162 * relies on absolute addressing which is only possible within
163 * this compilation unit
165 #ifdef CONFIG_PPC_BOOK3S
166 #include "exceptions-64s.S"
169 _GLOBAL(generic_secondary_thread_init)
172 /* turn on 64-bit mode */
175 /* get a valid TOC pointer, wherever we're mapped at */
178 #ifdef CONFIG_PPC_BOOK3E
179 /* Book3E initialization */
181 bl .book3e_secondary_thread_init
183 b generic_secondary_common_init
186 * On pSeries and most other platforms, secondary processors spin
187 * in the following code.
188 * At entry, r3 = this processor's number (physical cpu id)
190 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
191 * this core already exists (setup via some other mechanism such
192 * as SCOM before entry).
194 _GLOBAL(generic_secondary_smp_init)
198 /* turn on 64-bit mode */
201 /* get a valid TOC pointer, wherever we're mapped at */
204 #ifdef CONFIG_PPC_BOOK3E
205 /* Book3E initialization */
208 bl .book3e_secondary_core_init
211 generic_secondary_common_init:
212 /* Set up a paca value for this processor. Since we have the
213 * physical cpu id in r24, we need to search the pacas to find
214 * which logical id maps to our physical one.
216 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
217 ld r13,0(r13) /* Get base vaddr of paca array */
218 li r5,0 /* logical cpu id */
219 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
220 cmpw r6,r24 /* Compare to our id */
222 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
227 mr r3,r24 /* not found, copy phys to r3 */
228 b .kexec_wait /* next kernel might do better */
230 2: mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG */
231 #ifdef CONFIG_PPC_BOOK3E
232 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
233 mtspr SPRN_SPRG_TLB_EXFRAME,r12
236 /* From now on, r24 is expected to be logical cpuid */
239 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
243 b 3b /* Never go on non-SMP */
246 beq 3b /* Loop until told to go */
248 sync /* order paca.run and cur_cpu_spec */
250 /* See if we need to call a cpu state restore handler */
251 LOAD_REG_ADDR(r23, cur_cpu_spec)
253 ld r23,CPU_SPEC_RESTORE(r23)
260 4: /* Create a temp kernel stack for use before relocation is on. */
261 ld r1,PACAEMERGSP(r13)
262 subi r1,r1,STACK_FRAME_OVERHEAD
269 * Assumes we're mapped EA == RA if the MMU is on.
271 #ifdef CONFIG_PPC_BOOK3S
274 andi. r0,r3,MSR_IR|MSR_DR
282 b . /* prevent speculative execution */
287 * Here is our main kernel entry point. We support currently 2 kind of entries
288 * depending on the value of r5.
290 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
293 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
294 * DT block, r4 is a physical pointer to the kernel itself
297 _GLOBAL(__start_initialization_multiplatform)
298 /* Make sure we are running in 64 bits mode */
301 /* Get TOC pointer (current runtime address) */
304 /* find out where we are now */
306 0: mflr r26 /* r26 = runtime addr here */
307 addis r26,r26,(_stext - 0b)@ha
308 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
311 * Are we booted from a PROM Of-type client-interface ?
315 b .__boot_from_prom /* yes -> prom */
317 /* Save parameters */
321 #ifdef CONFIG_PPC_BOOK3E
322 bl .start_initialization_book3e
323 b .__after_prom_start
325 /* Setup some critical 970 SPRs before switching MMU off */
328 cmpwi r0,0x39 /* 970 */
330 cmpwi r0,0x3c /* 970FX */
332 cmpwi r0,0x44 /* 970MP */
334 cmpwi r0,0x45 /* 970GX */
336 1: bl .__cpu_preinit_ppc970
339 /* Switch off MMU if not already off */
341 b .__after_prom_start
342 #endif /* CONFIG_PPC_BOOK3E */
344 _INIT_STATIC(__boot_from_prom)
345 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
346 /* Save parameters */
354 * Align the stack to 16-byte boundary
355 * Depending on the size and layout of the ELF sections in the initial
356 * boot binary, the stack pointer may be unaligned on PowerMac
360 #ifdef CONFIG_RELOCATABLE
361 /* Relocate code for where we are now */
366 /* Restore parameters */
373 /* Do all of the interaction with OF client interface */
376 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
378 /* We never return. We also hit that trap if trying to boot
379 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
382 _STATIC(__after_prom_start)
383 #ifdef CONFIG_RELOCATABLE
384 /* process relocations for the final address of the kernel */
385 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
387 #ifdef CONFIG_CRASH_DUMP
388 lwz r7,__run_at_load-_stext(r26)
389 cmplwi cr0,r7,1 /* kdump kernel ? - stay where we are */
398 * We need to run with _stext at physical address PHYSICAL_START.
399 * This will leave some code in the first 256B of
400 * real memory, which are reserved for software use.
402 * Note: This process overwrites the OF exception vectors.
404 li r3,0 /* target addr */
405 #ifdef CONFIG_PPC_BOOK3E
406 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
408 mr. r4,r26 /* In some cases the loader may */
409 beq 9f /* have already put us at zero */
410 li r6,0x100 /* Start offset, the first 0x100 */
411 /* bytes were copied earlier. */
412 #ifdef CONFIG_PPC_BOOK3E
413 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
416 #ifdef CONFIG_CRASH_DUMP
418 * Check if the kernel has to be running as relocatable kernel based on the
419 * variable __run_at_load, if it is set the kernel is treated as relocatable
420 * kernel, otherwise it will be moved to PHYSICAL_START
422 lwz r7,__run_at_load-_stext(r26)
426 li r5,__end_interrupts - _stext /* just copy interrupts */
430 lis r5,(copy_to_here - _stext)@ha
431 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
433 bl .copy_and_flush /* copy the first n bytes */
434 /* this includes the code being */
436 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
437 addi r8,r8,(4f - _stext)@l /* that we just made */
441 p_end: .llong _end - _stext
443 4: /* Now copy the rest of the kernel up to _end */
444 addis r5,r26,(p_end - _stext)@ha
445 ld r5,(p_end - _stext)@l(r5) /* get _end */
446 5: bl .copy_and_flush /* copy the rest */
448 9: b .start_here_multiplatform
451 * Copy routine used to copy the kernel to start at physical address 0
452 * and flush and invalidate the caches as needed.
453 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
454 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
456 * Note: this routine *only* clobbers r0, r6 and lr
458 _GLOBAL(copy_and_flush)
461 4: li r0,8 /* Use the smallest common */
462 /* denominator cache line */
463 /* size. This results in */
464 /* extra cache line flushes */
465 /* but operation is correct. */
466 /* Can't get cache line size */
467 /* from NACA as it is being */
470 mtctr r0 /* put # words/line in ctr */
471 3: addi r6,r6,8 /* copy a cache line */
475 dcbst r6,r3 /* write it to memory */
477 icbi r6,r3 /* flush the icache line */
489 #ifdef CONFIG_PPC_PMAC
491 * On PowerMac, secondary processors starts from the reset vector, which
492 * is temporarily turned into a call to one of the functions below.
497 .globl __secondary_start_pmac_0
498 __secondary_start_pmac_0:
499 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
509 _GLOBAL(pmac_secondary_start)
510 /* turn on 64-bit mode */
515 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
522 /* get TOC pointer (real address) */
525 /* Copy some CPU settings from CPU 0 */
526 bl .__restore_cpu_ppc970
528 /* pSeries do that early though I don't think we really need it */
531 mtmsrd r3 /* RI on */
533 /* Set up a paca value for this processor. */
534 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
535 ld r4,0(r4) /* Get base vaddr of paca array */
536 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
537 add r13,r13,r4 /* for this processor. */
538 mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG*/
540 /* Create a temp kernel stack for use before relocation is on. */
541 ld r1,PACAEMERGSP(r13)
542 subi r1,r1,STACK_FRAME_OVERHEAD
546 #endif /* CONFIG_PPC_PMAC */
549 * This function is called after the master CPU has released the
550 * secondary processors. The execution environment is relocation off.
551 * The paca for this processor has the following fields initialized at
553 * 1. Processor number
554 * 2. Segment table pointer (virtual address)
555 * On entry the following are set:
556 * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries
557 * r24 = cpu# (in Linux terms)
558 * r13 = paca virtual address
559 * SPRG_PACA = paca virtual address
564 .globl __secondary_start
566 /* Set thread priority to MEDIUM */
569 /* Initialize the kernel stack. Just a repeat for iSeries. */
570 LOAD_REG_ADDR(r3, current_set)
571 sldi r28,r24,3 /* get current_set[cpu#] */
573 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
574 std r14,PACAKSAVE(r13)
576 /* Do early setup for that CPU (stab, slb, hash table pointer) */
577 bl .early_setup_secondary
580 * setup the new stack pointer, but *don't* use this until
585 /* Clear backchain so we get nice backtraces */
589 /* enable MMU and jump to start_secondary */
590 LOAD_REG_ADDR(r3, .start_secondary_prolog)
591 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
592 #ifdef CONFIG_PPC_ISERIES
596 stb r8,PACAHARDIRQEN(r13)
597 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
600 stb r7,PACAHARDIRQEN(r13)
601 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
602 stb r7,PACASOFTIRQEN(r13)
607 b . /* prevent speculative execution */
610 * Running with relocation on at this point. All we want to do is
611 * zero the stack back-chain pointer and get the TOC virtual address
612 * before going into C code.
614 _GLOBAL(start_secondary_prolog)
617 std r3,0(r1) /* Zero the stack frame pointer */
621 * Reset stack pointer and call start_secondary
622 * to continue with online operation when woken up
623 * from cede in cpu offline.
625 _GLOBAL(start_secondary_resume)
626 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
628 std r3,0(r1) /* Zero the stack frame pointer */
634 * This subroutine clobbers r11 and r12
636 _GLOBAL(enable_64b_mode)
637 mfmsr r11 /* grab the current MSR */
638 #ifdef CONFIG_PPC_BOOK3E
639 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
641 #else /* CONFIG_PPC_BOOK3E */
642 li r12,(MSR_SF | MSR_ISF)@highest
651 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
652 * by the toolchain). It computes the correct value for wherever we
653 * are running at the moment, using position-independent code.
655 _GLOBAL(relative_toc)
659 ld r2,(p_toc - 0b)(r9)
664 p_toc: .llong __toc_start + 0x8000 - 0b
667 * This is where the main kernel code starts.
669 _INIT_STATIC(start_here_multiplatform)
670 /* set up the TOC (real address) */
673 /* Clear out the BSS. It may have been done in prom_init,
674 * already but that's irrelevant since prom_init will soon
675 * be detached from the kernel completely. Besides, we need
676 * to clear it now for kexec-style entry.
678 LOAD_REG_ADDR(r11,__bss_stop)
679 LOAD_REG_ADDR(r8,__bss_start)
680 sub r11,r11,r8 /* bss size */
681 addi r11,r11,7 /* round up to an even double word */
682 srdi. r11,r11,3 /* shift right by 3 */
686 mtctr r11 /* zero this many doublewords */
691 #ifndef CONFIG_PPC_BOOK3E
694 mtmsrd r6 /* RI on */
697 #ifdef CONFIG_RELOCATABLE
698 /* Save the physical address we're running at in kernstart_addr */
699 LOAD_REG_ADDR(r4, kernstart_addr)
704 /* The following gets the stack set up with the regs */
705 /* pointing to the real addr of the kernel stack. This is */
706 /* all done to support the C function call below which sets */
707 /* up the htab. This is done because we have relocated the */
708 /* kernel but are still running in real mode. */
710 LOAD_REG_ADDR(r3,init_thread_union)
712 /* set up a stack pointer */
713 addi r1,r3,THREAD_SIZE
715 stdu r0,-STACK_FRAME_OVERHEAD(r1)
717 /* Do very early kernel initializations, including initial hash table,
718 * stab and slb setup before we turn on relocation. */
720 /* Restore parameters passed from prom_init/kexec */
722 bl .early_setup /* also sets r13 and SPRG_PACA */
724 LOAD_REG_ADDR(r3, .start_here_common)
729 b . /* prevent speculative execution */
731 /* This is where all platforms converge execution */
732 _INIT_GLOBAL(start_here_common)
733 /* relocation is on at this point */
734 std r1,PACAKSAVE(r13)
736 /* Load the TOC (virtual address) */
741 /* Load up the kernel context */
744 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */
745 #ifdef CONFIG_PPC_ISERIES
748 ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/
751 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
753 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
761 * We put a few things here that have to be page-aligned.
762 * This stuff goes at the beginning of the bss, which is page-aligned.
768 .globl empty_zero_page
772 .globl swapper_pg_dir
774 .space PGD_TABLE_SIZE