arch/powerpc/boot/dts/p5020si.dtsi

   1 /*
   2  * P5020 Silicon Device Tree Source
   3  *
   4  * Copyright 2010-2011 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /dts-v1/;
  36
  37 / {
  38         compatible = "fsl,P5020";
  39         #address-cells = <2>;
  40         #size-cells = <2>;
  41         interrupt-parent = <&mpic>;
  42
  43         aliases {
  44                 ccsr = &soc;
  45                 dcsr = &dcsr;
  46
  47                 serial0 = &serial0;
  48                 serial1 = &serial1;
  49                 serial2 = &serial2;
  50                 serial3 = &serial3;
  51                 pci0 = &pci0;
  52                 pci1 = &pci1;
  53                 pci2 = &pci2;
  54                 pci3 = &pci3;
  55                 usb0 = &usb0;
  56                 usb1 = &usb1;
  57                 dma0 = &dma0;
  58                 dma1 = &dma1;
  59                 sdhc = &sdhc;
  60                 msi0 = &msi0;
  61                 msi1 = &msi1;
  62                 msi2 = &msi2;
  63
  64                 crypto = &crypto;
  65                 sec_jr0 = &sec_jr0;
  66                 sec_jr1 = &sec_jr1;
  67                 sec_jr2 = &sec_jr2;
  68                 sec_jr3 = &sec_jr3;
  69                 rtic_a = &rtic_a;
  70                 rtic_b = &rtic_b;
  71                 rtic_c = &rtic_c;
  72                 rtic_d = &rtic_d;
  73                 sec_mon = &sec_mon;
  74
  75 /*
  76                 rio0 = &rapidio0;
  77  */
  78         };
  79
  80         cpus {
  81                 #address-cells = <1>;
  82                 #size-cells = <0>;
  83
  84                 cpu0: PowerPC,e5500@0 {
  85                         device_type = "cpu";
  86                         reg = <0>;
  87                         next-level-cache = <&L2_0>;
  88                         L2_0: l2-cache {
  89                                 next-level-cache = <&cpc>;
  90                         };
  91                 };
  92                 cpu1: PowerPC,e5500@1 {
  93                         device_type = "cpu";
  94                         reg = <1>;
  95                         next-level-cache = <&L2_1>;
  96                         L2_1: l2-cache {
  97                                 next-level-cache = <&cpc>;
  98                         };
  99                 };
 100         };
 101
 102         dcsr: dcsr@f00000000 {
 103                 #address-cells = <1>;
 104                 #size-cells = <1>;
 105                 compatible = "fsl,dcsr", "simple-bus";
 106
 107                 dcsr-epu@0 {
 108                         compatible = "fsl,dcsr-epu";
 109                         interrupts = <52 2 0 0
 110                                       84 2 0 0
 111                                       85 2 0 0>;
 112                         interrupt-parent = <&mpic>;
 113                         reg = <0x0 0x1000>;
 114                 };
 115                 dcsr-npc {
 116                         compatible = "fsl,dcsr-npc";
 117                         reg = <0x1000 0x1000 0x1000000 0x8000>;
 118                 };
 119                 dcsr-nxc@2000 {
 120                         compatible = "fsl,dcsr-nxc";
 121                         reg = <0x2000 0x1000>;
 122                 };
 123                 dcsr-corenet {
 124                         compatible = "fsl,dcsr-corenet";
 125                         reg = <0x8000 0x1000 0xB0000 0x1000>;
 126                 };
 127                 dcsr-dpaa@9000 {
 128                         compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
 129                         reg = <0x9000 0x1000>;
 130                 };
 131                 dcsr-ocn@11000 {
 132                         compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
 133                         reg = <0x11000 0x1000>;
 134                 };
 135                 dcsr-ddr@12000 {
 136                         compatible = "fsl,dcsr-ddr";
 137                         dev-handle = <&ddr1>;
 138                         reg = <0x12000 0x1000>;
 139                 };
 140                 dcsr-ddr@13000 {
 141                         compatible = "fsl,dcsr-ddr";
 142                         dev-handle = <&ddr2>;
 143                         reg = <0x13000 0x1000>;
 144                 };
 145                 dcsr-nal@18000 {
 146                         compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
 147                         reg = <0x18000 0x1000>;
 148                 };
 149                 dcsr-rcpm@22000 {
 150                         compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
 151                         reg = <0x22000 0x1000>;
 152                 };
 153                 dcsr-cpu-sb-proxy@40000 {
 154                         compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 155                         cpu-handle = <&cpu0>;
 156                         reg = <0x40000 0x1000>;
 157                 };
 158                 dcsr-cpu-sb-proxy@41000 {
 159                         compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 160                         cpu-handle = <&cpu1>;
 161                         reg = <0x41000 0x1000>;
 162                 };
 163         };
 164
 165         soc: soc@ffe000000 {
 166                 #address-cells = <1>;
 167                 #size-cells = <1>;
 168                 device_type = "soc";
 169                 compatible = "simple-bus";
 170                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 171                 reg = <0xf 0xfe000000 0 0x00001000>;
 172
 173                 soc-sram-error {
 174                         compatible = "fsl,soc-sram-error";
 175                         interrupts = <16 2 1 29>;
 176                 };
 177
 178                 corenet-law@0 {
 179                         compatible = "fsl,corenet-law";
 180                         reg = <0x0 0x1000>;
 181                         fsl,num-laws = <32>;
 182                 };
 183
 184                 ddr1: memory-controller@8000 {
 185                         compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
 186                         reg = <0x8000 0x1000>;
 187                         interrupts = <16 2 1 23>;
 188                 };
 189
 190                 ddr2: memory-controller@9000 {
 191                         compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
 192                         reg = <0x9000 0x1000>;
 193                         interrupts = <16 2 1 22>;
 194                 };
 195
 196                 cpc: l3-cache-controller@10000 {
 197                         compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
 198                         reg = <0x10000 0x1000
 199                                0x11000 0x1000>;
 200                         interrupts = <16 2 1 27
 201                                       16 2 1 26>;
 202                 };
 203
 204                 corenet-cf@18000 {
 205                         compatible = "fsl,corenet-cf";
 206                         reg = <0x18000 0x1000>;
 207                         interrupts = <16 2 1 31>;
 208                         fsl,ccf-num-csdids = <32>;
 209                         fsl,ccf-num-snoopids = <32>;
 210                 };
 211
 212                 iommu@20000 {
 213                         compatible = "fsl,pamu-v1.0", "fsl,pamu";
 214                         reg = <0x20000 0x4000>;
 215                         interrupts = <
 216                                 24 2 0 0
 217                                 16 2 1 30>;
 218                 };
 219
 220                 mpic: pic@40000 {
 221                         clock-frequency = <0>;
 222                         interrupt-controller;
 223                         #address-cells = <0>;
 224                         #interrupt-cells = <4>;
 225                         reg = <0x40000 0x40000>;
 226                         compatible = "fsl,mpic", "chrp,open-pic";
 227                         device_type = "open-pic";
 228                 };
 229
 230                 msi0: msi@41600 {
 231                         compatible = "fsl,mpic-msi";
 232                         reg = <0x41600 0x200>;
 233                         msi-available-ranges = <0 0x100>;
 234                         interrupts = <
 235                                 0xe0 0 0 0
 236                                 0xe1 0 0 0
 237                                 0xe2 0 0 0
 238                                 0xe3 0 0 0
 239                                 0xe4 0 0 0
 240                                 0xe5 0 0 0
 241                                 0xe6 0 0 0
 242                                 0xe7 0 0 0>;
 243                 };
 244
 245                 msi1: msi@41800 {
 246                         compatible = "fsl,mpic-msi";
 247                         reg = <0x41800 0x200>;
 248                         msi-available-ranges = <0 0x100>;
 249                         interrupts = <
 250                                 0xe8 0 0 0
 251                                 0xe9 0 0 0
 252                                 0xea 0 0 0
 253                                 0xeb 0 0 0
 254                                 0xec 0 0 0
 255                                 0xed 0 0 0
 256                                 0xee 0 0 0
 257                                 0xef 0 0 0>;
 258                 };
 259
 260                 msi2: msi@41a00 {
 261                         compatible = "fsl,mpic-msi";
 262                         reg = <0x41a00 0x200>;
 263                         msi-available-ranges = <0 0x100>;
 264                         interrupts = <
 265                                 0xf0 0 0 0
 266                                 0xf1 0 0 0
 267                                 0xf2 0 0 0
 268                                 0xf3 0 0 0
 269                                 0xf4 0 0 0
 270                                 0xf5 0 0 0
 271                                 0xf6 0 0 0
 272                                 0xf7 0 0 0>;
 273                 };
 274
 275                 guts: global-utilities@e0000 {
 276                         compatible = "fsl,qoriq-device-config-1.0";
 277                         reg = <0xe0000 0xe00>;
 278                         fsl,has-rstcr;
 279                         #sleep-cells = <1>;
 280                         fsl,liodn-bits = <12>;
 281                 };
 282
 283                 pins: global-utilities@e0e00 {
 284                         compatible = "fsl,qoriq-pin-control-1.0";
 285                         reg = <0xe0e00 0x200>;
 286                         #sleep-cells = <2>;
 287                 };
 288
 289                 clockgen: global-utilities@e1000 {
 290                         compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
 291                         reg = <0xe1000 0x1000>;
 292                         clock-frequency = <0>;
 293                 };
 294
 295                 rcpm: global-utilities@e2000 {
 296                         compatible = "fsl,qoriq-rcpm-1.0";
 297                         reg = <0xe2000 0x1000>;
 298                         #sleep-cells = <1>;
 299                 };
 300
 301                 sfp: sfp@e8000 {
 302                         compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
 303                         reg        = <0xe8000 0x1000>;
 304                 };
 305
 306                 serdes: serdes@ea000 {
 307                         compatible = "fsl,p5020-serdes";
 308                         reg        = <0xea000 0x1000>;
 309                 };
 310
 311                 dma0: dma@100300 {
 312                         #address-cells = <1>;
 313                         #size-cells = <1>;
 314                         compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
 315                         reg = <0x100300 0x4>;
 316                         ranges = <0x0 0x100100 0x200>;
 317                         cell-index = <0>;
 318                         dma-channel@0 {
 319                                 compatible = "fsl,p5020-dma-channel",
 320                                                 "fsl,eloplus-dma-channel";
 321                                 reg = <0x0 0x80>;
 322                                 cell-index = <0>;
 323                                 interrupts = <28 2 0 0>;
 324                         };
 325                         dma-channel@80 {
 326                                 compatible = "fsl,p5020-dma-channel",
 327                                                 "fsl,eloplus-dma-channel";
 328                                 reg = <0x80 0x80>;
 329                                 cell-index = <1>;
 330                                 interrupts = <29 2 0 0>;
 331                         };
 332                         dma-channel@100 {
 333                                 compatible = "fsl,p5020-dma-channel",
 334                                                 "fsl,eloplus-dma-channel";
 335                                 reg = <0x100 0x80>;
 336                                 cell-index = <2>;
 337                                 interrupts = <30 2 0 0>;
 338                         };
 339                         dma-channel@180 {
 340                                 compatible = "fsl,p5020-dma-channel",
 341                                                 "fsl,eloplus-dma-channel";
 342                                 reg = <0x180 0x80>;
 343                                 cell-index = <3>;
 344                                 interrupts = <31 2 0 0>;
 345                         };
 346                 };
 347
 348                 dma1: dma@101300 {
 349                         #address-cells = <1>;
 350                         #size-cells = <1>;
 351                         compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
 352                         reg = <0x101300 0x4>;
 353                         ranges = <0x0 0x101100 0x200>;
 354                         cell-index = <1>;
 355                         dma-channel@0 {
 356                                 compatible = "fsl,p5020-dma-channel",
 357                                                 "fsl,eloplus-dma-channel";
 358                                 reg = <0x0 0x80>;
 359                                 cell-index = <0>;
 360                                 interrupts = <32 2 0 0>;
 361                         };
 362                         dma-channel@80 {
 363                                 compatible = "fsl,p5020-dma-channel",
 364                                                 "fsl,eloplus-dma-channel";
 365                                 reg = <0x80 0x80>;
 366                                 cell-index = <1>;
 367                                 interrupts = <33 2 0 0>;
 368                         };
 369                         dma-channel@100 {
 370                                 compatible = "fsl,p5020-dma-channel",
 371                                                 "fsl,eloplus-dma-channel";
 372                                 reg = <0x100 0x80>;
 373                                 cell-index = <2>;
 374                                 interrupts = <34 2 0 0>;
 375                         };
 376                         dma-channel@180 {
 377                                 compatible = "fsl,p5020-dma-channel",
 378                                                 "fsl,eloplus-dma-channel";
 379                                 reg = <0x180 0x80>;
 380                                 cell-index = <3>;
 381                                 interrupts = <35 2 0 0>;
 382                         };
 383                 };
 384
 385                 spi@110000 {
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
 389                         reg = <0x110000 0x1000>;
 390                         interrupts = <53 0x2 0 0>;
 391                         fsl,espi-num-chipselects = <4>;
 392                 };
 393
 394                 sdhc: sdhc@114000 {
 395                         compatible = "fsl,p5020-esdhc", "fsl,esdhc";
 396                         reg = <0x114000 0x1000>;
 397                         interrupts = <48 2 0 0>;
 398                         sdhci,auto-cmd12;
 399                         clock-frequency = <0>;
 400                 };
 401
 402                 i2c@118000 {
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405                         cell-index = <0>;
 406                         compatible = "fsl-i2c";
 407                         reg = <0x118000 0x100>;
 408                         interrupts = <38 2 0 0>;
 409                         dfsrr;
 410                 };
 411
 412                 i2c@118100 {
 413                         #address-cells = <1>;
 414                         #size-cells = <0>;
 415                         cell-index = <1>;
 416                         compatible = "fsl-i2c";
 417                         reg = <0x118100 0x100>;
 418                         interrupts = <38 2 0 0>;
 419                         dfsrr;
 420                 };
 421
 422                 i2c@119000 {
 423                         #address-cells = <1>;
 424                         #size-cells = <0>;
 425                         cell-index = <2>;
 426                         compatible = "fsl-i2c";
 427                         reg = <0x119000 0x100>;
 428                         interrupts = <39 2 0 0>;
 429                         dfsrr;
 430                 };
 431
 432                 i2c@119100 {
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         cell-index = <3>;
 436                         compatible = "fsl-i2c";
 437                         reg = <0x119100 0x100>;
 438                         interrupts = <39 2 0 0>;
 439                         dfsrr;
 440                 };
 441
 442                 serial0: serial@11c500 {
 443                         cell-index = <0>;
 444                         device_type = "serial";
 445                         compatible = "ns16550";
 446                         reg = <0x11c500 0x100>;
 447                         clock-frequency = <0>;
 448                         interrupts = <36 2 0 0>;
 449                 };
 450
 451                 serial1: serial@11c600 {
 452                         cell-index = <1>;
 453                         device_type = "serial";
 454                         compatible = "ns16550";
 455                         reg = <0x11c600 0x100>;
 456                         clock-frequency = <0>;
 457                         interrupts = <36 2 0 0>;
 458                 };
 459
 460                 serial2: serial@11d500 {
 461                         cell-index = <2>;
 462                         device_type = "serial";
 463                         compatible = "ns16550";
 464                         reg = <0x11d500 0x100>;
 465                         clock-frequency = <0>;
 466                         interrupts = <37 2 0 0>;
 467                 };
 468
 469                 serial3: serial@11d600 {
 470                         cell-index = <3>;
 471                         device_type = "serial";
 472                         compatible = "ns16550";
 473                         reg = <0x11d600 0x100>;
 474                         clock-frequency = <0>;
 475                         interrupts = <37 2 0 0>;
 476                 };
 477
 478                 gpio0: gpio@130000 {
 479                         compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
 480                         reg = <0x130000 0x1000>;
 481                         interrupts = <55 2 0 0>;
 482                         #gpio-cells = <2>;
 483                         gpio-controller;
 484                 };
 485
 486                 usb0: usb@210000 {
 487                         compatible = "fsl,p5020-usb2-mph",
 488                                         "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
 489                         reg = <0x210000 0x1000>;
 490                         #address-cells = <1>;
 491                         #size-cells = <0>;
 492                         interrupts = <44 0x2 0 0>;
 493                         phy_type = "utmi";
 494                         port0;
 495                 };
 496
 497                 usb1: usb@211000 {
 498                         compatible = "fsl,p5020-usb2-dr",
 499                                         "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
 500                         reg = <0x211000 0x1000>;
 501                         #address-cells = <1>;
 502                         #size-cells = <0>;
 503                         interrupts = <45 0x2 0 0>;
 504                         dr_mode = "host";
 505                         phy_type = "utmi";
 506                 };
 507
 508                 sata@220000 {
 509                         compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
 510                         reg = <0x220000 0x1000>;
 511                         interrupts = <68 0x2 0 0>;
 512                 };
 513
 514                 sata@221000 {
 515                         compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
 516                         reg = <0x221000 0x1000>;
 517                         interrupts = <69 0x2 0 0>;
 518                 };
 519
 520                 crypto: crypto@300000 {
 521                         compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
 522                         #address-cells = <1>;
 523                         #size-cells = <1>;
 524                         reg              = <0x300000 0x10000>;
 525                         ranges           = <0 0x300000 0x10000>;
 526                         interrupts       = <92 2 0 0>;
 527
 528                         sec_jr0: jr@1000 {
 529                                 compatible = "fsl,sec-v4.2-job-ring",
 530                                              "fsl,sec-v4.0-job-ring";
 531                                 reg = <0x1000 0x1000>;
 532                                 interrupts = <88 2 0 0>;
 533                         };
 534
 535                         sec_jr1: jr@2000 {
 536                                 compatible = "fsl,sec-v4.2-job-ring",
 537                                              "fsl,sec-v4.0-job-ring";
 538                                 reg = <0x2000 0x1000>;
 539                                 interrupts = <89 2 0 0>;
 540                         };
 541
 542                         sec_jr2: jr@3000 {
 543                                 compatible = "fsl,sec-v4.2-job-ring",
 544                                              "fsl,sec-v4.0-job-ring";
 545                                 reg = <0x3000 0x1000>;
 546                                 interrupts = <90 2 0 0>;
 547                         };
 548
 549                         sec_jr3: jr@4000 {
 550                                 compatible = "fsl,sec-v4.2-job-ring",
 551                                              "fsl,sec-v4.0-job-ring";
 552                                 reg = <0x4000 0x1000>;
 553                                 interrupts = <91 2 0 0>;
 554                         };
 555
 556                         rtic@6000 {
 557                                 compatible = "fsl,sec-v4.2-rtic",
 558                                              "fsl,sec-v4.0-rtic";
 559                                 #address-cells = <1>;
 560                                 #size-cells = <1>;
 561                                 reg = <0x6000 0x100>;
 562                                 ranges = <0x0 0x6100 0xe00>;
 563
 564                                 rtic_a: rtic-a@0 {
 565                                         compatible = "fsl,sec-v4.2-rtic-memory",
 566                                                      "fsl,sec-v4.0-rtic-memory";
 567                                         reg = <0x00 0x20 0x100 0x80>;
 568                                 };
 569
 570                                 rtic_b: rtic-b@20 {
 571                                         compatible = "fsl,sec-v4.2-rtic-memory",
 572                                                      "fsl,sec-v4.0-rtic-memory";
 573                                         reg = <0x20 0x20 0x200 0x80>;
 574                                 };
 575
 576                                 rtic_c: rtic-c@40 {
 577                                         compatible = "fsl,sec-v4.2-rtic-memory",
 578                                                      "fsl,sec-v4.0-rtic-memory";
 579                                         reg = <0x40 0x20 0x300 0x80>;
 580                                 };
 581
 582                                 rtic_d: rtic-d@60 {
 583                                         compatible = "fsl,sec-v4.2-rtic-memory",
 584                                                      "fsl,sec-v4.0-rtic-memory";
 585                                         reg = <0x60 0x20 0x500 0x80>;
 586                                 };
 587                         };
 588                 };
 589
 590                 sec_mon: sec_mon@314000 {
 591                         compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
 592                         reg = <0x314000 0x1000>;
 593                         interrupts = <93 2 0 0>;
 594                 };
 595         };
 596
 597 /*
 598         rapidio0: rapidio@ffe0c0000
 599 */
 600
 601         localbus@ffe124000 {
 602                 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
 603                 interrupts = <25 2 0 0>;
 604                 #address-cells = <2>;
 605                 #size-cells = <1>;
 606         };
 607
 608         pci0: pcie@ffe200000 {
 609                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 610                 device_type = "pci";
 611                 #size-cells = <2>;
 612                 #address-cells = <3>;
 613                 bus-range = <0x0 0xff>;
 614                 clock-frequency = <0x1fca055>;
 615                 fsl,msi = <&msi0>;
 616                 interrupts = <16 2 1 15>;
 617
 618                 pcie@0 {
 619                         reg = <0 0 0 0 0>;
 620                         #interrupt-cells = <1>;
 621                         #size-cells = <2>;
 622                         #address-cells = <3>;
 623                         device_type = "pci";
 624                         interrupts = <16 2 1 15>;
 625                         interrupt-map-mask = <0xf800 0 0 7>;
 626                         interrupt-map = <
 627                                 /* IDSEL 0x0 */
 628                                 0000 0 0 1 &mpic 40 1 0 0
 629                                 0000 0 0 2 &mpic 1 1 0 0
 630                                 0000 0 0 3 &mpic 2 1 0 0
 631                                 0000 0 0 4 &mpic 3 1 0 0
 632                                 >;
 633                 };
 634         };
 635
 636         pci1: pcie@ffe201000 {
 637                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 638                 device_type = "pci";
 639                 #size-cells = <2>;
 640                 #address-cells = <3>;
 641                 bus-range = <0 0xff>;
 642                 clock-frequency = <0x1fca055>;
 643                 fsl,msi = <&msi1>;
 644                 interrupts = <16 2 1 14>;
 645                 pcie@0 {
 646                         reg = <0 0 0 0 0>;
 647                         #interrupt-cells = <1>;
 648                         #size-cells = <2>;
 649                         #address-cells = <3>;
 650                         device_type = "pci";
 651                         interrupts = <16 2 1 14>;
 652                         interrupt-map-mask = <0xf800 0 0 7>;
 653                         interrupt-map = <
 654                                 /* IDSEL 0x0 */
 655                                 0000 0 0 1 &mpic 41 1 0 0
 656                                 0000 0 0 2 &mpic 5 1 0 0
 657                                 0000 0 0 3 &mpic 6 1 0 0
 658                                 0000 0 0 4 &mpic 7 1 0 0
 659                                 >;
 660                 };
 661         };
 662
 663         pci2: pcie@ffe202000 {
 664                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 665                 device_type = "pci";
 666                 #size-cells = <2>;
 667                 #address-cells = <3>;
 668                 bus-range = <0x0 0xff>;
 669                 clock-frequency = <0x1fca055>;
 670                 fsl,msi = <&msi2>;
 671                 interrupts = <16 2 1 13>;
 672                 pcie@0 {
 673                         reg = <0 0 0 0 0>;
 674                         #interrupt-cells = <1>;
 675                         #size-cells = <2>;
 676                         #address-cells = <3>;
 677                         device_type = "pci";
 678                         interrupts = <16 2 1 13>;
 679                         interrupt-map-mask = <0xf800 0 0 7>;
 680                         interrupt-map = <
 681                                 /* IDSEL 0x0 */
 682                                 0000 0 0 1 &mpic 42 1 0 0
 683                                 0000 0 0 2 &mpic 9 1 0 0
 684                                 0000 0 0 3 &mpic 10 1 0 0
 685                                 0000 0 0 4 &mpic 11 1 0 0
 686                                 >;
 687                 };
 688         };
 689
 690         pci3: pcie@ffe203000 {
 691                 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 692                 device_type = "pci";
 693                 #size-cells = <2>;
 694                 #address-cells = <3>;
 695                 bus-range = <0x0 0xff>;
 696                 clock-frequency = <0x1fca055>;
 697                 fsl,msi = <&msi2>;
 698                 interrupts = <16 2 1 12>;
 699                 pcie@0 {
 700                         reg = <0 0 0 0 0>;
 701                         #interrupt-cells = <1>;
 702                         #size-cells = <2>;
 703                         #address-cells = <3>;
 704                         device_type = "pci";
 705                         interrupts = <16 2 1 12>;
 706                         interrupt-map-mask = <0xf800 0 0 7>;
 707                         interrupt-map = <
 708                                 /* IDSEL 0x0 */
 709                                 0000 0 0 1 &mpic 43 1 0 0
 710                                 0000 0 0 2 &mpic 0 1 0 0
 711                                 0000 0 0 3 &mpic 4 1 0 0
 712                                 0000 0 0 4 &mpic 8 1 0 0
 713                                 >;
 714                 };
 715         };
 716 };