Merge branch 'dev' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4
[pandora-kernel.git] / arch / powerpc / boot / dts / p3060si.dtsi
1 /*
2  * P3060 Silicon Device Tree Source
3  *
4  * Copyright 2011 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34
35 /dts-v1/;
36
37 / {
38         compatible = "fsl,P3060";
39         #address-cells = <2>;
40         #size-cells = <2>;
41         interrupt-parent = <&mpic>;
42
43         aliases {
44                 ccsr = &soc;
45                 dcsr = &dcsr;
46
47                 serial0 = &serial0;
48                 serial1 = &serial1;
49                 serial2 = &serial2;
50                 serial3 = &serial3;
51                 pci0 = &pci0;
52                 pci1 = &pci1;
53                 usb0 = &usb0;
54                 usb1 = &usb1;
55                 dma0 = &dma0;
56                 dma1 = &dma1;
57                 msi0 = &msi0;
58                 msi1 = &msi1;
59                 msi2 = &msi2;
60
61                 crypto = &crypto;
62                 sec_jr0 = &sec_jr0;
63                 sec_jr1 = &sec_jr1;
64                 sec_jr2 = &sec_jr2;
65                 sec_jr3 = &sec_jr3;
66                 rtic_a = &rtic_a;
67                 rtic_b = &rtic_b;
68                 rtic_c = &rtic_c;
69                 rtic_d = &rtic_d;
70                 sec_mon = &sec_mon;
71         };
72
73         cpus {
74                 #address-cells = <1>;
75                 #size-cells = <0>;
76
77                 cpu0: PowerPC,e500mc@0 {
78                         device_type = "cpu";
79                         reg = <0>;
80                         next-level-cache = <&L2_0>;
81                         L2_0: l2-cache {
82                                 next-level-cache = <&cpc>;
83                         };
84                 };
85                 cpu1: PowerPC,e500mc@1 {
86                         device_type = "cpu";
87                         reg = <1>;
88                         next-level-cache = <&L2_1>;
89                         L2_1: l2-cache {
90                                 next-level-cache = <&cpc>;
91                         };
92                 };
93                 cpu4: PowerPC,e500mc@4 {
94                         device_type = "cpu";
95                         reg = <4>;
96                         next-level-cache = <&L2_4>;
97                         L2_4: l2-cache {
98                                 next-level-cache = <&cpc>;
99                         };
100                 };
101                 cpu5: PowerPC,e500mc@5 {
102                         device_type = "cpu";
103                         reg = <5>;
104                         next-level-cache = <&L2_5>;
105                         L2_5: l2-cache {
106                                 next-level-cache = <&cpc>;
107                         };
108                 };
109                 cpu6: PowerPC,e500mc@6 {
110                         device_type = "cpu";
111                         reg = <6>;
112                         next-level-cache = <&L2_6>;
113                         L2_6: l2-cache {
114                                 next-level-cache = <&cpc>;
115                         };
116                 };
117                 cpu7: PowerPC,e500mc@7 {
118                         device_type = "cpu";
119                         reg = <7>;
120                         next-level-cache = <&L2_7>;
121                         L2_7: l2-cache {
122                                 next-level-cache = <&cpc>;
123                         };
124                 };
125         };
126
127         dcsr: dcsr@f00000000 {
128                 #address-cells = <1>;
129                 #size-cells = <1>;
130                 compatible = "fsl,dcsr", "simple-bus";
131
132                 dcsr-epu@0 {
133                         compatible = "fsl,dcsr-epu";
134                         interrupts = <52 2 0 0
135                                       84 2 0 0
136                                       85 2 0 0>;
137                         interrupt-parent = <&mpic>;
138                         reg = <0x0 0x1000>;
139                 };
140                 dcsr-npc {
141                         compatible = "fsl,dcsr-npc";
142                         reg = <0x1000 0x1000 0x1000000 0x8000>;
143                 };
144                 dcsr-nxc@2000 {
145                         compatible = "fsl,dcsr-nxc";
146                         reg = <0x2000 0x1000>;
147                 };
148                 dcsr-corenet {
149                         compatible = "fsl,dcsr-corenet";
150                         reg = <0x8000 0x1000 0xB0000 0x1000>;
151                 };
152                 dcsr-dpaa@9000 {
153                         compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
154                         reg = <0x9000 0x1000>;
155                 };
156                 dcsr-ocn@11000 {
157                         compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
158                         reg = <0x11000 0x1000>;
159                 };
160                 dcsr-ddr@12000 {
161                         compatible = "fsl,dcsr-ddr";
162                         dev-handle = <&ddr>;
163                         reg = <0x12000 0x1000>;
164                 };
165                 dcsr-nal@18000 {
166                         compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
167                         reg = <0x18000 0x1000>;
168                 };
169                 dcsr-rcpm@22000 {
170                         compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
171                         reg = <0x22000 0x1000>;
172                 };
173                 dcsr-cpu-sb-proxy@40000 {
174                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175                         cpu-handle = <&cpu0>;
176                         reg = <0x40000 0x1000>;
177                 };
178                 dcsr-cpu-sb-proxy@41000 {
179                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180                         cpu-handle = <&cpu1>;
181                         reg = <0x41000 0x1000>;
182                 };
183                 dcsr-cpu-sb-proxy@44000 {
184                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185                         cpu-handle = <&cpu4>;
186                         reg = <0x44000 0x1000>;
187                 };
188                 dcsr-cpu-sb-proxy@45000 {
189                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190                         cpu-handle = <&cpu5>;
191                         reg = <0x45000 0x1000>;
192                 };
193                 dcsr-cpu-sb-proxy@46000 {
194                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195                         cpu-handle = <&cpu6>;
196                         reg = <0x46000 0x1000>;
197                 };
198                 dcsr-cpu-sb-proxy@47000 {
199                         compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200                         cpu-handle = <&cpu7>;
201                         reg = <0x47000 0x1000>;
202                 };
203         };
204
205         soc: soc@ffe000000 {
206                 #address-cells = <1>;
207                 #size-cells = <1>;
208                 device_type = "soc";
209                 compatible = "simple-bus";
210                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
211                 reg = <0xf 0xfe000000 0 0x00001000>;
212
213                 soc-sram-error {
214                         compatible = "fsl,soc-sram-error";
215                         interrupts = <16 2 1 29>;
216                 };
217
218                 corenet-law@0 {
219                         compatible = "fsl,corenet-law";
220                         reg = <0x0 0x1000>;
221                         fsl,num-laws = <32>;
222                 };
223
224                 ddr: memory-controller@8000 {
225                         compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
226                         reg = <0x8000 0x1000>;
227                         interrupts = <16 2 1 23>;
228                 };
229
230                 cpc: l3-cache-controller@10000 {
231                         compatible = "fsl,p3060-l3-cache-controller", "cache";
232                         reg = <0x10000 0x1000
233                                0x11000 0x1000>;
234                         interrupts = <16 2 1 27>;
235                 };
236
237                 corenet-cf@18000 {
238                         compatible = "fsl,corenet-cf";
239                         reg = <0x18000 0x1000>;
240                         interrupts = <16 2 1 31>;
241                         fsl,ccf-num-csdids = <32>;
242                         fsl,ccf-num-snoopids = <32>;
243                 };
244
245                 iommu@20000 {
246                         compatible = "fsl,pamu-v1.0", "fsl,pamu";
247                         reg = <0x20000 0x5000>;
248                         interrupts = <
249                                 24 2 0 0
250                                 16 2 1 30>;
251                 };
252
253                 mpic: pic@40000 {
254                         clock-frequency = <0>;
255                         interrupt-controller;
256                         #address-cells = <0>;
257                         #interrupt-cells = <4>;
258                         reg = <0x40000 0x40000>;
259                         compatible = "fsl,mpic", "chrp,open-pic";
260                         device_type = "open-pic";
261                 };
262
263                 msi0: msi@41600 {
264                         compatible = "fsl,mpic-msi";
265                         reg = <0x41600 0x200>;
266                         msi-available-ranges = <0 0x100>;
267                         interrupts = <
268                                 0xe0 0 0 0
269                                 0xe1 0 0 0
270                                 0xe2 0 0 0
271                                 0xe3 0 0 0
272                                 0xe4 0 0 0
273                                 0xe5 0 0 0
274                                 0xe6 0 0 0
275                                 0xe7 0 0 0>;
276                 };
277
278                 msi1: msi@41800 {
279                         compatible = "fsl,mpic-msi";
280                         reg = <0x41800 0x200>;
281                         msi-available-ranges = <0 0x100>;
282                         interrupts = <
283                                 0xe8 0 0 0
284                                 0xe9 0 0 0
285                                 0xea 0 0 0
286                                 0xeb 0 0 0
287                                 0xec 0 0 0
288                                 0xed 0 0 0
289                                 0xee 0 0 0
290                                 0xef 0 0 0>;
291                 };
292
293                 msi2: msi@41a00 {
294                         compatible = "fsl,mpic-msi";
295                         reg = <0x41a00 0x200>;
296                         msi-available-ranges = <0 0x100>;
297                         interrupts = <
298                                 0xf0 0 0 0
299                                 0xf1 0 0 0
300                                 0xf2 0 0 0
301                                 0xf3 0 0 0
302                                 0xf4 0 0 0
303                                 0xf5 0 0 0
304                                 0xf6 0 0 0
305                                 0xf7 0 0 0>;
306                 };
307
308                 rmu: rmu@d3000 {
309                         #address-cells = <1>;
310                         #size-cells = <1>;
311                         compatible = "fsl,srio-rmu";
312                         reg = <0xd3000 0x500>;
313                         ranges = <0x0 0xd3000 0x500>;
314
315                         message-unit@0 {
316                                 compatible = "fsl,srio-msg-unit";
317                                 reg = <0x0 0x100>;
318                                 interrupts = <
319                                         60 2 0 0  /* msg1_tx_irq */
320                                         61 2 0 0>;/* msg1_rx_irq */
321                         };
322                         message-unit@100 {
323                                 compatible = "fsl,srio-msg-unit";
324                                 reg = <0x100 0x100>;
325                                 interrupts = <
326                                         62 2 0 0  /* msg2_tx_irq */
327                                         63 2 0 0>;/* msg2_rx_irq */
328                         };
329                         doorbell-unit@400 {
330                                 compatible = "fsl,srio-dbell-unit";
331                                 reg = <0x400 0x80>;
332                                 interrupts = <
333                                         56 2 0 0  /* bell_outb_irq */
334                                         57 2 0 0>;/* bell_inb_irq */
335                         };
336                         port-write-unit@4e0 {
337                                 compatible = "fsl,srio-port-write-unit";
338                                 reg = <0x4e0 0x20>;
339                                 interrupts = <16 2 1 11>;
340                         };
341                 };
342
343                 guts: global-utilities@e0000 {
344                         compatible = "fsl,qoriq-device-config-1.0";
345                         reg = <0xe0000 0xe00>;
346                         fsl,has-rstcr;
347                         #sleep-cells = <1>;
348                         fsl,liodn-bits = <12>;
349                 };
350
351                 pins: global-utilities@e0e00 {
352                         compatible = "fsl,qoriq-pin-control-1.0";
353                         reg = <0xe0e00 0x200>;
354                         #sleep-cells = <2>;
355                 };
356
357                 clockgen: global-utilities@e1000 {
358                         compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
359                         reg = <0xe1000 0x1000>;
360                         clock-frequency = <0>;
361                 };
362
363                 rcpm: global-utilities@e2000 {
364                         compatible = "fsl,qoriq-rcpm-1.0";
365                         reg = <0xe2000 0x1000>;
366                         #sleep-cells = <1>;
367                 };
368
369                 sfp: sfp@e8000 {
370                         compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
371                         reg        = <0xe8000 0x1000>;
372                 };
373
374                 serdes: serdes@ea000 {
375                         compatible = "fsl,p3060-serdes";
376                         reg        = <0xea000 0x1000>;
377                 };
378
379                 dma0: dma@100300 {
380                         #address-cells = <1>;
381                         #size-cells = <1>;
382                         compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
383                         reg = <0x100300 0x4>;
384                         ranges = <0x0 0x100100 0x200>;
385                         cell-index = <0>;
386                         dma-channel@0 {
387                                 compatible = "fsl,p3060-dma-channel",
388                                                 "fsl,eloplus-dma-channel";
389                                 reg = <0x0 0x80>;
390                                 cell-index = <0>;
391                                 interrupts = <28 2 0 0>;
392                         };
393                         dma-channel@80 {
394                                 compatible = "fsl,p3060-dma-channel",
395                                                 "fsl,eloplus-dma-channel";
396                                 reg = <0x80 0x80>;
397                                 cell-index = <1>;
398                                 interrupts = <29 2 0 0>;
399                         };
400                         dma-channel@100 {
401                                 compatible = "fsl,p3060-dma-channel",
402                                                 "fsl,eloplus-dma-channel";
403                                 reg = <0x100 0x80>;
404                                 cell-index = <2>;
405                                 interrupts = <30 2 0 0>;
406                         };
407                         dma-channel@180 {
408                                 compatible = "fsl,p3060-dma-channel",
409                                                 "fsl,eloplus-dma-channel";
410                                 reg = <0x180 0x80>;
411                                 cell-index = <3>;
412                                 interrupts = <31 2 0 0>;
413                         };
414                 };
415
416                 dma1: dma@101300 {
417                         #address-cells = <1>;
418                         #size-cells = <1>;
419                         compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
420                         reg = <0x101300 0x4>;
421                         ranges = <0x0 0x101100 0x200>;
422                         cell-index = <1>;
423                         dma-channel@0 {
424                                 compatible = "fsl,p3060-dma-channel",
425                                                 "fsl,eloplus-dma-channel";
426                                 reg = <0x0 0x80>;
427                                 cell-index = <0>;
428                                 interrupts = <32 2 0 0>;
429                         };
430                         dma-channel@80 {
431                                 compatible = "fsl,p3060-dma-channel",
432                                                 "fsl,eloplus-dma-channel";
433                                 reg = <0x80 0x80>;
434                                 cell-index = <1>;
435                                 interrupts = <33 2 0 0>;
436                         };
437                         dma-channel@100 {
438                                 compatible = "fsl,p3060-dma-channel",
439                                                 "fsl,eloplus-dma-channel";
440                                 reg = <0x100 0x80>;
441                                 cell-index = <2>;
442                                 interrupts = <34 2 0 0>;
443                         };
444                         dma-channel@180 {
445                                 compatible = "fsl,p3060-dma-channel",
446                                                 "fsl,eloplus-dma-channel";
447                                 reg = <0x180 0x80>;
448                                 cell-index = <3>;
449                                 interrupts = <35 2 0 0>;
450                         };
451                 };
452
453                 spi@110000 {
454                         #address-cells = <1>;
455                         #size-cells = <0>;
456                         compatible = "fsl,p3060-espi", "fsl,mpc8536-espi";
457                         reg = <0x110000 0x1000>;
458                         interrupts = <53 0x2 0 0>;
459                         fsl,espi-num-chipselects = <4>;
460                 };
461
462                 i2c@118000 {
463                         #address-cells = <1>;
464                         #size-cells = <0>;
465                         cell-index = <0>;
466                         compatible = "fsl-i2c";
467                         reg = <0x118000 0x100>;
468                         interrupts = <38 2 0 0>;
469                         dfsrr;
470                 };
471
472                 i2c@118100 {
473                         #address-cells = <1>;
474                         #size-cells = <0>;
475                         cell-index = <1>;
476                         compatible = "fsl-i2c";
477                         reg = <0x118100 0x100>;
478                         interrupts = <38 2 0 0>;
479                         dfsrr;
480                 };
481
482                 i2c@119000 {
483                         #address-cells = <1>;
484                         #size-cells = <0>;
485                         cell-index = <2>;
486                         compatible = "fsl-i2c";
487                         reg = <0x119000 0x100>;
488                         interrupts = <39 2 0 0>;
489                         dfsrr;
490                 };
491
492                 i2c@119100 {
493                         #address-cells = <1>;
494                         #size-cells = <0>;
495                         cell-index = <3>;
496                         compatible = "fsl-i2c";
497                         reg = <0x119100 0x100>;
498                         interrupts = <39 2 0 0>;
499                         dfsrr;
500                 };
501
502                 serial0: serial@11c500 {
503                         cell-index = <0>;
504                         device_type = "serial";
505                         compatible = "ns16550";
506                         reg = <0x11c500 0x100>;
507                         clock-frequency = <0>;
508                         interrupts = <36 2 0 0>;
509                 };
510
511                 serial1: serial@11c600 {
512                         cell-index = <1>;
513                         device_type = "serial";
514                         compatible = "ns16550";
515                         reg = <0x11c600 0x100>;
516                         clock-frequency = <0>;
517                         interrupts = <36 2 0 0>;
518                 };
519
520                 serial2: serial@11d500 {
521                         cell-index = <2>;
522                         device_type = "serial";
523                         compatible = "ns16550";
524                         reg = <0x11d500 0x100>;
525                         clock-frequency = <0>;
526                         interrupts = <37 2 0 0>;
527                 };
528
529                 serial3: serial@11d600 {
530                         cell-index = <3>;
531                         device_type = "serial";
532                         compatible = "ns16550";
533                         reg = <0x11d600 0x100>;
534                         clock-frequency = <0>;
535                         interrupts = <37 2 0 0>;
536                 };
537
538                 gpio0: gpio@130000 {
539                         compatible = "fsl,p3060-gpio", "fsl,qoriq-gpio";
540                         reg = <0x130000 0x1000>;
541                         interrupts = <55 2 0 0>;
542                         #gpio-cells = <2>;
543                         gpio-controller;
544                 };
545
546                 usb0: usb@210000 {
547                         compatible = "fsl,p3060-usb2-mph",
548                                         "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
549                         reg = <0x210000 0x1000>;
550                         #address-cells = <1>;
551                         #size-cells = <0>;
552                         interrupts = <44 0x2 0 0>;
553                 };
554
555                 usb1: usb@211000 {
556                         compatible = "fsl,p3060-usb2-dr",
557                                         "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
558                         reg = <0x211000 0x1000>;
559                         #address-cells = <1>;
560                         #size-cells = <0>;
561                         interrupts = <45 0x2 0 0>;
562                 };
563
564                 crypto: crypto@300000 {
565                         compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
566                         #address-cells = <1>;
567                         #size-cells = <1>;
568                         reg = <0x300000 0x10000>;
569                         ranges = <0 0x300000 0x10000>;
570                         interrupt-parent = <&mpic>;
571                         interrupts = <92 2 0 0>;
572
573                         sec_jr0: jr@1000 {
574                                 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
575                                 reg = <0x1000 0x1000>;
576                                 interrupt-parent = <&mpic>;
577                                 interrupts = <88 2 0 0>;
578                         };
579
580                         sec_jr1: jr@2000 {
581                                 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
582                                 reg = <0x2000 0x1000>;
583                                 interrupt-parent = <&mpic>;
584                                 interrupts = <89 2 0 0>;
585                         };
586
587                         sec_jr2: jr@3000 {
588                                 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
589                                 reg = <0x3000 0x1000>;
590                                 interrupt-parent = <&mpic>;
591                                 interrupts = <90 2 0 0>;
592                         };
593
594                         sec_jr3: jr@4000 {
595                                 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
596                                 reg = <0x4000 0x1000>;
597                                 interrupt-parent = <&mpic>;
598                                 interrupts = <91 2 0 0>;
599                         };
600
601                         rtic@6000 {
602                                 compatible = "fsl,sec-v4.1-rtic", "fsl,sec-v4.0-rtic";
603                                 #address-cells = <1>;
604                                 #size-cells = <1>;
605                                 reg = <0x6000 0x100>;
606                                 ranges = <0x0 0x6100 0xe00>;
607
608                                 rtic_a: rtic-a@0 {
609                                         compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
610                                         reg = <0x00 0x20 0x100 0x80>;
611                                 };
612
613                                 rtic_b: rtic-b@20 {
614                                         compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
615                                         reg = <0x20 0x20 0x200 0x80>;
616                                 };
617
618                                 rtic_c: rtic-c@40 {
619                                         compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
620                                         reg = <0x40 0x20 0x300 0x80>;
621                                 };
622
623                                 rtic_d: rtic-d@60 {
624                                         compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
625                                         reg = <0x60 0x20 0x500 0x80>;
626                                 };
627                         };
628                 };
629
630                 sec_mon: sec_mon@314000 {
631                         compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
632                         reg = <0x314000 0x1000>;
633                         interrupt-parent = <&mpic>;
634                         interrupts = <93 2 0 0>;
635                 };
636         };
637
638         rapidio@ffe0c0000 {
639                 compatible = "fsl,srio";
640                 interrupts = <16 2 1 11>;
641                 #address-cells = <2>;
642                 #size-cells = <2>;
643                 fsl,srio-rmu-handle = <&rmu>;
644                 ranges;
645
646                 port1 {
647                         #address-cells = <2>;
648                         #size-cells = <2>;
649                         cell-index = <1>;
650                 };
651
652                 port2 {
653                         #address-cells = <2>;
654                         #size-cells = <2>;
655                         cell-index = <2>;
656                 };
657         };
658
659         localbus@ffe124000 {
660                 compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
661                 interrupts = <25 2 0 0>;
662                 #address-cells = <2>;
663                 #size-cells = <1>;
664         };
665
666         pci0: pcie@ffe200000 {
667                 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
668                 device_type = "pci";
669                 #size-cells = <2>;
670                 #address-cells = <3>;
671                 bus-range = <0x0 0xff>;
672                 clock-frequency = <33333333>;
673                 fsl,msi = <&msi0>;
674                 interrupts = <16 2 1 15>;
675                 pcie@0 {
676                         reg = <0 0 0 0 0>;
677                         #interrupt-cells = <1>;
678                         #size-cells = <2>;
679                         #address-cells = <3>;
680                         device_type = "pci";
681                         interrupts = <16 2 1 15>;
682                         interrupt-map-mask = <0xf800 0 0 7>;
683                         interrupt-map = <
684                                 /* IDSEL 0x0 */
685                                 0000 0 0 1 &mpic 40 1 0 0
686                                 0000 0 0 2 &mpic 1 1 0 0
687                                 0000 0 0 3 &mpic 2 1 0 0
688                                 0000 0 0 4 &mpic 3 1 0 0
689                                 >;
690                 };
691         };
692
693         pci1: pcie@ffe201000 {
694                 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
695                 device_type = "pci";
696                 #size-cells = <2>;
697                 #address-cells = <3>;
698                 bus-range = <0 0xff>;
699                 clock-frequency = <33333333>;
700                 fsl,msi = <&msi1>;
701                 interrupts = <16 2 1 14>;
702                 pcie@0 {
703                         reg = <0 0 0 0 0>;
704                         #interrupt-cells = <1>;
705                         #size-cells = <2>;
706                         #address-cells = <3>;
707                         device_type = "pci";
708                         interrupts = <16 2 1 14>;
709                         interrupt-map-mask = <0xf800 0 0 7>;
710                         interrupt-map = <
711                                 /* IDSEL 0x0 */
712                                 0000 0 0 1 &mpic 41 1 0 0
713                                 0000 0 0 2 &mpic 5 1 0 0
714                                 0000 0 0 3 &mpic 6 1 0 0
715                                 0000 0 0 4 &mpic 7 1 0 0
716                                 >;
717                 };
718         };
719 };