2 * P3060 Silicon Device Tree Source
4 * Copyright 2011 Freescale Semiconductor Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
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12 * documentation and/or other materials provided with the distribution.
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14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 compatible = "fsl,P3060";
41 interrupt-parent = <&mpic>;
77 cpu0: PowerPC,e500mc@0 {
80 next-level-cache = <&L2_0>;
82 next-level-cache = <&cpc>;
85 cpu1: PowerPC,e500mc@1 {
88 next-level-cache = <&L2_1>;
90 next-level-cache = <&cpc>;
93 cpu4: PowerPC,e500mc@4 {
96 next-level-cache = <&L2_4>;
98 next-level-cache = <&cpc>;
101 cpu5: PowerPC,e500mc@5 {
104 next-level-cache = <&L2_5>;
106 next-level-cache = <&cpc>;
109 cpu6: PowerPC,e500mc@6 {
112 next-level-cache = <&L2_6>;
114 next-level-cache = <&cpc>;
117 cpu7: PowerPC,e500mc@7 {
120 next-level-cache = <&L2_7>;
122 next-level-cache = <&cpc>;
127 dcsr: dcsr@f00000000 {
128 #address-cells = <1>;
130 compatible = "fsl,dcsr", "simple-bus";
133 compatible = "fsl,dcsr-epu";
134 interrupts = <52 2 0 0
137 interrupt-parent = <&mpic>;
141 compatible = "fsl,dcsr-npc";
142 reg = <0x1000 0x1000 0x1000000 0x8000>;
145 compatible = "fsl,dcsr-nxc";
146 reg = <0x2000 0x1000>;
149 compatible = "fsl,dcsr-corenet";
150 reg = <0x8000 0x1000 0xB0000 0x1000>;
153 compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
154 reg = <0x9000 0x1000>;
157 compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
158 reg = <0x11000 0x1000>;
161 compatible = "fsl,dcsr-ddr";
163 reg = <0x12000 0x1000>;
166 compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
170 compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
183 dcsr-cpu-sb-proxy@44000 {
184 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu4>;
186 reg = <0x44000 0x1000>;
188 dcsr-cpu-sb-proxy@45000 {
189 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu5>;
191 reg = <0x45000 0x1000>;
193 dcsr-cpu-sb-proxy@46000 {
194 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195 cpu-handle = <&cpu6>;
196 reg = <0x46000 0x1000>;
198 dcsr-cpu-sb-proxy@47000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu7>;
201 reg = <0x47000 0x1000>;
206 #address-cells = <1>;
209 compatible = "simple-bus";
210 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
211 reg = <0xf 0xfe000000 0 0x00001000>;
214 compatible = "fsl,soc-sram-error";
215 interrupts = <16 2 1 29>;
219 compatible = "fsl,corenet-law";
224 ddr: memory-controller@8000 {
225 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
226 reg = <0x8000 0x1000>;
227 interrupts = <16 2 1 23>;
230 cpc: l3-cache-controller@10000 {
231 compatible = "fsl,p3060-l3-cache-controller", "cache";
232 reg = <0x10000 0x1000
234 interrupts = <16 2 1 27>;
238 compatible = "fsl,corenet-cf";
239 reg = <0x18000 0x1000>;
240 interrupts = <16 2 1 31>;
241 fsl,ccf-num-csdids = <32>;
242 fsl,ccf-num-snoopids = <32>;
246 compatible = "fsl,pamu-v1.0", "fsl,pamu";
247 reg = <0x20000 0x5000>;
254 clock-frequency = <0>;
255 interrupt-controller;
256 #address-cells = <0>;
257 #interrupt-cells = <4>;
258 reg = <0x40000 0x40000>;
259 compatible = "fsl,mpic", "chrp,open-pic";
260 device_type = "open-pic";
264 compatible = "fsl,mpic-msi";
265 reg = <0x41600 0x200>;
266 msi-available-ranges = <0 0x100>;
279 compatible = "fsl,mpic-msi";
280 reg = <0x41800 0x200>;
281 msi-available-ranges = <0 0x100>;
294 compatible = "fsl,mpic-msi";
295 reg = <0x41a00 0x200>;
296 msi-available-ranges = <0 0x100>;
309 #address-cells = <1>;
311 compatible = "fsl,srio-rmu";
312 reg = <0xd3000 0x500>;
313 ranges = <0x0 0xd3000 0x500>;
316 compatible = "fsl,srio-msg-unit";
319 60 2 0 0 /* msg1_tx_irq */
320 61 2 0 0>;/* msg1_rx_irq */
323 compatible = "fsl,srio-msg-unit";
326 62 2 0 0 /* msg2_tx_irq */
327 63 2 0 0>;/* msg2_rx_irq */
330 compatible = "fsl,srio-dbell-unit";
333 56 2 0 0 /* bell_outb_irq */
334 57 2 0 0>;/* bell_inb_irq */
336 port-write-unit@4e0 {
337 compatible = "fsl,srio-port-write-unit";
339 interrupts = <16 2 1 11>;
343 guts: global-utilities@e0000 {
344 compatible = "fsl,qoriq-device-config-1.0";
345 reg = <0xe0000 0xe00>;
348 fsl,liodn-bits = <12>;
351 pins: global-utilities@e0e00 {
352 compatible = "fsl,qoriq-pin-control-1.0";
353 reg = <0xe0e00 0x200>;
357 clockgen: global-utilities@e1000 {
358 compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
359 reg = <0xe1000 0x1000>;
360 clock-frequency = <0>;
363 rcpm: global-utilities@e2000 {
364 compatible = "fsl,qoriq-rcpm-1.0";
365 reg = <0xe2000 0x1000>;
370 compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
371 reg = <0xe8000 0x1000>;
374 serdes: serdes@ea000 {
375 compatible = "fsl,p3060-serdes";
376 reg = <0xea000 0x1000>;
380 #address-cells = <1>;
382 compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
383 reg = <0x100300 0x4>;
384 ranges = <0x0 0x100100 0x200>;
387 compatible = "fsl,p3060-dma-channel",
388 "fsl,eloplus-dma-channel";
391 interrupts = <28 2 0 0>;
394 compatible = "fsl,p3060-dma-channel",
395 "fsl,eloplus-dma-channel";
398 interrupts = <29 2 0 0>;
401 compatible = "fsl,p3060-dma-channel",
402 "fsl,eloplus-dma-channel";
405 interrupts = <30 2 0 0>;
408 compatible = "fsl,p3060-dma-channel",
409 "fsl,eloplus-dma-channel";
412 interrupts = <31 2 0 0>;
417 #address-cells = <1>;
419 compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
420 reg = <0x101300 0x4>;
421 ranges = <0x0 0x101100 0x200>;
424 compatible = "fsl,p3060-dma-channel",
425 "fsl,eloplus-dma-channel";
428 interrupts = <32 2 0 0>;
431 compatible = "fsl,p3060-dma-channel",
432 "fsl,eloplus-dma-channel";
435 interrupts = <33 2 0 0>;
438 compatible = "fsl,p3060-dma-channel",
439 "fsl,eloplus-dma-channel";
442 interrupts = <34 2 0 0>;
445 compatible = "fsl,p3060-dma-channel",
446 "fsl,eloplus-dma-channel";
449 interrupts = <35 2 0 0>;
454 #address-cells = <1>;
456 compatible = "fsl,p3060-espi", "fsl,mpc8536-espi";
457 reg = <0x110000 0x1000>;
458 interrupts = <53 0x2 0 0>;
459 fsl,espi-num-chipselects = <4>;
463 #address-cells = <1>;
466 compatible = "fsl-i2c";
467 reg = <0x118000 0x100>;
468 interrupts = <38 2 0 0>;
473 #address-cells = <1>;
476 compatible = "fsl-i2c";
477 reg = <0x118100 0x100>;
478 interrupts = <38 2 0 0>;
483 #address-cells = <1>;
486 compatible = "fsl-i2c";
487 reg = <0x119000 0x100>;
488 interrupts = <39 2 0 0>;
493 #address-cells = <1>;
496 compatible = "fsl-i2c";
497 reg = <0x119100 0x100>;
498 interrupts = <39 2 0 0>;
502 serial0: serial@11c500 {
504 device_type = "serial";
505 compatible = "ns16550";
506 reg = <0x11c500 0x100>;
507 clock-frequency = <0>;
508 interrupts = <36 2 0 0>;
511 serial1: serial@11c600 {
513 device_type = "serial";
514 compatible = "ns16550";
515 reg = <0x11c600 0x100>;
516 clock-frequency = <0>;
517 interrupts = <36 2 0 0>;
520 serial2: serial@11d500 {
522 device_type = "serial";
523 compatible = "ns16550";
524 reg = <0x11d500 0x100>;
525 clock-frequency = <0>;
526 interrupts = <37 2 0 0>;
529 serial3: serial@11d600 {
531 device_type = "serial";
532 compatible = "ns16550";
533 reg = <0x11d600 0x100>;
534 clock-frequency = <0>;
535 interrupts = <37 2 0 0>;
539 compatible = "fsl,p3060-gpio", "fsl,qoriq-gpio";
540 reg = <0x130000 0x1000>;
541 interrupts = <55 2 0 0>;
547 compatible = "fsl,p3060-usb2-mph",
548 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
549 reg = <0x210000 0x1000>;
550 #address-cells = <1>;
552 interrupts = <44 0x2 0 0>;
556 compatible = "fsl,p3060-usb2-dr",
557 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
558 reg = <0x211000 0x1000>;
559 #address-cells = <1>;
561 interrupts = <45 0x2 0 0>;
564 crypto: crypto@300000 {
565 compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
566 #address-cells = <1>;
568 reg = <0x300000 0x10000>;
569 ranges = <0 0x300000 0x10000>;
570 interrupt-parent = <&mpic>;
571 interrupts = <92 2 0 0>;
574 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
575 reg = <0x1000 0x1000>;
576 interrupt-parent = <&mpic>;
577 interrupts = <88 2 0 0>;
581 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
582 reg = <0x2000 0x1000>;
583 interrupt-parent = <&mpic>;
584 interrupts = <89 2 0 0>;
588 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
589 reg = <0x3000 0x1000>;
590 interrupt-parent = <&mpic>;
591 interrupts = <90 2 0 0>;
595 compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
596 reg = <0x4000 0x1000>;
597 interrupt-parent = <&mpic>;
598 interrupts = <91 2 0 0>;
602 compatible = "fsl,sec-v4.1-rtic", "fsl,sec-v4.0-rtic";
603 #address-cells = <1>;
605 reg = <0x6000 0x100>;
606 ranges = <0x0 0x6100 0xe00>;
609 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
610 reg = <0x00 0x20 0x100 0x80>;
614 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
615 reg = <0x20 0x20 0x200 0x80>;
619 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
620 reg = <0x40 0x20 0x300 0x80>;
624 compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
625 reg = <0x60 0x20 0x500 0x80>;
630 sec_mon: sec_mon@314000 {
631 compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
632 reg = <0x314000 0x1000>;
633 interrupt-parent = <&mpic>;
634 interrupts = <93 2 0 0>;
639 compatible = "fsl,srio";
640 interrupts = <16 2 1 11>;
641 #address-cells = <2>;
643 fsl,srio-rmu-handle = <&rmu>;
647 #address-cells = <2>;
653 #address-cells = <2>;
660 compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
661 interrupts = <25 2 0 0>;
662 #address-cells = <2>;
666 pci0: pcie@ffe200000 {
667 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
670 #address-cells = <3>;
671 bus-range = <0x0 0xff>;
672 clock-frequency = <33333333>;
674 interrupts = <16 2 1 15>;
677 #interrupt-cells = <1>;
679 #address-cells = <3>;
681 interrupts = <16 2 1 15>;
682 interrupt-map-mask = <0xf800 0 0 7>;
685 0000 0 0 1 &mpic 40 1 0 0
686 0000 0 0 2 &mpic 1 1 0 0
687 0000 0 0 3 &mpic 2 1 0 0
688 0000 0 0 4 &mpic 3 1 0 0
693 pci1: pcie@ffe201000 {
694 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
697 #address-cells = <3>;
698 bus-range = <0 0xff>;
699 clock-frequency = <33333333>;
701 interrupts = <16 2 1 14>;
704 #interrupt-cells = <1>;
706 #address-cells = <3>;
708 interrupts = <16 2 1 14>;
709 interrupt-map-mask = <0xf800 0 0 7>;
712 0000 0 0 1 &mpic 41 1 0 0
713 0000 0 0 2 &mpic 5 1 0 0
714 0000 0 0 3 &mpic 6 1 0 0
715 0000 0 0 4 &mpic 7 1 0 0