arch/powerpc/boot/dts/p1023rds.dts

   1 /*
   2  * P1023 RDS Device Tree Source
   3  *
   4  * Copyright 2010-2011 Freescale Semiconductor Inc.
   5  *
   6  * Author: Roy Zang <tie-fei.zang@freescale.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in the
  14  *       documentation and/or other materials provided with the distribution.
  15  *     * Neither the name of Freescale Semiconductor nor the
  16  *       names of its contributors may be used to endorse or promote products
  17  *       derived from this software without specific prior written permission.
  18  *
  19  *
  20  * ALTERNATIVELY, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") as published by the Free Software
  22  * Foundation, either version 2 of that License or (at your option) any
  23  * later version.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  26  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  27  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  29  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  31  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 /dts-v1/;
  38
  39 / {
  40         model = "fsl,P1023";
  41         compatible = "fsl,P1023RDS";
  42         #address-cells = <2>;
  43         #size-cells = <2>;
  44
  45         aliases {
  46                 serial0 = &serial0;
  47                 serial1 = &serial1;
  48                 pci0 = &pci0;
  49                 pci1 = &pci1;
  50                 pci2 = &pci2;
  51
  52                 crypto = &crypto;
  53                 sec_jr0 = &sec_jr0;
  54                 sec_jr1 = &sec_jr1;
  55                 sec_jr2 = &sec_jr2;
  56                 sec_jr3 = &sec_jr3;
  57                 rtic_a = &rtic_a;
  58                 rtic_b = &rtic_b;
  59                 rtic_c = &rtic_c;
  60                 rtic_d = &rtic_d;
  61         };
  62
  63         cpus {
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66
  67                 cpu0: PowerPC,P1023@0 {
  68                         device_type = "cpu";
  69                         reg = <0x0>;
  70                         next-level-cache = <&L2>;
  71                 };
  72
  73                 cpu1: PowerPC,P1023@1 {
  74                         device_type = "cpu";
  75                         reg = <0x1>;
  76                         next-level-cache = <&L2>;
  77                 };
  78         };
  79
  80         memory {
  81                 device_type = "memory";
  82         };
  83
  84         soc@ff600000 {
  85                 #address-cells = <1>;
  86                 #size-cells = <1>;
  87                 device_type = "soc";
  88                 compatible = "fsl,p1023-immr", "simple-bus";
  89                 ranges = <0x0 0x0 0xff600000 0x200000>;
  90                 bus-frequency = <0>;            // Filled out by uboot.
  91
  92                 ecm-law@0 {
  93                         compatible = "fsl,ecm-law";
  94                         reg = <0x0 0x1000>;
  95                         fsl,num-laws = <12>;
  96                 };
  97
  98                 ecm@1000 {
  99                         compatible = "fsl,p1023-ecm", "fsl,ecm";
 100                         reg = <0x1000 0x1000>;
 101                         interrupts = <16 2>;
 102                         interrupt-parent = <&mpic>;
 103                 };
 104
 105                 memory-controller@2000 {
 106                         compatible = "fsl,p1023-memory-controller";
 107                         reg = <0x2000 0x1000>;
 108                         interrupt-parent = <&mpic>;
 109                         interrupts = <16 2>;
 110                 };
 111
 112                 i2c@3000 {
 113                         #address-cells = <1>;
 114                         #size-cells = <0>;
 115                         cell-index = <0>;
 116                         compatible = "fsl-i2c";
 117                         reg = <0x3000 0x100>;
 118                         interrupts = <43 2>;
 119                         interrupt-parent = <&mpic>;
 120                         dfsrr;
 121                         rtc@68 {
 122                                 compatible = "dallas,ds1374";
 123                                 reg = <0x68>;
 124                         };
 125                 };
 126
 127                 i2c@3100 {
 128                         #address-cells = <1>;
 129                         #size-cells = <0>;
 130                         cell-index = <1>;
 131                         compatible = "fsl-i2c";
 132                         reg = <0x3100 0x100>;
 133                         interrupts = <43 2>;
 134                         interrupt-parent = <&mpic>;
 135                         dfsrr;
 136                 };
 137
 138                 serial0: serial@4500 {
 139                         cell-index = <0>;
 140                         device_type = "serial";
 141                         compatible = "ns16550";
 142                         reg = <0x4500 0x100>;
 143                         clock-frequency = <0>;
 144                         interrupts = <42 2>;
 145                         interrupt-parent = <&mpic>;
 146                 };
 147
 148                 serial1: serial@4600 {
 149                         cell-index = <1>;
 150                         device_type = "serial";
 151                         compatible = "ns16550";
 152                         reg = <0x4600 0x100>;
 153                         clock-frequency = <0>;
 154                         interrupts = <42 2>;
 155                         interrupt-parent = <&mpic>;
 156                 };
 157
 158                 spi@7000 {
 159                         cell-index = <0>;
 160                         #address-cells = <1>;
 161                         #size-cells = <0>;
 162                         compatible = "fsl,p1023-espi", "fsl,mpc8536-espi";
 163                         reg = <0x7000 0x1000>;
 164                         interrupts = <59 0x2>;
 165                         interrupt-parent = <&mpic>;
 166                         fsl,espi-num-chipselects = <4>;
 167
 168                         fsl_dataflash@0 {
 169                                 #address-cells = <1>;
 170                                 #size-cells = <1>;
 171                                 compatible = "atmel,at45db081d";
 172                                 reg = <0>;
 173                                 spi-max-frequency = <40000000>; /* input clock */
 174                                 partition@u-boot {
 175                                         /* 512KB for u-boot Bootloader Image */
 176                                         label = "u-boot-spi";
 177                                         reg = <0x00000000 0x00080000>;
 178                                         read-only;
 179                                 };
 180                                 partition@dtb {
 181                                         /* 512KB for DTB Image */
 182                                         label = "dtb-spi";
 183                                         reg = <0x00080000 0x00080000>;
 184                                         read-only;
 185                                 };
 186                         };
 187                 };
 188
 189                 gpio: gpio-controller@f000 {
 190                         #gpio-cells = <2>;
 191                         compatible = "fsl,qoriq-gpio";
 192                         reg = <0xf000 0x100>;
 193                         interrupts = <47 0x2>;
 194                         interrupt-parent = <&mpic>;
 195                         gpio-controller;
 196                 };
 197
 198                 L2: l2-cache-controller@20000 {
 199                         compatible = "fsl,p1023-l2-cache-controller";
 200                         reg = <0x20000 0x1000>;
 201                         cache-line-size = <32>; // 32 bytes
 202                         cache-size = <0x40000>; // L2,256K
 203                         interrupt-parent = <&mpic>;
 204                         interrupts = <16 2>;
 205                 };
 206
 207                 dma@21300 {
 208                         #address-cells = <1>;
 209                         #size-cells = <1>;
 210                         compatible = "fsl,eloplus-dma";
 211                         reg = <0x21300 0x4>;
 212                         ranges = <0x0 0x21100 0x200>;
 213                         cell-index = <0>;
 214                         dma-channel@0 {
 215                                 compatible = "fsl,eloplus-dma-channel";
 216                                 reg = <0x0 0x80>;
 217                                 cell-index = <0>;
 218                                 interrupt-parent = <&mpic>;
 219                                 interrupts = <20 2>;
 220                         };
 221                         dma-channel@80 {
 222                                 compatible = "fsl,eloplus-dma-channel";
 223                                 reg = <0x80 0x80>;
 224                                 cell-index = <1>;
 225                                 interrupt-parent = <&mpic>;
 226                                 interrupts = <21 2>;
 227                         };
 228                         dma-channel@100 {
 229                                 compatible = "fsl,eloplus-dma-channel";
 230                                 reg = <0x100 0x80>;
 231                                 cell-index = <2>;
 232                                 interrupt-parent = <&mpic>;
 233                                 interrupts = <22 2>;
 234                         };
 235                         dma-channel@180 {
 236                                 compatible = "fsl,eloplus-dma-channel";
 237                                 reg = <0x180 0x80>;
 238                                 cell-index = <3>;
 239                                 interrupt-parent = <&mpic>;
 240                                 interrupts = <23 2>;
 241                         };
 242                 };
 243
 244                 usb@22000 {
 245                         #address-cells = <1>;
 246                         #size-cells = <0>;
 247                         compatible = "fsl-usb2-dr";
 248                         reg = <0x22000 0x1000>;
 249                         interrupt-parent = <&mpic>;
 250                         interrupts = <28 0x2>;
 251                         dr_mode = "host";
 252                         phy_type = "ulpi";
 253                 };
 254
 255                 crypto: crypto@300000 {
 256                         compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
 257                         #address-cells = <1>;
 258                         #size-cells = <1>;
 259                         reg = <0x30000 0x10000>;
 260                         ranges = <0 0x30000 0x10000>;
 261                         interrupt-parent = <&mpic>;
 262                         interrupts = <58 2>;
 263
 264                         sec_jr0: jr@1000 {
 265                                 compatible = "fsl,sec-v4.2-job-ring",
 266                                              "fsl,sec-v4.0-job-ring";
 267                                 reg = <0x1000 0x1000>;
 268                                 interrupts = <45 2>;
 269                         };
 270
 271                         sec_jr1: jr@2000 {
 272                                 compatible = "fsl,sec-v4.2-job-ring",
 273                                              "fsl,sec-v4.0-job-ring";
 274                                 reg = <0x2000 0x1000>;
 275                                 interrupts = <45 2>;
 276                         };
 277
 278                         sec_jr2: jr@3000 {
 279                                 compatible = "fsl,sec-v4.2-job-ring",
 280                                              "fsl,sec-v4.0-job-ring";
 281                                 reg = <0x3000 0x1000>;
 282                                 interrupts = <57 2>;
 283                         };
 284
 285                         sec_jr3: jr@4000 {
 286                                 compatible = "fsl,sec-v4.2-job-ring",
 287                                              "fsl,sec-v4.0-job-ring";
 288                                 reg = <0x4000 0x1000>;
 289                                 interrupts = <57 2>;
 290                         };
 291
 292                         rtic@6000 {
 293                                 compatible = "fsl,sec-v4.2-rtic",
 294                                              "fsl,sec-v4.0-rtic";
 295                                 #address-cells = <1>;
 296                                 #size-cells = <1>;
 297                                 reg = <0x6000 0x100>;
 298                                 ranges = <0x0 0x6100 0xe00>;
 299
 300                                 rtic_a: rtic-a@0 {
 301                                         compatible = "fsl,sec-v4.2-rtic-memory",
 302                                                      "fsl,sec-v4.0-rtic-memory";
 303                                         reg = <0x00 0x20 0x100 0x80>;
 304                                 };
 305
 306                                 rtic_b: rtic-b@20 {
 307                                         compatible = "fsl,sec-v4.2-rtic-memory",
 308                                                      "fsl,sec-v4.0-rtic-memory";
 309                                         reg = <0x20 0x20 0x200 0x80>;
 310                                 };
 311
 312                                 rtic_c: rtic-c@40 {
 313                                         compatible = "fsl,sec-v4.2-rtic-memory",
 314                                                      "fsl,sec-v4.0-rtic-memory";
 315                                         reg = <0x40 0x20 0x300 0x80>;
 316                                 };
 317
 318                                 rtic_d: rtic-d@60 {
 319                                         compatible = "fsl,sec-v4.2-rtic-memory",
 320                                                      "fsl,sec-v4.0-rtic-memory";
 321                                         reg = <0x60 0x20 0x500 0x80>;
 322                                 };
 323                         };
 324                 };
 325
 326                 power@e0070{
 327                         compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc",
 328                                      "fsl,p1022-pmc";
 329                         reg = <0xe0070 0x20>;
 330                         etsec1_clk: soc-clk@B0{
 331                                 fsl,pmcdr-mask = <0x00000080>;
 332                         };
 333                         etsec2_clk: soc-clk@B1{
 334                                 fsl,pmcdr-mask = <0x00000040>;
 335                         };
 336                         etsec3_clk: soc-clk@B2{
 337                                 fsl,pmcdr-mask = <0x00000020>;
 338                         };
 339                 };
 340
 341                 mpic: pic@40000 {
 342                         interrupt-controller;
 343                         #address-cells = <0>;
 344                         #interrupt-cells = <2>;
 345                         reg = <0x40000 0x40000>;
 346                         compatible = "chrp,open-pic";
 347                         device_type = "open-pic";
 348                 };
 349
 350                 msi@41600 {
 351                         compatible = "fsl,p1023-msi", "fsl,mpic-msi";
 352                         reg = <0x41600 0x80>;
 353                         msi-available-ranges = <0 0x100>;
 354                         interrupts = <
 355                                 0xe0 0
 356                                 0xe1 0
 357                                 0xe2 0
 358                                 0xe3 0
 359                                 0xe4 0
 360                                 0xe5 0
 361                                 0xe6 0
 362                                 0xe7 0>;
 363                         interrupt-parent = <&mpic>;
 364                 };
 365
 366                 global-utilities@e0000 {        //global utilities block
 367                         compatible = "fsl,p1023-guts";
 368                         reg = <0xe0000 0x1000>;
 369                         fsl,has-rstcr;
 370                 };
 371         };
 372
 373         localbus@ff605000 {
 374                 #address-cells = <2>;
 375                 #size-cells = <1>;
 376                 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
 377                 reg = <0 0xff605000 0 0x1000>;
 378                 interrupts = <19 2>;
 379                 interrupt-parent = <&mpic>;
 380
 381                 /* NOR Flash, BCSR */
 382                 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
 383                           0x1 0x0 0x0 0xe0000000 0x00008000>;
 384
 385                 nor@0,0 {
 386                         #address-cells = <1>;
 387                         #size-cells = <1>;
 388                         compatible = "cfi-flash";
 389                         reg = <0x0 0x0 0x02000000>;
 390                         bank-width = <2>;
 391                         device-width = <1>;
 392                         partition@0 {
 393                                 label = "ramdisk";
 394                                 reg = <0x00000000 0x01c00000>;
 395                         };
 396                         partition@1c00000 {
 397                                 label = "kernel";
 398                                 reg = <0x01c00000 0x002e0000>;
 399                         };
 400                         partiton@1ee0000 {
 401                                 label = "dtb";
 402                                 reg = <0x01ee0000 0x00020000>;
 403                         };
 404                         partition@1f00000 {
 405                                 label = "firmware";
 406                                 reg = <0x01f00000 0x00080000>;
 407                                 read-only;
 408                         };
 409                         partition@1f80000 {
 410                                 label = "u-boot";
 411                                 reg = <0x01f80000 0x00080000>;
 412                                 read-only;
 413                         };
 414                 };
 415
 416                 fpga@1,0 {
 417                         #address-cells = <1>;
 418                         #size-cells = <1>;
 419                         compatible = "fsl,p1023rds-fpga";
 420                         reg = <1 0 0x8000>;
 421                         ranges = <0 1 0 0x8000>;
 422
 423                         bcsr@20 {
 424                                 compatible = "fsl,p1023rds-bcsr";
 425                                 reg = <0x20 0x20>;
 426                         };
 427                 };
 428         };
 429
 430         pci0: pcie@ff60a000 {
 431                 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
 432                 cell-index = <1>;
 433                 device_type = "pci";
 434                 #size-cells = <2>;
 435                 #address-cells = <3>;
 436                 reg = <0 0xff60a000 0 0x1000>;
 437                 bus-range = <0 255>;
 438                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
 439                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
 440                 clock-frequency = <33333333>;
 441                 interrupt-parent = <&mpic>;
 442                 interrupts = <16 2>;
 443                 pcie@0 {
 444                         reg = <0x0 0x0 0x0 0x0 0x0>;
 445                         #interrupt-cells = <1>;
 446                         #size-cells = <2>;
 447                         #address-cells = <3>;
 448                         device_type = "pci";
 449                         interrupt-parent = <&mpic>;
 450                         interrupts = <16 2>;
 451                         interrupt-map-mask = <0xf800 0 0 7>;
 452                         interrupt-map = <
 453                                 /* IDSEL 0x0 */
 454                                 0000 0 0 1 &mpic 0 1
 455                                 0000 0 0 2 &mpic 1 1
 456                                 0000 0 0 3 &mpic 2 1
 457                                 0000 0 0 4 &mpic 3 1
 458                                 >;
 459                         ranges = <0x2000000 0x0 0xc0000000
 460                                   0x2000000 0x0 0xc0000000
 461                                   0x0 0x20000000
 462
 463                                   0x1000000 0x0 0x0
 464                                   0x1000000 0x0 0x0
 465                                   0x0 0x100000>;
 466                 };
 467         };
 468
 469         pci1: pcie@ff609000 {
 470                 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
 471                 cell-index = <2>;
 472                 device_type = "pci";
 473                 #size-cells = <2>;
 474                 #address-cells = <3>;
 475                 reg = <0 0xff609000 0 0x1000>;
 476                 bus-range = <0 255>;
 477                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 478                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 479                 clock-frequency = <33333333>;
 480                 interrupt-parent = <&mpic>;
 481                 interrupts = <16 2>;
 482                 pcie@0 {
 483                         reg = <0x0 0x0 0x0 0x0 0x0>;
 484                         #interrupt-cells = <1>;
 485                         #size-cells = <2>;
 486                         #address-cells = <3>;
 487                         device_type = "pci";
 488                         interrupt-parent = <&mpic>;
 489                         interrupts = <16 2>;
 490                         interrupt-map-mask = <0xf800 0 0 7>;
 491                         interrupt-map = <
 492                                 /* IDSEL 0x0 */
 493                                 0000 0 0 1 &mpic 4 1
 494                                 0000 0 0 2 &mpic 5 1
 495                                 0000 0 0 3 &mpic 6 1
 496                                 0000 0 0 4 &mpic 7 1
 497                                 >;
 498                         ranges = <0x2000000 0x0 0xa0000000
 499                                   0x2000000 0x0 0xa0000000
 500                                   0x0 0x20000000
 501
 502                                   0x1000000 0x0 0x0
 503                                   0x1000000 0x0 0x0
 504                                   0x0 0x100000>;
 505                 };
 506         };
 507
 508         pci2: pcie@ff60b000 {
 509                 cell-index = <3>;
 510                 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
 511                 device_type = "pci";
 512                 #size-cells = <2>;
 513                 #address-cells = <3>;
 514                 reg = <0 0xff60b000 0 0x1000>;
 515                 bus-range = <0 255>;
 516                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 517                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 518                 clock-frequency = <33333333>;
 519                 interrupt-parent = <&mpic>;
 520                 interrupts = <16 2>;
 521                 pcie@0 {
 522                         reg = <0x0 0x0 0x0 0x0 0x0>;
 523                         #interrupt-cells = <1>;
 524                         #size-cells = <2>;
 525                         #address-cells = <3>;
 526                         device_type = "pci";
 527                         interrupt-parent = <&mpic>;
 528                         interrupts = <16 2>;
 529                         interrupt-map-mask = <0xf800 0 0 7>;
 530                         interrupt-map = <
 531                                 /* IDSEL 0x0 */
 532                                 0000 0 0 1 &mpic 8 1
 533                                 0000 0 0 2 &mpic 9 1
 534                                 0000 0 0 3 &mpic 10 1
 535                                 0000 0 0 4 &mpic 11 1
 536                                 >;
 537                         ranges = <0x2000000 0x0 0x80000000
 538                                   0x2000000 0x0 0x80000000
 539                                   0x0 0x20000000
 540
 541                                   0x1000000 0x0 0x0
 542                                   0x1000000 0x0 0x0
 543                                   0x0 0x100000>;
 544                 };
 545         };
 546 };