arch/powerpc/boot/dts/mpc8560ads.dts

   1 /*
   2  * MPC8560 ADS Device Tree Source
   3  *
   4  * Copyright 2006, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8560ADS";
  16         compatible = "MPC8560ADS", "MPC85xxADS";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8560@0 {
  35                         device_type = "cpu";
  36                         reg = <0x0>;
  37                         d-cache-line-size = <32>;       // 32 bytes
  38                         i-cache-line-size = <32>;       // 32 bytes
  39                         d-cache-size = <0x8000>;                // L1, 32K
  40                         i-cache-size = <0x8000>;                // L1, 32K
  41                         timebase-frequency = <82500000>;
  42                         bus-frequency = <330000000>;
  43                         clock-frequency = <825000000>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x0 0x10000000>;
  50         };
  51
  52         soc8560@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 compatible = "simple-bus";
  57                 ranges = <0x0 0xe0000000 0x100000>;
  58                 reg = <0xe0000000 0x200>;
  59                 bus-frequency = <330000000>;
  60
  61                 memory-controller@2000 {
  62                         compatible = "fsl,8540-memory-controller";
  63                         reg = <0x2000 0x1000>;
  64                         interrupt-parent = <&mpic>;
  65                         interrupts = <18 2>;
  66                 };
  67
  68                 L2: l2-cache-controller@20000 {
  69                         compatible = "fsl,8540-l2-cache-controller";
  70                         reg = <0x20000 0x1000>;
  71                         cache-line-size = <32>; // 32 bytes
  72                         cache-size = <0x40000>; // L2, 256K
  73                         interrupt-parent = <&mpic>;
  74                         interrupts = <16 2>;
  75                 };
  76
  77                 dma@21300 {
  78                         #address-cells = <1>;
  79                         #size-cells = <1>;
  80                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  81                         reg = <0x21300 0x4>;
  82                         ranges = <0x0 0x21100 0x200>;
  83                         cell-index = <0>;
  84                         dma-channel@0 {
  85                                 compatible = "fsl,mpc8560-dma-channel",
  86                                                 "fsl,eloplus-dma-channel";
  87                                 reg = <0x0 0x80>;
  88                                 cell-index = <0>;
  89                                 interrupt-parent = <&mpic>;
  90                                 interrupts = <20 2>;
  91                         };
  92                         dma-channel@80 {
  93                                 compatible = "fsl,mpc8560-dma-channel",
  94                                                 "fsl,eloplus-dma-channel";
  95                                 reg = <0x80 0x80>;
  96                                 cell-index = <1>;
  97                                 interrupt-parent = <&mpic>;
  98                                 interrupts = <21 2>;
  99                         };
 100                         dma-channel@100 {
 101                                 compatible = "fsl,mpc8560-dma-channel",
 102                                                 "fsl,eloplus-dma-channel";
 103                                 reg = <0x100 0x80>;
 104                                 cell-index = <2>;
 105                                 interrupt-parent = <&mpic>;
 106                                 interrupts = <22 2>;
 107                         };
 108                         dma-channel@180 {
 109                                 compatible = "fsl,mpc8560-dma-channel",
 110                                                 "fsl,eloplus-dma-channel";
 111                                 reg = <0x180 0x80>;
 112                                 cell-index = <3>;
 113                                 interrupt-parent = <&mpic>;
 114                                 interrupts = <23 2>;
 115                         };
 116                 };
 117
 118                 enet0: ethernet@24000 {
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121                         cell-index = <0>;
 122                         device_type = "network";
 123                         model = "TSEC";
 124                         compatible = "gianfar";
 125                         reg = <0x24000 0x1000>;
 126                         ranges = <0x0 0x24000 0x1000>;
 127                         local-mac-address = [ 00 00 00 00 00 00 ];
 128                         interrupts = <29 2 30 2 34 2>;
 129                         interrupt-parent = <&mpic>;
 130                         tbi-handle = <&tbi0>;
 131                         phy-handle = <&phy0>;
 132
 133                         mdio@520 {
 134                                 #address-cells = <1>;
 135                                 #size-cells = <0>;
 136                                 compatible = "fsl,gianfar-mdio";
 137                                 reg = <0x520 0x20>;
 138
 139                                 phy0: ethernet-phy@0 {
 140                                         interrupt-parent = <&mpic>;
 141                                         interrupts = <5 1>;
 142                                         reg = <0x0>;
 143                                         device_type = "ethernet-phy";
 144                                 };
 145                                 phy1: ethernet-phy@1 {
 146                                         interrupt-parent = <&mpic>;
 147                                         interrupts = <5 1>;
 148                                         reg = <0x1>;
 149                                         device_type = "ethernet-phy";
 150                                 };
 151                                 phy2: ethernet-phy@2 {
 152                                         interrupt-parent = <&mpic>;
 153                                         interrupts = <7 1>;
 154                                         reg = <0x2>;
 155                                         device_type = "ethernet-phy";
 156                                 };
 157                                 phy3: ethernet-phy@3 {
 158                                         interrupt-parent = <&mpic>;
 159                                         interrupts = <7 1>;
 160                                         reg = <0x3>;
 161                                         device_type = "ethernet-phy";
 162                                 };
 163                                 tbi0: tbi-phy@11 {
 164                                         reg = <0x11>;
 165                                         device_type = "tbi-phy";
 166                                 };
 167                         };
 168                 };
 169
 170                 enet1: ethernet@25000 {
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173                         cell-index = <1>;
 174                         device_type = "network";
 175                         model = "TSEC";
 176                         compatible = "gianfar";
 177                         reg = <0x25000 0x1000>;
 178                         ranges = <0x0 0x25000 0x1000>;
 179                         local-mac-address = [ 00 00 00 00 00 00 ];
 180                         interrupts = <35 2 36 2 40 2>;
 181                         interrupt-parent = <&mpic>;
 182                         tbi-handle = <&tbi1>;
 183                         phy-handle = <&phy1>;
 184
 185                         mdio@520 {
 186                                 #address-cells = <1>;
 187                                 #size-cells = <0>;
 188                                 compatible = "fsl,gianfar-tbi";
 189                                 reg = <0x520 0x20>;
 190
 191                                 tbi1: tbi-phy@11 {
 192                                         reg = <0x11>;
 193                                         device_type = "tbi-phy";
 194                                 };
 195                         };
 196                 };
 197
 198                 mpic: pic@40000 {
 199                         interrupt-controller;
 200                         #address-cells = <0>;
 201                         #interrupt-cells = <2>;
 202                         reg = <0x40000 0x40000>;
 203                         compatible = "chrp,open-pic";
 204                         device_type = "open-pic";
 205                 };
 206
 207                 cpm@919c0 {
 208                         #address-cells = <1>;
 209                         #size-cells = <1>;
 210                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
 211                         reg = <0x919c0 0x30>;
 212                         ranges;
 213
 214                         muram@80000 {
 215                                 #address-cells = <1>;
 216                                 #size-cells = <1>;
 217                                 ranges = <0x0 0x80000 0x10000>;
 218
 219                                 data@0 {
 220                                         compatible = "fsl,cpm-muram-data";
 221                                         reg = <0x0 0x4000 0x9000 0x2000>;
 222                                 };
 223                         };
 224
 225                         brg@919f0 {
 226                                 compatible = "fsl,mpc8560-brg",
 227                                              "fsl,cpm2-brg",
 228                                              "fsl,cpm-brg";
 229                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 230                                 clock-frequency = <165000000>;
 231                         };
 232
 233                         cpmpic: pic@90c00 {
 234                                 interrupt-controller;
 235                                 #address-cells = <0>;
 236                                 #interrupt-cells = <2>;
 237                                 interrupts = <46 2>;
 238                                 interrupt-parent = <&mpic>;
 239                                 reg = <0x90c00 0x80>;
 240                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
 241                         };
 242
 243                         serial0: serial@91a00 {
 244                                 device_type = "serial";
 245                                 compatible = "fsl,mpc8560-scc-uart",
 246                                              "fsl,cpm2-scc-uart";
 247                                 reg = <0x91a00 0x20 0x88000 0x100>;
 248                                 fsl,cpm-brg = <1>;
 249                                 fsl,cpm-command = <0x800000>;
 250                                 current-speed = <115200>;
 251                                 interrupts = <40 8>;
 252                                 interrupt-parent = <&cpmpic>;
 253                         };
 254
 255                         serial1: serial@91a20 {
 256                                 device_type = "serial";
 257                                 compatible = "fsl,mpc8560-scc-uart",
 258                                              "fsl,cpm2-scc-uart";
 259                                 reg = <0x91a20 0x20 0x88100 0x100>;
 260                                 fsl,cpm-brg = <2>;
 261                                 fsl,cpm-command = <0x4a00000>;
 262                                 current-speed = <115200>;
 263                                 interrupts = <41 8>;
 264                                 interrupt-parent = <&cpmpic>;
 265                         };
 266
 267                         enet2: ethernet@91320 {
 268                                 device_type = "network";
 269                                 compatible = "fsl,mpc8560-fcc-enet",
 270                                              "fsl,cpm2-fcc-enet";
 271                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
 272                                 local-mac-address = [ 00 00 00 00 00 00 ];
 273                                 fsl,cpm-command = <0x16200300>;
 274                                 interrupts = <33 8>;
 275                                 interrupt-parent = <&cpmpic>;
 276                                 phy-handle = <&phy2>;
 277                         };
 278
 279                         enet3: ethernet@91340 {
 280                                 device_type = "network";
 281                                 compatible = "fsl,mpc8560-fcc-enet",
 282                                              "fsl,cpm2-fcc-enet";
 283                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
 284                                 local-mac-address = [ 00 00 00 00 00 00 ];
 285                                 fsl,cpm-command = <0x1a400300>;
 286                                 interrupts = <34 8>;
 287                                 interrupt-parent = <&cpmpic>;
 288                                 phy-handle = <&phy3>;
 289                         };
 290                 };
 291         };
 292
 293         pci0: pci@e0008000 {
 294                 cell-index = <0>;
 295                 #interrupt-cells = <1>;
 296                 #size-cells = <2>;
 297                 #address-cells = <3>;
 298                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 299                 device_type = "pci";
 300                 reg = <0xe0008000 0x1000>;
 301                 clock-frequency = <66666666>;
 302                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 303                 interrupt-map = <
 304
 305                                 /* IDSEL 0x2 */
 306                                  0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
 307                                  0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
 308                                  0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
 309                                  0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
 310
 311                                 /* IDSEL 0x3 */
 312                                  0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
 313                                  0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
 314                                  0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
 315                                  0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
 316
 317                                 /* IDSEL 0x4 */
 318                                  0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
 319                                  0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
 320                                  0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
 321                                  0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
 322
 323                                 /* IDSEL 0x5  */
 324                                  0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
 325                                  0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
 326                                  0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
 327                                  0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
 328
 329                                 /* IDSEL 12 */
 330                                  0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
 331                                  0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
 332                                  0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
 333                                  0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
 334
 335                                 /* IDSEL 13 */
 336                                  0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
 337                                  0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
 338                                  0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
 339                                  0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
 340
 341                                 /* IDSEL 14*/
 342                                  0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
 343                                  0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
 344                                  0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
 345                                  0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
 346
 347                                 /* IDSEL 15 */
 348                                  0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
 349                                  0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
 350                                  0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
 351                                  0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
 352
 353                                 /* IDSEL 18 */
 354                                  0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
 355                                  0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
 356                                  0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
 357                                  0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
 358
 359                                 /* IDSEL 19 */
 360                                  0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
 361                                  0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
 362                                  0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
 363                                  0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
 364
 365                                 /* IDSEL 20 */
 366                                  0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
 367                                  0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
 368                                  0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
 369                                  0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
 370
 371                                 /* IDSEL 21 */
 372                                  0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
 373                                  0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
 374                                  0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
 375                                  0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
 376
 377                 interrupt-parent = <&mpic>;
 378                 interrupts = <24 2>;
 379                 bus-range = <0 0>;
 380                 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 381                           0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
 382         };
 383 };